From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: <intel-gfx@lists.freedesktop.org>,
<intel-xe@lists.freedesktop.org>,
<dri-devel@lists.freedesktop.org>, <jouni.hogander@intel.com>,
<animesh.manna@intel.com>
Subject: Re: [PATCH 12/19] drm/i915/dp: Add member to intel_dp to store AS SDP v2 support
Date: Tue, 31 Mar 2026 17:19:50 +0530 [thread overview]
Message-ID: <e0426b25-05d7-4427-a640-d3b4f90ae43b@intel.com> (raw)
In-Reply-To: <acrBC7i78e_F4hKM@intel.com>
On 3/30/2026 11:59 PM, Ville Syrjälä wrote:
> On Mon, Mar 30, 2026 at 09:36:49AM +0530, Ankit Nautiyal wrote:
>> DP v2.1 SCR advertises support for FAVT payload fields parsing in DPCD
>> 0x2214 Bit 2. This indicates the support for Adaptive-Sync SDP version 2
>> (AS SDP v2), which allows the source to set the version in HB2[4:0] and the
>> payload length in HB3[5:0] of the AS SDP header.
>>
>> DP v2.1 SCR also adds a bit for Async Video Timing during Panel Replay, in
>> Panel Replay Capability DPCD 0x00b1 (Bit 3). When this bit is cleared, the
>> sink supports asynchronous video timing while in a Panel Replay Active
>> state. The spec mandates that such sinks shall support AS SDP v2.
>>
>> Infer AS SDP v2 support from these capabilities and store it in
>> struct intel_dp for use by subsequent feature enablement changes.
>>
>> v2:
>> - Include parsing ASYNC_VIDEO_TIMING_NOT_SUPPORTED_IN_PR bit to
>> determine AS SDP v2 support. (Ville)
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>> .../drm/i915/display/intel_display_types.h | 1 +
>> drivers/gpu/drm/i915/display/intel_dp.c | 37 +++++++++++++++++++
>> 2 files changed, 38 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
>> index e2496db1642a..efc609eef4f5 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>> @@ -1870,6 +1870,7 @@ struct intel_dp {
>> /* connector directly attached - won't be use for modeset in mst world */
>> struct intel_connector *attached_connector;
>> bool as_sdp_supported;
>> + bool as_sdp_v2_supported;
>>
>> struct drm_dp_tunnel *tunnel;
>> bool tunnel_suspended:1;
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index f9bfb07f0205..b2007ffe18bc 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -6301,6 +6301,40 @@ intel_dp_unset_edid(struct intel_dp *intel_dp)
>> false);
>> }
>>
>> +static bool
>> +intel_dp_sink_supports_as_sdp_v2(struct intel_dp *intel_dp)
>> +{
>> + u8 rx_features;
>> + u8 pr_caps;
>> +
>> + /*
>> + * The DP spec does not explicitly provide the AS SDP v2 capability.
>> + * So based on the DP v2.1 SCR, we infer it from the following bits:
>> + *
>> + * DP_AS_SDP_FAVT_PAYLOAD_FIELDS_PARSING_SUPPORTED indicates support for
>> + * FAVT, which is explicitly defined to use AS SDP v2.
>> + *
>> + * DP_ASYNC_VIDEO_TIMING_NOT_SUPPORTED_IN_PR cleared indicates support
>> + * for Async Video timing in PR active and the spec mandates that such
>> + * sinks shall support AS SDP v2.
>> + */
>> + if (drm_dp_dpcd_read_byte(&intel_dp->aux,
>> + DP_DPRX_FEATURE_ENUMERATION_LIST_CONT_1,
>> + &rx_features) == 1) {
>> + if (rx_features & DP_AS_SDP_FAVT_PAYLOAD_FIELDS_PARSING_SUPPORTED)
>> + return true;
>> + }
>> +
>> + if (drm_dp_dpcd_read_byte(&intel_dp->aux,
>> + DP_PANEL_REPLAY_CAP_CAPABILITY,
>> + &pr_caps) == 1) {
>> + if (!(pr_caps & DP_PANEL_REPLAY_ASYNC_VIDEO_TIMING_NOT_SUPPORTED_IN_PR))
> That seems to be backwards. If the sink requires AS SDP
> then it will set the bit.
Hmm.. I indeed got it backwards, you are right.
If Async Video timing is supported then re-set the bit. But in that case
AS SDP is not required.
So reset means AS SDP not required; bit set means it is required.
Thanks, I will correct this in next version.
Regards,
Ankit
>
>> + return true;
>> + }
>> +
>> + return false;
>> +}
>> +
>> static void
>> intel_dp_detect_sdp_caps(struct intel_dp *intel_dp)
>> {
>> @@ -6308,6 +6342,9 @@ intel_dp_detect_sdp_caps(struct intel_dp *intel_dp)
>>
>> intel_dp->as_sdp_supported = HAS_AS_SDP(display) &&
>> drm_dp_as_sdp_supported(&intel_dp->aux, intel_dp->dpcd);
>> +
>> + intel_dp->as_sdp_v2_supported = intel_dp->as_sdp_supported &&
>> + intel_dp_sink_supports_as_sdp_v2(intel_dp);
>> }
>>
>> static bool intel_dp_needs_dpcd_probe(struct intel_dp *intel_dp, bool force_on_external)
>> --
>> 2.45.2
next prev parent reply other threads:[~2026-03-31 11:50 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-30 4:06 [PATCH 00/19] Fix Adaptive Sync SDP for PR with Link ON + Auxless ALPM Ankit Nautiyal
2026-03-30 4:06 ` [PATCH 01/19] drm/dp: Rename and relocate AS SDP payload field masks Ankit Nautiyal
2026-03-30 4:06 ` [PATCH 02/19] drm/dp: Clean up DPRX feature enumeration macros Ankit Nautiyal
2026-03-30 4:06 ` [PATCH 03/19] drm/dp: Add bits for AS SDP FAVT Payload Fields Parsing support Ankit Nautiyal
2026-03-30 4:06 ` [PATCH 04/19] drm/dp: Add DPCD for configuring AS SDP for PR + VRR Ankit Nautiyal
2026-03-30 18:19 ` Ville Syrjälä
2026-03-31 11:41 ` Nautiyal, Ankit K
2026-03-30 4:06 ` [PATCH 05/19] drm/i915/dp: Fix readback for target_rr in Adaptive Sync SDP Ankit Nautiyal
2026-03-30 4:06 ` [PATCH 06/19] drm/i915/vrr: Avoid vrr for PCON with HDMI2.1 sink Ankit Nautiyal
2026-03-30 4:06 ` [PATCH 07/19] drm/i915/dp: Account for AS_SDP guardband only when enabled Ankit Nautiyal
2026-03-30 18:20 ` Ville Syrjälä
2026-03-30 4:06 ` [PATCH 08/19] drm/i915/dp: Add a helper to decide if AS SDP can be used Ankit Nautiyal
2026-03-30 18:21 ` Ville Syrjälä
2026-03-30 19:40 ` Ville Syrjälä
2026-03-31 11:44 ` Nautiyal, Ankit K
2026-03-31 11:42 ` Nautiyal, Ankit K
2026-03-31 12:00 ` Ville Syrjälä
2026-03-30 4:06 ` [PATCH 09/19] drm/i915/dp: Skip AS SDP for DP branch devices Ankit Nautiyal
2026-03-30 18:22 ` Ville Syrjälä
2026-03-30 4:06 ` [PATCH 10/19] drm/i915/dp: Use revision field of AS SDP data structure Ankit Nautiyal
2026-03-30 4:06 ` [PATCH 11/19] drm/i915/dp: Include all relevant AS SDP fields in comparison Ankit Nautiyal
2026-03-30 18:26 ` Ville Syrjälä
2026-03-31 11:47 ` Nautiyal, Ankit K
2026-03-30 4:06 ` [PATCH 12/19] drm/i915/dp: Add member to intel_dp to store AS SDP v2 support Ankit Nautiyal
2026-03-30 18:29 ` Ville Syrjälä
2026-03-31 11:49 ` Nautiyal, Ankit K [this message]
2026-03-30 4:06 ` [PATCH 13/19] drm/i915/psr: Write the PR config DPCDs in burst mode Ankit Nautiyal
2026-03-30 18:44 ` Ville Syrjälä
2026-03-31 11:51 ` Nautiyal, Ankit K
2026-03-30 4:06 ` [PATCH 14/19] drm/i915/display: Add helper for AS SDP transmission time selection Ankit Nautiyal
2026-03-30 18:47 ` Ville Syrjälä
2026-03-30 4:06 ` [PATCH 15/19] drm/i915/psr: Program Panel Replay CONFIG3 using AS SDP transmission time Ankit Nautiyal
2026-03-30 18:54 ` Ville Syrjälä
2026-03-31 11:58 ` Nautiyal, Ankit K
2026-03-31 12:04 ` Ville Syrjälä
2026-03-30 4:06 ` [PATCH 16/19] drm/i915/dp: Set relevant Downspread Ctrl DPCD bits for PR + Auxless ALPM Ankit Nautiyal
2026-03-30 19:22 ` Ville Syrjälä
2026-03-31 12:01 ` Nautiyal, Ankit K
2026-03-30 4:06 ` [PATCH 17/19] drm/i915/dp: Program AS SDP DB[1:0] for PR with Link off Ankit Nautiyal
2026-03-30 4:06 ` [PATCH 18/19] drm/i915/dp: Split AS SDP computation between compute_config and compute_config_late Ankit Nautiyal
2026-03-30 19:38 ` Ville Syrjälä
2026-03-31 12:05 ` Nautiyal, Ankit K
2026-03-30 4:06 ` [PATCH 19/19] drm/i915/dp: Always enable AS SDP if supported by source + sink Ankit Nautiyal
2026-03-30 19:50 ` Ville Syrjälä
2026-03-31 12:06 ` Nautiyal, Ankit K
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