From: Clint Taylor <Clinton.A.Taylor@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 5/5] drm/i915/display/adl_p: Disable PSR2
Date: Mon, 24 May 2021 15:28:48 -0700 [thread overview]
Message-ID: <eb417513-6d01-7aac-b020-4c03eefa84bf@intel.com> (raw)
In-Reply-To: <20210524214805.259692-5-jose.souza@intel.com>
On 5/24/21 2:48 PM, José Roberto de Souza wrote:
> We are missing the implementation of some workarounds to enabled PSR2
> in Alderlake P, so to avoid any CI report of issues around PSR2
> disabling it until all PSR2 workarounds are implemented.
>
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index c57210862206..46bd77669ead 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -765,6 +765,16 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
> return false;
> }
>
> + /*
> + * We are missing the implementation of some workarounds to enabled PSR2
> + * also Windows team found issues in this stepping that are causing
> + * issues in most PSR2 panels.
> + */
> + if (IS_ALDERLAKE_P(dev_priv)) {
> + drm_dbg_kms(&dev_priv->drm, "PSR2 is missing the implementation of workarounds\n");
> + return false;
> + }
> +
> if (!transcoder_has_psr2(dev_priv, crtc_state->cpu_transcoder)) {
> drm_dbg_kms(&dev_priv->drm,
> "PSR2 not supported in transcoder %s\n",
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
-Clint
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next prev parent reply other threads:[~2021-05-24 22:28 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-24 21:48 [Intel-gfx] [PATCH 1/5] drm/i915/display/adl_p: Drop earlier return in tc_has_modular_fia() José Roberto de Souza
2021-05-24 21:48 ` [Intel-gfx] [PATCH 2/5] drm/i915/adl_p: Handle TC cold José Roberto de Souza
2021-05-24 22:24 ` Clint Taylor
2021-05-24 21:48 ` [Intel-gfx] [PATCH 3/5] drm/i915: WA for zero memory channel José Roberto de Souza
2021-05-24 22:25 ` Clint Taylor
2021-05-24 21:48 ` [Intel-gfx] [PATCH 4/5] drm/i915/display/adl_p: Allow DC3CO in pipe and port B José Roberto de Souza
2021-05-24 22:28 ` Clint Taylor
2021-05-24 21:48 ` [Intel-gfx] [PATCH 5/5] drm/i915/display/adl_p: Disable PSR2 José Roberto de Souza
2021-05-24 22:28 ` Clint Taylor [this message]
2021-05-25 10:55 ` Jani Nikula
2021-05-25 17:31 ` Souza, Jose
2021-05-24 22:23 ` [Intel-gfx] [PATCH 1/5] drm/i915/display/adl_p: Drop earlier return in tc_has_modular_fia() Clint Taylor
2021-05-24 23:01 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/5] " Patchwork
2021-05-24 23:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-25 6:30 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-05-25 17:31 ` Souza, Jose
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