Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
To: Matt Roper <matthew.d.roper@intel.com>,
	Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	"Juha-Pekka Heikkilä" <juha-pekka.heikkila@intel.com>
Subject: Re: [PATCH v3 04/21] drm/i915/xe2hpd: Skip CCS modifiers
Date: Tue, 16 Apr 2024 14:15:48 +0300	[thread overview]
Message-ID: <ec2438a3-52b4-4471-9f0c-4b21dbe0e32d@gmail.com> (raw)
In-Reply-To: <20240415160641.GC2659681@mdroper-desk1.amr.corp.intel.com>

On 15.4.2024 19.06, Matt Roper wrote:
> On Mon, Apr 15, 2024 at 01:44:06PM +0530, Balasubramani Vivekanandan wrote:
>> Framebuffer format modifiers are used to indicate the existence of
>> auxillary surface in the plane, containing the CCS data.  But on
> 
> s/auxillary/auxiliary/ in a few places in this commit message.  Although
> I don't think this statement is 100% true.  DG2 use FlatCCS rather than
> AuxCCS, but still needs to use framebuffer modifiers because the region
> of the FlatCCS that corresponds to the buffer may not be
> initialized/correct if the buffer contents were generated in a
> non-compressed manner.  We have to use framebuffer modifiers to pass
> information through the software stack as to whether the FlatCCS data
> for the buffer is usable and should be consulted by consumers of the
> buffer.
> 
> As I understand it, the big change in Xe2, is that compression is now
> controlled by the PAT setting in the PTEs and even in cases where an
> "uncompressed" PAT index is used to generate content in the buffers, the
> corresponding FlatCCS area still gets initialized to whatever metadata
> code corresponds to "this bloc is uncompressed."  So that means that
> it's always safe for consumers like display to treat the buffer as if it
> were compressed (e.g., setting the decompression flag in PLANE_CTL) ---
> the CCS metadata for ever single block in the buffer will properly
> indicate that no compression is actually present.

Adding to what Matt commented above, issue which is being fixed here 
should already be taken care by

--
commit cf48bddd31deefb9ab07de9a4d0150da6610198a
Author: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Date:   Wed Feb 28 16:02:25 2024 +0200

     drm/i915/display: Disable AuxCCS framebuffers if built for Xe
--

/Juha-Pekka


>> Xe2_HPD, the CCS data is stored in a fixed reserved memory area and not
>> part of the plane. It contains no auxillary surface.
>> Also in Xe2, the compression is configured via PAT settings in the
>> pagetable mappings. Decompression is enabled by default in the
>> PLANE_CTL. Based on whether valid CCS data exists for the plane, display
>> hardware decides whether compression is necessary or not.
>> So there is no need for format modifiers to indicate if compression is
>> enabled or not.
>>
>> v2:
>> * Improved the commit description with more details
>> * Removed the redundant display IP version check for 20. Display version
>>    check for each modifier above would take care of it.
>>
>> CC: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
>> CC: Matt Roper <matthew.d.roper@intel.com>
>> Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_fb.c | 16 +++++++++++++---
>>   1 file changed, 13 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
>> index 86b443433e8b..7234ce36b6a4 100644
>> --- a/drivers/gpu/drm/i915/display/intel_fb.c
>> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
>> @@ -431,9 +431,19 @@ static bool plane_has_modifier(struct drm_i915_private *i915,
>>   	 * Separate AuxCCS and Flat CCS modifiers to be run only on platforms
>>   	 * where supported.
>>   	 */
>> -	if (intel_fb_is_ccs_modifier(md->modifier) &&
>> -	    HAS_FLAT_CCS(i915) != !md->ccs.packed_aux_planes)
>> -		return false;
>> +	if (intel_fb_is_ccs_modifier(md->modifier)) {
>> +
>> +		/*
>> +		 * There is no need for CCS format modifiers for Xe2_HPD, as
>> +		 * there is no support of AuxCCS and the FlatCCS is configured
>> +		 * usign PAT index in the page table mappings
>> +		 */
>> +		if (DISPLAY_VER_FULL(i915) == IP_VER(14, 1))
>> +			return false;
>> +
>> +		if (HAS_FLAT_CCS(i915) != !md->ccs.packed_aux_planes)
>> +			return false;
>> +	}
>>   
>>   	return true;
>>   }
>> -- 
>> 2.25.1
>>
> 


  reply	other threads:[~2024-04-16 11:16 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-15  8:14 [PATCH v3 00/21] Enable display support for Battlemage Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 01/21] drm/xe/display: Lane reversal requires writes to both context lanes Balasubramani Vivekanandan
2024-04-15 15:05   ` Matt Roper
2024-04-15  8:14 ` [PATCH v3 02/21] drm/i915/display: Enable RM timeout detection Balasubramani Vivekanandan
2024-04-15 15:49   ` Matt Roper
2024-04-15  8:14 ` [PATCH v3 03/21] drm/i915/bmg: Define IS_BATTLEMAGE macro Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 04/21] drm/i915/xe2hpd: Skip CCS modifiers Balasubramani Vivekanandan
2024-04-15 16:06   ` Matt Roper
2024-04-16 11:15     ` Juha-Pekka Heikkila [this message]
2024-04-15  8:14 ` [PATCH v3 05/21] drm/i915/xe2hpd: Initial cdclk table Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 06/21] drm/i915/bmg: Extend DG2 tc check to future Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 07/21] drm/i915/xe2hpd: Properly disable power in port A Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 08/21] drm/i915/xe2hpd: Add new C20 PHY SRAM address Balasubramani Vivekanandan
2024-04-15 15:32   ` Jani Nikula
2024-04-15  8:14 ` [PATCH v3 09/21] drm/i915/xe2hpd: Add support for eDP PLL configuration Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 10/21] drm/i915/xe2hpd: update pll values in sync with Bspec Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 11/21] drm/i915/xe2hpd: Add display info Balasubramani Vivekanandan
2024-04-15 16:22   ` Matt Roper
2024-04-15  8:14 ` [PATCH v3 12/21] drm/i915/xe2hpd: Configure CHICKEN_MISC_2 before enabling planes Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 13/21] drm/i915/xe2hpd: Add max memory bandwidth algorithm Balasubramani Vivekanandan
2024-04-15 19:52   ` Sripada, Radhakrishna
2024-04-15  8:14 ` [PATCH v3 14/21] drm/i915/xe2hpd: Do not program MBUS_DBOX BW credits Balasubramani Vivekanandan
2024-04-15 16:25   ` Matt Roper
2024-04-15  8:14 ` [PATCH v3 15/21] drm/i915/bmg: BMG should re-use MTL's south display logic Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 16/21] Revert "drm/i915/dgfx: DGFX uses direct VBT pin mapping" Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 17/21] drm/i915/xe2hpd: Set maximum DP rate to UHBR13.5 Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 18/21] drm/xe/gt_print: add xe_gt_err_once() Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 19/21] drm/xe/device: implement transient flush Balasubramani Vivekanandan
2024-04-15 17:00   ` Matt Roper
2024-04-15  8:14 ` [PATCH v3 20/21] drm/i915/display: perform " Balasubramani Vivekanandan
2024-04-15 17:07   ` Matt Roper
2024-04-15 18:14     ` Matt Roper
2024-04-16  7:40       ` Matthew Auld
2024-04-15 20:55     ` Nirmoy Das
2024-04-15  8:14 ` [PATCH v3 21/21] drm/xe/bmg: Enable the display support Balasubramani Vivekanandan
2024-04-15 20:58 ` ✗ Fi.CI.CHECKPATCH: warning for Enable display support for Battlemage Patchwork
2024-04-15 20:58 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-04-15 21:14 ` ✓ Fi.CI.BAT: success " Patchwork
2024-04-16  8:31 ` ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ec2438a3-52b4-4471-9f0c-4b21dbe0e32d@gmail.com \
    --to=juhapekka.heikkila@gmail.com \
    --cc=balasubramani.vivekanandan@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=juha-pekka.heikkila@intel.com \
    --cc=lucas.demarchi@intel.com \
    --cc=matthew.d.roper@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox