From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v4] drm/i915: clear error registers after error capture
Date: Thu, 30 Aug 2018 17:22:56 +0100 [thread overview]
Message-ID: <f690ec2b-2489-aebc-ef39-6ba514c66e09@intel.com> (raw)
In-Reply-To: <153563830885.21589.9421444989995512353@skylake-alporthouse-com>
On 30/08/2018 15:11, Chris Wilson wrote:
> Quoting Lionel Landwerlin (2018-08-30 14:24:24)
>> We need to clear the register in order to get correct value after the
>> next potential hang.
>>
>> v2: Centralize error register clearing in i915_irq.c (Chris)
>>
>> v3: Don't read gen8 register on < gen6 (Chris)
>>
>> v4: Don't swap gen8+ & gen6+ code... (Chris)
>>
>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> Lgtm,
> -Chris
>
Thanks a lot, pushed.
-
Lionel
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next prev parent reply other threads:[~2018-08-30 16:22 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-30 13:24 [PATCH v4] drm/i915: clear error registers after error capture Lionel Landwerlin
2018-08-30 14:05 ` ✗ Fi.CI.SPARSE: warning for drm/i915: clear error registers after error capture (rev4) Patchwork
2018-08-30 14:11 ` [PATCH v4] drm/i915: clear error registers after error capture Chris Wilson
2018-08-30 16:22 ` Lionel Landwerlin [this message]
2018-08-30 14:28 ` ✓ Fi.CI.BAT: success for drm/i915: clear error registers after error capture (rev4) Patchwork
2018-08-30 18:34 ` ✓ Fi.CI.IGT: " Patchwork
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