From: "Christian König" <christian.koenig@amd.com>
To: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Thomas Hellström (Intel)" <thomas_os@shipmail.org>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
"Daniel Vetter" <daniel@ffwll.ch>
Cc: linaro-mm-sig@lists.linaro.org, matthew.auld@intel.com
Subject: Re: [Intel-gfx] [Linaro-mm-sig] [RFC PATCH 1/2] dma-fence: Avoid establishing a locking order between fence classes
Date: Fri, 3 Dec 2021 15:26:34 +0100 [thread overview]
Message-ID: <f8f1500c-170d-ccf9-ac2d-1484bbdc587e@amd.com> (raw)
In-Reply-To: <d4a9cb5a554ffc3af3d30ecacad6e57533eb7f3b.camel@linux.intel.com>
[Adding Daniel here as well]
Am 03.12.21 um 15:18 schrieb Thomas Hellström:
> [SNIP]
>> Well that's ok as well. My question is why does this single dma_fence
>> then shows up in the dma_fence_chain representing the whole
>> migration?
> What we'd like to happen during eviction is that we
>
> 1) await any exclusive- or moving fences, then schedule the migration
> blit. The blit manages its own GPU ptes. Results in a single fence.
> 2) Schedule unbind of any gpu vmas, resulting possibly in multiple
> fences.
> 3) Most but not all of the remaining resv shared fences will have been
> finished in 2) We can't easily tell which so we have a couple of shared
> fences left.
Stop, wait a second here. We are going a bit in circles.
Before you migrate a buffer, you *MUST* wait for all shared fences to
complete. This is documented mandatory DMA-buf behavior.
Daniel and I have discussed that quite extensively in the last few month.
So how does it come that you do the blit before all shared fences are
completed?
> 4) Add all fences resulting from 1) 2) and 3) into the per-memory-type
> dma-fence-chain.
> 5) hand the resulting dma-fence-chain representing the end of migration
> over to ttm's resource manager.
>
> Now this means we have a dma-fence-chain disguised as a dma-fence out
> in the wild, and it could in theory reappear as a 3) fence for another
> migration unless a very careful audit is done, or as an input to the
> dma-fence-array used for that single dependency.
>
>> That somehow doesn't seem to make sense because each individual step
>> of
>> the migration needs to wait for those dependencies as well even when
>> it
>> runs in parallel.
>>
>>> But that's not really the point, the point was that an (at least to
>>> me) seemingly harmless usage pattern, be it real or fictious, ends
>>> up
>>> giving you severe internal- or cross-driver headaches.
>> Yeah, we probably should document that better. But in general I don't
>> see much reason to allow mixing containers. The dma_fence_array and
>> dma_fence_chain objects have some distinct use cases and and using
>> them
>> to build up larger dependency structures sounds really questionable.
> Yes, I tend to agree to some extent here. Perhaps add warnings when
> adding a chain or array as an input to array and when accidently
> joining chains, and provide helpers for flattening if needed.
Yeah, that's probably a really good idea. Going to put it on my todo list.
Thanks,
Christian.
>
> /Thomas
>
>
>> Christian.
>>
>>> /Thomas
>>>
>>>
>>>> Regards,
>>>> Christian.
>>>>
>>>>
>
next prev parent reply other threads:[~2021-12-03 14:42 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-30 12:19 [Intel-gfx] [RFC PATCH 0/2] Attempt to avoid dma-fence-[chain|array] lockdep splats Thomas Hellström
2021-11-30 12:19 ` [Intel-gfx] [RFC PATCH 1/2] dma-fence: Avoid establishing a locking order between fence classes Thomas Hellström
2021-11-30 12:25 ` Maarten Lankhorst
2021-11-30 12:31 ` Thomas Hellström
2021-11-30 12:42 ` Christian König
2021-11-30 12:56 ` Thomas Hellström
2021-11-30 13:26 ` Christian König
2021-11-30 14:35 ` Thomas Hellström
2021-11-30 15:02 ` Christian König
2021-11-30 18:12 ` Thomas Hellström
2021-11-30 19:27 ` Thomas Hellström
2021-12-01 7:05 ` Christian König
2021-12-01 8:23 ` [Intel-gfx] [Linaro-mm-sig] " Thomas Hellström (Intel)
2021-12-01 8:36 ` Christian König
2021-12-01 10:15 ` Thomas Hellström (Intel)
2021-12-01 10:32 ` Christian König
2021-12-01 11:04 ` Thomas Hellström (Intel)
2021-12-01 11:25 ` Christian König
2021-12-01 12:16 ` Thomas Hellström (Intel)
2021-12-03 13:08 ` Christian König
2021-12-03 14:18 ` Thomas Hellström
2021-12-03 14:26 ` Christian König [this message]
2021-12-03 14:50 ` Thomas Hellström
2021-12-03 15:00 ` Christian König
2021-12-03 15:13 ` Thomas Hellström (Intel)
2021-12-07 18:08 ` Daniel Vetter
2021-12-07 20:46 ` Thomas Hellström
2021-12-20 9:37 ` Daniel Vetter
2021-11-30 12:32 ` [Intel-gfx] " Thomas Hellström
2021-11-30 12:19 ` [Intel-gfx] [RFC PATCH 2/2] dma-fence: Avoid excessive recursive fence locking from enable_signaling() callbacks Thomas Hellström
2021-11-30 12:36 ` [Intel-gfx] [RFC PATCH 0/2] Attempt to avoid dma-fence-[chain|array] lockdep splats Christian König
2021-11-30 13:05 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for " Patchwork
2021-11-30 13:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-11-30 17:47 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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