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From: "Belgaumkar, Vinay" <vinay.belgaumkar@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>
Cc: Chris Wilson <chris.p.wilson@intel.com>
Subject: Re: [Intel-gfx] [PATCH 2/3] drm/i915/gt: Compare average group occupancy for RPS evaluation
Date: Tue, 23 Nov 2021 09:35:26 -0800	[thread overview]
Message-ID: <fc8f15b2-892e-0d1c-3e91-83ef7160e832@intel.com> (raw)
In-Reply-To: <20211117224955.28999-3-vinay.belgaumkar@intel.com>



On 11/17/2021 2:49 PM, Vinay Belgaumkar wrote:
> From: Chris Wilson <chris.p.wilson@intel.com>
> 
> Currently, we inspect each engine individually and measure the occupancy
> of that engine over the last evaluation interval. If that exceeds our
> busyness thresholds, we decide to increase the GPU frequency. However,
> under a load balancer, we should consider the occupancy of entire engine
> groups, as work may be spread out across the group. In doing so, we
> prefer wide over fast, power consumption is approximately proportional to
> the square of the frequency. However, since the load balancer is greedy,
> the first idle engine gets all the work, and preferrentially reuses the
> last active engine, under light loads all work is assigned to one
> engine, and so that engine appears very busy. But if the work happened
> to overlap slightly, the workload would spread across multiple engines,
> reducing each individual engine's runtime, and so reducing the rps
> contribution, keeping the frequency low. Instead, when considering the
> contribution, consider the contribution over the entire engine group
> (capacity).
> 
> Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
> Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>

Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>

> ---
>   drivers/gpu/drm/i915/gt/intel_rps.c | 48 ++++++++++++++++++++---------
>   1 file changed, 34 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> index 07ff7ba7b2b7..3675ac93ded0 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -7,6 +7,7 @@
>   
>   #include "i915_drv.h"
>   #include "intel_breadcrumbs.h"
> +#include "intel_engine_pm.h"
>   #include "intel_gt.h"
>   #include "intel_gt_clock_utils.h"
>   #include "intel_gt_irq.h"
> @@ -65,26 +66,45 @@ static void set(struct intel_uncore *uncore, i915_reg_t reg, u32 val)
>   static void rps_timer(struct timer_list *t)
>   {
>   	struct intel_rps *rps = from_timer(rps, t, timer);
> -	struct intel_engine_cs *engine;
> -	ktime_t dt, last, timestamp;
> -	enum intel_engine_id id;
> +	struct intel_gt *gt = rps_to_gt(rps);
> +	ktime_t dt, last, timestamp = 0;
>   	s64 max_busy[3] = {};
> +	int i, j;
>   
> -	timestamp = 0;
> -	for_each_engine(engine, rps_to_gt(rps), id) {
> -		s64 busy;
> -		int i;
> +	/* Compare average occupancy over each engine group */
> +	for (i = 0; i < ARRAY_SIZE(gt->engine_class); i++) {
> +		s64 busy = 0;
> +		int count = 0;
> +
> +		for (j = 0; j < ARRAY_SIZE(gt->engine_class[i]); j++) {
> +			struct intel_engine_cs *engine;
>   
> -		dt = intel_engine_get_busy_time(engine, &timestamp);
> -		last = engine->stats.rps;
> -		engine->stats.rps = dt;
> +			engine = gt->engine_class[i][j];
> +			if (!engine)
> +				continue;
>   
> -		busy = ktime_to_ns(ktime_sub(dt, last));
> -		for (i = 0; i < ARRAY_SIZE(max_busy); i++) {
> -			if (busy > max_busy[i])
> -				swap(busy, max_busy[i]);
> +			dt = intel_engine_get_busy_time(engine, &timestamp);
> +			last = engine->stats.rps;
> +			engine->stats.rps = dt;
> +
> +			if (!intel_engine_pm_is_awake(engine))
> +				continue;
> +
> +			busy += ktime_to_ns(ktime_sub(dt, last));
> +			count++;
> +		}
> +
> +		if (count > 1)
> +			busy = div_u64(busy, count);
> +		if (busy <= max_busy[ARRAY_SIZE(max_busy) - 1])
> +			continue;
> +
> +		for (j = 0; j < ARRAY_SIZE(max_busy); j++) {
> +			if (busy > max_busy[j])
> +				swap(busy, max_busy[j]);
>   		}
>   	}
> +
>   	last = rps->pm_timestamp;
>   	rps->pm_timestamp = timestamp;
>   
> 

  reply	other threads:[~2021-11-23 18:00 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-17 22:49 [Intel-gfx] [PATCH 0/3] drm/i915/gt: RPS tuning for light media playback Vinay Belgaumkar
2021-11-17 22:49 ` [Intel-gfx] [PATCH 1/3] drm/i915/gt: Spread virtual engines over idle engines Vinay Belgaumkar
2021-11-23  9:39   ` Tvrtko Ursulin
2021-11-23 19:52     ` Rodrigo Vivi
2021-11-24  8:56       ` Tvrtko Ursulin
2021-11-24 13:55         ` Rodrigo Vivi
2021-11-24 15:09           ` Rodrigo Vivi
2021-11-17 22:49 ` [Intel-gfx] [PATCH 2/3] drm/i915/gt: Compare average group occupancy for RPS evaluation Vinay Belgaumkar
2021-11-23 17:35   ` Belgaumkar, Vinay [this message]
2021-11-17 22:49 ` [Intel-gfx] [PATCH 3/3] drm/i915/gt: Improve "race-to-idle" at low frequencies Vinay Belgaumkar
2021-11-22 18:44   ` Rodrigo Vivi
2021-11-23  9:17     ` Tvrtko Ursulin
2021-11-23 16:53       ` Vivi, Rodrigo
2021-11-23 17:37   ` Belgaumkar, Vinay
2021-11-17 23:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: RPS tuning for light media playback Patchwork
2021-11-18  0:31 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-11-18 20:30 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: RPS tuning for light media playback (rev2) Patchwork
2021-11-18 20:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-11-20  0:37 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: RPS tuning for light media playback (rev3) Patchwork
2021-11-20  1:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-11-20  5:13 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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