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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 05/12] drm/i915/scheduler: Record all dependencies upon request construction
Date: Mon, 7 Nov 2016 13:30:43 +0000	[thread overview]
Message-ID: <ff19318d-903e-1689-29f8-6f5435909ee8@linux.intel.com> (raw)
In-Reply-To: <20161107093032.GC30925@nuc-i3427.alporthouse.com>


On 07/11/2016 09:30, Chris Wilson wrote:
> On Mon, Nov 07, 2016 at 09:12:57AM +0000, Tvrtko Ursulin wrote:
>>
>> On 04/11/2016 15:11, Chris Wilson wrote:
>>> On Fri, Nov 04, 2016 at 02:44:44PM +0000, Tvrtko Ursulin wrote:
>>>>
>>>> On 03/11/2016 11:55, Chris Wilson wrote:
>>>>> On Thu, Nov 03, 2016 at 11:03:47AM +0000, Tvrtko Ursulin wrote:
>>>>>>
>>>>>> On 02/11/2016 17:50, Chris Wilson wrote:
>>>>>>> +struct i915_dependency {
>>>>>>> +	struct i915_priotree *signal;
>>>>>>> +	struct list_head pre_link, post_link;
>>>>>>> +	unsigned long flags;
>>>>>>> +#define I915_DEPENDENCY_ALLOC BIT(0)
>>>>>>> +};
>>>>>>> +
>>>>>>> +struct i915_priotree {
>>>>>>> +	struct list_head pre_list; /* who is before us, we depend upon */
>>>>>>> +	struct list_head post_list; /* who is after us, they depend upon us */
>>>>>>> +};
>>>>>>
>>>>>> I need a picture to imagine this data structure. :(
>>>>>
>>>>> The names suck.
>>>>
>>>> When you wrote this I assumed you would respin shortly with some
>>>> better names?
>>>
>>> Not yet. I kind of like
>>>
>>> struct i915_dependency {
>>> 	struct i915_priotree *signaler;
>>> 	struct list_head signaler_link;
>>> 	struct list_head listener_link;
>>> };
>>>
>>> struct i915_priotree {
>>> 	struct list_head signalers_list; /* before us, we depend on them */
>>> 	struct list_head listeners_list; /* those after, who depend on us */
>>> };
>>>
>>
>> What is the signaler in i915_dependency?
>
> That would be the actual dependency. The fences have a notion of
> waiters, but we need to track the signalers in order to perform PI.
> Fwiw,
>
> +struct i915_dependency {
> +       struct i915_priotree *signaler;
> +       struct list_head signal_link;
> +       struct list_head wait_link;
> +       unsigned long flags;
> +#define I915_DEPENDENCY_ALLOC BIT(0)
> +};
> +
> +/* Requests exist in a complex web of interdependencies. Each request
> + * has to wait for some other request to complete before it is ready to be run
> + * (e.g. we have to wait until the pixels have been rendering into a texture
> + * before we can copy from it). We track the readiness of a request in terms
> + * of fences, but we also need to keep the dependency tree for the lifetime
> + * of the request (beyond the life of an individual fence). We use the tree
> + * at various points to reorder the requests whilst keeping the requests
> + * in order with respect to their various dependencies.
> + */
> +struct i915_priotree {
> +       struct list_head signalers_list; /* those before us, we depend upon */
> +       struct list_head waiters_list; /* those after us, they depend upon us */
> +};
>
>

req->depq is just an optimisation to avoid one allocation in the common 
case?

Regards,

Tvrtko

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  reply	other threads:[~2016-11-07 13:30 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-02 17:50 Trivial priority scheduler Chris Wilson
2016-11-02 17:50 ` [PATCH 01/12] drm/i915: Split request submit/execute phase into two Chris Wilson
2016-11-03 10:35   ` Tvrtko Ursulin
2016-11-02 17:50 ` [PATCH 02/12] drm/i915: Defer transfer onto execution timeline to actual hw submission Chris Wilson
2016-11-03 10:34   ` Tvrtko Ursulin
2016-11-03 10:51     ` Chris Wilson
2016-11-03 11:27       ` Chris Wilson
2016-11-02 17:50 ` [PATCH 03/12] drm/i915: Remove engine->execlist_lock Chris Wilson
2016-11-03 10:47   ` Tvrtko Ursulin
2016-11-03 12:28     ` Chris Wilson
2016-11-03 13:31       ` Tvrtko Ursulin
2016-11-02 17:50 ` [PATCH 04/12] drm/i915/scheduler: Signal the arrival of a new request Chris Wilson
2016-11-03 10:49   ` Tvrtko Ursulin
2016-11-02 17:50 ` [PATCH 05/12] drm/i915/scheduler: Record all dependencies upon request construction Chris Wilson
2016-11-03 11:03   ` Tvrtko Ursulin
2016-11-03 11:55     ` Chris Wilson
2016-11-04 14:44       ` Tvrtko Ursulin
2016-11-04 15:11         ` Chris Wilson
2016-11-07  9:12           ` Tvrtko Ursulin
2016-11-07  9:30             ` Chris Wilson
2016-11-07 13:30               ` Tvrtko Ursulin [this message]
2016-11-07 13:39                 ` Chris Wilson
2016-11-07 13:42                   ` Tvrtko Ursulin
2016-11-02 17:50 ` [PATCH 06/12] drm/i915/scheduler: Execute requests in order of priorities Chris Wilson
2016-11-03 16:21   ` Tvrtko Ursulin
2016-11-03 17:44     ` Chris Wilson
2016-11-03 19:47     ` Chris Wilson
2016-11-04  9:20       ` Chris Wilson
2016-11-02 17:50 ` [PATCH 07/12] drm/i915/scheduler: Boost priorities for flips Chris Wilson
2016-11-03 16:29   ` Tvrtko Ursulin
2016-11-03 16:54     ` Chris Wilson
2016-11-02 17:50 ` [PATCH 08/12] drm/i915/guc: Cache the client mapping Chris Wilson
2016-11-03 16:37   ` Tvrtko Ursulin
2016-11-03 20:01     ` Chris Wilson
2016-11-02 17:50 ` [PATCH 09/12] HACK drm/i915/scheduler: emulate a scheduler for guc Chris Wilson
2016-11-03 13:17   ` Tvrtko Ursulin
2016-11-02 17:50 ` [PATCH 10/12] drm/i915/scheduler: Support user-defined priorities Chris Wilson
2016-11-02 17:50 ` [PATCH 11/12] drm/i915: Enable userspace to opt-out of implicit fencing Chris Wilson
2016-11-02 17:50 ` [PATCH 12/12] drm/i915: Support explicit fencing for execbuf Chris Wilson
2016-11-02 18:45 ` ✓ Fi.CI.BAT: success for series starting with [01/12] drm/i915: Split request submit/execute phase into two Patchwork

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