Intel-Wired-Lan Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Nguyen, Anthony L <anthony.l.nguyen@intel.com>
To: intel-wired-lan@osuosl.org
Subject: [Intel-wired-lan] [PATCH intel-next 2/4] ice: Implement functions for reading and setting GPIO pins
Date: Mon, 16 Aug 2021 23:49:04 +0000	[thread overview]
Message-ID: <ce429d170c827e21342fabaaba57f1816eeef564.camel@intel.com> (raw)
In-Reply-To: <20210816102729.1266522-3-maciej.machnikowski@intel.com>

On Mon, 2021-08-16 at 12:27 +0200, Maciej Machnikowski wrote:
> Implement ice_aq_get_gpio and ice_aq_set_gpio for reading and
> changing
> the state of GPIO pins described in the topology.
> 
> Signed-off-by: Maciej Machnikowski <maciej.machnikowski@intel.com>
> ---

<snip>

> diff --git a/drivers/net/ethernet/intel/ice/ice_common.c
> b/drivers/net/ethernet/intel/ice/ice_common.c
> index 5822589aebdc..d1b81e7fbef4 100644
> --- a/drivers/net/ethernet/intel/ice/ice_common.c
> +++ b/drivers/net/ethernet/intel/ice/ice_common.c
> @@ -4806,6 +4806,64 @@ ice_aq_get_driver_param(struct ice_hw *hw,
> enum ice_aqc_driver_params idx,
>  	return 0;
>  }
>  
> +/**
> + * ice_aq_set_gpio
> + * @hw: pointer to the hw struct
> + * @gpio_ctrl_handle: GPIO controller node handle
> + * @pin_idx: IO Number of the GPIO that needs to be set
> + * @value: SW provide IO value to set in the LSB
> + * @cd: pointer to command details structure or NULL
> + *
> + * Sends 0x06EC AQ command to set the GPIO pin state that's part of
> the topology
> + */
> +enum ice_status
> +ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
> bool value,
> +		struct ice_sq_cd *cd)
> +{
> +	struct ice_aqc_gpio *cmd;
> +	struct ice_aq_desc desc;
> +
> +	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_gpio);
> +	cmd = &desc.params.read_write_gpio;
> +	cmd->gpio_ctrl_handle = gpio_ctrl_handle;
> +	cmd->gpio_num = pin_idx;
> +	cmd->gpio_val = value ? 1 : 0;
> +
> +	return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
> +}
> +
> +/**
> + * ice_aq_get_gpio
> + * @hw: pointer to the hw struct
> + * @gpio_ctrl_handle: GPIO controller node handle
> + * @pin_idx: IO Number of the GPIO that needs to be set
> + * @value: IO value read
> + * @cd: pointer to command details structure or NULL
> + *
> + * Sends 0x06ED AQ command to get the value of a GPIO signal which
> is part of
> + * the topology
> + */
> +enum ice_status
> +ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
> +		bool *value, struct ice_sq_cd *cd)
> +{
> +	struct ice_aqc_gpio *cmd;
> +	struct ice_aq_desc desc;
> +	enum ice_status status;
> +
> +	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_gpio);
> +	cmd = &desc.params.read_write_gpio;
> +	cmd->gpio_ctrl_handle = gpio_ctrl_handle;
> +	cmd->gpio_num = pin_idx;
> +
> +	status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
> +	if (status)
> +		return status;
> +
> +	*value = !!cmd->gpio_val;
> +	return 0;
> +}

This introduces new warnings:
> ../drivers/net/ethernet/intel/ice/ice_common.c:4828:31: warning:
incorrect type in assignment (different base types)
> ../drivers/net/ethernet/intel/ice/ice_common.c:4828:31:    expected
restricted __le16 [usertype] gpio_ctrl_handle
> ../drivers/net/ethernet/intel/ice/ice_common.c:4828:31:    got
unsigned short [usertype] gpio_ctrl_handle
> ../drivers/net/ethernet/intel/ice/ice_common.c:4856:31: warning:
incorrect type in assignment (different base types)
> ../drivers/net/ethernet/intel/ice/ice_common.c:4856:31:    expected
restricted __le16 [usertype] gpio_ctrl_handle
> ../drivers/net/ethernet/intel/ice/ice_common.c:4856:31:    got
unsigned short [usertype] gpio_ctrl_handle


  reply	other threads:[~2021-08-16 23:49 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-16 10:27 [Intel-wired-lan] [PATCH intel-next 0/4] Add support for E810-T PTP pins Maciej Machnikowski
2021-08-16 10:27 ` [Intel-wired-lan] [PATCH intel-next 1/4] ice: Refactor ice_aqc_link_topo_addr Maciej Machnikowski
2021-08-26  6:23   ` Mekala, SunithaX D
2021-08-26  6:31   ` Paul Menzel
2021-08-16 10:27 ` [Intel-wired-lan] [PATCH intel-next 2/4] ice: Implement functions for reading and setting GPIO pins Maciej Machnikowski
2021-08-16 23:49   ` Nguyen, Anthony L [this message]
2021-08-16 10:27 ` [Intel-wired-lan] [PATCH intel-next 3/4] ice: Add support for SMA control multiplexer Maciej Machnikowski
2021-08-16 23:59   ` Nguyen, Anthony L
2021-08-16 10:27 ` [Intel-wired-lan] [PATCH intel-next 4/4] ice: Implement support for SMA and U.FL on E810-T Maciej Machnikowski
2021-08-17  0:13   ` Nguyen, Anthony L

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ce429d170c827e21342fabaaba57f1816eeef564.camel@intel.com \
    --to=anthony.l.nguyen@intel.com \
    --cc=intel-wired-lan@osuosl.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox