[PATCH v5 00/16] drm/i915/display: convert a bunch of W/A checks to the new framework

[PATCH v5 00/16] drm/i915/display: convert a bunch of W/A checks to the new framework

[Luca Coelho]

Hi,

This series convert the "low hanging fruits" of workaround checks to
the new framework.  Some of the workarounds check other values that
are not in the intel_display structure, so they don't directly fit in
the workaround framework and will be left for later.

In v2:
   * Added intel-xe in Cc for xe CI (Jani);
   * Removed NOP intel-overlay.c patch (Jani).

In v3:
   * Added a comment back (accidentally removed) (Ville);
   * Inverted the logic of W/A 16025596647 (Ville);
   * Removed macro magic (Ville).

In v4:
   * Fix checkpatch warnings (checkpatch/Suraj).

In v5:
   * Just fixed a tiny rebase conflict, just an #include that was
     removed, which conflicted with the one I had added.

Cheers,
Luca.


Luca Coelho (16):
  drm/i915/display: remove enum macro magic in intel_display_wa()
  drm/i915/display: convert audio workaround to new framework
  drm/i915/display: convert W/As in intel_display_power.c to new
    framework
  drm/i915/display: convert W/As in intel_cdclk.c to new framework
  drm/i915/display: convert W/As in intel_cursor.c to new framework
  drm/i915/display: convert W/As in intel_ddi.c to new framework
  drm/i915/display: convert W/As in intel_display.c to new framework
  drm/i915/display: convert W/As in intel_display_device.c to new
    framework
  drm/i915/display: convert W/As in intel_dp_mst.c to new framework
  drm/i915/display: convert W/As in intel_fbc.c to new framework
  drm/i915/display: convert W/As in intel_flipq.c to new framework
  drm/i915/display: convert W/As in intel_modeset_setup.c to new
    framework
  drm/i915/display: convert W/As in intel_pmdemand.c to new framework
  drm/i915/display: convert W/As in intel_psr.c to new framework
  drm/i915/display: convert W/As in skl_universal_plane.c to new
    framework
  drm/i915/display: convert W/As in skl_watermark.c to new framework

 drivers/gpu/drm/i915/display/intel_audio.c    | 24 +++----
 drivers/gpu/drm/i915/display/intel_cdclk.c    |  7 +-
 drivers/gpu/drm/i915/display/intel_cursor.c   |  3 +-
 drivers/gpu/drm/i915/display/intel_ddi.c      |  4 +-
 drivers/gpu/drm/i915/display/intel_display.c  |  6 +-
 .../drm/i915/display/intel_display_device.c   |  3 +-
 .../drm/i915/display/intel_display_power.c    | 22 +++---
 .../i915/display/intel_display_power_well.c   |  4 +-
 .../gpu/drm/i915/display/intel_display_wa.c   | 67 ++++++++++++++++++-
 .../gpu/drm/i915/display/intel_display_wa.h   | 27 +++++++-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  3 +-
 drivers/gpu/drm/i915/display/intel_fbc.c      | 12 ++--
 drivers/gpu/drm/i915/display/intel_flipq.c    | 13 +---
 drivers/gpu/drm/i915/display/intel_gmbus.c    |  6 +-
 .../drm/i915/display/intel_modeset_setup.c    |  3 +-
 drivers/gpu/drm/i915/display/intel_pmdemand.c |  8 ++-
 drivers/gpu/drm/i915/display/intel_psr.c      | 20 +++---
 drivers/gpu/drm/i915/display/skl_scaler.c     |  2 +-
 .../drm/i915/display/skl_universal_plane.c    |  6 +-
 drivers/gpu/drm/i915/display/skl_watermark.c  |  3 +-
 20 files changed, 164 insertions(+), 79 deletions(-)

-- 
2.51.0

[PATCH v5 01/16] drm/i915/display: remove enum macro magic in intel_display_wa()

[Luca Coelho]

There's not much use in passing a number to the macro and let it
convert that into the enum and a string.  It just hides the symbols.

Remove the number to enum conversion magic in intel_display_wa().

This has the side-effect of changing the print in the drm_WARN() that
is issued when the number is not implemented, but that is moot anyway
and can be changed later to something cleaner if needed.

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c              | 5 +++--
 drivers/gpu/drm/i915/display/intel_display.c            | 2 +-
 drivers/gpu/drm/i915/display/intel_display_power_well.c | 4 ++--
 drivers/gpu/drm/i915/display/intel_display_wa.c         | 2 +-
 drivers/gpu/drm/i915/display/intel_display_wa.h         | 2 +-
 drivers/gpu/drm/i915/display/intel_fbc.c                | 8 ++++----
 drivers/gpu/drm/i915/display/intel_gmbus.c              | 6 +++---
 drivers/gpu/drm/i915/display/skl_scaler.c               | 2 +-
 8 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 38331e899519..7767f8c198da 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1870,7 +1870,7 @@ static void icl_cdclk_pll_disable(struct intel_display *display)
 	 *      after the PLL is enabled (which is already done as part of the
 	 *      normal flow of _bxt_set_cdclk()).
 	 */
-	if (intel_display_wa(display, 13012396614))
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_13012396614))
 		intel_de_rmw(display, CDCLK_CTL, MDCLK_SOURCE_SEL_MASK, MDCLK_SOURCE_SEL_CD2XCLK);
 
 	intel_de_rmw(display, BXT_DE_PLL_ENABLE,
@@ -2186,7 +2186,8 @@ static u32 bxt_cdclk_ctl(struct intel_display *display,
 		 * icl_cdclk_pll_disable().  Here we are just making sure
 		 * we keep the expected value.
 		 */
-		if (intel_display_wa(display, 13012396614) && vco == 0)
+		if (intel_display_wa(display, INTEL_DISPLAY_WA_13012396614) &&
+		    vco == 0)
 			val |= MDCLK_SOURCE_SEL_CD2XCLK;
 		else
 			val |= xe2lpd_mdclk_source_sel(display);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 138ee7dd1977..15edf609fff4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1070,7 +1070,7 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
 	if (audio_enabling(old_crtc_state, new_crtc_state))
 		intel_encoders_audio_enable(state, crtc);
 
-	if (intel_display_wa(display, 14011503117)) {
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14011503117)) {
 		if (old_crtc_state->pch_pfit.enabled != new_crtc_state->pch_pfit.enabled)
 			adl_scaler_ecc_unmask(new_crtc_state);
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index 9c8d29839caf..1e03187dbd38 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -249,7 +249,7 @@ static void hsw_power_well_post_enable(struct intel_display *display,
 	if (irq_pipe_mask) {
 		gen8_irq_power_well_post_enable(display, irq_pipe_mask);
 
-		if (intel_display_wa(display, 22021048059))
+		if (intel_display_wa(display, INTEL_DISPLAY_WA_22021048059))
 			dss_pipe_gating_enable_disable(display, irq_pipe_mask, false);
 	}
 }
@@ -258,7 +258,7 @@ static void hsw_power_well_pre_disable(struct intel_display *display,
 				       u8 irq_pipe_mask)
 {
 	if (irq_pipe_mask) {
-		if (intel_display_wa(display, 22021048059))
+		if (intel_display_wa(display, INTEL_DISPLAY_WA_22021048059))
 			dss_pipe_gating_enable_disable(display, irq_pipe_mask, true);
 
 		gen8_irq_power_well_pre_disable(display, irq_pipe_mask);
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index c2ccdca2c2f3..1d8340b36c01 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -87,7 +87,7 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 	case INTEL_DISPLAY_WA_22021048059:
 		return IS_DISPLAY_VER(display, 14, 35);
 	default:
-		drm_WARN(display->drm, 1, "Missing Wa number: %s\n", name);
+		drm_WARN(display->drm, 1, "Missing Wa: %s\n", name);
 		break;
 	}
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index 767420d5f406..06c1f62c0f6d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -40,6 +40,6 @@ enum intel_display_wa {
 bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa, const char *name);
 
 #define intel_display_wa(__display, __wa) \
-	__intel_display_wa((__display), INTEL_DISPLAY_WA_##__wa, __stringify(__wa))
+	__intel_display_wa((__display), __wa, __stringify(__wa))
 
 #endif
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 3e9b3e532499..5d0d7c1027f5 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -957,7 +957,7 @@ static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
 	 * Fixes: Screen flicker with FBC and Package C state enabled
 	 * Workaround: Forced SLB invalidation before start of new frame.
 	 */
-	if (intel_display_wa(display, 22014263786))
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_22014263786))
 		intel_de_rmw(display, ILK_DPFC_CHICKEN(fbc->id),
 			     0, DPFC_CHICKEN_FORCE_SLB_INVALIDATION);
 
@@ -979,7 +979,7 @@ static void fbc_sys_cache_update_config(struct intel_display *display, u32 reg,
 	 * Fixes: SoC hardware issue in read caching
 	 * Workaround: disable cache read setting which is enabled by default.
 	 */
-	if (!intel_display_wa(display, 14025769978))
+	if (!intel_display_wa(display, INTEL_DISPLAY_WA_14025769978))
 		/* Cache read enable is set by default */
 		reg |= FBC_SYS_CACHE_READ_ENABLE;
 
@@ -1612,7 +1612,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
 		return 0;
 	}
 
-	if (intel_display_wa(display, 16023588340)) {
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_16023588340)) {
 		plane_state->no_fbc_reason = "Wa_16023588340";
 		return 0;
 	}
@@ -1622,7 +1622,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
 	 * Fixes: Underrun during media decode
 	 * Workaround: Do not enable FBC
 	 */
-	if (intel_display_wa(display, 15018326506)) {
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_15018326506)) {
 		plane_state->no_fbc_reason = "Wa_15018326506";
 		return 0;
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
index 38706017c0c6..df48f27f1cc1 100644
--- a/drivers/gpu/drm/i915/display/intel_gmbus.c
+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
@@ -250,7 +250,7 @@ static u32 get_reserved(struct intel_gmbus *bus)
 	preserve_bits |= GPIO_DATA_PULLUP_DISABLE | GPIO_CLOCK_PULLUP_DISABLE;
 
 	/* Wa_16025573575: the masks bits need to be preserved through out */
-	if (intel_display_wa(display, 16025573575))
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_16025573575))
 		preserve_bits |= GPIO_CLOCK_DIR_MASK | GPIO_CLOCK_VAL_MASK |
 				 GPIO_DATA_DIR_MASK | GPIO_DATA_VAL_MASK;
 
@@ -342,7 +342,7 @@ intel_gpio_pre_xfer(struct i2c_adapter *adapter)
 	if (display->platform.pineview)
 		pnv_gmbus_clock_gating(display, false);
 
-	if (intel_display_wa(display, 16025573575))
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_16025573575))
 		ptl_handle_mask_bits(bus, true);
 
 	set_data(bus, 1);
@@ -363,7 +363,7 @@ intel_gpio_post_xfer(struct i2c_adapter *adapter)
 	if (display->platform.pineview)
 		pnv_gmbus_clock_gating(display, true);
 
-	if (intel_display_wa(display, 16025573575))
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_16025573575))
 		ptl_handle_mask_bits(bus, false);
 }
 
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index 4c4deac7f9c8..7c5cb188ebf0 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -823,7 +823,7 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
 			crtc_state->scaler_state.scaler_id < 0))
 		return;
 
-	if (intel_display_wa(display, 14011503117))
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14011503117))
 		adl_scaler_ecc_mask(crtc_state);
 
 	drm_rect_init(&src, 0, 0,
-- 
2.51.0

Re: [PATCH v5 01/16] drm/i915/display: remove enum macro magic in intel_display_wa()

[Jani Nikula]

On Thu, 05 Mar 2026, Luca Coelho <luciano.coelho@intel.com> wrote:
> There's not much use in passing a number to the macro and let it
> convert that into the enum and a string.  It just hides the symbols.

There was a point, though. Passing a random number to intel_display_wa()
would fail the build. Now you'll only find out runtime. I'll concede
there's value, perhaps more so, in having the symbols not hidden.

> Remove the number to enum conversion magic in intel_display_wa().
>
> This has the side-effect of changing the print in the drm_WARN() that
> is issued when the number is not implemented, but that is moot anyway
> and can be changed later to something cleaner if needed.

I actually wonder if having the names there is really worth it. It's
just a bunch of rodata bloat for not much benefit. It should be easy
enough to find which enumerator isn't handled.

Maybe check the objdump bloat reduction with the intel_display_wa()
wrapper macro and the const char *name parameter removed?

BR,
Jani.

>
> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_cdclk.c              | 5 +++--
>  drivers/gpu/drm/i915/display/intel_display.c            | 2 +-
>  drivers/gpu/drm/i915/display/intel_display_power_well.c | 4 ++--
>  drivers/gpu/drm/i915/display/intel_display_wa.c         | 2 +-
>  drivers/gpu/drm/i915/display/intel_display_wa.h         | 2 +-
>  drivers/gpu/drm/i915/display/intel_fbc.c                | 8 ++++----
>  drivers/gpu/drm/i915/display/intel_gmbus.c              | 6 +++---
>  drivers/gpu/drm/i915/display/skl_scaler.c               | 2 +-
>  8 files changed, 16 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 38331e899519..7767f8c198da 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1870,7 +1870,7 @@ static void icl_cdclk_pll_disable(struct intel_display *display)
>  	 *      after the PLL is enabled (which is already done as part of the
>  	 *      normal flow of _bxt_set_cdclk()).
>  	 */
> -	if (intel_display_wa(display, 13012396614))
> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_13012396614))
>  		intel_de_rmw(display, CDCLK_CTL, MDCLK_SOURCE_SEL_MASK, MDCLK_SOURCE_SEL_CD2XCLK);
>  
>  	intel_de_rmw(display, BXT_DE_PLL_ENABLE,
> @@ -2186,7 +2186,8 @@ static u32 bxt_cdclk_ctl(struct intel_display *display,
>  		 * icl_cdclk_pll_disable().  Here we are just making sure
>  		 * we keep the expected value.
>  		 */
> -		if (intel_display_wa(display, 13012396614) && vco == 0)
> +		if (intel_display_wa(display, INTEL_DISPLAY_WA_13012396614) &&
> +		    vco == 0)
>  			val |= MDCLK_SOURCE_SEL_CD2XCLK;
>  		else
>  			val |= xe2lpd_mdclk_source_sel(display);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 138ee7dd1977..15edf609fff4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1070,7 +1070,7 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
>  	if (audio_enabling(old_crtc_state, new_crtc_state))
>  		intel_encoders_audio_enable(state, crtc);
>  
> -	if (intel_display_wa(display, 14011503117)) {
> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_14011503117)) {
>  		if (old_crtc_state->pch_pfit.enabled != new_crtc_state->pch_pfit.enabled)
>  			adl_scaler_ecc_unmask(new_crtc_state);
>  	}
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index 9c8d29839caf..1e03187dbd38 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -249,7 +249,7 @@ static void hsw_power_well_post_enable(struct intel_display *display,
>  	if (irq_pipe_mask) {
>  		gen8_irq_power_well_post_enable(display, irq_pipe_mask);
>  
> -		if (intel_display_wa(display, 22021048059))
> +		if (intel_display_wa(display, INTEL_DISPLAY_WA_22021048059))
>  			dss_pipe_gating_enable_disable(display, irq_pipe_mask, false);
>  	}
>  }
> @@ -258,7 +258,7 @@ static void hsw_power_well_pre_disable(struct intel_display *display,
>  				       u8 irq_pipe_mask)
>  {
>  	if (irq_pipe_mask) {
> -		if (intel_display_wa(display, 22021048059))
> +		if (intel_display_wa(display, INTEL_DISPLAY_WA_22021048059))
>  			dss_pipe_gating_enable_disable(display, irq_pipe_mask, true);
>  
>  		gen8_irq_power_well_pre_disable(display, irq_pipe_mask);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
> index c2ccdca2c2f3..1d8340b36c01 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_wa.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
> @@ -87,7 +87,7 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
>  	case INTEL_DISPLAY_WA_22021048059:
>  		return IS_DISPLAY_VER(display, 14, 35);
>  	default:
> -		drm_WARN(display->drm, 1, "Missing Wa number: %s\n", name);
> +		drm_WARN(display->drm, 1, "Missing Wa: %s\n", name);
>  		break;
>  	}
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
> index 767420d5f406..06c1f62c0f6d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_wa.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
> @@ -40,6 +40,6 @@ enum intel_display_wa {
>  bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa, const char *name);
>  
>  #define intel_display_wa(__display, __wa) \
> -	__intel_display_wa((__display), INTEL_DISPLAY_WA_##__wa, __stringify(__wa))
> +	__intel_display_wa((__display), __wa, __stringify(__wa))
>  
>  #endif
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 3e9b3e532499..5d0d7c1027f5 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -957,7 +957,7 @@ static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
>  	 * Fixes: Screen flicker with FBC and Package C state enabled
>  	 * Workaround: Forced SLB invalidation before start of new frame.
>  	 */
> -	if (intel_display_wa(display, 22014263786))
> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_22014263786))
>  		intel_de_rmw(display, ILK_DPFC_CHICKEN(fbc->id),
>  			     0, DPFC_CHICKEN_FORCE_SLB_INVALIDATION);
>  
> @@ -979,7 +979,7 @@ static void fbc_sys_cache_update_config(struct intel_display *display, u32 reg,
>  	 * Fixes: SoC hardware issue in read caching
>  	 * Workaround: disable cache read setting which is enabled by default.
>  	 */
> -	if (!intel_display_wa(display, 14025769978))
> +	if (!intel_display_wa(display, INTEL_DISPLAY_WA_14025769978))
>  		/* Cache read enable is set by default */
>  		reg |= FBC_SYS_CACHE_READ_ENABLE;
>  
> @@ -1612,7 +1612,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
>  		return 0;
>  	}
>  
> -	if (intel_display_wa(display, 16023588340)) {
> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_16023588340)) {
>  		plane_state->no_fbc_reason = "Wa_16023588340";
>  		return 0;
>  	}
> @@ -1622,7 +1622,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
>  	 * Fixes: Underrun during media decode
>  	 * Workaround: Do not enable FBC
>  	 */
> -	if (intel_display_wa(display, 15018326506)) {
> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_15018326506)) {
>  		plane_state->no_fbc_reason = "Wa_15018326506";
>  		return 0;
>  	}
> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
> index 38706017c0c6..df48f27f1cc1 100644
> --- a/drivers/gpu/drm/i915/display/intel_gmbus.c
> +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
> @@ -250,7 +250,7 @@ static u32 get_reserved(struct intel_gmbus *bus)
>  	preserve_bits |= GPIO_DATA_PULLUP_DISABLE | GPIO_CLOCK_PULLUP_DISABLE;
>  
>  	/* Wa_16025573575: the masks bits need to be preserved through out */
> -	if (intel_display_wa(display, 16025573575))
> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_16025573575))
>  		preserve_bits |= GPIO_CLOCK_DIR_MASK | GPIO_CLOCK_VAL_MASK |
>  				 GPIO_DATA_DIR_MASK | GPIO_DATA_VAL_MASK;
>  
> @@ -342,7 +342,7 @@ intel_gpio_pre_xfer(struct i2c_adapter *adapter)
>  	if (display->platform.pineview)
>  		pnv_gmbus_clock_gating(display, false);
>  
> -	if (intel_display_wa(display, 16025573575))
> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_16025573575))
>  		ptl_handle_mask_bits(bus, true);
>  
>  	set_data(bus, 1);
> @@ -363,7 +363,7 @@ intel_gpio_post_xfer(struct i2c_adapter *adapter)
>  	if (display->platform.pineview)
>  		pnv_gmbus_clock_gating(display, true);
>  
> -	if (intel_display_wa(display, 16025573575))
> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_16025573575))
>  		ptl_handle_mask_bits(bus, false);
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> index 4c4deac7f9c8..7c5cb188ebf0 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -823,7 +823,7 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
>  			crtc_state->scaler_state.scaler_id < 0))
>  		return;
>  
> -	if (intel_display_wa(display, 14011503117))
> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_14011503117))
>  		adl_scaler_ecc_mask(crtc_state);
>  
>  	drm_rect_init(&src, 0, 0,

-- 
Jani Nikula, Intel

Re: [PATCH v5 01/16] drm/i915/display: remove enum macro magic in intel_display_wa()

[Jani Nikula]

On Fri, 06 Mar 2026, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Thu, 05 Mar 2026, Luca Coelho <luciano.coelho@intel.com> wrote:
>> There's not much use in passing a number to the macro and let it
>> convert that into the enum and a string.  It just hides the symbols.
>
> There was a point, though. Passing a random number to intel_display_wa()
> would fail the build. Now you'll only find out runtime. I'll concede
> there's value, perhaps more so, in having the symbols not hidden.
>
>> Remove the number to enum conversion magic in intel_display_wa().
>>
>> This has the side-effect of changing the print in the drm_WARN() that
>> is issued when the number is not implemented, but that is moot anyway
>> and can be changed later to something cleaner if needed.
>
> I actually wonder if having the names there is really worth it. It's
> just a bunch of rodata bloat for not much benefit. It should be easy
> enough to find which enumerator isn't handled.
>
> Maybe check the objdump bloat reduction with the intel_display_wa()
> wrapper macro and the const char *name parameter removed?

PS. All of this can be done in follow-up too, to not hold this series
back any longer.

>
> BR,
> Jani.
>
>>
>> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
>> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_cdclk.c              | 5 +++--
>>  drivers/gpu/drm/i915/display/intel_display.c            | 2 +-
>>  drivers/gpu/drm/i915/display/intel_display_power_well.c | 4 ++--
>>  drivers/gpu/drm/i915/display/intel_display_wa.c         | 2 +-
>>  drivers/gpu/drm/i915/display/intel_display_wa.h         | 2 +-
>>  drivers/gpu/drm/i915/display/intel_fbc.c                | 8 ++++----
>>  drivers/gpu/drm/i915/display/intel_gmbus.c              | 6 +++---
>>  drivers/gpu/drm/i915/display/skl_scaler.c               | 2 +-
>>  8 files changed, 16 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
>> index 38331e899519..7767f8c198da 100644
>> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
>> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
>> @@ -1870,7 +1870,7 @@ static void icl_cdclk_pll_disable(struct intel_display *display)
>>  	 *      after the PLL is enabled (which is already done as part of the
>>  	 *      normal flow of _bxt_set_cdclk()).
>>  	 */
>> -	if (intel_display_wa(display, 13012396614))
>> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_13012396614))
>>  		intel_de_rmw(display, CDCLK_CTL, MDCLK_SOURCE_SEL_MASK, MDCLK_SOURCE_SEL_CD2XCLK);
>>  
>>  	intel_de_rmw(display, BXT_DE_PLL_ENABLE,
>> @@ -2186,7 +2186,8 @@ static u32 bxt_cdclk_ctl(struct intel_display *display,
>>  		 * icl_cdclk_pll_disable().  Here we are just making sure
>>  		 * we keep the expected value.
>>  		 */
>> -		if (intel_display_wa(display, 13012396614) && vco == 0)
>> +		if (intel_display_wa(display, INTEL_DISPLAY_WA_13012396614) &&
>> +		    vco == 0)
>>  			val |= MDCLK_SOURCE_SEL_CD2XCLK;
>>  		else
>>  			val |= xe2lpd_mdclk_source_sel(display);
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>> index 138ee7dd1977..15edf609fff4 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -1070,7 +1070,7 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
>>  	if (audio_enabling(old_crtc_state, new_crtc_state))
>>  		intel_encoders_audio_enable(state, crtc);
>>  
>> -	if (intel_display_wa(display, 14011503117)) {
>> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_14011503117)) {
>>  		if (old_crtc_state->pch_pfit.enabled != new_crtc_state->pch_pfit.enabled)
>>  			adl_scaler_ecc_unmask(new_crtc_state);
>>  	}
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
>> index 9c8d29839caf..1e03187dbd38 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
>> @@ -249,7 +249,7 @@ static void hsw_power_well_post_enable(struct intel_display *display,
>>  	if (irq_pipe_mask) {
>>  		gen8_irq_power_well_post_enable(display, irq_pipe_mask);
>>  
>> -		if (intel_display_wa(display, 22021048059))
>> +		if (intel_display_wa(display, INTEL_DISPLAY_WA_22021048059))
>>  			dss_pipe_gating_enable_disable(display, irq_pipe_mask, false);
>>  	}
>>  }
>> @@ -258,7 +258,7 @@ static void hsw_power_well_pre_disable(struct intel_display *display,
>>  				       u8 irq_pipe_mask)
>>  {
>>  	if (irq_pipe_mask) {
>> -		if (intel_display_wa(display, 22021048059))
>> +		if (intel_display_wa(display, INTEL_DISPLAY_WA_22021048059))
>>  			dss_pipe_gating_enable_disable(display, irq_pipe_mask, true);
>>  
>>  		gen8_irq_power_well_pre_disable(display, irq_pipe_mask);
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
>> index c2ccdca2c2f3..1d8340b36c01 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_wa.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
>> @@ -87,7 +87,7 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
>>  	case INTEL_DISPLAY_WA_22021048059:
>>  		return IS_DISPLAY_VER(display, 14, 35);
>>  	default:
>> -		drm_WARN(display->drm, 1, "Missing Wa number: %s\n", name);
>> +		drm_WARN(display->drm, 1, "Missing Wa: %s\n", name);
>>  		break;
>>  	}
>>  
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
>> index 767420d5f406..06c1f62c0f6d 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_wa.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
>> @@ -40,6 +40,6 @@ enum intel_display_wa {
>>  bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa, const char *name);
>>  
>>  #define intel_display_wa(__display, __wa) \
>> -	__intel_display_wa((__display), INTEL_DISPLAY_WA_##__wa, __stringify(__wa))
>> +	__intel_display_wa((__display), __wa, __stringify(__wa))
>>  
>>  #endif
>> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
>> index 3e9b3e532499..5d0d7c1027f5 100644
>> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
>> @@ -957,7 +957,7 @@ static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
>>  	 * Fixes: Screen flicker with FBC and Package C state enabled
>>  	 * Workaround: Forced SLB invalidation before start of new frame.
>>  	 */
>> -	if (intel_display_wa(display, 22014263786))
>> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_22014263786))
>>  		intel_de_rmw(display, ILK_DPFC_CHICKEN(fbc->id),
>>  			     0, DPFC_CHICKEN_FORCE_SLB_INVALIDATION);
>>  
>> @@ -979,7 +979,7 @@ static void fbc_sys_cache_update_config(struct intel_display *display, u32 reg,
>>  	 * Fixes: SoC hardware issue in read caching
>>  	 * Workaround: disable cache read setting which is enabled by default.
>>  	 */
>> -	if (!intel_display_wa(display, 14025769978))
>> +	if (!intel_display_wa(display, INTEL_DISPLAY_WA_14025769978))
>>  		/* Cache read enable is set by default */
>>  		reg |= FBC_SYS_CACHE_READ_ENABLE;
>>  
>> @@ -1612,7 +1612,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
>>  		return 0;
>>  	}
>>  
>> -	if (intel_display_wa(display, 16023588340)) {
>> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_16023588340)) {
>>  		plane_state->no_fbc_reason = "Wa_16023588340";
>>  		return 0;
>>  	}
>> @@ -1622,7 +1622,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
>>  	 * Fixes: Underrun during media decode
>>  	 * Workaround: Do not enable FBC
>>  	 */
>> -	if (intel_display_wa(display, 15018326506)) {
>> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_15018326506)) {
>>  		plane_state->no_fbc_reason = "Wa_15018326506";
>>  		return 0;
>>  	}
>> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
>> index 38706017c0c6..df48f27f1cc1 100644
>> --- a/drivers/gpu/drm/i915/display/intel_gmbus.c
>> +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
>> @@ -250,7 +250,7 @@ static u32 get_reserved(struct intel_gmbus *bus)
>>  	preserve_bits |= GPIO_DATA_PULLUP_DISABLE | GPIO_CLOCK_PULLUP_DISABLE;
>>  
>>  	/* Wa_16025573575: the masks bits need to be preserved through out */
>> -	if (intel_display_wa(display, 16025573575))
>> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_16025573575))
>>  		preserve_bits |= GPIO_CLOCK_DIR_MASK | GPIO_CLOCK_VAL_MASK |
>>  				 GPIO_DATA_DIR_MASK | GPIO_DATA_VAL_MASK;
>>  
>> @@ -342,7 +342,7 @@ intel_gpio_pre_xfer(struct i2c_adapter *adapter)
>>  	if (display->platform.pineview)
>>  		pnv_gmbus_clock_gating(display, false);
>>  
>> -	if (intel_display_wa(display, 16025573575))
>> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_16025573575))
>>  		ptl_handle_mask_bits(bus, true);
>>  
>>  	set_data(bus, 1);
>> @@ -363,7 +363,7 @@ intel_gpio_post_xfer(struct i2c_adapter *adapter)
>>  	if (display->platform.pineview)
>>  		pnv_gmbus_clock_gating(display, true);
>>  
>> -	if (intel_display_wa(display, 16025573575))
>> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_16025573575))
>>  		ptl_handle_mask_bits(bus, false);
>>  }
>>  
>> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
>> index 4c4deac7f9c8..7c5cb188ebf0 100644
>> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
>> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
>> @@ -823,7 +823,7 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
>>  			crtc_state->scaler_state.scaler_id < 0))
>>  		return;
>>  
>> -	if (intel_display_wa(display, 14011503117))
>> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_14011503117))
>>  		adl_scaler_ecc_mask(crtc_state);
>>  
>>  	drm_rect_init(&src, 0, 0,

-- 
Jani Nikula, Intel

Re: [PATCH v5 01/16] drm/i915/display: remove enum macro magic in intel_display_wa()

[Luca Coelho]

On Fri, 2026-03-06 at 13:38 +0200, Jani Nikula wrote:
> On Fri, 06 Mar 2026, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> > On Thu, 05 Mar 2026, Luca Coelho <luciano.coelho@intel.com> wrote:
> > > There's not much use in passing a number to the macro and let it
> > > convert that into the enum and a string.  It just hides the symbols.
> > 
> > There was a point, though. Passing a random number to intel_display_wa()
> > would fail the build. Now you'll only find out runtime. I'll concede
> > there's value, perhaps more so, in having the symbols not hidden.

Good point, but there are many nicer ways of achieving the same thing
without creating a ficticious integer for it, because the WA number is
really an ID, and could be any string...

Anyway, this series is already merged, but I'll send a new proposal
with BUILD_BUG_ON() that should achieve the same thing.


> > 
> > > Remove the number to enum conversion magic in intel_display_wa().
> > > 
> > > This has the side-effect of changing the print in the drm_WARN() that
> > > is issued when the number is not implemented, but that is moot anyway
> > > and can be changed later to something cleaner if needed.
> > 
> > I actually wonder if having the names there is really worth it. It's
> > just a bunch of rodata bloat for not much benefit. It should be easy
> > enough to find which enumerator isn't handled.
> > 
> > Maybe check the objdump bloat reduction with the intel_display_wa()
> > wrapper macro and the const char *name parameter removed?

Yes, good idea, I'll check this and maybe send a patch to improve this
as well.



> PS. All of this can be done in follow-up too, to not hold this series
> back any longer.

Thanks!

--
Cheers,
Luca.


> > 
> > > 
> > > Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > > Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_cdclk.c              | 5 +++--
> > >  drivers/gpu/drm/i915/display/intel_display.c            | 2 +-
> > >  drivers/gpu/drm/i915/display/intel_display_power_well.c | 4 ++--
> > >  drivers/gpu/drm/i915/display/intel_display_wa.c         | 2 +-
> > >  drivers/gpu/drm/i915/display/intel_display_wa.h         | 2 +-
> > >  drivers/gpu/drm/i915/display/intel_fbc.c                | 8 ++++----
> > >  drivers/gpu/drm/i915/display/intel_gmbus.c              | 6 +++---
> > >  drivers/gpu/drm/i915/display/skl_scaler.c               | 2 +-
> > >  8 files changed, 16 insertions(+), 15 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > > index 38331e899519..7767f8c198da 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > > @@ -1870,7 +1870,7 @@ static void icl_cdclk_pll_disable(struct intel_display *display)
> > >  	 *      after the PLL is enabled (which is already done as part of the
> > >  	 *      normal flow of _bxt_set_cdclk()).
> > >  	 */
> > > -	if (intel_display_wa(display, 13012396614))
> > > +	if (intel_display_wa(display, INTEL_DISPLAY_WA_13012396614))
> > >  		intel_de_rmw(display, CDCLK_CTL, MDCLK_SOURCE_SEL_MASK, MDCLK_SOURCE_SEL_CD2XCLK);
> > >  
> > >  	intel_de_rmw(display, BXT_DE_PLL_ENABLE,
> > > @@ -2186,7 +2186,8 @@ static u32 bxt_cdclk_ctl(struct intel_display *display,
> > >  		 * icl_cdclk_pll_disable().  Here we are just making sure
> > >  		 * we keep the expected value.
> > >  		 */
> > > -		if (intel_display_wa(display, 13012396614) && vco == 0)
> > > +		if (intel_display_wa(display, INTEL_DISPLAY_WA_13012396614) &&
> > > +		    vco == 0)
> > >  			val |= MDCLK_SOURCE_SEL_CD2XCLK;
> > >  		else
> > >  			val |= xe2lpd_mdclk_source_sel(display);
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > index 138ee7dd1977..15edf609fff4 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -1070,7 +1070,7 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
> > >  	if (audio_enabling(old_crtc_state, new_crtc_state))
> > >  		intel_encoders_audio_enable(state, crtc);
> > >  
> > > -	if (intel_display_wa(display, 14011503117)) {
> > > +	if (intel_display_wa(display, INTEL_DISPLAY_WA_14011503117)) {
> > >  		if (old_crtc_state->pch_pfit.enabled != new_crtc_state->pch_pfit.enabled)
> > >  			adl_scaler_ecc_unmask(new_crtc_state);
> > >  	}
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > > index 9c8d29839caf..1e03187dbd38 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > > @@ -249,7 +249,7 @@ static void hsw_power_well_post_enable(struct intel_display *display,
> > >  	if (irq_pipe_mask) {
> > >  		gen8_irq_power_well_post_enable(display, irq_pipe_mask);
> > >  
> > > -		if (intel_display_wa(display, 22021048059))
> > > +		if (intel_display_wa(display, INTEL_DISPLAY_WA_22021048059))
> > >  			dss_pipe_gating_enable_disable(display, irq_pipe_mask, false);
> > >  	}
> > >  }
> > > @@ -258,7 +258,7 @@ static void hsw_power_well_pre_disable(struct intel_display *display,
> > >  				       u8 irq_pipe_mask)
> > >  {
> > >  	if (irq_pipe_mask) {
> > > -		if (intel_display_wa(display, 22021048059))
> > > +		if (intel_display_wa(display, INTEL_DISPLAY_WA_22021048059))
> > >  			dss_pipe_gating_enable_disable(display, irq_pipe_mask, true);
> > >  
> > >  		gen8_irq_power_well_pre_disable(display, irq_pipe_mask);
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
> > > index c2ccdca2c2f3..1d8340b36c01 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_wa.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
> > > @@ -87,7 +87,7 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
> > >  	case INTEL_DISPLAY_WA_22021048059:
> > >  		return IS_DISPLAY_VER(display, 14, 35);
> > >  	default:
> > > -		drm_WARN(display->drm, 1, "Missing Wa number: %s\n", name);
> > > +		drm_WARN(display->drm, 1, "Missing Wa: %s\n", name);
> > >  		break;
> > >  	}
> > >  
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
> > > index 767420d5f406..06c1f62c0f6d 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_wa.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
> > > @@ -40,6 +40,6 @@ enum intel_display_wa {
> > >  bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa, const char *name);
> > >  
> > >  #define intel_display_wa(__display, __wa) \
> > > -	__intel_display_wa((__display), INTEL_DISPLAY_WA_##__wa, __stringify(__wa))
> > > +	__intel_display_wa((__display), __wa, __stringify(__wa))
> > >  
> > >  #endif
> > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > index 3e9b3e532499..5d0d7c1027f5 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > @@ -957,7 +957,7 @@ static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
> > >  	 * Fixes: Screen flicker with FBC and Package C state enabled
> > >  	 * Workaround: Forced SLB invalidation before start of new frame.
> > >  	 */
> > > -	if (intel_display_wa(display, 22014263786))
> > > +	if (intel_display_wa(display, INTEL_DISPLAY_WA_22014263786))
> > >  		intel_de_rmw(display, ILK_DPFC_CHICKEN(fbc->id),
> > >  			     0, DPFC_CHICKEN_FORCE_SLB_INVALIDATION);
> > >  
> > > @@ -979,7 +979,7 @@ static void fbc_sys_cache_update_config(struct intel_display *display, u32 reg,
> > >  	 * Fixes: SoC hardware issue in read caching
> > >  	 * Workaround: disable cache read setting which is enabled by default.
> > >  	 */
> > > -	if (!intel_display_wa(display, 14025769978))
> > > +	if (!intel_display_wa(display, INTEL_DISPLAY_WA_14025769978))
> > >  		/* Cache read enable is set by default */
> > >  		reg |= FBC_SYS_CACHE_READ_ENABLE;
> > >  
> > > @@ -1612,7 +1612,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
> > >  		return 0;
> > >  	}
> > >  
> > > -	if (intel_display_wa(display, 16023588340)) {
> > > +	if (intel_display_wa(display, INTEL_DISPLAY_WA_16023588340)) {
> > >  		plane_state->no_fbc_reason = "Wa_16023588340";
> > >  		return 0;
> > >  	}
> > > @@ -1622,7 +1622,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
> > >  	 * Fixes: Underrun during media decode
> > >  	 * Workaround: Do not enable FBC
> > >  	 */
> > > -	if (intel_display_wa(display, 15018326506)) {
> > > +	if (intel_display_wa(display, INTEL_DISPLAY_WA_15018326506)) {
> > >  		plane_state->no_fbc_reason = "Wa_15018326506";
> > >  		return 0;
> > >  	}
> > > diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
> > > index 38706017c0c6..df48f27f1cc1 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_gmbus.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
> > > @@ -250,7 +250,7 @@ static u32 get_reserved(struct intel_gmbus *bus)
> > >  	preserve_bits |= GPIO_DATA_PULLUP_DISABLE | GPIO_CLOCK_PULLUP_DISABLE;
> > >  
> > >  	/* Wa_16025573575: the masks bits need to be preserved through out */
> > > -	if (intel_display_wa(display, 16025573575))
> > > +	if (intel_display_wa(display, INTEL_DISPLAY_WA_16025573575))
> > >  		preserve_bits |= GPIO_CLOCK_DIR_MASK | GPIO_CLOCK_VAL_MASK |
> > >  				 GPIO_DATA_DIR_MASK | GPIO_DATA_VAL_MASK;
> > >  
> > > @@ -342,7 +342,7 @@ intel_gpio_pre_xfer(struct i2c_adapter *adapter)
> > >  	if (display->platform.pineview)
> > >  		pnv_gmbus_clock_gating(display, false);
> > >  
> > > -	if (intel_display_wa(display, 16025573575))
> > > +	if (intel_display_wa(display, INTEL_DISPLAY_WA_16025573575))
> > >  		ptl_handle_mask_bits(bus, true);
> > >  
> > >  	set_data(bus, 1);
> > > @@ -363,7 +363,7 @@ intel_gpio_post_xfer(struct i2c_adapter *adapter)
> > >  	if (display->platform.pineview)
> > >  		pnv_gmbus_clock_gating(display, true);
> > >  
> > > -	if (intel_display_wa(display, 16025573575))
> > > +	if (intel_display_wa(display, INTEL_DISPLAY_WA_16025573575))
> > >  		ptl_handle_mask_bits(bus, false);
> > >  }
> > >  
> > > diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> > > index 4c4deac7f9c8..7c5cb188ebf0 100644
> > > --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> > > +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> > > @@ -823,7 +823,7 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
> > >  			crtc_state->scaler_state.scaler_id < 0))
> > >  		return;
> > >  
> > > -	if (intel_display_wa(display, 14011503117))
> > > +	if (intel_display_wa(display, INTEL_DISPLAY_WA_14011503117))
> > >  		adl_scaler_ecc_mask(crtc_state);
> > >  
> > >  	drm_rect_init(&src, 0, 0,

[PATCH v5 02/16] drm/i915/display: convert audio workaround to new framework

[Luca Coelho]

Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_audio.c    | 24 +++++++++----------
 .../gpu/drm/i915/display/intel_display_wa.c   |  4 ++++
 .../gpu/drm/i915/display/intel_display_wa.h   |  1 +
 3 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
index 5f3c175afdd2..081627e0d917 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -37,6 +37,7 @@
 #include "intel_crtc.h"
 #include "intel_de.h"
 #include "intel_display_types.h"
+#include "intel_display_wa.h"
 #include "intel_lpe_audio.h"
 
 /**
@@ -184,17 +185,6 @@ static const struct hdmi_aud_ncts hdmi_aud_ncts_36bpp[] = {
 	{ 192000, TMDS_445_5M, 20480, 371250 },
 };
 
-/*
- * WA_14020863754: Implement Audio Workaround
- * Corner case with Min Hblank Fix can cause audio hang
- */
-static bool needs_wa_14020863754(struct intel_display *display)
-{
-	return DISPLAY_VERx100(display) == 3000 ||
-		DISPLAY_VERx100(display) == 2000 ||
-		DISPLAY_VERx100(display) == 1401;
-}
-
 /* get AUD_CONFIG_PIXEL_CLOCK_HDMI_* value for mode */
 static u32 audio_config_hdmi_pixel_clock(const struct intel_crtc_state *crtc_state)
 {
@@ -440,7 +430,11 @@ static void hsw_audio_codec_disable(struct intel_encoder *encoder,
 	intel_de_rmw(display, HSW_AUD_PIN_ELD_CP_VLD,
 		     AUDIO_OUTPUT_ENABLE(cpu_transcoder), 0);
 
-	if (needs_wa_14020863754(display))
+	/*
+	 * WA_14020863754: Implement Audio Workaround
+	 * Corner case with Min Hblank Fix can cause audio hang
+	 */
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14020863754))
 		intel_de_rmw(display, AUD_CHICKENBIT_REG3, DACBE_DISABLE_MIN_HBLANK_FIX, 0);
 
 	intel_audio_sdp_split_update(old_crtc_state, false);
@@ -572,7 +566,11 @@ static void hsw_audio_codec_enable(struct intel_encoder *encoder,
 
 	intel_audio_sdp_split_update(crtc_state, true);
 
-	if (needs_wa_14020863754(display))
+	/*
+	 * WA_14020863754: Implement Audio Workaround
+	 * Corner case with Min Hblank Fix can cause audio hang
+	 */
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14020863754))
 		intel_de_rmw(display, AUD_CHICKENBIT_REG3, 0, DACBE_DISABLE_MIN_HBLANK_FIX);
 
 	/* Enable audio presence detect */
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index 1d8340b36c01..b383bfad3af6 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -74,6 +74,10 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 			DISPLAY_VERx100(display) == 3500;
 	case INTEL_DISPLAY_WA_14011503117:
 		return DISPLAY_VER(display) == 13;
+	case INTEL_DISPLAY_WA_14020863754:
+		return DISPLAY_VERx100(display) == 3000 ||
+			DISPLAY_VERx100(display) == 2000 ||
+			DISPLAY_VERx100(display) == 1401;
 	case INTEL_DISPLAY_WA_14025769978:
 		return DISPLAY_VER(display) == 35;
 	case INTEL_DISPLAY_WA_15018326506:
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index 06c1f62c0f6d..b1bcc18dd2c8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -29,6 +29,7 @@ bool intel_display_needs_wa_16023588340(struct intel_display *display);
 enum intel_display_wa {
 	INTEL_DISPLAY_WA_13012396614,
 	INTEL_DISPLAY_WA_14011503117,
+	INTEL_DISPLAY_WA_14020863754,
 	INTEL_DISPLAY_WA_14025769978,
 	INTEL_DISPLAY_WA_15018326506,
 	INTEL_DISPLAY_WA_16023588340,
-- 
2.51.0

Re: [PATCH v5 02/16] drm/i915/display: convert audio workaround to new framework

[Jani Nikula]

On Thu, 05 Mar 2026, Luca Coelho <luciano.coelho@intel.com> wrote:
> Convert the low-hanging fruits of workaround checks to the workaround
> framework.  Instead of having display structure checks for the
> workarounds all over, concentrate the checks in intel_display_wa.c.
>
> Acked-by: Jani Nikula <jani.nikula@intel.com>
> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_audio.c    | 24 +++++++++----------
>  .../gpu/drm/i915/display/intel_display_wa.c   |  4 ++++
>  .../gpu/drm/i915/display/intel_display_wa.h   |  1 +
>  3 files changed, 16 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
> index 5f3c175afdd2..081627e0d917 100644
> --- a/drivers/gpu/drm/i915/display/intel_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_audio.c
> @@ -37,6 +37,7 @@
>  #include "intel_crtc.h"
>  #include "intel_de.h"
>  #include "intel_display_types.h"
> +#include "intel_display_wa.h"
>  #include "intel_lpe_audio.h"
>  
>  /**
> @@ -184,17 +185,6 @@ static const struct hdmi_aud_ncts hdmi_aud_ncts_36bpp[] = {
>  	{ 192000, TMDS_445_5M, 20480, 371250 },
>  };
>  
> -/*
> - * WA_14020863754: Implement Audio Workaround
> - * Corner case with Min Hblank Fix can cause audio hang
> - */
> -static bool needs_wa_14020863754(struct intel_display *display)
> -{
> -	return DISPLAY_VERx100(display) == 3000 ||
> -		DISPLAY_VERx100(display) == 2000 ||
> -		DISPLAY_VERx100(display) == 1401;
> -}
> -
>  /* get AUD_CONFIG_PIXEL_CLOCK_HDMI_* value for mode */
>  static u32 audio_config_hdmi_pixel_clock(const struct intel_crtc_state *crtc_state)
>  {
> @@ -440,7 +430,11 @@ static void hsw_audio_codec_disable(struct intel_encoder *encoder,
>  	intel_de_rmw(display, HSW_AUD_PIN_ELD_CP_VLD,
>  		     AUDIO_OUTPUT_ENABLE(cpu_transcoder), 0);
>  
> -	if (needs_wa_14020863754(display))
> +	/*
> +	 * WA_14020863754: Implement Audio Workaround
> +	 * Corner case with Min Hblank Fix can cause audio hang
> +	 */

I'm not going to ask you to change anything now, just musing here.

What's the point of having the WA_14020863754 in the comment when it's
duplicated in the INTEL_DISPLAY_WA_14020863754 below?

What's the point of duplicating the wa text in multiple places? Is it
better to have it where the context is (i.e. here) or centralized in
intel_display_wa.c?

Again, just thinking aloud, let's go with what you have here now.

BR,
Jani.


> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_14020863754))
>  		intel_de_rmw(display, AUD_CHICKENBIT_REG3, DACBE_DISABLE_MIN_HBLANK_FIX, 0);
>  
>  	intel_audio_sdp_split_update(old_crtc_state, false);
> @@ -572,7 +566,11 @@ static void hsw_audio_codec_enable(struct intel_encoder *encoder,
>  
>  	intel_audio_sdp_split_update(crtc_state, true);
>  
> -	if (needs_wa_14020863754(display))
> +	/*
> +	 * WA_14020863754: Implement Audio Workaround
> +	 * Corner case with Min Hblank Fix can cause audio hang
> +	 */
> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_14020863754))
>  		intel_de_rmw(display, AUD_CHICKENBIT_REG3, 0, DACBE_DISABLE_MIN_HBLANK_FIX);
>  
>  	/* Enable audio presence detect */
> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
> index 1d8340b36c01..b383bfad3af6 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_wa.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
> @@ -74,6 +74,10 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
>  			DISPLAY_VERx100(display) == 3500;
>  	case INTEL_DISPLAY_WA_14011503117:
>  		return DISPLAY_VER(display) == 13;
> +	case INTEL_DISPLAY_WA_14020863754:
> +		return DISPLAY_VERx100(display) == 3000 ||
> +			DISPLAY_VERx100(display) == 2000 ||
> +			DISPLAY_VERx100(display) == 1401;
>  	case INTEL_DISPLAY_WA_14025769978:
>  		return DISPLAY_VER(display) == 35;
>  	case INTEL_DISPLAY_WA_15018326506:
> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
> index 06c1f62c0f6d..b1bcc18dd2c8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_wa.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
> @@ -29,6 +29,7 @@ bool intel_display_needs_wa_16023588340(struct intel_display *display);
>  enum intel_display_wa {
>  	INTEL_DISPLAY_WA_13012396614,
>  	INTEL_DISPLAY_WA_14011503117,
> +	INTEL_DISPLAY_WA_14020863754,
>  	INTEL_DISPLAY_WA_14025769978,
>  	INTEL_DISPLAY_WA_15018326506,
>  	INTEL_DISPLAY_WA_16023588340,

-- 
Jani Nikula, Intel

[PATCH v5 03/16] drm/i915/display: convert W/As in intel_display_power.c to new framework

[Luca Coelho]

Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 .../drm/i915/display/intel_display_power.c    | 22 +++++++++----------
 .../gpu/drm/i915/display/intel_display_wa.c   | 18 +++++++++++++++
 .../gpu/drm/i915/display/intel_display_wa.h   |  7 ++++++
 3 files changed, 36 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 755935dcfe23..7312dba4f032 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -21,6 +21,7 @@
 #include "intel_display_rpm.h"
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
+#include "intel_display_wa.h"
 #include "intel_dmc.h"
 #include "intel_dram.h"
 #include "intel_mchbar_regs.h"
@@ -1621,8 +1622,7 @@ static void tgl_bw_buddy_init(struct intel_display *display)
 	if (display->platform.dgfx && !display->platform.dg1)
 		return;
 
-	if (display->platform.alderlake_s ||
-	    (display->platform.rocketlake && IS_DISPLAY_STEP(display, STEP_A0, STEP_B0)))
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_1409767108))
 		/* Wa_1409767108 */
 		table = wa_1409767108_buddy_page_masks;
 	else
@@ -1645,7 +1645,7 @@ static void tgl_bw_buddy_init(struct intel_display *display)
 				       table[config].page_mask);
 
 			/* Wa_22010178259:tgl,dg1,rkl,adl-s */
-			if (DISPLAY_VER(display) == 12)
+			if (intel_display_wa(display, INTEL_DISPLAY_WA_22010178259))
 				intel_de_rmw(display, BW_BUDDY_CTL(i),
 					     BW_BUDDY_TLB_REQ_TIMER_MASK,
 					     BW_BUDDY_TLB_REQ_TIMER(0x8));
@@ -1662,8 +1662,7 @@ static void icl_display_core_init(struct intel_display *display,
 	gen9_set_dc_state(display, DC_STATE_DISABLE);
 
 	/* Wa_14011294188:ehl,jsl,tgl,rkl,adl-s */
-	if (INTEL_PCH_TYPE(display) >= PCH_TGP &&
-	    INTEL_PCH_TYPE(display) < PCH_DG1)
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14011294188))
 		intel_de_rmw(display, SOUTH_DSPCLK_GATE_D, 0,
 			     PCH_DPMGUNIT_CLOCK_GATE_DISABLE);
 
@@ -1717,17 +1716,17 @@ static void icl_display_core_init(struct intel_display *display,
 		intel_dmc_load_program(display);
 
 	/* Wa_14011508470:tgl,dg1,rkl,adl-s,adl-p,dg2 */
-	if (IS_DISPLAY_VERx100(display, 1200, 1300))
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14011508470))
 		intel_de_rmw(display, GEN11_CHICKEN_DCPR_2, 0,
 			     DCPR_CLEAR_MEMSTAT_DIS | DCPR_SEND_RESP_IMM |
 			     DCPR_MASK_LPMODE | DCPR_MASK_MAXLATENCY_MEMUP_CLR);
 
 	/* Wa_14011503030:xelpd */
-	if (DISPLAY_VER(display) == 13)
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14011503030))
 		intel_de_write(display, XELPD_DISPLAY_ERR_FATAL_MASK, ~0);
 
 	/* Wa_15013987218 */
-	if (DISPLAY_VER(display) == 20) {
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_15013987218)) {
 		intel_de_rmw(display, SOUTH_DSPCLK_GATE_D,
 			     0, PCH_GMBUSUNIT_CLOCK_GATE_DISABLE);
 		intel_de_rmw(display, SOUTH_DSPCLK_GATE_D,
@@ -2266,8 +2265,9 @@ void intel_display_power_suspend_late(struct intel_display *display, bool s2idle
 	}
 
 	/* Tweaked Wa_14010685332:cnp,icp,jsp,mcc,tgp,adp */
-	if (INTEL_PCH_TYPE(display) >= PCH_CNP && INTEL_PCH_TYPE(display) < PCH_DG1)
-		intel_de_rmw(display, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, SBCLK_RUN_REFCLK_DIS);
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14010685332))
+		intel_de_rmw(display, SOUTH_CHICKEN1,
+			     SBCLK_RUN_REFCLK_DIS, SBCLK_RUN_REFCLK_DIS);
 }
 
 void intel_display_power_resume_early(struct intel_display *display)
@@ -2281,7 +2281,7 @@ void intel_display_power_resume_early(struct intel_display *display)
 	}
 
 	/* Tweaked Wa_14010685332:cnp,icp,jsp,mcc,tgp,adp */
-	if (INTEL_PCH_TYPE(display) >= PCH_CNP && INTEL_PCH_TYPE(display) < PCH_DG1)
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14010685332))
 		intel_de_rmw(display, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, 0);
 
 	intel_power_domains_resume(display);
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index b383bfad3af6..011749b680e8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -9,6 +9,7 @@
 #include "intel_display_core.h"
 #include "intel_display_regs.h"
 #include "intel_display_wa.h"
+#include "intel_step.h"
 
 static void gen11_display_wa_apply(struct intel_display *display)
 {
@@ -69,23 +70,40 @@ static bool intel_display_needs_wa_16025573575(struct intel_display *display)
 bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa, const char *name)
 {
 	switch (wa) {
+	case INTEL_DISPLAY_WA_1409767108:
+		return (display->platform.alderlake_s ||
+			(display->platform.rocketlake &&
+			 IS_DISPLAY_STEP(display, STEP_A0, STEP_B0)));
 	case INTEL_DISPLAY_WA_13012396614:
 		return DISPLAY_VERx100(display) == 3000 ||
 			DISPLAY_VERx100(display) == 3500;
+	case INTEL_DISPLAY_WA_14010685332:
+		return INTEL_PCH_TYPE(display) >= PCH_CNP &&
+			INTEL_PCH_TYPE(display) < PCH_DG1;
+	case INTEL_DISPLAY_WA_14011294188:
+		return INTEL_PCH_TYPE(display) >= PCH_TGP &&
+			INTEL_PCH_TYPE(display) < PCH_DG1;
+	case INTEL_DISPLAY_WA_14011503030:
 	case INTEL_DISPLAY_WA_14011503117:
 		return DISPLAY_VER(display) == 13;
+	case INTEL_DISPLAY_WA_14011508470:
+		return (IS_DISPLAY_VERx100(display, 1200, 1300));
 	case INTEL_DISPLAY_WA_14020863754:
 		return DISPLAY_VERx100(display) == 3000 ||
 			DISPLAY_VERx100(display) == 2000 ||
 			DISPLAY_VERx100(display) == 1401;
 	case INTEL_DISPLAY_WA_14025769978:
 		return DISPLAY_VER(display) == 35;
+	case INTEL_DISPLAY_WA_15013987218:
+		return DISPLAY_VER(display) == 20;
 	case INTEL_DISPLAY_WA_15018326506:
 		return display->platform.battlemage;
 	case INTEL_DISPLAY_WA_16023588340:
 		return intel_display_needs_wa_16023588340(display);
 	case INTEL_DISPLAY_WA_16025573575:
 		return intel_display_needs_wa_16025573575(display);
+	case INTEL_DISPLAY_WA_22010178259:
+		return DISPLAY_VER(display) == 12;
 	case INTEL_DISPLAY_WA_22014263786:
 		return IS_DISPLAY_VERx100(display, 1100, 1400);
 	case INTEL_DISPLAY_WA_22021048059:
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index b1bcc18dd2c8..380cb64cf774 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -27,13 +27,20 @@ bool intel_display_needs_wa_16023588340(struct intel_display *display);
  * number.
  */
 enum intel_display_wa {
+	INTEL_DISPLAY_WA_1409767108,
 	INTEL_DISPLAY_WA_13012396614,
+	INTEL_DISPLAY_WA_14010685332,
+	INTEL_DISPLAY_WA_14011294188,
+	INTEL_DISPLAY_WA_14011503030,
 	INTEL_DISPLAY_WA_14011503117,
+	INTEL_DISPLAY_WA_14011508470,
 	INTEL_DISPLAY_WA_14020863754,
 	INTEL_DISPLAY_WA_14025769978,
+	INTEL_DISPLAY_WA_15013987218,
 	INTEL_DISPLAY_WA_15018326506,
 	INTEL_DISPLAY_WA_16023588340,
 	INTEL_DISPLAY_WA_16025573575,
+	INTEL_DISPLAY_WA_22010178259,
 	INTEL_DISPLAY_WA_22014263786,
 	INTEL_DISPLAY_WA_22021048059,
 };
-- 
2.51.0

[PATCH v5 04/16] drm/i915/display: convert W/As in intel_cdclk.c to new framework

[Luca Coelho]

Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c      | 2 +-
 drivers/gpu/drm/i915/display/intel_display_wa.c | 3 +++
 drivers/gpu/drm/i915/display/intel_display_wa.h | 1 +
 3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 7767f8c198da..121a12c5b8ac 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -4007,7 +4007,7 @@ void intel_init_cdclk_hooks(struct intel_display *display)
 		display->cdclk.table = dg2_cdclk_table;
 	} else if (display->platform.alderlake_p) {
 		/* Wa_22011320316:adl-p[a0] */
-		if (display->platform.alderlake_p && IS_DISPLAY_STEP(display, STEP_A0, STEP_B0)) {
+		if (intel_display_wa(display, INTEL_DISPLAY_WA_22011320316)) {
 			display->cdclk.table = adlp_a_step_cdclk_table;
 			display->funcs.cdclk = &tgl_cdclk_funcs;
 		} else if (display->platform.alderlake_p_raptorlake_u) {
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index 011749b680e8..aef6eca51119 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -104,6 +104,9 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 		return intel_display_needs_wa_16025573575(display);
 	case INTEL_DISPLAY_WA_22010178259:
 		return DISPLAY_VER(display) == 12;
+	case INTEL_DISPLAY_WA_22011320316:
+		return display->platform.alderlake_p &&
+			IS_DISPLAY_STEP(display, STEP_A0, STEP_B0);
 	case INTEL_DISPLAY_WA_22014263786:
 		return IS_DISPLAY_VERx100(display, 1100, 1400);
 	case INTEL_DISPLAY_WA_22021048059:
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index 380cb64cf774..aa96d111111c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -41,6 +41,7 @@ enum intel_display_wa {
 	INTEL_DISPLAY_WA_16023588340,
 	INTEL_DISPLAY_WA_16025573575,
 	INTEL_DISPLAY_WA_22010178259,
+	INTEL_DISPLAY_WA_22011320316,
 	INTEL_DISPLAY_WA_22014263786,
 	INTEL_DISPLAY_WA_22021048059,
 };
-- 
2.51.0

[PATCH v5 05/16] drm/i915/display: convert W/As in intel_cursor.c to new framework

[Luca Coelho]

Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cursor.c     | 3 ++-
 drivers/gpu/drm/i915/display/intel_display_wa.c | 1 +
 drivers/gpu/drm/i915/display/intel_display_wa.h | 1 +
 3 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 2c5d917fbd7e..18d1014de361 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -19,6 +19,7 @@
 #include "intel_display.h"
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
+#include "intel_display_wa.h"
 #include "intel_fb.h"
 #include "intel_fb_pin.h"
 #include "intel_frontbuffer.h"
@@ -424,7 +425,7 @@ static u32 i9xx_cursor_ctl(const struct intel_plane_state *plane_state)
 		cntl |= MCURSOR_ROTATE_180;
 
 	/* Wa_22012358565:adl-p */
-	if (DISPLAY_VER(display) == 13)
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_22012358565))
 		cntl |= MCURSOR_ARB_SLOTS(1);
 
 	return cntl;
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index aef6eca51119..207129a16713 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -85,6 +85,7 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 			INTEL_PCH_TYPE(display) < PCH_DG1;
 	case INTEL_DISPLAY_WA_14011503030:
 	case INTEL_DISPLAY_WA_14011503117:
+	case INTEL_DISPLAY_WA_22012358565:
 		return DISPLAY_VER(display) == 13;
 	case INTEL_DISPLAY_WA_14011508470:
 		return (IS_DISPLAY_VERx100(display, 1200, 1300));
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index aa96d111111c..dff205b6492f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -42,6 +42,7 @@ enum intel_display_wa {
 	INTEL_DISPLAY_WA_16025573575,
 	INTEL_DISPLAY_WA_22010178259,
 	INTEL_DISPLAY_WA_22011320316,
+	INTEL_DISPLAY_WA_22012358565,
 	INTEL_DISPLAY_WA_22014263786,
 	INTEL_DISPLAY_WA_22021048059,
 };
-- 
2.51.0

[PATCH v5 06/16] drm/i915/display: convert W/As in intel_ddi.c to new framework

[Luca Coelho]

Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c        | 4 ++--
 drivers/gpu/drm/i915/display/intel_display_wa.c | 3 +++
 drivers/gpu/drm/i915/display/intel_display_wa.h | 1 +
 3 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 94ae583e907f..7f1576bfe4b0 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -52,6 +52,7 @@
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
+#include "intel_display_wa.h"
 #include "intel_dkl_phy.h"
 #include "intel_dkl_phy_regs.h"
 #include "intel_dp.h"
@@ -1401,8 +1402,7 @@ static void tgl_dkl_phy_set_signal_levels(struct intel_encoder *encoder,
 		int level;
 
 		/* Wa_16011342517:adl-p */
-		if (display->platform.alderlake_p &&
-		    IS_DISPLAY_STEP(display, STEP_A0, STEP_D0)) {
+		if (intel_display_wa(display, INTEL_DISPLAY_WA_16011342517)) {
 			if ((intel_encoder_is_hdmi(encoder) &&
 			     crtc_state->port_clock == 594000) ||
 			     (intel_encoder_is_dp(encoder) &&
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index 207129a16713..e7243e4dba4f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -99,6 +99,9 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 		return DISPLAY_VER(display) == 20;
 	case INTEL_DISPLAY_WA_15018326506:
 		return display->platform.battlemage;
+	case INTEL_DISPLAY_WA_16011342517:
+		return display->platform.alderlake_p &&
+			IS_DISPLAY_STEP(display, STEP_A0, STEP_D0);
 	case INTEL_DISPLAY_WA_16023588340:
 		return intel_display_needs_wa_16023588340(display);
 	case INTEL_DISPLAY_WA_16025573575:
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index dff205b6492f..de0ed7698c61 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -38,6 +38,7 @@ enum intel_display_wa {
 	INTEL_DISPLAY_WA_14025769978,
 	INTEL_DISPLAY_WA_15013987218,
 	INTEL_DISPLAY_WA_15018326506,
+	INTEL_DISPLAY_WA_16011342517,
 	INTEL_DISPLAY_WA_16023588340,
 	INTEL_DISPLAY_WA_16025573575,
 	INTEL_DISPLAY_WA_22010178259,
-- 
2.51.0

[PATCH v5 07/16] drm/i915/display: convert W/As in intel_display.c to new framework

[Luca Coelho]

Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c    | 4 ++--
 drivers/gpu/drm/i915/display/intel_display_wa.c | 2 ++
 drivers/gpu/drm/i915/display/intel_display_wa.h | 1 +
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 15edf609fff4..b18ce0c36a64 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -453,7 +453,7 @@ void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state)
 	}
 
 	/* Wa_22012358565:adl-p */
-	if (DISPLAY_VER(display) == 13)
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_22012358565))
 		intel_de_rmw(display, PIPE_ARB_CTL(display, pipe),
 			     0, PIPE_ARB_USE_PROG_SLOTS);
 
@@ -707,7 +707,7 @@ static void icl_set_pipe_chicken(const struct intel_crtc_state *crtc_state)
 		tmp |= UNDERRUN_RECOVERY_DISABLE_ADLP;
 
 	/* Wa_14010547955:dg2 */
-	if (display->platform.dg2)
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14010547955))
 		tmp |= DG2_RENDER_CCSTAG_4_3_EN;
 
 	intel_de_write(display, PIPE_CHICKEN(pipe), tmp);
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index e7243e4dba4f..f51e5a86164b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -77,6 +77,8 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 	case INTEL_DISPLAY_WA_13012396614:
 		return DISPLAY_VERx100(display) == 3000 ||
 			DISPLAY_VERx100(display) == 3500;
+	case INTEL_DISPLAY_WA_14010547955:
+		return display->platform.dg2;
 	case INTEL_DISPLAY_WA_14010685332:
 		return INTEL_PCH_TYPE(display) >= PCH_CNP &&
 			INTEL_PCH_TYPE(display) < PCH_DG1;
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index de0ed7698c61..a9346e763112 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -29,6 +29,7 @@ bool intel_display_needs_wa_16023588340(struct intel_display *display);
 enum intel_display_wa {
 	INTEL_DISPLAY_WA_1409767108,
 	INTEL_DISPLAY_WA_13012396614,
+	INTEL_DISPLAY_WA_14010547955,
 	INTEL_DISPLAY_WA_14010685332,
 	INTEL_DISPLAY_WA_14011294188,
 	INTEL_DISPLAY_WA_14011503030,
-- 
2.51.0

[PATCH v5 08/16] drm/i915/display: convert W/As in intel_display_device.c to new framework

[Luca Coelho]

Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.c | 3 ++-
 drivers/gpu/drm/i915/display/intel_display_wa.c     | 3 +++
 drivers/gpu/drm/i915/display/intel_display_wa.h     | 1 +
 3 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 0241603470a2..a8ef1e6193b8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -19,6 +19,7 @@
 #include "intel_display_reg_defs.h"
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
+#include "intel_display_wa.h"
 #include "intel_fbc.h"
 #include "intel_step.h"
 
@@ -1773,7 +1774,7 @@ static void __intel_display_device_info_runtime_init(struct intel_display *displ
 		display_runtime->port_mask |= BIT(PORT_F);
 
 	/* Wa_14011765242: adl-s A0,A1 */
-	if (display->platform.alderlake_s && IS_DISPLAY_STEP(display, STEP_A0, STEP_A2))
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14011765242))
 		for_each_pipe(display, pipe)
 			display_runtime->num_scalers[pipe] = 0;
 	else if (DISPLAY_VER(display) >= 11) {
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index f51e5a86164b..2934331d905f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -91,6 +91,9 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 		return DISPLAY_VER(display) == 13;
 	case INTEL_DISPLAY_WA_14011508470:
 		return (IS_DISPLAY_VERx100(display, 1200, 1300));
+	case INTEL_DISPLAY_WA_14011765242:
+		return display->platform.alderlake_s &&
+			IS_DISPLAY_STEP(display, STEP_A0, STEP_A2);
 	case INTEL_DISPLAY_WA_14020863754:
 		return DISPLAY_VERx100(display) == 3000 ||
 			DISPLAY_VERx100(display) == 2000 ||
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index a9346e763112..b781a3c6d803 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -35,6 +35,7 @@ enum intel_display_wa {
 	INTEL_DISPLAY_WA_14011503030,
 	INTEL_DISPLAY_WA_14011503117,
 	INTEL_DISPLAY_WA_14011508470,
+	INTEL_DISPLAY_WA_14011765242,
 	INTEL_DISPLAY_WA_14020863754,
 	INTEL_DISPLAY_WA_14025769978,
 	INTEL_DISPLAY_WA_15013987218,
-- 
2.51.0

[PATCH v5 09/16] drm/i915/display: convert W/As in intel_dp_mst.c to new framework

[Luca Coelho]

Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_wa.c | 2 ++
 drivers/gpu/drm/i915/display/intel_display_wa.h | 1 +
 drivers/gpu/drm/i915/display/intel_dp_mst.c     | 3 ++-
 3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index 2934331d905f..be37a23edce4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -94,6 +94,8 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 	case INTEL_DISPLAY_WA_14011765242:
 		return display->platform.alderlake_s &&
 			IS_DISPLAY_STEP(display, STEP_A0, STEP_A2);
+	case INTEL_DISPLAY_WA_14014143976:
+		return IS_DISPLAY_STEP(display, STEP_E0, STEP_FOREVER);
 	case INTEL_DISPLAY_WA_14020863754:
 		return DISPLAY_VERx100(display) == 3000 ||
 			DISPLAY_VERx100(display) == 2000 ||
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index b781a3c6d803..dc1a187fd0a1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -36,6 +36,7 @@ enum intel_display_wa {
 	INTEL_DISPLAY_WA_14011503117,
 	INTEL_DISPLAY_WA_14011508470,
 	INTEL_DISPLAY_WA_14011765242,
+	INTEL_DISPLAY_WA_14014143976,
 	INTEL_DISPLAY_WA_14020863754,
 	INTEL_DISPLAY_WA_14025769978,
 	INTEL_DISPLAY_WA_15013987218,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 0bb39f9bd74e..887b6de14e46 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -43,6 +43,7 @@
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
+#include "intel_display_wa.h"
 #include "intel_dp.h"
 #include "intel_dp_hdcp.h"
 #include "intel_dp_link_training.h"
@@ -1276,7 +1277,7 @@ static void enable_bs_jitter_was(const struct intel_crtc_state *crtc_state)
 		set |= DP_MST_FEC_BS_JITTER_WA(crtc_state->cpu_transcoder);
 
 	/* Wa_14014143976:adlp */
-	if (IS_DISPLAY_STEP(display, STEP_E0, STEP_FOREVER)) {
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14014143976)) {
 		if (intel_dp_is_uhbr(crtc_state))
 			set |= DP_MST_SHORT_HBLANK_WA(crtc_state->cpu_transcoder);
 		else if (crtc_state->fec_enable)
-- 
2.51.0

[PATCH v5 10/16] drm/i915/display: convert W/As in intel_fbc.c to new framework

[Luca Coelho]

Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_wa.c | 4 ++++
 drivers/gpu/drm/i915/display/intel_display_wa.h | 2 ++
 drivers/gpu/drm/i915/display/intel_fbc.c        | 4 ++--
 3 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index be37a23edce4..0f449ea8e1bb 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -70,6 +70,8 @@ static bool intel_display_needs_wa_16025573575(struct intel_display *display)
 bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa, const char *name)
 {
 	switch (wa) {
+	case INTEL_DISPLAY_WA_1409120013:
+		return IS_DISPLAY_VER(display, 11, 12);
 	case INTEL_DISPLAY_WA_1409767108:
 		return (display->platform.alderlake_s ||
 			(display->platform.rocketlake &&
@@ -109,6 +111,8 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 	case INTEL_DISPLAY_WA_16011342517:
 		return display->platform.alderlake_p &&
 			IS_DISPLAY_STEP(display, STEP_A0, STEP_D0);
+	case INTEL_DISPLAY_WA_16011863758:
+		return DISPLAY_VER(display) >= 11;
 	case INTEL_DISPLAY_WA_16023588340:
 		return intel_display_needs_wa_16023588340(display);
 	case INTEL_DISPLAY_WA_16025573575:
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index dc1a187fd0a1..373cbbb93873 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -27,6 +27,7 @@ bool intel_display_needs_wa_16023588340(struct intel_display *display);
  * number.
  */
 enum intel_display_wa {
+	INTEL_DISPLAY_WA_1409120013,
 	INTEL_DISPLAY_WA_1409767108,
 	INTEL_DISPLAY_WA_13012396614,
 	INTEL_DISPLAY_WA_14010547955,
@@ -42,6 +43,7 @@ enum intel_display_wa {
 	INTEL_DISPLAY_WA_15013987218,
 	INTEL_DISPLAY_WA_15018326506,
 	INTEL_DISPLAY_WA_16011342517,
+	INTEL_DISPLAY_WA_16011863758,
 	INTEL_DISPLAY_WA_16023588340,
 	INTEL_DISPLAY_WA_16025573575,
 	INTEL_DISPLAY_WA_22010178259,
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 5d0d7c1027f5..ea0ce00c8474 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -183,7 +183,7 @@ static unsigned int skl_fbc_min_cfb_stride(struct intel_display *display,
 	 * Wa_16011863758: icl+
 	 * Avoid some hardware segment address miscalculation.
 	 */
-	if (DISPLAY_VER(display) >= 11)
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_16011863758))
 		stride += 64;
 
 	/*
@@ -949,7 +949,7 @@ static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
 	}
 
 	/* Wa_1409120013:icl,jsl,tgl,dg1 */
-	if (IS_DISPLAY_VER(display, 11, 12))
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_1409120013))
 		intel_de_rmw(display, ILK_DPFC_CHICKEN(fbc->id),
 			     0, DPFC_CHICKEN_COMP_DUMMY_PIXEL);
 	/*
-- 
2.51.0

[PATCH v5 11/16] drm/i915/display: convert W/As in intel_flipq.c to new framework

[Luca Coelho]

Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_wa.c |  4 ++++
 drivers/gpu/drm/i915/display/intel_display_wa.h |  1 +
 drivers/gpu/drm/i915/display/intel_flipq.c      | 13 +++----------
 3 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index 0f449ea8e1bb..81be1e875c07 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -117,6 +117,10 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 		return intel_display_needs_wa_16023588340(display);
 	case INTEL_DISPLAY_WA_16025573575:
 		return intel_display_needs_wa_16025573575(display);
+	case INTEL_DISPLAY_WA_18034343758:
+		return DISPLAY_VER(display) == 20 ||
+			(display->platform.pantherlake &&
+			 IS_DISPLAY_STEP(display, STEP_A0, STEP_B0));
 	case INTEL_DISPLAY_WA_22010178259:
 		return DISPLAY_VER(display) == 12;
 	case INTEL_DISPLAY_WA_22011320316:
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index 373cbbb93873..68d67b9b0263 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -46,6 +46,7 @@ enum intel_display_wa {
 	INTEL_DISPLAY_WA_16011863758,
 	INTEL_DISPLAY_WA_16023588340,
 	INTEL_DISPLAY_WA_16025573575,
+	INTEL_DISPLAY_WA_18034343758,
 	INTEL_DISPLAY_WA_22010178259,
 	INTEL_DISPLAY_WA_22011320316,
 	INTEL_DISPLAY_WA_22012358565,
diff --git a/drivers/gpu/drm/i915/display/intel_flipq.c b/drivers/gpu/drm/i915/display/intel_flipq.c
index 1e9550cb66a3..253dc2e96d2d 100644
--- a/drivers/gpu/drm/i915/display/intel_flipq.c
+++ b/drivers/gpu/drm/i915/display/intel_flipq.c
@@ -12,6 +12,7 @@
 #include "intel_display_core.h"
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
+#include "intel_display_wa.h"
 #include "intel_dmc.h"
 #include "intel_dmc_regs.h"
 #include "intel_dsb.h"
@@ -447,19 +448,11 @@ void intel_flipq_add(struct intel_crtc *crtc,
 	intel_flipq_sw_dmc_wake(crtc);
 }
 
-/* Wa_18034343758 */
-static bool need_dmc_halt_wa(struct intel_display *display)
-{
-	return DISPLAY_VER(display) == 20 ||
-		(display->platform.pantherlake &&
-		 IS_DISPLAY_STEP(display, STEP_A0, STEP_B0));
-}
-
 void intel_flipq_wait_dmc_halt(struct intel_dsb *dsb, struct intel_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc);
 
-	if (need_dmc_halt_wa(display))
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_18034343758))
 		intel_dsb_wait_usec(dsb, 2);
 }
 
@@ -467,6 +460,6 @@ void intel_flipq_unhalt_dmc(struct intel_dsb *dsb, struct intel_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc);
 
-	if (need_dmc_halt_wa(display))
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_18034343758))
 		intel_dsb_reg_write(dsb, PIPEDMC_CTL(crtc->pipe), 0);
 }
-- 
2.51.0

[PATCH v5 12/16] drm/i915/display: convert W/As in intel_modeset_setup.c to new framework

[Luca Coelho]

Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_wa.c    | 2 ++
 drivers/gpu/drm/i915/display/intel_display_wa.h    | 1 +
 drivers/gpu/drm/i915/display/intel_modeset_setup.c | 3 ++-
 3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index 81be1e875c07..b6eb22b6c6b4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -79,6 +79,8 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 	case INTEL_DISPLAY_WA_13012396614:
 		return DISPLAY_VERx100(display) == 3000 ||
 			DISPLAY_VERx100(display) == 3500;
+	case INTEL_DISPLAY_WA_14010480278:
+		return (IS_DISPLAY_VER(display, 10, 12));
 	case INTEL_DISPLAY_WA_14010547955:
 		return display->platform.dg2;
 	case INTEL_DISPLAY_WA_14010685332:
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index 68d67b9b0263..6749e48aea7f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -30,6 +30,7 @@ enum intel_display_wa {
 	INTEL_DISPLAY_WA_1409120013,
 	INTEL_DISPLAY_WA_1409767108,
 	INTEL_DISPLAY_WA_13012396614,
+	INTEL_DISPLAY_WA_14010480278,
 	INTEL_DISPLAY_WA_14010547955,
 	INTEL_DISPLAY_WA_14010685332,
 	INTEL_DISPLAY_WA_14011294188,
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index 9b0becee221c..4086f16a12bf 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -25,6 +25,7 @@
 #include "intel_display_power.h"
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
+#include "intel_display_wa.h"
 #include "intel_dmc.h"
 #include "intel_fifo_underrun.h"
 #include "intel_modeset_setup.h"
@@ -913,7 +914,7 @@ static void intel_early_display_was(struct intel_display *display)
 	 * Display WA #1185 WaDisableDARBFClkGating:glk,icl,ehl,tgl
 	 * Also known as Wa_14010480278.
 	 */
-	if (IS_DISPLAY_VER(display, 10, 12))
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14010480278))
 		intel_de_rmw(display, GEN9_CLKGATE_DIS_0, 0, DARBF_GATING_DIS);
 
 	/*
-- 
2.51.0

[PATCH v5 13/16] drm/i915/display: convert W/As in intel_pmdemand.c to new framework

[Luca Coelho]

Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_wa.c | 2 ++
 drivers/gpu/drm/i915/display/intel_display_wa.h | 1 +
 drivers/gpu/drm/i915/display/intel_pmdemand.c   | 8 +++++---
 3 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index b6eb22b6c6b4..da09873dc1cb 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -100,6 +100,8 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 			IS_DISPLAY_STEP(display, STEP_A0, STEP_A2);
 	case INTEL_DISPLAY_WA_14014143976:
 		return IS_DISPLAY_STEP(display, STEP_E0, STEP_FOREVER);
+	case INTEL_DISPLAY_WA_14016740474:
+		return IS_DISPLAY_VERx100_STEP(display, 1400, STEP_A0, STEP_C0);
 	case INTEL_DISPLAY_WA_14020863754:
 		return DISPLAY_VERx100(display) == 3000 ||
 			DISPLAY_VERx100(display) == 2000 ||
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index 6749e48aea7f..4471d6511152 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -39,6 +39,7 @@ enum intel_display_wa {
 	INTEL_DISPLAY_WA_14011508470,
 	INTEL_DISPLAY_WA_14011765242,
 	INTEL_DISPLAY_WA_14014143976,
+	INTEL_DISPLAY_WA_14016740474,
 	INTEL_DISPLAY_WA_14020863754,
 	INTEL_DISPLAY_WA_14025769978,
 	INTEL_DISPLAY_WA_15013987218,
diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.c b/drivers/gpu/drm/i915/display/intel_pmdemand.c
index f3db55710010..244806a26da3 100644
--- a/drivers/gpu/drm/i915/display/intel_pmdemand.c
+++ b/drivers/gpu/drm/i915/display/intel_pmdemand.c
@@ -15,6 +15,7 @@
 #include "intel_display_regs.h"
 #include "intel_display_trace.h"
 #include "intel_display_utils.h"
+#include "intel_display_wa.h"
 #include "intel_pmdemand.h"
 #include "intel_step.h"
 #include "skl_watermark.h"
@@ -129,9 +130,10 @@ int intel_pmdemand_init(struct intel_display *display)
 				     &pmdemand_state->base,
 				     &intel_pmdemand_funcs);
 
-	if (IS_DISPLAY_VERx100_STEP(display, 1400, STEP_A0, STEP_C0))
-		/* Wa_14016740474 */
-		intel_de_rmw(display, XELPD_CHICKEN_DCPR_3, 0, DMD_RSP_TIMEOUT_DISABLE);
+	/* Wa_14016740474 */
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14016740474))
+		intel_de_rmw(display, XELPD_CHICKEN_DCPR_3, 0,
+			     DMD_RSP_TIMEOUT_DISABLE);
 
 	return 0;
 }
-- 
2.51.0

[PATCH v5 14/16] drm/i915/display: convert W/As in intel_psr.c to new framework

[Luca Coelho]

Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 .../gpu/drm/i915/display/intel_display_wa.c   | 15 ++++++++++++--
 .../gpu/drm/i915/display/intel_display_wa.h   |  4 ++++
 drivers/gpu/drm/i915/display/intel_psr.c      | 20 ++++++++-----------
 3 files changed, 25 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index da09873dc1cb..73c7b87d5ecd 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -112,6 +112,13 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 		return DISPLAY_VER(display) == 20;
 	case INTEL_DISPLAY_WA_15018326506:
 		return display->platform.battlemage;
+	case INTEL_DISPLAY_WA_16011303918:
+	case INTEL_DISPLAY_WA_22011320316:
+		return display->platform.alderlake_p &&
+			IS_DISPLAY_STEP(display, STEP_A0, STEP_B0);
+	case INTEL_DISPLAY_WA_16011181250:
+		return display->platform.rocketlake || display->platform.alderlake_s ||
+			display->platform.dg2;
 	case INTEL_DISPLAY_WA_16011342517:
 		return display->platform.alderlake_p &&
 			IS_DISPLAY_STEP(display, STEP_A0, STEP_D0);
@@ -121,15 +128,19 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 		return intel_display_needs_wa_16023588340(display);
 	case INTEL_DISPLAY_WA_16025573575:
 		return intel_display_needs_wa_16025573575(display);
+	case INTEL_DISPLAY_WA_16025596647:
+		return DISPLAY_VER(display) == 20 &&
+			IS_DISPLAY_VERx100_STEP(display, 3000,
+						STEP_A0, STEP_B0);
 	case INTEL_DISPLAY_WA_18034343758:
 		return DISPLAY_VER(display) == 20 ||
 			(display->platform.pantherlake &&
 			 IS_DISPLAY_STEP(display, STEP_A0, STEP_B0));
 	case INTEL_DISPLAY_WA_22010178259:
 		return DISPLAY_VER(display) == 12;
-	case INTEL_DISPLAY_WA_22011320316:
+	case INTEL_DISPLAY_WA_22012278275:
 		return display->platform.alderlake_p &&
-			IS_DISPLAY_STEP(display, STEP_A0, STEP_B0);
+			IS_DISPLAY_STEP(display, STEP_A0, STEP_E0);
 	case INTEL_DISPLAY_WA_22014263786:
 		return IS_DISPLAY_VERx100(display, 1100, 1400);
 	case INTEL_DISPLAY_WA_22021048059:
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index 4471d6511152..0e9959760b9f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -44,13 +44,17 @@ enum intel_display_wa {
 	INTEL_DISPLAY_WA_14025769978,
 	INTEL_DISPLAY_WA_15013987218,
 	INTEL_DISPLAY_WA_15018326506,
+	INTEL_DISPLAY_WA_16011181250,
+	INTEL_DISPLAY_WA_16011303918,
 	INTEL_DISPLAY_WA_16011342517,
 	INTEL_DISPLAY_WA_16011863758,
 	INTEL_DISPLAY_WA_16023588340,
 	INTEL_DISPLAY_WA_16025573575,
+	INTEL_DISPLAY_WA_16025596647,
 	INTEL_DISPLAY_WA_18034343758,
 	INTEL_DISPLAY_WA_22010178259,
 	INTEL_DISPLAY_WA_22011320316,
+	INTEL_DISPLAY_WA_22012278275,
 	INTEL_DISPLAY_WA_22012358565,
 	INTEL_DISPLAY_WA_22014263786,
 	INTEL_DISPLAY_WA_22021048059,
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 9296ca3a4ff4..17cfb585f74a 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -40,6 +40,7 @@
 #include "intel_display_rpm.h"
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
+#include "intel_display_wa.h"
 #include "intel_dmc.h"
 #include "intel_dp.h"
 #include "intel_dp_aux.h"
@@ -1082,7 +1083,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
 	}
 
 	/* Wa_22012278275:adl-p */
-	if (display->platform.alderlake_p && IS_DISPLAY_STEP(display, STEP_A0, STEP_E0)) {
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_22012278275)) {
 		static const u8 map[] = {
 			2, /* 5 lines */
 			1, /* 6 lines */
@@ -1263,7 +1264,7 @@ tgl_dc3co_exitline_compute_config(struct intel_dp *intel_dp,
 		return;
 
 	/* Wa_16011303918:adl-p */
-	if (display->platform.alderlake_p && IS_DISPLAY_STEP(display, STEP_A0, STEP_B0))
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_16011303918))
 		return;
 
 	/*
@@ -1545,8 +1546,7 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 	}
 
 	/* Wa_16011181250 */
-	if (display->platform.rocketlake || display->platform.alderlake_s ||
-	    display->platform.dg2) {
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_16011181250)) {
 		drm_dbg_kms(display->drm,
 			    "PSR2 is defeatured for this platform\n");
 		return false;
@@ -1828,8 +1828,7 @@ void intel_psr_set_non_psr_pipes(struct intel_dp *intel_dp,
 	u8 active_pipes = 0;
 
 	/* Wa_16025596647 */
-	if (DISPLAY_VER(display) != 20 &&
-	    !IS_DISPLAY_VERx100_STEP(display, 3000, STEP_A0, STEP_B0))
+	if (!intel_display_wa(display, INTEL_DISPLAY_WA_16025596647))
 		return;
 
 	/* Not needed by Panel Replay  */
@@ -3978,8 +3977,7 @@ static void psr_dc5_dc6_wa_work(struct work_struct *work)
  */
 void intel_psr_notify_dc5_dc6(struct intel_display *display)
 {
-	if (DISPLAY_VER(display) != 20 &&
-	    !IS_DISPLAY_VERx100_STEP(display, 3000, STEP_A0, STEP_B0))
+	if (!intel_display_wa(display, INTEL_DISPLAY_WA_16025596647))
 		return;
 
 	schedule_work(&display->psr_dc5_dc6_wa_work);
@@ -3994,8 +3992,7 @@ void intel_psr_notify_dc5_dc6(struct intel_display *display)
  */
 void intel_psr_dc5_dc6_wa_init(struct intel_display *display)
 {
-	if (DISPLAY_VER(display) != 20 &&
-	    !IS_DISPLAY_VERx100_STEP(display, 3000, STEP_A0, STEP_B0))
+	if (!intel_display_wa(display, INTEL_DISPLAY_WA_16025596647))
 		return;
 
 	INIT_WORK(&display->psr_dc5_dc6_wa_work, psr_dc5_dc6_wa_work);
@@ -4016,8 +4013,7 @@ void intel_psr_notify_pipe_change(struct intel_atomic_state *state,
 	struct intel_display *display = to_intel_display(state);
 	struct intel_encoder *encoder;
 
-	if (DISPLAY_VER(display) != 20 &&
-	    !IS_DISPLAY_VERx100_STEP(display, 3000, STEP_A0, STEP_B0))
+	if (!intel_display_wa(display, INTEL_DISPLAY_WA_16025596647))
 		return;
 
 	for_each_intel_encoder_with_psr(display->drm, encoder) {
-- 
2.51.0

[PATCH v5 15/16] drm/i915/display: convert W/As in skl_universal_plane.c to new framework

[Luca Coelho]

Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_wa.c    | 4 ++++
 drivers/gpu/drm/i915/display/intel_display_wa.h    | 1 +
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 6 +++---
 3 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index 73c7b87d5ecd..f05d96b4b35f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -79,6 +79,10 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 	case INTEL_DISPLAY_WA_13012396614:
 		return DISPLAY_VERx100(display) == 3000 ||
 			DISPLAY_VERx100(display) == 3500;
+	case INTEL_DISPLAY_WA_14010477008:
+		return display->platform.dg1 || display->platform.rocketlake ||
+			(display->platform.tigerlake &&
+			 IS_DISPLAY_STEP(display, STEP_A0, STEP_D0));
 	case INTEL_DISPLAY_WA_14010480278:
 		return (IS_DISPLAY_VER(display, 10, 12));
 	case INTEL_DISPLAY_WA_14010547955:
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index 0e9959760b9f..1f664366847d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -30,6 +30,7 @@ enum intel_display_wa {
 	INTEL_DISPLAY_WA_1409120013,
 	INTEL_DISPLAY_WA_1409767108,
 	INTEL_DISPLAY_WA_13012396614,
+	INTEL_DISPLAY_WA_14010477008,
 	INTEL_DISPLAY_WA_14010480278,
 	INTEL_DISPLAY_WA_14010547955,
 	INTEL_DISPLAY_WA_14010685332,
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 677f1339b7f8..11ba42c67e3e 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -17,6 +17,7 @@
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
+#include "intel_display_wa.h"
 #include "intel_fb.h"
 #include "intel_fbc.h"
 #include "intel_frontbuffer.h"
@@ -1216,7 +1217,7 @@ static u32 skl_plane_ctl(const struct intel_plane_state *plane_state)
 		plane_ctl |= PLANE_CTL_KEY_ENABLE_SOURCE;
 
 	/* Wa_22012358565:adl-p */
-	if (DISPLAY_VER(display) == 13)
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_22012358565))
 		plane_ctl |= adlp_plane_ctl_arb_slots(plane_state);
 
 	return plane_ctl;
@@ -2792,8 +2793,7 @@ static bool tgl_plane_has_mc_ccs(struct intel_display *display,
 				 enum plane_id plane_id)
 {
 	/* Wa_14010477008 */
-	if (display->platform.dg1 || display->platform.rocketlake ||
-	    (display->platform.tigerlake && IS_DISPLAY_STEP(display, STEP_A0, STEP_D0)))
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14010477008))
 		return false;
 
 	return plane_id < PLANE_6;
-- 
2.51.0

[PATCH v5 16/16] drm/i915/display: convert W/As in skl_watermark.c to new framework

[Luca Coelho]

Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_wa.c | 2 ++
 drivers/gpu/drm/i915/display/intel_display_wa.h | 1 +
 drivers/gpu/drm/i915/display/skl_watermark.c    | 3 ++-
 3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index f05d96b4b35f..081a4092cd13 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -142,6 +142,8 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 			 IS_DISPLAY_STEP(display, STEP_A0, STEP_B0));
 	case INTEL_DISPLAY_WA_22010178259:
 		return DISPLAY_VER(display) == 12;
+	case INTEL_DISPLAY_WA_22010947358:
+		return display->platform.alderlake_p;
 	case INTEL_DISPLAY_WA_22012278275:
 		return display->platform.alderlake_p &&
 			IS_DISPLAY_STEP(display, STEP_A0, STEP_E0);
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index 1f664366847d..15fec843f15e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -54,6 +54,7 @@ enum intel_display_wa {
 	INTEL_DISPLAY_WA_16025596647,
 	INTEL_DISPLAY_WA_18034343758,
 	INTEL_DISPLAY_WA_22010178259,
+	INTEL_DISPLAY_WA_22010947358,
 	INTEL_DISPLAY_WA_22011320316,
 	INTEL_DISPLAY_WA_22012278275,
 	INTEL_DISPLAY_WA_22012358565,
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index a520d492317b..b1f9546b8cda 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -22,6 +22,7 @@
 #include "intel_display_rpm.h"
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
+#include "intel_display_wa.h"
 #include "intel_dram.h"
 #include "intel_fb.h"
 #include "intel_fixed.h"
@@ -3412,7 +3413,7 @@ static u32 pipe_mbus_dbox_ctl(const struct intel_crtc *crtc,
 	if (DISPLAY_VER(display) >= 14)
 		val |= dbuf_state->joined_mbus ?
 			MBUS_DBOX_A_CREDIT(12) : MBUS_DBOX_A_CREDIT(8);
-	else if (display->platform.alderlake_p)
+	else if (intel_display_wa(display, INTEL_DISPLAY_WA_22010947358))
 		/* Wa_22010947358:adl-p */
 		val |= dbuf_state->joined_mbus ?
 			MBUS_DBOX_A_CREDIT(6) : MBUS_DBOX_A_CREDIT(4);
-- 
2.51.0

✓ CI.KUnit: success for drm/i915/display: convert a bunch of W/A checks to the new framework (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915/display: convert a bunch of W/A checks to the new framework (rev4)
URL   : https://patchwork.freedesktop.org/series/161555/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[10:35:36] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:35:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:36:11] Starting KUnit Kernel (1/1)...
[10:36:11] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:36:11] ================== guc_buf (11 subtests) ===================
[10:36:11] [PASSED] test_smallest
[10:36:11] [PASSED] test_largest
[10:36:11] [PASSED] test_granular
[10:36:11] [PASSED] test_unique
[10:36:11] [PASSED] test_overlap
[10:36:11] [PASSED] test_reusable
[10:36:11] [PASSED] test_too_big
[10:36:11] [PASSED] test_flush
[10:36:11] [PASSED] test_lookup
[10:36:11] [PASSED] test_data
[10:36:11] [PASSED] test_class
[10:36:11] ===================== [PASSED] guc_buf =====================
[10:36:11] =================== guc_dbm (7 subtests) ===================
[10:36:11] [PASSED] test_empty
[10:36:11] [PASSED] test_default
[10:36:11] ======================== test_size  ========================
[10:36:11] [PASSED] 4
[10:36:11] [PASSED] 8
[10:36:11] [PASSED] 32
[10:36:11] [PASSED] 256
[10:36:11] ==================== [PASSED] test_size ====================
[10:36:11] ======================= test_reuse  ========================
[10:36:11] [PASSED] 4
[10:36:11] [PASSED] 8
[10:36:11] [PASSED] 32
[10:36:11] [PASSED] 256
[10:36:11] =================== [PASSED] test_reuse ====================
[10:36:11] =================== test_range_overlap  ====================
[10:36:11] [PASSED] 4
[10:36:11] [PASSED] 8
[10:36:11] [PASSED] 32
[10:36:11] [PASSED] 256
[10:36:11] =============== [PASSED] test_range_overlap ================
[10:36:11] =================== test_range_compact  ====================
[10:36:11] [PASSED] 4
[10:36:11] [PASSED] 8
[10:36:11] [PASSED] 32
[10:36:11] [PASSED] 256
[10:36:11] =============== [PASSED] test_range_compact ================
[10:36:11] ==================== test_range_spare  =====================
[10:36:11] [PASSED] 4
[10:36:11] [PASSED] 8
[10:36:11] [PASSED] 32
[10:36:11] [PASSED] 256
[10:36:11] ================ [PASSED] test_range_spare =================
[10:36:11] ===================== [PASSED] guc_dbm =====================
[10:36:11] =================== guc_idm (6 subtests) ===================
[10:36:11] [PASSED] bad_init
[10:36:11] [PASSED] no_init
[10:36:11] [PASSED] init_fini
[10:36:11] [PASSED] check_used
[10:36:11] [PASSED] check_quota
[10:36:11] [PASSED] check_all
[10:36:11] ===================== [PASSED] guc_idm =====================
[10:36:11] ================== no_relay (3 subtests) ===================
[10:36:11] [PASSED] xe_drops_guc2pf_if_not_ready
[10:36:11] [PASSED] xe_drops_guc2vf_if_not_ready
[10:36:11] [PASSED] xe_rejects_send_if_not_ready
[10:36:11] ==================== [PASSED] no_relay =====================
[10:36:11] ================== pf_relay (14 subtests) ==================
[10:36:11] [PASSED] pf_rejects_guc2pf_too_short
[10:36:11] [PASSED] pf_rejects_guc2pf_too_long
[10:36:11] [PASSED] pf_rejects_guc2pf_no_payload
[10:36:11] [PASSED] pf_fails_no_payload
[10:36:11] [PASSED] pf_fails_bad_origin
[10:36:11] [PASSED] pf_fails_bad_type
[10:36:11] [PASSED] pf_txn_reports_error
[10:36:11] [PASSED] pf_txn_sends_pf2guc
[10:36:11] [PASSED] pf_sends_pf2guc
[10:36:11] [SKIPPED] pf_loopback_nop
[10:36:11] [SKIPPED] pf_loopback_echo
[10:36:11] [SKIPPED] pf_loopback_fail
[10:36:11] [SKIPPED] pf_loopback_busy
[10:36:11] [SKIPPED] pf_loopback_retry
[10:36:11] ==================== [PASSED] pf_relay =====================
[10:36:11] ================== vf_relay (3 subtests) ===================
[10:36:11] [PASSED] vf_rejects_guc2vf_too_short
[10:36:11] [PASSED] vf_rejects_guc2vf_too_long
[10:36:11] [PASSED] vf_rejects_guc2vf_no_payload
[10:36:11] ==================== [PASSED] vf_relay =====================
[10:36:11] ================ pf_gt_config (9 subtests) =================
[10:36:11] [PASSED] fair_contexts_1vf
[10:36:11] [PASSED] fair_doorbells_1vf
[10:36:11] [PASSED] fair_ggtt_1vf
[10:36:11] ====================== fair_vram_1vf  ======================
[10:36:11] [PASSED] 3.50 GiB
[10:36:11] [PASSED] 11.5 GiB
[10:36:11] [PASSED] 15.5 GiB
[10:36:11] [PASSED] 31.5 GiB
[10:36:11] [PASSED] 63.5 GiB
[10:36:11] [PASSED] 1.91 GiB
[10:36:11] ================== [PASSED] fair_vram_1vf ==================
[10:36:11] ================ fair_vram_1vf_admin_only  =================
[10:36:11] [PASSED] 3.50 GiB
[10:36:11] [PASSED] 11.5 GiB
[10:36:11] [PASSED] 15.5 GiB
[10:36:11] [PASSED] 31.5 GiB
[10:36:11] [PASSED] 63.5 GiB
[10:36:11] [PASSED] 1.91 GiB
[10:36:11] ============ [PASSED] fair_vram_1vf_admin_only =============
[10:36:11] ====================== fair_contexts  ======================
[10:36:11] [PASSED] 1 VF
[10:36:11] [PASSED] 2 VFs
[10:36:11] [PASSED] 3 VFs
[10:36:11] [PASSED] 4 VFs
[10:36:11] [PASSED] 5 VFs
[10:36:11] [PASSED] 6 VFs
[10:36:11] [PASSED] 7 VFs
[10:36:11] [PASSED] 8 VFs
[10:36:11] [PASSED] 9 VFs
[10:36:11] [PASSED] 10 VFs
[10:36:11] [PASSED] 11 VFs
[10:36:11] [PASSED] 12 VFs
[10:36:11] [PASSED] 13 VFs
[10:36:11] [PASSED] 14 VFs
[10:36:11] [PASSED] 15 VFs
[10:36:11] [PASSED] 16 VFs
[10:36:11] [PASSED] 17 VFs
[10:36:11] [PASSED] 18 VFs
[10:36:11] [PASSED] 19 VFs
[10:36:11] [PASSED] 20 VFs
[10:36:11] [PASSED] 21 VFs
[10:36:11] [PASSED] 22 VFs
[10:36:11] [PASSED] 23 VFs
[10:36:11] [PASSED] 24 VFs
[10:36:11] [PASSED] 25 VFs
[10:36:11] [PASSED] 26 VFs
[10:36:11] [PASSED] 27 VFs
[10:36:11] [PASSED] 28 VFs
[10:36:11] [PASSED] 29 VFs
[10:36:11] [PASSED] 30 VFs
[10:36:11] [PASSED] 31 VFs
[10:36:11] [PASSED] 32 VFs
[10:36:11] [PASSED] 33 VFs
[10:36:11] [PASSED] 34 VFs
[10:36:11] [PASSED] 35 VFs
[10:36:11] [PASSED] 36 VFs
[10:36:11] [PASSED] 37 VFs
[10:36:11] [PASSED] 38 VFs
[10:36:11] [PASSED] 39 VFs
[10:36:11] [PASSED] 40 VFs
[10:36:11] [PASSED] 41 VFs
[10:36:11] [PASSED] 42 VFs
[10:36:11] [PASSED] 43 VFs
[10:36:11] [PASSED] 44 VFs
[10:36:11] [PASSED] 45 VFs
[10:36:11] [PASSED] 46 VFs
[10:36:11] [PASSED] 47 VFs
[10:36:11] [PASSED] 48 VFs
[10:36:11] [PASSED] 49 VFs
[10:36:11] [PASSED] 50 VFs
[10:36:11] [PASSED] 51 VFs
[10:36:11] [PASSED] 52 VFs
[10:36:11] [PASSED] 53 VFs
[10:36:11] [PASSED] 54 VFs
[10:36:11] [PASSED] 55 VFs
[10:36:11] [PASSED] 56 VFs
[10:36:11] [PASSED] 57 VFs
[10:36:11] [PASSED] 58 VFs
[10:36:11] [PASSED] 59 VFs
[10:36:11] [PASSED] 60 VFs
[10:36:11] [PASSED] 61 VFs
[10:36:11] [PASSED] 62 VFs
[10:36:11] [PASSED] 63 VFs
[10:36:11] ================== [PASSED] fair_contexts ==================
[10:36:11] ===================== fair_doorbells  ======================
[10:36:11] [PASSED] 1 VF
[10:36:11] [PASSED] 2 VFs
[10:36:11] [PASSED] 3 VFs
[10:36:11] [PASSED] 4 VFs
[10:36:11] [PASSED] 5 VFs
[10:36:11] [PASSED] 6 VFs
[10:36:11] [PASSED] 7 VFs
[10:36:11] [PASSED] 8 VFs
[10:36:11] [PASSED] 9 VFs
[10:36:11] [PASSED] 10 VFs
[10:36:11] [PASSED] 11 VFs
[10:36:11] [PASSED] 12 VFs
[10:36:11] [PASSED] 13 VFs
[10:36:11] [PASSED] 14 VFs
[10:36:11] [PASSED] 15 VFs
[10:36:11] [PASSED] 16 VFs
[10:36:11] [PASSED] 17 VFs
[10:36:11] [PASSED] 18 VFs
[10:36:11] [PASSED] 19 VFs
[10:36:11] [PASSED] 20 VFs
[10:36:11] [PASSED] 21 VFs
[10:36:11] [PASSED] 22 VFs
[10:36:11] [PASSED] 23 VFs
[10:36:11] [PASSED] 24 VFs
[10:36:11] [PASSED] 25 VFs
[10:36:11] [PASSED] 26 VFs
[10:36:11] [PASSED] 27 VFs
[10:36:11] [PASSED] 28 VFs
[10:36:11] [PASSED] 29 VFs
[10:36:11] [PASSED] 30 VFs
[10:36:11] [PASSED] 31 VFs
[10:36:11] [PASSED] 32 VFs
[10:36:11] [PASSED] 33 VFs
[10:36:11] [PASSED] 34 VFs
[10:36:11] [PASSED] 35 VFs
[10:36:11] [PASSED] 36 VFs
[10:36:11] [PASSED] 37 VFs
[10:36:11] [PASSED] 38 VFs
[10:36:11] [PASSED] 39 VFs
[10:36:11] [PASSED] 40 VFs
[10:36:11] [PASSED] 41 VFs
[10:36:11] [PASSED] 42 VFs
[10:36:11] [PASSED] 43 VFs
[10:36:11] [PASSED] 44 VFs
[10:36:11] [PASSED] 45 VFs
[10:36:11] [PASSED] 46 VFs
[10:36:11] [PASSED] 47 VFs
[10:36:11] [PASSED] 48 VFs
[10:36:11] [PASSED] 49 VFs
[10:36:11] [PASSED] 50 VFs
[10:36:11] [PASSED] 51 VFs
[10:36:11] [PASSED] 52 VFs
[10:36:11] [PASSED] 53 VFs
[10:36:11] [PASSED] 54 VFs
[10:36:11] [PASSED] 55 VFs
[10:36:11] [PASSED] 56 VFs
[10:36:11] [PASSED] 57 VFs
[10:36:11] [PASSED] 58 VFs
[10:36:11] [PASSED] 59 VFs
[10:36:11] [PASSED] 60 VFs
[10:36:11] [PASSED] 61 VFs
[10:36:11] [PASSED] 62 VFs
[10:36:11] [PASSED] 63 VFs
[10:36:11] ================= [PASSED] fair_doorbells ==================
[10:36:11] ======================== fair_ggtt  ========================
[10:36:11] [PASSED] 1 VF
[10:36:11] [PASSED] 2 VFs
[10:36:11] [PASSED] 3 VFs
[10:36:11] [PASSED] 4 VFs
[10:36:11] [PASSED] 5 VFs
[10:36:11] [PASSED] 6 VFs
[10:36:11] [PASSED] 7 VFs
[10:36:11] [PASSED] 8 VFs
[10:36:11] [PASSED] 9 VFs
[10:36:11] [PASSED] 10 VFs
[10:36:11] [PASSED] 11 VFs
[10:36:11] [PASSED] 12 VFs
[10:36:11] [PASSED] 13 VFs
[10:36:11] [PASSED] 14 VFs
[10:36:11] [PASSED] 15 VFs
[10:36:11] [PASSED] 16 VFs
[10:36:11] [PASSED] 17 VFs
[10:36:11] [PASSED] 18 VFs
[10:36:11] [PASSED] 19 VFs
[10:36:11] [PASSED] 20 VFs
[10:36:11] [PASSED] 21 VFs
[10:36:11] [PASSED] 22 VFs
[10:36:11] [PASSED] 23 VFs
[10:36:11] [PASSED] 24 VFs
[10:36:11] [PASSED] 25 VFs
[10:36:11] [PASSED] 26 VFs
[10:36:11] [PASSED] 27 VFs
[10:36:11] [PASSED] 28 VFs
[10:36:11] [PASSED] 29 VFs
[10:36:11] [PASSED] 30 VFs
[10:36:11] [PASSED] 31 VFs
[10:36:11] [PASSED] 32 VFs
[10:36:11] [PASSED] 33 VFs
[10:36:11] [PASSED] 34 VFs
[10:36:11] [PASSED] 35 VFs
[10:36:11] [PASSED] 36 VFs
[10:36:11] [PASSED] 37 VFs
[10:36:11] [PASSED] 38 VFs
[10:36:11] [PASSED] 39 VFs
[10:36:12] [PASSED] 40 VFs
[10:36:12] [PASSED] 41 VFs
[10:36:12] [PASSED] 42 VFs
[10:36:12] [PASSED] 43 VFs
[10:36:12] [PASSED] 44 VFs
[10:36:12] [PASSED] 45 VFs
[10:36:12] [PASSED] 46 VFs
[10:36:12] [PASSED] 47 VFs
[10:36:12] [PASSED] 48 VFs
[10:36:12] [PASSED] 49 VFs
[10:36:12] [PASSED] 50 VFs
[10:36:12] [PASSED] 51 VFs
[10:36:12] [PASSED] 52 VFs
[10:36:12] [PASSED] 53 VFs
[10:36:12] [PASSED] 54 VFs
[10:36:12] [PASSED] 55 VFs
[10:36:12] [PASSED] 56 VFs
[10:36:12] [PASSED] 57 VFs
[10:36:12] [PASSED] 58 VFs
[10:36:12] [PASSED] 59 VFs
[10:36:12] [PASSED] 60 VFs
[10:36:12] [PASSED] 61 VFs
[10:36:12] [PASSED] 62 VFs
[10:36:12] [PASSED] 63 VFs
[10:36:12] ==================== [PASSED] fair_ggtt ====================
[10:36:12] ======================== fair_vram  ========================
[10:36:12] [PASSED] 1 VF
[10:36:12] [PASSED] 2 VFs
[10:36:12] [PASSED] 3 VFs
[10:36:12] [PASSED] 4 VFs
[10:36:12] [PASSED] 5 VFs
[10:36:12] [PASSED] 6 VFs
[10:36:12] [PASSED] 7 VFs
[10:36:12] [PASSED] 8 VFs
[10:36:12] [PASSED] 9 VFs
[10:36:12] [PASSED] 10 VFs
[10:36:12] [PASSED] 11 VFs
[10:36:12] [PASSED] 12 VFs
[10:36:12] [PASSED] 13 VFs
[10:36:12] [PASSED] 14 VFs
[10:36:12] [PASSED] 15 VFs
[10:36:12] [PASSED] 16 VFs
[10:36:12] [PASSED] 17 VFs
[10:36:12] [PASSED] 18 VFs
[10:36:12] [PASSED] 19 VFs
[10:36:12] [PASSED] 20 VFs
[10:36:12] [PASSED] 21 VFs
[10:36:12] [PASSED] 22 VFs
[10:36:12] [PASSED] 23 VFs
[10:36:12] [PASSED] 24 VFs
[10:36:12] [PASSED] 25 VFs
[10:36:12] [PASSED] 26 VFs
[10:36:12] [PASSED] 27 VFs
[10:36:12] [PASSED] 28 VFs
[10:36:12] [PASSED] 29 VFs
[10:36:12] [PASSED] 30 VFs
[10:36:12] [PASSED] 31 VFs
[10:36:12] [PASSED] 32 VFs
[10:36:12] [PASSED] 33 VFs
[10:36:12] [PASSED] 34 VFs
[10:36:12] [PASSED] 35 VFs
[10:36:12] [PASSED] 36 VFs
[10:36:12] [PASSED] 37 VFs
[10:36:12] [PASSED] 38 VFs
[10:36:12] [PASSED] 39 VFs
[10:36:12] [PASSED] 40 VFs
[10:36:12] [PASSED] 41 VFs
[10:36:12] [PASSED] 42 VFs
[10:36:12] [PASSED] 43 VFs
[10:36:12] [PASSED] 44 VFs
[10:36:12] [PASSED] 45 VFs
[10:36:12] [PASSED] 46 VFs
[10:36:12] [PASSED] 47 VFs
[10:36:12] [PASSED] 48 VFs
[10:36:12] [PASSED] 49 VFs
[10:36:12] [PASSED] 50 VFs
[10:36:12] [PASSED] 51 VFs
[10:36:12] [PASSED] 52 VFs
[10:36:12] [PASSED] 53 VFs
[10:36:12] [PASSED] 54 VFs
[10:36:12] [PASSED] 55 VFs
[10:36:12] [PASSED] 56 VFs
[10:36:12] [PASSED] 57 VFs
[10:36:12] [PASSED] 58 VFs
[10:36:12] [PASSED] 59 VFs
[10:36:12] [PASSED] 60 VFs
[10:36:12] [PASSED] 61 VFs
[10:36:12] [PASSED] 62 VFs
[10:36:12] [PASSED] 63 VFs
[10:36:12] ==================== [PASSED] fair_vram ====================
[10:36:12] ================== [PASSED] pf_gt_config ===================
[10:36:12] ===================== lmtt (1 subtest) =====================
[10:36:12] ======================== test_ops  =========================
[10:36:12] [PASSED] 2-level
[10:36:12] [PASSED] multi-level
[10:36:12] ==================== [PASSED] test_ops =====================
[10:36:12] ====================== [PASSED] lmtt =======================
[10:36:12] ================= pf_service (11 subtests) =================
[10:36:12] [PASSED] pf_negotiate_any
[10:36:12] [PASSED] pf_negotiate_base_match
[10:36:12] [PASSED] pf_negotiate_base_newer
[10:36:12] [PASSED] pf_negotiate_base_next
[10:36:12] [SKIPPED] pf_negotiate_base_older
[10:36:12] [PASSED] pf_negotiate_base_prev
[10:36:12] [PASSED] pf_negotiate_latest_match
[10:36:12] [PASSED] pf_negotiate_latest_newer
[10:36:12] [PASSED] pf_negotiate_latest_next
[10:36:12] [SKIPPED] pf_negotiate_latest_older
[10:36:12] [SKIPPED] pf_negotiate_latest_prev
[10:36:12] =================== [PASSED] pf_service ====================
[10:36:12] ================= xe_guc_g2g (2 subtests) ==================
[10:36:12] ============== xe_live_guc_g2g_kunit_default  ==============
[10:36:12] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[10:36:12] ============== xe_live_guc_g2g_kunit_allmem  ===============
[10:36:12] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[10:36:12] =================== [SKIPPED] xe_guc_g2g ===================
[10:36:12] =================== xe_mocs (2 subtests) ===================
[10:36:12] ================ xe_live_mocs_kernel_kunit  ================
[10:36:12] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[10:36:12] ================ xe_live_mocs_reset_kunit  =================
[10:36:12] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[10:36:12] ==================== [SKIPPED] xe_mocs =====================
[10:36:12] ================= xe_migrate (2 subtests) ==================
[10:36:12] ================= xe_migrate_sanity_kunit  =================
[10:36:12] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[10:36:12] ================== xe_validate_ccs_kunit  ==================
[10:36:12] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[10:36:12] =================== [SKIPPED] xe_migrate ===================
[10:36:12] ================== xe_dma_buf (1 subtest) ==================
[10:36:12] ==================== xe_dma_buf_kunit  =====================
[10:36:12] ================ [SKIPPED] xe_dma_buf_kunit ================
[10:36:12] =================== [SKIPPED] xe_dma_buf ===================
[10:36:12] ================= xe_bo_shrink (1 subtest) =================
[10:36:12] =================== xe_bo_shrink_kunit  ====================
[10:36:12] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[10:36:12] ================== [SKIPPED] xe_bo_shrink ==================
[10:36:12] ==================== xe_bo (2 subtests) ====================
[10:36:12] ================== xe_ccs_migrate_kunit  ===================
[10:36:12] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[10:36:12] ==================== xe_bo_evict_kunit  ====================
[10:36:12] =============== [SKIPPED] xe_bo_evict_kunit ================
[10:36:12] ===================== [SKIPPED] xe_bo ======================
[10:36:12] ==================== args (13 subtests) ====================
[10:36:12] [PASSED] count_args_test
[10:36:12] [PASSED] call_args_example
[10:36:12] [PASSED] call_args_test
[10:36:12] [PASSED] drop_first_arg_example
[10:36:12] [PASSED] drop_first_arg_test
[10:36:12] [PASSED] first_arg_example
[10:36:12] [PASSED] first_arg_test
[10:36:12] [PASSED] last_arg_example
[10:36:12] [PASSED] last_arg_test
[10:36:12] [PASSED] pick_arg_example
[10:36:12] [PASSED] if_args_example
[10:36:12] [PASSED] if_args_test
[10:36:12] [PASSED] sep_comma_example
[10:36:12] ====================== [PASSED] args =======================
[10:36:12] =================== xe_pci (3 subtests) ====================
[10:36:12] ==================== check_graphics_ip  ====================
[10:36:12] [PASSED] 12.00 Xe_LP
[10:36:12] [PASSED] 12.10 Xe_LP+
[10:36:12] [PASSED] 12.55 Xe_HPG
[10:36:12] [PASSED] 12.60 Xe_HPC
[10:36:12] [PASSED] 12.70 Xe_LPG
[10:36:12] [PASSED] 12.71 Xe_LPG
[10:36:12] [PASSED] 12.74 Xe_LPG+
[10:36:12] [PASSED] 20.01 Xe2_HPG
[10:36:12] [PASSED] 20.02 Xe2_HPG
[10:36:12] [PASSED] 20.04 Xe2_LPG
[10:36:12] [PASSED] 30.00 Xe3_LPG
[10:36:12] [PASSED] 30.01 Xe3_LPG
[10:36:12] [PASSED] 30.03 Xe3_LPG
[10:36:12] [PASSED] 30.04 Xe3_LPG
[10:36:12] [PASSED] 30.05 Xe3_LPG
[10:36:12] [PASSED] 35.10 Xe3p_LPG
[10:36:12] [PASSED] 35.11 Xe3p_XPC
[10:36:12] ================ [PASSED] check_graphics_ip ================
[10:36:12] ===================== check_media_ip  ======================
[10:36:12] [PASSED] 12.00 Xe_M
[10:36:12] [PASSED] 12.55 Xe_HPM
[10:36:12] [PASSED] 13.00 Xe_LPM+
[10:36:12] [PASSED] 13.01 Xe2_HPM
[10:36:12] [PASSED] 20.00 Xe2_LPM
[10:36:12] [PASSED] 30.00 Xe3_LPM
[10:36:12] [PASSED] 30.02 Xe3_LPM
[10:36:12] [PASSED] 35.00 Xe3p_LPM
[10:36:12] [PASSED] 35.03 Xe3p_HPM
[10:36:12] ================= [PASSED] check_media_ip ==================
[10:36:12] =================== check_platform_desc  ===================
[10:36:12] [PASSED] 0x9A60 (TIGERLAKE)
[10:36:12] [PASSED] 0x9A68 (TIGERLAKE)
[10:36:12] [PASSED] 0x9A70 (TIGERLAKE)
[10:36:12] [PASSED] 0x9A40 (TIGERLAKE)
[10:36:12] [PASSED] 0x9A49 (TIGERLAKE)
[10:36:12] [PASSED] 0x9A59 (TIGERLAKE)
[10:36:12] [PASSED] 0x9A78 (TIGERLAKE)
[10:36:12] [PASSED] 0x9AC0 (TIGERLAKE)
[10:36:12] [PASSED] 0x9AC9 (TIGERLAKE)
[10:36:12] [PASSED] 0x9AD9 (TIGERLAKE)
[10:36:12] [PASSED] 0x9AF8 (TIGERLAKE)
[10:36:12] [PASSED] 0x4C80 (ROCKETLAKE)
[10:36:12] [PASSED] 0x4C8A (ROCKETLAKE)
[10:36:12] [PASSED] 0x4C8B (ROCKETLAKE)
[10:36:12] [PASSED] 0x4C8C (ROCKETLAKE)
[10:36:12] [PASSED] 0x4C90 (ROCKETLAKE)
[10:36:12] [PASSED] 0x4C9A (ROCKETLAKE)
[10:36:12] [PASSED] 0x4680 (ALDERLAKE_S)
[10:36:12] [PASSED] 0x4682 (ALDERLAKE_S)
[10:36:12] [PASSED] 0x4688 (ALDERLAKE_S)
[10:36:12] [PASSED] 0x468A (ALDERLAKE_S)
[10:36:12] [PASSED] 0x468B (ALDERLAKE_S)
[10:36:12] [PASSED] 0x4690 (ALDERLAKE_S)
[10:36:12] [PASSED] 0x4692 (ALDERLAKE_S)
[10:36:12] [PASSED] 0x4693 (ALDERLAKE_S)
[10:36:12] [PASSED] 0x46A0 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x46A1 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x46A2 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x46A3 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x46A6 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x46A8 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x46AA (ALDERLAKE_P)
[10:36:12] [PASSED] 0x462A (ALDERLAKE_P)
[10:36:12] [PASSED] 0x4626 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x4628 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x46B0 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x46B1 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x46B2 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x46B3 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x46C0 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x46C1 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x46C2 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x46C3 (ALDERLAKE_P)
[10:36:12] [PASSED] 0x46D0 (ALDERLAKE_N)
[10:36:12] [PASSED] 0x46D1 (ALDERLAKE_N)
[10:36:12] [PASSED] 0x46D2 (ALDERLAKE_N)
[10:36:12] [PASSED] 0x46D3 (ALDERLAKE_N)
[10:36:12] [PASSED] 0x46D4 (ALDERLAKE_N)
[10:36:12] [PASSED] 0xA721 (ALDERLAKE_P)
[10:36:12] [PASSED] 0xA7A1 (ALDERLAKE_P)
[10:36:12] [PASSED] 0xA7A9 (ALDERLAKE_P)
[10:36:12] [PASSED] 0xA7AC (ALDERLAKE_P)
[10:36:12] [PASSED] 0xA7AD (ALDERLAKE_P)
[10:36:12] [PASSED] 0xA720 (ALDERLAKE_P)
[10:36:12] [PASSED] 0xA7A0 (ALDERLAKE_P)
[10:36:12] [PASSED] 0xA7A8 (ALDERLAKE_P)
[10:36:12] [PASSED] 0xA7AA (ALDERLAKE_P)
[10:36:12] [PASSED] 0xA7AB (ALDERLAKE_P)
[10:36:12] [PASSED] 0xA780 (ALDERLAKE_S)
[10:36:12] [PASSED] 0xA781 (ALDERLAKE_S)
[10:36:12] [PASSED] 0xA782 (ALDERLAKE_S)
[10:36:12] [PASSED] 0xA783 (ALDERLAKE_S)
[10:36:12] [PASSED] 0xA788 (ALDERLAKE_S)
[10:36:12] [PASSED] 0xA789 (ALDERLAKE_S)
[10:36:12] [PASSED] 0xA78A (ALDERLAKE_S)
[10:36:12] [PASSED] 0xA78B (ALDERLAKE_S)
[10:36:12] [PASSED] 0x4905 (DG1)
[10:36:12] [PASSED] 0x4906 (DG1)
[10:36:12] [PASSED] 0x4907 (DG1)
[10:36:12] [PASSED] 0x4908 (DG1)
[10:36:12] [PASSED] 0x4909 (DG1)
[10:36:12] [PASSED] 0x56C0 (DG2)
[10:36:12] [PASSED] 0x56C2 (DG2)
[10:36:12] [PASSED] 0x56C1 (DG2)
[10:36:12] [PASSED] 0x7D51 (METEORLAKE)
[10:36:12] [PASSED] 0x7DD1 (METEORLAKE)
[10:36:12] [PASSED] 0x7D41 (METEORLAKE)
[10:36:12] [PASSED] 0x7D67 (METEORLAKE)
[10:36:12] [PASSED] 0xB640 (METEORLAKE)
[10:36:12] [PASSED] 0x56A0 (DG2)
[10:36:12] [PASSED] 0x56A1 (DG2)
[10:36:12] [PASSED] 0x56A2 (DG2)
[10:36:12] [PASSED] 0x56BE (DG2)
[10:36:12] [PASSED] 0x56BF (DG2)
[10:36:12] [PASSED] 0x5690 (DG2)
[10:36:12] [PASSED] 0x5691 (DG2)
[10:36:12] [PASSED] 0x5692 (DG2)
[10:36:12] [PASSED] 0x56A5 (DG2)
[10:36:12] [PASSED] 0x56A6 (DG2)
[10:36:12] [PASSED] 0x56B0 (DG2)
[10:36:12] [PASSED] 0x56B1 (DG2)
[10:36:12] [PASSED] 0x56BA (DG2)
[10:36:12] [PASSED] 0x56BB (DG2)
[10:36:12] [PASSED] 0x56BC (DG2)
[10:36:12] [PASSED] 0x56BD (DG2)
[10:36:12] [PASSED] 0x5693 (DG2)
[10:36:12] [PASSED] 0x5694 (DG2)
[10:36:12] [PASSED] 0x5695 (DG2)
[10:36:12] [PASSED] 0x56A3 (DG2)
[10:36:12] [PASSED] 0x56A4 (DG2)
[10:36:12] [PASSED] 0x56B2 (DG2)
[10:36:12] [PASSED] 0x56B3 (DG2)
[10:36:12] [PASSED] 0x5696 (DG2)
[10:36:12] [PASSED] 0x5697 (DG2)
[10:36:12] [PASSED] 0xB69 (PVC)
[10:36:12] [PASSED] 0xB6E (PVC)
[10:36:12] [PASSED] 0xBD4 (PVC)
[10:36:12] [PASSED] 0xBD5 (PVC)
[10:36:12] [PASSED] 0xBD6 (PVC)
[10:36:12] [PASSED] 0xBD7 (PVC)
[10:36:12] [PASSED] 0xBD8 (PVC)
[10:36:12] [PASSED] 0xBD9 (PVC)
[10:36:12] [PASSED] 0xBDA (PVC)
[10:36:12] [PASSED] 0xBDB (PVC)
[10:36:12] [PASSED] 0xBE0 (PVC)
[10:36:12] [PASSED] 0xBE1 (PVC)
[10:36:12] [PASSED] 0xBE5 (PVC)
[10:36:12] [PASSED] 0x7D40 (METEORLAKE)
[10:36:12] [PASSED] 0x7D45 (METEORLAKE)
[10:36:12] [PASSED] 0x7D55 (METEORLAKE)
[10:36:12] [PASSED] 0x7D60 (METEORLAKE)
[10:36:12] [PASSED] 0x7DD5 (METEORLAKE)
[10:36:12] [PASSED] 0x6420 (LUNARLAKE)
[10:36:12] [PASSED] 0x64A0 (LUNARLAKE)
[10:36:12] [PASSED] 0x64B0 (LUNARLAKE)
[10:36:12] [PASSED] 0xE202 (BATTLEMAGE)
[10:36:12] [PASSED] 0xE209 (BATTLEMAGE)
[10:36:12] [PASSED] 0xE20B (BATTLEMAGE)
[10:36:12] [PASSED] 0xE20C (BATTLEMAGE)
[10:36:12] [PASSED] 0xE20D (BATTLEMAGE)
[10:36:12] [PASSED] 0xE210 (BATTLEMAGE)
[10:36:12] [PASSED] 0xE211 (BATTLEMAGE)
[10:36:12] [PASSED] 0xE212 (BATTLEMAGE)
[10:36:12] [PASSED] 0xE216 (BATTLEMAGE)
[10:36:12] [PASSED] 0xE220 (BATTLEMAGE)
[10:36:12] [PASSED] 0xE221 (BATTLEMAGE)
[10:36:12] [PASSED] 0xE222 (BATTLEMAGE)
[10:36:12] [PASSED] 0xE223 (BATTLEMAGE)
[10:36:12] [PASSED] 0xB080 (PANTHERLAKE)
[10:36:12] [PASSED] 0xB081 (PANTHERLAKE)
[10:36:12] [PASSED] 0xB082 (PANTHERLAKE)
[10:36:12] [PASSED] 0xB083 (PANTHERLAKE)
[10:36:12] [PASSED] 0xB084 (PANTHERLAKE)
[10:36:12] [PASSED] 0xB085 (PANTHERLAKE)
[10:36:12] [PASSED] 0xB086 (PANTHERLAKE)
[10:36:12] [PASSED] 0xB087 (PANTHERLAKE)
[10:36:12] [PASSED] 0xB08F (PANTHERLAKE)
[10:36:12] [PASSED] 0xB090 (PANTHERLAKE)
[10:36:12] [PASSED] 0xB0A0 (PANTHERLAKE)
[10:36:12] [PASSED] 0xB0B0 (PANTHERLAKE)
[10:36:12] [PASSED] 0xFD80 (PANTHERLAKE)
[10:36:12] [PASSED] 0xFD81 (PANTHERLAKE)
[10:36:12] [PASSED] 0xD740 (NOVALAKE_S)
[10:36:12] [PASSED] 0xD741 (NOVALAKE_S)
[10:36:12] [PASSED] 0xD742 (NOVALAKE_S)
[10:36:12] [PASSED] 0xD743 (NOVALAKE_S)
[10:36:12] [PASSED] 0xD744 (NOVALAKE_S)
[10:36:12] [PASSED] 0xD745 (NOVALAKE_S)
[10:36:12] [PASSED] 0x674C (CRESCENTISLAND)
[10:36:12] [PASSED] 0xD750 (NOVALAKE_P)
[10:36:12] [PASSED] 0xD751 (NOVALAKE_P)
[10:36:12] [PASSED] 0xD752 (NOVALAKE_P)
[10:36:12] [PASSED] 0xD753 (NOVALAKE_P)
[10:36:12] [PASSED] 0xD754 (NOVALAKE_P)
[10:36:12] [PASSED] 0xD755 (NOVALAKE_P)
[10:36:12] [PASSED] 0xD756 (NOVALAKE_P)
[10:36:12] [PASSED] 0xD757 (NOVALAKE_P)
[10:36:12] [PASSED] 0xD75F (NOVALAKE_P)
[10:36:12] =============== [PASSED] check_platform_desc ===============
[10:36:12] ===================== [PASSED] xe_pci ======================
[10:36:12] =================== xe_rtp (2 subtests) ====================
[10:36:12] =============== xe_rtp_process_to_sr_tests  ================
[10:36:12] [PASSED] coalesce-same-reg
[10:36:12] [PASSED] no-match-no-add
[10:36:12] [PASSED] match-or
[10:36:12] [PASSED] match-or-xfail
[10:36:12] [PASSED] no-match-no-add-multiple-rules
[10:36:12] [PASSED] two-regs-two-entries
[10:36:12] [PASSED] clr-one-set-other
[10:36:12] [PASSED] set-field
[10:36:12] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[10:36:12] [PASSED] conflict-not-disjoint
[10:36:12] [PASSED] conflict-reg-type
[10:36:12] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[10:36:12] ================== xe_rtp_process_tests  ===================
[10:36:12] [PASSED] active1
[10:36:12] [PASSED] active2
[10:36:12] [PASSED] active-inactive
[10:36:12] [PASSED] inactive-active
[10:36:12] [PASSED] inactive-1st_or_active-inactive
[10:36:12] [PASSED] inactive-2nd_or_active-inactive
[10:36:12] [PASSED] inactive-last_or_active-inactive
[10:36:12] [PASSED] inactive-no_or_active-inactive
[10:36:12] ============== [PASSED] xe_rtp_process_tests ===============
[10:36:12] ===================== [PASSED] xe_rtp ======================
[10:36:12] ==================== xe_wa (1 subtest) =====================
[10:36:12] ======================== xe_wa_gt  =========================
[10:36:12] [PASSED] TIGERLAKE B0
[10:36:12] [PASSED] DG1 A0
[10:36:12] [PASSED] DG1 B0
[10:36:12] [PASSED] ALDERLAKE_S A0
[10:36:12] [PASSED] ALDERLAKE_S B0
[10:36:12] [PASSED] ALDERLAKE_S C0
[10:36:12] [PASSED] ALDERLAKE_S D0
[10:36:12] [PASSED] ALDERLAKE_P A0
[10:36:12] [PASSED] ALDERLAKE_P B0
[10:36:12] [PASSED] ALDERLAKE_P C0
[10:36:12] [PASSED] ALDERLAKE_S RPLS D0
[10:36:12] [PASSED] ALDERLAKE_P RPLU E0
[10:36:12] [PASSED] DG2 G10 C0
[10:36:12] [PASSED] DG2 G11 B1
[10:36:12] [PASSED] DG2 G12 A1
[10:36:12] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:36:12] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:36:12] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[10:36:12] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[10:36:12] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[10:36:12] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[10:36:12] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[10:36:12] ==================== [PASSED] xe_wa_gt =====================
[10:36:12] ====================== [PASSED] xe_wa ======================
[10:36:12] ============================================================
[10:36:12] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[10:36:12] Elapsed time: 35.294s total, 4.166s configuring, 30.511s building, 0.605s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[10:36:12] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:36:13] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:36:38] Starting KUnit Kernel (1/1)...
[10:36:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:36:38] ============ drm_test_pick_cmdline (2 subtests) ============
[10:36:38] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[10:36:38] =============== drm_test_pick_cmdline_named  ===============
[10:36:38] [PASSED] NTSC
[10:36:38] [PASSED] NTSC-J
[10:36:38] [PASSED] PAL
[10:36:38] [PASSED] PAL-M
[10:36:38] =========== [PASSED] drm_test_pick_cmdline_named ===========
[10:36:38] ============== [PASSED] drm_test_pick_cmdline ==============
[10:36:38] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[10:36:38] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[10:36:38] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[10:36:38] =========== drm_validate_clone_mode (2 subtests) ===========
[10:36:38] ============== drm_test_check_in_clone_mode  ===============
[10:36:38] [PASSED] in_clone_mode
[10:36:38] [PASSED] not_in_clone_mode
[10:36:38] ========== [PASSED] drm_test_check_in_clone_mode ===========
[10:36:38] =============== drm_test_check_valid_clones  ===============
[10:36:38] [PASSED] not_in_clone_mode
[10:36:38] [PASSED] valid_clone
[10:36:38] [PASSED] invalid_clone
[10:36:38] =========== [PASSED] drm_test_check_valid_clones ===========
[10:36:38] ============= [PASSED] drm_validate_clone_mode =============
[10:36:38] ============= drm_validate_modeset (1 subtest) =============
[10:36:38] [PASSED] drm_test_check_connector_changed_modeset
[10:36:38] ============== [PASSED] drm_validate_modeset ===============
[10:36:38] ====== drm_test_bridge_get_current_state (2 subtests) ======
[10:36:38] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[10:36:38] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[10:36:38] ======== [PASSED] drm_test_bridge_get_current_state ========
[10:36:38] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[10:36:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[10:36:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[10:36:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[10:36:38] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[10:36:38] ============== drm_bridge_alloc (2 subtests) ===============
[10:36:38] [PASSED] drm_test_drm_bridge_alloc_basic
[10:36:38] [PASSED] drm_test_drm_bridge_alloc_get_put
[10:36:38] ================ [PASSED] drm_bridge_alloc =================
[10:36:38] ============= drm_cmdline_parser (40 subtests) =============
[10:36:38] [PASSED] drm_test_cmdline_force_d_only
[10:36:38] [PASSED] drm_test_cmdline_force_D_only_dvi
[10:36:38] [PASSED] drm_test_cmdline_force_D_only_hdmi
[10:36:38] [PASSED] drm_test_cmdline_force_D_only_not_digital
[10:36:38] [PASSED] drm_test_cmdline_force_e_only
[10:36:38] [PASSED] drm_test_cmdline_res
[10:36:38] [PASSED] drm_test_cmdline_res_vesa
[10:36:38] [PASSED] drm_test_cmdline_res_vesa_rblank
[10:36:38] [PASSED] drm_test_cmdline_res_rblank
[10:36:38] [PASSED] drm_test_cmdline_res_bpp
[10:36:38] [PASSED] drm_test_cmdline_res_refresh
[10:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh
[10:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[10:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[10:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[10:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[10:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[10:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[10:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[10:36:38] [PASSED] drm_test_cmdline_res_margins_force_on
[10:36:38] [PASSED] drm_test_cmdline_res_vesa_margins
[10:36:38] [PASSED] drm_test_cmdline_name
[10:36:38] [PASSED] drm_test_cmdline_name_bpp
[10:36:38] [PASSED] drm_test_cmdline_name_option
[10:36:38] [PASSED] drm_test_cmdline_name_bpp_option
[10:36:38] [PASSED] drm_test_cmdline_rotate_0
[10:36:38] [PASSED] drm_test_cmdline_rotate_90
[10:36:38] [PASSED] drm_test_cmdline_rotate_180
[10:36:38] [PASSED] drm_test_cmdline_rotate_270
[10:36:38] [PASSED] drm_test_cmdline_hmirror
[10:36:38] [PASSED] drm_test_cmdline_vmirror
[10:36:38] [PASSED] drm_test_cmdline_margin_options
[10:36:38] [PASSED] drm_test_cmdline_multiple_options
[10:36:38] [PASSED] drm_test_cmdline_bpp_extra_and_option
[10:36:38] [PASSED] drm_test_cmdline_extra_and_option
[10:36:38] [PASSED] drm_test_cmdline_freestanding_options
[10:36:38] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[10:36:38] [PASSED] drm_test_cmdline_panel_orientation
[10:36:38] ================ drm_test_cmdline_invalid  =================
[10:36:38] [PASSED] margin_only
[10:36:38] [PASSED] interlace_only
[10:36:38] [PASSED] res_missing_x
[10:36:38] [PASSED] res_missing_y
[10:36:38] [PASSED] res_bad_y
[10:36:38] [PASSED] res_missing_y_bpp
[10:36:38] [PASSED] res_bad_bpp
[10:36:38] [PASSED] res_bad_refresh
[10:36:38] [PASSED] res_bpp_refresh_force_on_off
[10:36:38] [PASSED] res_invalid_mode
[10:36:38] [PASSED] res_bpp_wrong_place_mode
[10:36:38] [PASSED] name_bpp_refresh
[10:36:38] [PASSED] name_refresh
[10:36:38] [PASSED] name_refresh_wrong_mode
[10:36:38] [PASSED] name_refresh_invalid_mode
[10:36:38] [PASSED] rotate_multiple
[10:36:38] [PASSED] rotate_invalid_val
[10:36:38] [PASSED] rotate_truncated
[10:36:38] [PASSED] invalid_option
[10:36:38] [PASSED] invalid_tv_option
[10:36:38] [PASSED] truncated_tv_option
[10:36:38] ============ [PASSED] drm_test_cmdline_invalid =============
[10:36:38] =============== drm_test_cmdline_tv_options  ===============
[10:36:38] [PASSED] NTSC
[10:36:38] [PASSED] NTSC_443
[10:36:38] [PASSED] NTSC_J
[10:36:38] [PASSED] PAL
[10:36:38] [PASSED] PAL_M
[10:36:38] [PASSED] PAL_N
[10:36:38] [PASSED] SECAM
[10:36:38] [PASSED] MONO_525
[10:36:38] [PASSED] MONO_625
[10:36:38] =========== [PASSED] drm_test_cmdline_tv_options ===========
[10:36:38] =============== [PASSED] drm_cmdline_parser ================
[10:36:38] ========== drmm_connector_hdmi_init (20 subtests) ==========
[10:36:38] [PASSED] drm_test_connector_hdmi_init_valid
[10:36:38] [PASSED] drm_test_connector_hdmi_init_bpc_8
[10:36:38] [PASSED] drm_test_connector_hdmi_init_bpc_10
[10:36:38] [PASSED] drm_test_connector_hdmi_init_bpc_12
[10:36:38] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[10:36:38] [PASSED] drm_test_connector_hdmi_init_bpc_null
[10:36:38] [PASSED] drm_test_connector_hdmi_init_formats_empty
[10:36:38] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[10:36:38] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[10:36:38] [PASSED] supported_formats=0x9 yuv420_allowed=1
[10:36:38] [PASSED] supported_formats=0x9 yuv420_allowed=0
[10:36:38] [PASSED] supported_formats=0x3 yuv420_allowed=1
[10:36:38] [PASSED] supported_formats=0x3 yuv420_allowed=0
[10:36:38] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:36:38] [PASSED] drm_test_connector_hdmi_init_null_ddc
[10:36:38] [PASSED] drm_test_connector_hdmi_init_null_product
[10:36:38] [PASSED] drm_test_connector_hdmi_init_null_vendor
[10:36:38] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[10:36:38] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[10:36:38] [PASSED] drm_test_connector_hdmi_init_product_valid
[10:36:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[10:36:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[10:36:38] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[10:36:38] ========= drm_test_connector_hdmi_init_type_valid  =========
[10:36:38] [PASSED] HDMI-A
[10:36:38] [PASSED] HDMI-B
[10:36:38] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[10:36:38] ======== drm_test_connector_hdmi_init_type_invalid  ========
[10:36:38] [PASSED] Unknown
[10:36:38] [PASSED] VGA
[10:36:38] [PASSED] DVI-I
[10:36:38] [PASSED] DVI-D
[10:36:38] [PASSED] DVI-A
[10:36:38] [PASSED] Composite
[10:36:38] [PASSED] SVIDEO
[10:36:38] [PASSED] LVDS
[10:36:38] [PASSED] Component
[10:36:38] [PASSED] DIN
[10:36:38] [PASSED] DP
[10:36:38] [PASSED] TV
[10:36:38] [PASSED] eDP
[10:36:38] [PASSED] Virtual
[10:36:38] [PASSED] DSI
[10:36:38] [PASSED] DPI
[10:36:38] [PASSED] Writeback
[10:36:38] [PASSED] SPI
[10:36:38] [PASSED] USB
[10:36:38] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[10:36:38] ============ [PASSED] drmm_connector_hdmi_init =============
[10:36:38] ============= drmm_connector_init (3 subtests) =============
[10:36:38] [PASSED] drm_test_drmm_connector_init
[10:36:38] [PASSED] drm_test_drmm_connector_init_null_ddc
[10:36:38] ========= drm_test_drmm_connector_init_type_valid  =========
[10:36:38] [PASSED] Unknown
[10:36:38] [PASSED] VGA
[10:36:38] [PASSED] DVI-I
[10:36:38] [PASSED] DVI-D
[10:36:38] [PASSED] DVI-A
[10:36:38] [PASSED] Composite
[10:36:38] [PASSED] SVIDEO
[10:36:38] [PASSED] LVDS
[10:36:38] [PASSED] Component
[10:36:38] [PASSED] DIN
[10:36:38] [PASSED] DP
[10:36:38] [PASSED] HDMI-A
[10:36:38] [PASSED] HDMI-B
[10:36:38] [PASSED] TV
[10:36:38] [PASSED] eDP
[10:36:38] [PASSED] Virtual
[10:36:38] [PASSED] DSI
[10:36:38] [PASSED] DPI
[10:36:38] [PASSED] Writeback
[10:36:38] [PASSED] SPI
[10:36:38] [PASSED] USB
[10:36:38] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[10:36:38] =============== [PASSED] drmm_connector_init ===============
[10:36:38] ========= drm_connector_dynamic_init (6 subtests) ==========
[10:36:38] [PASSED] drm_test_drm_connector_dynamic_init
[10:36:38] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[10:36:38] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[10:36:38] [PASSED] drm_test_drm_connector_dynamic_init_properties
[10:36:38] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[10:36:38] [PASSED] Unknown
[10:36:38] [PASSED] VGA
[10:36:38] [PASSED] DVI-I
[10:36:38] [PASSED] DVI-D
[10:36:38] [PASSED] DVI-A
[10:36:38] [PASSED] Composite
[10:36:38] [PASSED] SVIDEO
[10:36:38] [PASSED] LVDS
[10:36:38] [PASSED] Component
[10:36:38] [PASSED] DIN
[10:36:38] [PASSED] DP
[10:36:38] [PASSED] HDMI-A
[10:36:38] [PASSED] HDMI-B
[10:36:38] [PASSED] TV
[10:36:38] [PASSED] eDP
[10:36:38] [PASSED] Virtual
[10:36:38] [PASSED] DSI
[10:36:38] [PASSED] DPI
[10:36:38] [PASSED] Writeback
[10:36:38] [PASSED] SPI
[10:36:38] [PASSED] USB
[10:36:38] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[10:36:38] ======== drm_test_drm_connector_dynamic_init_name  =========
[10:36:38] [PASSED] Unknown
[10:36:38] [PASSED] VGA
[10:36:38] [PASSED] DVI-I
[10:36:38] [PASSED] DVI-D
[10:36:38] [PASSED] DVI-A
[10:36:38] [PASSED] Composite
[10:36:38] [PASSED] SVIDEO
[10:36:38] [PASSED] LVDS
[10:36:38] [PASSED] Component
[10:36:38] [PASSED] DIN
[10:36:38] [PASSED] DP
[10:36:38] [PASSED] HDMI-A
[10:36:38] [PASSED] HDMI-B
[10:36:38] [PASSED] TV
[10:36:38] [PASSED] eDP
[10:36:38] [PASSED] Virtual
[10:36:38] [PASSED] DSI
[10:36:38] [PASSED] DPI
[10:36:38] [PASSED] Writeback
[10:36:38] [PASSED] SPI
[10:36:38] [PASSED] USB
[10:36:38] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[10:36:38] =========== [PASSED] drm_connector_dynamic_init ============
[10:36:38] ==== drm_connector_dynamic_register_early (4 subtests) =====
[10:36:38] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[10:36:38] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[10:36:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[10:36:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[10:36:38] ====== [PASSED] drm_connector_dynamic_register_early =======
[10:36:38] ======= drm_connector_dynamic_register (7 subtests) ========
[10:36:38] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[10:36:38] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[10:36:38] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[10:36:38] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[10:36:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[10:36:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[10:36:38] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[10:36:38] ========= [PASSED] drm_connector_dynamic_register ==========
[10:36:38] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[10:36:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[10:36:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[10:36:38] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[10:36:38] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[10:36:38] ========== drm_test_get_tv_mode_from_name_valid  ===========
[10:36:38] [PASSED] NTSC
[10:36:38] [PASSED] NTSC-443
[10:36:38] [PASSED] NTSC-J
[10:36:38] [PASSED] PAL
[10:36:38] [PASSED] PAL-M
[10:36:38] [PASSED] PAL-N
[10:36:38] [PASSED] SECAM
[10:36:38] [PASSED] Mono
[10:36:38] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[10:36:38] [PASSED] drm_test_get_tv_mode_from_name_truncated
[10:36:38] ============ [PASSED] drm_get_tv_mode_from_name ============
[10:36:38] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[10:36:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[10:36:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[10:36:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[10:36:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[10:36:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[10:36:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[10:36:38] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[10:36:38] [PASSED] VIC 96
[10:36:38] [PASSED] VIC 97
[10:36:38] [PASSED] VIC 101
[10:36:38] [PASSED] VIC 102
[10:36:38] [PASSED] VIC 106
[10:36:38] [PASSED] VIC 107
[10:36:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[10:36:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[10:36:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[10:36:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[10:36:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[10:36:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[10:36:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[10:36:38] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[10:36:38] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[10:36:38] [PASSED] Automatic
[10:36:38] [PASSED] Full
[10:36:38] [PASSED] Limited 16:235
[10:36:38] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[10:36:38] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[10:36:38] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[10:36:38] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[10:36:38] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[10:36:38] [PASSED] RGB
[10:36:38] [PASSED] YUV 4:2:0
[10:36:38] [PASSED] YUV 4:2:2
[10:36:38] [PASSED] YUV 4:4:4
[10:36:38] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[10:36:38] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[10:36:38] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[10:36:38] ============= drm_damage_helper (21 subtests) ==============
[10:36:38] [PASSED] drm_test_damage_iter_no_damage
[10:36:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[10:36:38] [PASSED] drm_test_damage_iter_no_damage_src_moved
[10:36:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[10:36:38] [PASSED] drm_test_damage_iter_no_damage_not_visible
[10:36:38] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[10:36:38] [PASSED] drm_test_damage_iter_no_damage_no_fb
[10:36:38] [PASSED] drm_test_damage_iter_simple_damage
[10:36:38] [PASSED] drm_test_damage_iter_single_damage
[10:36:38] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[10:36:38] [PASSED] drm_test_damage_iter_single_damage_outside_src
[10:36:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[10:36:38] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[10:36:38] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[10:36:38] [PASSED] drm_test_damage_iter_single_damage_src_moved
[10:36:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[10:36:38] [PASSED] drm_test_damage_iter_damage
[10:36:38] [PASSED] drm_test_damage_iter_damage_one_intersect
[10:36:38] [PASSED] drm_test_damage_iter_damage_one_outside
[10:36:38] [PASSED] drm_test_damage_iter_damage_src_moved
[10:36:38] [PASSED] drm_test_damage_iter_damage_not_visible
[10:36:38] ================ [PASSED] drm_damage_helper ================
[10:36:38] ============== drm_dp_mst_helper (3 subtests) ==============
[10:36:38] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[10:36:38] [PASSED] Clock 154000 BPP 30 DSC disabled
[10:36:38] [PASSED] Clock 234000 BPP 30 DSC disabled
[10:36:38] [PASSED] Clock 297000 BPP 24 DSC disabled
[10:36:38] [PASSED] Clock 332880 BPP 24 DSC enabled
[10:36:38] [PASSED] Clock 324540 BPP 24 DSC enabled
[10:36:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[10:36:38] ============== drm_test_dp_mst_calc_pbn_div  ===============
[10:36:38] [PASSED] Link rate 2000000 lane count 4
[10:36:38] [PASSED] Link rate 2000000 lane count 2
[10:36:38] [PASSED] Link rate 2000000 lane count 1
[10:36:38] [PASSED] Link rate 1350000 lane count 4
[10:36:38] [PASSED] Link rate 1350000 lane count 2
[10:36:38] [PASSED] Link rate 1350000 lane count 1
[10:36:38] [PASSED] Link rate 1000000 lane count 4
[10:36:38] [PASSED] Link rate 1000000 lane count 2
[10:36:38] [PASSED] Link rate 1000000 lane count 1
[10:36:38] [PASSED] Link rate 810000 lane count 4
[10:36:38] [PASSED] Link rate 810000 lane count 2
[10:36:38] [PASSED] Link rate 810000 lane count 1
[10:36:38] [PASSED] Link rate 540000 lane count 4
[10:36:38] [PASSED] Link rate 540000 lane count 2
[10:36:38] [PASSED] Link rate 540000 lane count 1
[10:36:38] [PASSED] Link rate 270000 lane count 4
[10:36:38] [PASSED] Link rate 270000 lane count 2
[10:36:38] [PASSED] Link rate 270000 lane count 1
[10:36:38] [PASSED] Link rate 162000 lane count 4
[10:36:38] [PASSED] Link rate 162000 lane count 2
[10:36:38] [PASSED] Link rate 162000 lane count 1
[10:36:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[10:36:38] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[10:36:38] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[10:36:38] [PASSED] DP_POWER_UP_PHY with port number
[10:36:38] [PASSED] DP_POWER_DOWN_PHY with port number
[10:36:38] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[10:36:38] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[10:36:38] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[10:36:38] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[10:36:38] [PASSED] DP_QUERY_PAYLOAD with port number
[10:36:38] [PASSED] DP_QUERY_PAYLOAD with VCPI
[10:36:38] [PASSED] DP_REMOTE_DPCD_READ with port number
[10:36:38] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[10:36:38] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[10:36:38] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[10:36:38] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[10:36:38] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[10:36:38] [PASSED] DP_REMOTE_I2C_READ with port number
[10:36:38] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[10:36:38] [PASSED] DP_REMOTE_I2C_READ with transactions array
[10:36:38] [PASSED] DP_REMOTE_I2C_WRITE with port number
[10:36:38] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[10:36:38] [PASSED] DP_REMOTE_I2C_WRITE with data array
[10:36:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[10:36:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[10:36:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[10:36:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[10:36:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[10:36:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[10:36:38] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[10:36:38] ================ [PASSED] drm_dp_mst_helper ================
[10:36:38] ================== drm_exec (7 subtests) ===================
[10:36:38] [PASSED] sanitycheck
[10:36:38] [PASSED] test_lock
[10:36:38] [PASSED] test_lock_unlock
[10:36:38] [PASSED] test_duplicates
[10:36:38] [PASSED] test_prepare
[10:36:38] [PASSED] test_prepare_array
[10:36:38] [PASSED] test_multiple_loops
[10:36:38] ==================== [PASSED] drm_exec =====================
[10:36:38] =========== drm_format_helper_test (17 subtests) ===========
[10:36:38] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[10:36:38] [PASSED] single_pixel_source_buffer
[10:36:38] [PASSED] single_pixel_clip_rectangle
[10:36:38] [PASSED] well_known_colors
[10:36:38] [PASSED] destination_pitch
[10:36:38] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[10:36:38] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[10:36:38] [PASSED] single_pixel_source_buffer
[10:36:38] [PASSED] single_pixel_clip_rectangle
[10:36:38] [PASSED] well_known_colors
[10:36:38] [PASSED] destination_pitch
[10:36:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[10:36:38] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[10:36:38] [PASSED] single_pixel_source_buffer
[10:36:38] [PASSED] single_pixel_clip_rectangle
[10:36:38] [PASSED] well_known_colors
[10:36:38] [PASSED] destination_pitch
[10:36:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[10:36:38] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[10:36:38] [PASSED] single_pixel_source_buffer
[10:36:38] [PASSED] single_pixel_clip_rectangle
[10:36:38] [PASSED] well_known_colors
[10:36:38] [PASSED] destination_pitch
[10:36:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[10:36:38] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[10:36:38] [PASSED] single_pixel_source_buffer
[10:36:38] [PASSED] single_pixel_clip_rectangle
[10:36:38] [PASSED] well_known_colors
[10:36:38] [PASSED] destination_pitch
[10:36:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[10:36:38] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[10:36:38] [PASSED] single_pixel_source_buffer
[10:36:38] [PASSED] single_pixel_clip_rectangle
[10:36:38] [PASSED] well_known_colors
[10:36:38] [PASSED] destination_pitch
[10:36:38] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[10:36:38] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[10:36:38] [PASSED] single_pixel_source_buffer
[10:36:38] [PASSED] single_pixel_clip_rectangle
[10:36:38] [PASSED] well_known_colors
[10:36:38] [PASSED] destination_pitch
[10:36:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[10:36:38] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[10:36:38] [PASSED] single_pixel_source_buffer
[10:36:38] [PASSED] single_pixel_clip_rectangle
[10:36:38] [PASSED] well_known_colors
[10:36:38] [PASSED] destination_pitch
[10:36:38] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[10:36:38] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[10:36:38] [PASSED] single_pixel_source_buffer
[10:36:38] [PASSED] single_pixel_clip_rectangle
[10:36:38] [PASSED] well_known_colors
[10:36:38] [PASSED] destination_pitch
[10:36:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[10:36:38] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[10:36:38] [PASSED] single_pixel_source_buffer
[10:36:38] [PASSED] single_pixel_clip_rectangle
[10:36:38] [PASSED] well_known_colors
[10:36:38] [PASSED] destination_pitch
[10:36:38] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[10:36:38] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[10:36:38] [PASSED] single_pixel_source_buffer
[10:36:38] [PASSED] single_pixel_clip_rectangle
[10:36:38] [PASSED] well_known_colors
[10:36:38] [PASSED] destination_pitch
[10:36:38] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[10:36:38] ============== drm_test_fb_xrgb8888_to_mono  ===============
[10:36:38] [PASSED] single_pixel_source_buffer
[10:36:38] [PASSED] single_pixel_clip_rectangle
[10:36:38] [PASSED] well_known_colors
[10:36:38] [PASSED] destination_pitch
[10:36:38] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[10:36:38] ==================== drm_test_fb_swab  =====================
[10:36:38] [PASSED] single_pixel_source_buffer
[10:36:38] [PASSED] single_pixel_clip_rectangle
[10:36:38] [PASSED] well_known_colors
[10:36:38] [PASSED] destination_pitch
[10:36:38] ================ [PASSED] drm_test_fb_swab =================
[10:36:38] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[10:36:38] [PASSED] single_pixel_source_buffer
[10:36:38] [PASSED] single_pixel_clip_rectangle
[10:36:38] [PASSED] well_known_colors
[10:36:38] [PASSED] destination_pitch
[10:36:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[10:36:38] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[10:36:38] [PASSED] single_pixel_source_buffer
[10:36:38] [PASSED] single_pixel_clip_rectangle
[10:36:38] [PASSED] well_known_colors
[10:36:38] [PASSED] destination_pitch
[10:36:38] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[10:36:38] ================= drm_test_fb_clip_offset  =================
[10:36:38] [PASSED] pass through
[10:36:38] [PASSED] horizontal offset
[10:36:38] [PASSED] vertical offset
[10:36:38] [PASSED] horizontal and vertical offset
[10:36:38] [PASSED] horizontal offset (custom pitch)
[10:36:38] [PASSED] vertical offset (custom pitch)
[10:36:38] [PASSED] horizontal and vertical offset (custom pitch)
[10:36:38] ============= [PASSED] drm_test_fb_clip_offset =============
[10:36:38] =================== drm_test_fb_memcpy  ====================
[10:36:38] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[10:36:38] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[10:36:38] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[10:36:38] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[10:36:38] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[10:36:38] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[10:36:38] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[10:36:38] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[10:36:38] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[10:36:38] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[10:36:38] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[10:36:38] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[10:36:38] =============== [PASSED] drm_test_fb_memcpy ================
[10:36:38] ============= [PASSED] drm_format_helper_test ==============
[10:36:38] ================= drm_format (18 subtests) =================
[10:36:38] [PASSED] drm_test_format_block_width_invalid
[10:36:38] [PASSED] drm_test_format_block_width_one_plane
[10:36:38] [PASSED] drm_test_format_block_width_two_plane
[10:36:38] [PASSED] drm_test_format_block_width_three_plane
[10:36:38] [PASSED] drm_test_format_block_width_tiled
[10:36:38] [PASSED] drm_test_format_block_height_invalid
[10:36:38] [PASSED] drm_test_format_block_height_one_plane
[10:36:38] [PASSED] drm_test_format_block_height_two_plane
[10:36:38] [PASSED] drm_test_format_block_height_three_plane
[10:36:38] [PASSED] drm_test_format_block_height_tiled
[10:36:38] [PASSED] drm_test_format_min_pitch_invalid
[10:36:38] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[10:36:38] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[10:36:38] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[10:36:38] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[10:36:38] [PASSED] drm_test_format_min_pitch_two_plane
[10:36:38] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[10:36:38] [PASSED] drm_test_format_min_pitch_tiled
[10:36:38] =================== [PASSED] drm_format ====================
[10:36:38] ============== drm_framebuffer (10 subtests) ===============
[10:36:38] ========== drm_test_framebuffer_check_src_coords  ==========
[10:36:38] [PASSED] Success: source fits into fb
[10:36:38] [PASSED] Fail: overflowing fb with x-axis coordinate
[10:36:38] [PASSED] Fail: overflowing fb with y-axis coordinate
[10:36:38] [PASSED] Fail: overflowing fb with source width
[10:36:38] [PASSED] Fail: overflowing fb with source height
[10:36:38] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[10:36:38] [PASSED] drm_test_framebuffer_cleanup
[10:36:38] =============== drm_test_framebuffer_create  ===============
[10:36:38] [PASSED] ABGR8888 normal sizes
[10:36:38] [PASSED] ABGR8888 max sizes
[10:36:38] [PASSED] ABGR8888 pitch greater than min required
[10:36:38] [PASSED] ABGR8888 pitch less than min required
[10:36:38] [PASSED] ABGR8888 Invalid width
[10:36:38] [PASSED] ABGR8888 Invalid buffer handle
[10:36:38] [PASSED] No pixel format
[10:36:38] [PASSED] ABGR8888 Width 0
[10:36:38] [PASSED] ABGR8888 Height 0
[10:36:38] [PASSED] ABGR8888 Out of bound height * pitch combination
[10:36:38] [PASSED] ABGR8888 Large buffer offset
[10:36:38] [PASSED] ABGR8888 Buffer offset for inexistent plane
[10:36:38] [PASSED] ABGR8888 Invalid flag
[10:36:38] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[10:36:38] [PASSED] ABGR8888 Valid buffer modifier
[10:36:38] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[10:36:38] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[10:36:38] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[10:36:38] [PASSED] NV12 Normal sizes
[10:36:38] [PASSED] NV12 Max sizes
[10:36:38] [PASSED] NV12 Invalid pitch
[10:36:38] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[10:36:38] [PASSED] NV12 different  modifier per-plane
[10:36:38] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[10:36:38] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[10:36:38] [PASSED] NV12 Modifier for inexistent plane
[10:36:38] [PASSED] NV12 Handle for inexistent plane
[10:36:38] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[10:36:38] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[10:36:38] [PASSED] YVU420 Normal sizes
[10:36:38] [PASSED] YVU420 Max sizes
[10:36:38] [PASSED] YVU420 Invalid pitch
[10:36:38] [PASSED] YVU420 Different pitches
[10:36:38] [PASSED] YVU420 Different buffer offsets/pitches
[10:36:38] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[10:36:38] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[10:36:38] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[10:36:38] [PASSED] YVU420 Valid modifier
[10:36:38] [PASSED] YVU420 Different modifiers per plane
[10:36:38] [PASSED] YVU420 Modifier for inexistent plane
[10:36:38] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[10:36:38] [PASSED] X0L2 Normal sizes
[10:36:38] [PASSED] X0L2 Max sizes
[10:36:38] [PASSED] X0L2 Invalid pitch
[10:36:38] [PASSED] X0L2 Pitch greater than minimum required
[10:36:38] [PASSED] X0L2 Handle for inexistent plane
[10:36:38] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[10:36:38] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[10:36:38] [PASSED] X0L2 Valid modifier
[10:36:38] [PASSED] X0L2 Modifier for inexistent plane
[10:36:38] =========== [PASSED] drm_test_framebuffer_create ===========
[10:36:38] [PASSED] drm_test_framebuffer_free
[10:36:38] [PASSED] drm_test_framebuffer_init
[10:36:38] [PASSED] drm_test_framebuffer_init_bad_format
[10:36:38] [PASSED] drm_test_framebuffer_init_dev_mismatch
[10:36:38] [PASSED] drm_test_framebuffer_lookup
[10:36:38] [PASSED] drm_test_framebuffer_lookup_inexistent
[10:36:38] [PASSED] drm_test_framebuffer_modifiers_not_supported
[10:36:38] ================= [PASSED] drm_framebuffer =================
[10:36:38] ================ drm_gem_shmem (8 subtests) ================
[10:36:38] [PASSED] drm_gem_shmem_test_obj_create
[10:36:38] [PASSED] drm_gem_shmem_test_obj_create_private
[10:36:38] [PASSED] drm_gem_shmem_test_pin_pages
[10:36:38] [PASSED] drm_gem_shmem_test_vmap
[10:36:38] [PASSED] drm_gem_shmem_test_get_sg_table
[10:36:38] [PASSED] drm_gem_shmem_test_get_pages_sgt
[10:36:38] [PASSED] drm_gem_shmem_test_madvise
[10:36:38] [PASSED] drm_gem_shmem_test_purge
[10:36:38] ================== [PASSED] drm_gem_shmem ==================
[10:36:38] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[10:36:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[10:36:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[10:36:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[10:36:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[10:36:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[10:36:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[10:36:38] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[10:36:38] [PASSED] Automatic
[10:36:38] [PASSED] Full
[10:36:38] [PASSED] Limited 16:235
[10:36:38] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[10:36:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[10:36:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[10:36:38] [PASSED] drm_test_check_disable_connector
[10:36:38] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[10:36:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[10:36:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[10:36:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[10:36:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[10:36:38] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[10:36:38] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[10:36:38] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[10:36:38] [PASSED] drm_test_check_output_bpc_dvi
[10:36:38] [PASSED] drm_test_check_output_bpc_format_vic_1
[10:36:38] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[10:36:38] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[10:36:38] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[10:36:38] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[10:36:38] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[10:36:38] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[10:36:38] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[10:36:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[10:36:38] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[10:36:38] [PASSED] drm_test_check_broadcast_rgb_value
[10:36:38] [PASSED] drm_test_check_bpc_8_value
[10:36:38] [PASSED] drm_test_check_bpc_10_value
[10:36:38] [PASSED] drm_test_check_bpc_12_value
[10:36:38] [PASSED] drm_test_check_format_value
[10:36:38] [PASSED] drm_test_check_tmds_char_value
[10:36:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[10:36:38] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[10:36:38] [PASSED] drm_test_check_mode_valid
[10:36:38] [PASSED] drm_test_check_mode_valid_reject
[10:36:38] [PASSED] drm_test_check_mode_valid_reject_rate
[10:36:38] [PASSED] drm_test_check_mode_valid_reject_max_clock
[10:36:38] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[10:36:38] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[10:36:38] [PASSED] drm_test_check_infoframes
[10:36:38] [PASSED] drm_test_check_reject_avi_infoframe
[10:36:38] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[10:36:38] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[10:36:38] [PASSED] drm_test_check_reject_audio_infoframe
[10:36:38] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[10:36:38] ================= drm_managed (2 subtests) =================
[10:36:38] [PASSED] drm_test_managed_release_action
[10:36:38] [PASSED] drm_test_managed_run_action
[10:36:38] =================== [PASSED] drm_managed ===================
[10:36:38] =================== drm_mm (6 subtests) ====================
[10:36:38] [PASSED] drm_test_mm_init
[10:36:38] [PASSED] drm_test_mm_debug
[10:36:38] [PASSED] drm_test_mm_align32
[10:36:38] [PASSED] drm_test_mm_align64
[10:36:38] [PASSED] drm_test_mm_lowest
[10:36:38] [PASSED] drm_test_mm_highest
[10:36:38] ===================== [PASSED] drm_mm ======================
[10:36:38] ============= drm_modes_analog_tv (5 subtests) =============
[10:36:38] [PASSED] drm_test_modes_analog_tv_mono_576i
[10:36:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[10:36:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[10:36:38] [PASSED] drm_test_modes_analog_tv_pal_576i
[10:36:38] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[10:36:38] =============== [PASSED] drm_modes_analog_tv ===============
[10:36:38] ============== drm_plane_helper (2 subtests) ===============
[10:36:38] =============== drm_test_check_plane_state  ================
[10:36:38] [PASSED] clipping_simple
[10:36:38] [PASSED] clipping_rotate_reflect
[10:36:38] [PASSED] positioning_simple
[10:36:38] [PASSED] upscaling
[10:36:38] [PASSED] downscaling
[10:36:38] [PASSED] rounding1
[10:36:38] [PASSED] rounding2
[10:36:38] [PASSED] rounding3
[10:36:38] [PASSED] rounding4
[10:36:38] =========== [PASSED] drm_test_check_plane_state ============
[10:36:38] =========== drm_test_check_invalid_plane_state  ============
[10:36:38] [PASSED] positioning_invalid
[10:36:38] [PASSED] upscaling_invalid
[10:36:38] [PASSED] downscaling_invalid
[10:36:38] ======= [PASSED] drm_test_check_invalid_plane_state ========
[10:36:38] ================ [PASSED] drm_plane_helper =================
[10:36:38] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[10:36:38] ====== drm_test_connector_helper_tv_get_modes_check  =======
[10:36:38] [PASSED] None
[10:36:38] [PASSED] PAL
[10:36:38] [PASSED] NTSC
[10:36:38] [PASSED] Both, NTSC Default
[10:36:38] [PASSED] Both, PAL Default
[10:36:38] [PASSED] Both, NTSC Default, with PAL on command-line
[10:36:38] [PASSED] Both, PAL Default, with NTSC on command-line
[10:36:38] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[10:36:38] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[10:36:38] ================== drm_rect (9 subtests) ===================
[10:36:38] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[10:36:38] [PASSED] drm_test_rect_clip_scaled_not_clipped
[10:36:38] [PASSED] drm_test_rect_clip_scaled_clipped
[10:36:38] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[10:36:38] ================= drm_test_rect_intersect  =================
[10:36:38] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[10:36:38] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[10:36:38] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[10:36:38] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[10:36:38] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[10:36:38] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[10:36:38] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[10:36:38] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[10:36:38] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[10:36:38] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[10:36:38] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[10:36:38] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[10:36:38] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[10:36:38] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[10:36:38] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[10:36:38] ============= [PASSED] drm_test_rect_intersect =============
[10:36:38] ================ drm_test_rect_calc_hscale  ================
[10:36:38] [PASSED] normal use
[10:36:38] [PASSED] out of max range
[10:36:38] [PASSED] out of min range
[10:36:38] [PASSED] zero dst
[10:36:38] [PASSED] negative src
[10:36:38] [PASSED] negative dst
[10:36:38] ============ [PASSED] drm_test_rect_calc_hscale ============
[10:36:38] ================ drm_test_rect_calc_vscale  ================
[10:36:38] [PASSED] normal use
[10:36:38] [PASSED] out of max range
[10:36:38] [PASSED] out of min range
[10:36:38] [PASSED] zero dst
[10:36:38] [PASSED] negative src
[10:36:38] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[10:36:38] ============ [PASSED] drm_test_rect_calc_vscale ============
[10:36:38] ================== drm_test_rect_rotate  ===================
[10:36:38] [PASSED] reflect-x
[10:36:38] [PASSED] reflect-y
[10:36:38] [PASSED] rotate-0
[10:36:38] [PASSED] rotate-90
[10:36:38] [PASSED] rotate-180
[10:36:38] [PASSED] rotate-270
[10:36:38] ============== [PASSED] drm_test_rect_rotate ===============
[10:36:38] ================ drm_test_rect_rotate_inv  =================
[10:36:38] [PASSED] reflect-x
[10:36:38] [PASSED] reflect-y
[10:36:38] [PASSED] rotate-0
[10:36:38] [PASSED] rotate-90
[10:36:38] [PASSED] rotate-180
[10:36:38] [PASSED] rotate-270
[10:36:38] ============ [PASSED] drm_test_rect_rotate_inv =============
[10:36:38] ==================== [PASSED] drm_rect =====================
[10:36:38] ============ drm_sysfb_modeset_test (1 subtest) ============
[10:36:38] ============ drm_test_sysfb_build_fourcc_list  =============
[10:36:38] [PASSED] no native formats
[10:36:38] [PASSED] XRGB8888 as native format
[10:36:38] [PASSED] remove duplicates
[10:36:38] [PASSED] convert alpha formats
[10:36:38] [PASSED] random formats
[10:36:38] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[10:36:38] ============= [PASSED] drm_sysfb_modeset_test ==============
[10:36:38] ================== drm_fixp (2 subtests) ===================
[10:36:38] [PASSED] drm_test_int2fixp
[10:36:38] [PASSED] drm_test_sm2fixp
[10:36:38] ==================== [PASSED] drm_fixp =====================
[10:36:38] ============================================================
[10:36:38] Testing complete. Ran 621 tests: passed: 621
[10:36:38] Elapsed time: 26.184s total, 1.697s configuring, 24.320s building, 0.133s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[10:36:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:36:40] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:36:49] Starting KUnit Kernel (1/1)...
[10:36:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:36:49] ================= ttm_device (5 subtests) ==================
[10:36:49] [PASSED] ttm_device_init_basic
[10:36:49] [PASSED] ttm_device_init_multiple
[10:36:49] [PASSED] ttm_device_fini_basic
[10:36:49] [PASSED] ttm_device_init_no_vma_man
[10:36:49] ================== ttm_device_init_pools  ==================
[10:36:49] [PASSED] No DMA allocations, no DMA32 required
[10:36:49] [PASSED] DMA allocations, DMA32 required
[10:36:49] [PASSED] No DMA allocations, DMA32 required
[10:36:49] [PASSED] DMA allocations, no DMA32 required
[10:36:49] ============== [PASSED] ttm_device_init_pools ==============
[10:36:49] =================== [PASSED] ttm_device ====================
[10:36:49] ================== ttm_pool (8 subtests) ===================
[10:36:49] ================== ttm_pool_alloc_basic  ===================
[10:36:49] [PASSED] One page
[10:36:49] [PASSED] More than one page
[10:36:49] [PASSED] Above the allocation limit
[10:36:49] [PASSED] One page, with coherent DMA mappings enabled
[10:36:49] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:36:49] ============== [PASSED] ttm_pool_alloc_basic ===============
[10:36:49] ============== ttm_pool_alloc_basic_dma_addr  ==============
[10:36:49] [PASSED] One page
[10:36:49] [PASSED] More than one page
[10:36:49] [PASSED] Above the allocation limit
[10:36:49] [PASSED] One page, with coherent DMA mappings enabled
[10:36:49] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:36:49] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[10:36:49] [PASSED] ttm_pool_alloc_order_caching_match
[10:36:49] [PASSED] ttm_pool_alloc_caching_mismatch
[10:36:49] [PASSED] ttm_pool_alloc_order_mismatch
[10:36:49] [PASSED] ttm_pool_free_dma_alloc
[10:36:49] [PASSED] ttm_pool_free_no_dma_alloc
[10:36:49] [PASSED] ttm_pool_fini_basic
[10:36:49] ==================== [PASSED] ttm_pool =====================
[10:36:49] ================ ttm_resource (8 subtests) =================
[10:36:49] ================= ttm_resource_init_basic  =================
[10:36:49] [PASSED] Init resource in TTM_PL_SYSTEM
[10:36:49] [PASSED] Init resource in TTM_PL_VRAM
[10:36:49] [PASSED] Init resource in a private placement
[10:36:49] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[10:36:49] ============= [PASSED] ttm_resource_init_basic =============
[10:36:49] [PASSED] ttm_resource_init_pinned
[10:36:49] [PASSED] ttm_resource_fini_basic
[10:36:49] [PASSED] ttm_resource_manager_init_basic
[10:36:49] [PASSED] ttm_resource_manager_usage_basic
[10:36:49] [PASSED] ttm_resource_manager_set_used_basic
[10:36:49] [PASSED] ttm_sys_man_alloc_basic
[10:36:49] [PASSED] ttm_sys_man_free_basic
[10:36:49] ================== [PASSED] ttm_resource ===================
[10:36:49] =================== ttm_tt (15 subtests) ===================
[10:36:49] ==================== ttm_tt_init_basic  ====================
[10:36:49] [PASSED] Page-aligned size
[10:36:49] [PASSED] Extra pages requested
[10:36:49] ================ [PASSED] ttm_tt_init_basic ================
[10:36:49] [PASSED] ttm_tt_init_misaligned
[10:36:49] [PASSED] ttm_tt_fini_basic
[10:36:49] [PASSED] ttm_tt_fini_sg
[10:36:49] [PASSED] ttm_tt_fini_shmem
[10:36:49] [PASSED] ttm_tt_create_basic
[10:36:49] [PASSED] ttm_tt_create_invalid_bo_type
[10:36:49] [PASSED] ttm_tt_create_ttm_exists
[10:36:49] [PASSED] ttm_tt_create_failed
[10:36:49] [PASSED] ttm_tt_destroy_basic
[10:36:49] [PASSED] ttm_tt_populate_null_ttm
[10:36:49] [PASSED] ttm_tt_populate_populated_ttm
[10:36:49] [PASSED] ttm_tt_unpopulate_basic
[10:36:49] [PASSED] ttm_tt_unpopulate_empty_ttm
[10:36:49] [PASSED] ttm_tt_swapin_basic
[10:36:49] ===================== [PASSED] ttm_tt ======================
[10:36:49] =================== ttm_bo (14 subtests) ===================
[10:36:49] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[10:36:49] [PASSED] Cannot be interrupted and sleeps
[10:36:49] [PASSED] Cannot be interrupted, locks straight away
[10:36:49] [PASSED] Can be interrupted, sleeps
[10:36:49] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[10:36:49] [PASSED] ttm_bo_reserve_locked_no_sleep
[10:36:49] [PASSED] ttm_bo_reserve_no_wait_ticket
[10:36:49] [PASSED] ttm_bo_reserve_double_resv
[10:36:49] [PASSED] ttm_bo_reserve_interrupted
[10:36:49] [PASSED] ttm_bo_reserve_deadlock
[10:36:49] [PASSED] ttm_bo_unreserve_basic
[10:36:49] [PASSED] ttm_bo_unreserve_pinned
[10:36:49] [PASSED] ttm_bo_unreserve_bulk
[10:36:49] [PASSED] ttm_bo_fini_basic
[10:36:49] [PASSED] ttm_bo_fini_shared_resv
[10:36:49] [PASSED] ttm_bo_pin_basic
[10:36:49] [PASSED] ttm_bo_pin_unpin_resource
[10:36:49] [PASSED] ttm_bo_multiple_pin_one_unpin
[10:36:49] ===================== [PASSED] ttm_bo ======================
[10:36:49] ============== ttm_bo_validate (21 subtests) ===============
[10:36:49] ============== ttm_bo_init_reserved_sys_man  ===============
[10:36:49] [PASSED] Buffer object for userspace
[10:36:49] [PASSED] Kernel buffer object
[10:36:49] [PASSED] Shared buffer object
[10:36:49] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[10:36:49] ============== ttm_bo_init_reserved_mock_man  ==============
[10:36:49] [PASSED] Buffer object for userspace
[10:36:49] [PASSED] Kernel buffer object
[10:36:49] [PASSED] Shared buffer object
[10:36:49] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[10:36:49] [PASSED] ttm_bo_init_reserved_resv
[10:36:49] ================== ttm_bo_validate_basic  ==================
[10:36:49] [PASSED] Buffer object for userspace
[10:36:49] [PASSED] Kernel buffer object
[10:36:49] [PASSED] Shared buffer object
[10:36:49] ============== [PASSED] ttm_bo_validate_basic ==============
[10:36:49] [PASSED] ttm_bo_validate_invalid_placement
[10:36:49] ============= ttm_bo_validate_same_placement  ==============
[10:36:49] [PASSED] System manager
[10:36:49] [PASSED] VRAM manager
[10:36:49] ========= [PASSED] ttm_bo_validate_same_placement ==========
[10:36:49] [PASSED] ttm_bo_validate_failed_alloc
[10:36:49] [PASSED] ttm_bo_validate_pinned
[10:36:49] [PASSED] ttm_bo_validate_busy_placement
[10:36:49] ================ ttm_bo_validate_multihop  =================
[10:36:49] [PASSED] Buffer object for userspace
[10:36:49] [PASSED] Kernel buffer object
[10:36:49] [PASSED] Shared buffer object
[10:36:49] ============ [PASSED] ttm_bo_validate_multihop =============
[10:36:49] ========== ttm_bo_validate_no_placement_signaled  ==========
[10:36:49] [PASSED] Buffer object in system domain, no page vector
[10:36:49] [PASSED] Buffer object in system domain with an existing page vector
[10:36:49] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[10:36:49] ======== ttm_bo_validate_no_placement_not_signaled  ========
[10:36:49] [PASSED] Buffer object for userspace
[10:36:49] [PASSED] Kernel buffer object
[10:36:49] [PASSED] Shared buffer object
[10:36:49] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[10:36:49] [PASSED] ttm_bo_validate_move_fence_signaled
[10:36:49] ========= ttm_bo_validate_move_fence_not_signaled  =========
[10:36:49] [PASSED] Waits for GPU
[10:36:49] [PASSED] Tries to lock straight away
[10:36:49] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[10:36:49] [PASSED] ttm_bo_validate_happy_evict
[10:36:49] [PASSED] ttm_bo_validate_all_pinned_evict
[10:36:49] [PASSED] ttm_bo_validate_allowed_only_evict
[10:36:49] [PASSED] ttm_bo_validate_deleted_evict
[10:36:49] [PASSED] ttm_bo_validate_busy_domain_evict
[10:36:49] [PASSED] ttm_bo_validate_evict_gutting
[10:36:49] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[10:36:49] ================= [PASSED] ttm_bo_validate =================
[10:36:49] ============================================================
[10:36:49] Testing complete. Ran 101 tests: passed: 101
[10:36:49] Elapsed time: 11.167s total, 1.688s configuring, 9.212s building, 0.229s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ Xe.CI.BAT: failure for drm/i915/display: convert a bunch of W/A checks to the new framework (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2766 bytes --]

== Series Details ==

Series: drm/i915/display: convert a bunch of W/A checks to the new framework (rev4)
URL   : https://patchwork.freedesktop.org/series/161555/
State : failure

== Summary ==

CI Bug Log - changes from xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9_BAT -> xe-pw-161555v4_BAT
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-161555v4_BAT absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-161555v4_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (14 -> 13)
------------------------------

  Additional (1): bat-pvc-2 
  Missing    (2): bat-atsm-2 bat-bmg-3 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-161555v4_BAT:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_module_load@load:
    - bat-pvc-2:          NOTRUN -> [ABORT][1]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/bat-pvc-2/igt@xe_module_load@load.html

  
Known issues
------------

  Here are the changes found in xe-pw-161555v4_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1:
    - bat-adlp-7:         [PASS][2] -> [DMESG-WARN][3] ([Intel XE#7483])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html

  
#### Possible fixes ####

  * igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
    - bat-adlp-7:         [DMESG-WARN][4] ([Intel XE#7483]) -> [PASS][5]
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html

  
  [Intel XE#7483]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7483


Build changes
-------------

  * Linux: xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9 -> xe-pw-161555v4

  IGT_8782: eac3b04d1f76b82ac3a183fb293c44e9185d8dba @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9: 79792a2fc5d37b5446e543f1de05158ab0f551c9
  xe-pw-161555v4: 161555v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/index.html

[-- Attachment #2: Type: text/html, Size: 3475 bytes --]

✗ Xe.CI.FULL: failure for drm/i915/display: convert a bunch of W/A checks to the new framework (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 44216 bytes --]

== Series Details ==

Series: drm/i915/display: convert a bunch of W/A checks to the new framework (rev4)
URL   : https://patchwork.freedesktop.org/series/161555/
State : failure

== Summary ==

CI Bug Log - changes from xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9_FULL -> xe-pw-161555v4_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-161555v4_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-161555v4_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-161555v4_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
    - shard-bmg:          [PASS][1] -> [DMESG-FAIL][2] +1 other test dmesg-fail
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][3] -> [FAIL][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-3/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
    - shard-bmg:          [PASS][5] -> [DMESG-WARN][6] +2 other tests dmesg-warn
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html

  
Known issues
------------

  Here are the changes found in xe-pw-161555v4_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_atomic_transition@modeset-transition-nonblocking-fencing@2x-outputs:
    - shard-bmg:          [PASS][7] -> [DMESG-FAIL][8] ([Intel XE#5545]) +1 other test dmesg-fail
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing@2x-outputs.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing@2x-outputs.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#1124])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-8/igt@kms_big_fb@yf-tiled-64bpp-rotate-0.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2887]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-5/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs@pipe-c-hdmi-a-3:
    - shard-bmg:          [PASS][11] -> [FAIL][12] ([Intel XE#6983]) +2 other tests fail
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs@pipe-c-hdmi-a-3.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs@pipe-c-hdmi-a-3.html

  * igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2252]) +2 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-5/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html

  * igt@kms_content_protection@atomic-hdcp14:
    - shard-bmg:          NOTRUN -> [FAIL][14] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-5/igt@kms_content_protection@atomic-hdcp14.html

  * igt@kms_content_protection@dp-mst-type-0-suspend-resume:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#6974])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-5/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html

  * igt@kms_cursor_crc@cursor-rapid-movement-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2320])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-8/igt@kms_cursor_crc@cursor-rapid-movement-256x85.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#2244])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-8/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-bmg:          [PASS][18] -> [INCOMPLETE][19] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-10/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-6/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#4141]) +2 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#7061] / [Intel XE#7356])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-msflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2311]) +5 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2313]) +5 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_pm_rpm@i2c:
    - shard-bmg:          [PASS][25] -> [SKIP][26] ([Intel XE#6693]) +1 other test skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_pm_rpm@i2c.html
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_pm_rpm@i2c.html

  * igt@kms_rotation_crc@bad-tiling:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-5/igt@kms_rotation_crc@bad-tiling.html

  * igt@kms_setmode@basic:
    - shard-bmg:          [PASS][28] -> [FAIL][29] ([Intel XE#6361]) +2 other tests fail
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-9/igt@kms_setmode@basic.html
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-10/igt@kms_setmode@basic.html

  * igt@kms_setmode@basic@pipe-b-edp-1:
    - shard-lnl:          [PASS][30] -> [FAIL][31] ([Intel XE#6361]) +2 other tests fail
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-lnl-8/igt@kms_setmode@basic@pipe-b-edp-1.html
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-lnl-1/igt@kms_setmode@basic@pipe-b-edp-1.html

  * igt@kms_sharpness_filter@filter-strength:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#6503])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-5/igt@kms_sharpness_filter@filter-strength.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [PASS][33] -> [INCOMPLETE][34] ([Intel XE#6321])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-3/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_evict@evict-cm-threads-small-multi-queue:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#7140])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-10/igt@xe_evict@evict-cm-threads-small-multi-queue.html

  * igt@xe_exec_balancer@many-execqueues-cm-virtual-userptr-rebind:
    - shard-bmg:          [PASS][36] -> [SKIP][37] ([Intel XE#6703]) +267 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@xe_exec_balancer@many-execqueues-cm-virtual-userptr-rebind.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@xe_exec_balancer@many-execqueues-cm-virtual-userptr-rebind.html

  * igt@xe_exec_balancer@many-parallel-userptr-invalidate-race:
    - shard-bmg:          [PASS][38] -> [SKIP][39] ([Intel XE#6557] / [Intel XE#6703]) +3 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@xe_exec_balancer@many-parallel-userptr-invalidate-race.html
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@xe_exec_balancer@many-parallel-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-once-null-defer-mmap:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-10/igt@xe_exec_basic@multigpu-once-null-defer-mmap.html

  * igt@xe_exec_fault_mode@once-multi-queue-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#7136])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-5/igt@xe_exec_fault_mode@once-multi-queue-userptr.html

  * igt@xe_exec_multi_queue@two-queues-basic-smem:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#6874]) +4 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-5/igt@xe_exec_multi_queue@two-queues-basic-smem.html

  * igt@xe_exec_system_allocator@many-stride-malloc-madvise:
    - shard-bmg:          [PASS][43] -> [DMESG-FAIL][44] ([Intel XE#5213] / [Intel XE#5545] / [Intel XE#6652]) +1 other test dmesg-fail
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@xe_exec_system_allocator@many-stride-malloc-madvise.html
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-3/igt@xe_exec_system_allocator@many-stride-malloc-madvise.html

  * igt@xe_exec_threads@threads-many-queues:
    - shard-bmg:          NOTRUN -> [FAIL][45] ([Intel XE#7166])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-5/igt@xe_exec_threads@threads-many-queues.html

  * igt@xe_exec_threads@threads-multi-queue-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#7138])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-rebind.html

  * igt@xe_multigpu_svm@mgpu-migration-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#6964])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-5/igt@xe_multigpu_svm@mgpu-migration-prefetch.html

  * igt@xe_oa@mmio-triggered-reports-read:
    - shard-bmg:          NOTRUN -> [FAIL][48] ([Intel XE#7522] / [Intel XE#7555])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-8/igt@xe_oa@mmio-triggered-reports-read.html

  * igt@xe_oa@mmio-triggered-reports-read@oam-3:
    - shard-bmg:          NOTRUN -> [FAIL][49] ([Intel XE#7522])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-8/igt@xe_oa@mmio-triggered-reports-read@oam-3.html

  * igt@xe_pm_residency@aspm_link_residency:
    - shard-bmg:          [PASS][50] -> [SKIP][51] ([Intel XE#7258])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-3/igt@xe_pm_residency@aspm_link_residency.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-5/igt@xe_pm_residency@aspm_link_residency.html

  * igt@xe_query@multigpu-query-invalid-query:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#944])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-8/igt@xe_query@multigpu-query-invalid-query.html

  
#### Possible fixes ####

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-edp-1:
    - shard-lnl:          [FAIL][53] ([Intel XE#3718] / [Intel XE#7265]) -> [PASS][54] +1 other test pass
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-lnl-6/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-edp-1.html
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-lnl-7/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-edp-1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [FAIL][55] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][56] +1 other test pass
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@plain-flip-fb-recreate:
    - shard-bmg:          [DMESG-WARN][57] ([Intel XE#5208]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_flip@plain-flip-fb-recreate.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_flip@plain-flip-fb-recreate.html

  * igt@kms_flip@plain-flip-fb-recreate@c-dp2:
    - shard-bmg:          [DMESG-WARN][59] -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_flip@plain-flip-fb-recreate@c-dp2.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_flip@plain-flip-fb-recreate@c-dp2.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-lnl:          [FAIL][61] ([Intel XE#7340]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-lnl-5/igt@kms_pm_dc@dc5-psr.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-lnl-1/igt@kms_pm_dc@dc5-psr.html

  
#### Warnings ####

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
    - shard-bmg:          [SKIP][63] ([Intel XE#1124]) -> [SKIP][64] ([Intel XE#6703]) +3 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html

  * igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
    - shard-bmg:          [SKIP][65] ([Intel XE#2314] / [Intel XE#2894] / [Intel XE#7373]) -> [SKIP][66] ([Intel XE#6703])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-3/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html

  * igt@kms_bw@linear-tiling-1-displays-1920x1080p:
    - shard-bmg:          [SKIP][67] ([Intel XE#367] / [Intel XE#7354]) -> [SKIP][68] ([Intel XE#6703])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html

  * igt@kms_ccs@bad-aux-stride-yf-tiled-ccs:
    - shard-bmg:          [SKIP][69] ([Intel XE#2887]) -> [SKIP][70] ([Intel XE#6703]) +4 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_ccs@bad-aux-stride-yf-tiled-ccs.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_ccs@bad-aux-stride-yf-tiled-ccs.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
    - shard-bmg:          [SKIP][71] ([Intel XE#3432]) -> [SKIP][72] ([Intel XE#6703])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
    - shard-bmg:          [SKIP][73] ([Intel XE#2652]) -> [SKIP][74] ([Intel XE#6703])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html

  * igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k:
    - shard-bmg:          [SKIP][75] ([Intel XE#2252]) -> [SKIP][76] ([Intel XE#6703]) +2 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-3/igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-bmg:          [SKIP][77] ([Intel XE#2390] / [Intel XE#6974]) -> [SKIP][78] ([Intel XE#6703]) +1 other test skip
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_content_protection@dp-mst-type-1.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_cursor_crc@cursor-offscreen-max-size:
    - shard-bmg:          [SKIP][79] ([Intel XE#2320]) -> [SKIP][80] ([Intel XE#6703]) +1 other test skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_cursor_crc@cursor-offscreen-max-size.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_cursor_crc@cursor-offscreen-max-size.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-bmg:          [SKIP][81] ([Intel XE#2321] / [Intel XE#7355]) -> [SKIP][82] ([Intel XE#6703]) +1 other test skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_cursor_crc@cursor-onscreen-512x512.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-bmg:          [SKIP][83] ([Intel XE#2244]) -> [SKIP][84] ([Intel XE#6703])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_dsc@dsc-with-bpc-formats.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
    - shard-bmg:          [SKIP][85] ([Intel XE#4422] / [Intel XE#7442]) -> [SKIP][86] ([Intel XE#6703])
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html

  * igt@kms_fbcon_fbt@psr:
    - shard-bmg:          [SKIP][87] ([Intel XE#6126] / [Intel XE#776]) -> [SKIP][88] ([Intel XE#6703])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_fbcon_fbt@psr.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_fbcon_fbt@psr.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
    - shard-bmg:          [SKIP][89] ([Intel XE#7178] / [Intel XE#7351]) -> [SKIP][90] ([Intel XE#6703])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-bmg:          [SKIP][91] ([Intel XE#7178] / [Intel XE#7349]) -> [SKIP][92] ([Intel XE#6703])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-msflip-blt:
    - shard-bmg:          [SKIP][93] ([Intel XE#2311]) -> [SKIP][94] ([Intel XE#6703]) +10 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-msflip-blt.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          [SKIP][95] ([Intel XE#4141]) -> [SKIP][96] ([Intel XE#6703]) +7 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
    - shard-bmg:          [SKIP][97] ([Intel XE#4141]) -> [SKIP][98] ([Intel XE#6557] / [Intel XE#6703])
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-mmap-wc:
    - shard-bmg:          [SKIP][99] ([Intel XE#7061] / [Intel XE#7356]) -> [SKIP][100] ([Intel XE#6703]) +1 other test skip
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-mmap-wc.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          [SKIP][101] ([Intel XE#2313]) -> [SKIP][102] ([Intel XE#6703]) +13 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-bmg:          [SKIP][103] ([Intel XE#4298] / [Intel XE#5873]) -> [SKIP][104] ([Intel XE#6703])
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_joiner@basic-max-non-joiner.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-bmg:          [SKIP][105] ([Intel XE#6901]) -> [SKIP][106] ([Intel XE#6703])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_joiner@invalid-modeset-big-joiner.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier:
    - shard-bmg:          [SKIP][107] ([Intel XE#7283]) -> [SKIP][108] ([Intel XE#6703]) +1 other test skip
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-bmg:          [SKIP][109] ([Intel XE#7376] / [Intel XE#870]) -> [SKIP][110] ([Intel XE#6703])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_pm_backlight@fade-with-suspend.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-3/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-bmg:          [SKIP][111] ([Intel XE#3309] / [Intel XE#7368]) -> [SKIP][112] ([Intel XE#6703])
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_pm_dc@dc5-retention-flops.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          [SKIP][113] ([Intel XE#1489]) -> [SKIP][114] ([Intel XE#6703]) +4 other tests skip
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-bmg:          [SKIP][115] ([Intel XE#2387] / [Intel XE#7429]) -> [SKIP][116] ([Intel XE#6703])
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_psr2_su@page_flip-nv12.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@fbc-psr-suspend:
    - shard-bmg:          [SKIP][117] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][118] ([Intel XE#6703]) +4 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_psr@fbc-psr-suspend.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_psr@fbc-psr-suspend.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
    - shard-bmg:          [SKIP][119] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) -> [SKIP][120] ([Intel XE#6703])
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html

  * igt@kms_scaling_modes@scaling-mode-center:
    - shard-bmg:          [SKIP][121] ([Intel XE#2413]) -> [SKIP][122] ([Intel XE#6703])
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@kms_scaling_modes@scaling-mode-center.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_scaling_modes@scaling-mode-center.html

  * igt@kms_sharpness_filter@invalid-filter-with-plane:
    - shard-bmg:          [SKIP][123] ([Intel XE#6503]) -> [SKIP][124] ([Intel XE#6703])
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_sharpness_filter@invalid-filter-with-plane.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-3/igt@kms_sharpness_filter@invalid-filter-with-plane.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [FAIL][125] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][126] ([Intel XE#6703])
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][127] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][128] ([Intel XE#2509] / [Intel XE#7437])
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_create@multigpu-create-massive-size:
    - shard-bmg:          [SKIP][129] ([Intel XE#2504] / [Intel XE#7319] / [Intel XE#7350]) -> [SKIP][130] ([Intel XE#6703])
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@xe_create@multigpu-create-massive-size.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@xe_create@multigpu-create-massive-size.html

  * igt@xe_eudebug@basic-exec-queues-enable:
    - shard-bmg:          [SKIP][131] ([Intel XE#4837]) -> [SKIP][132] ([Intel XE#6703]) +4 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@xe_eudebug@basic-exec-queues-enable.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-3/igt@xe_eudebug@basic-exec-queues-enable.html

  * igt@xe_eudebug_online@pagefault-write:
    - shard-bmg:          [SKIP][133] ([Intel XE#4837] / [Intel XE#6665]) -> [SKIP][134] ([Intel XE#6703]) +2 other tests skip
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@xe_eudebug_online@pagefault-write.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@xe_eudebug_online@pagefault-write.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
    - shard-bmg:          [SKIP][135] ([Intel XE#2322] / [Intel XE#7372]) -> [SKIP][136] ([Intel XE#6703]) +3 other tests skip
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr:
    - shard-bmg:          [SKIP][137] ([Intel XE#7136]) -> [SKIP][138] ([Intel XE#6703]) +6 other tests skip
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-3/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr.html

  * igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-userptr:
    - shard-bmg:          [SKIP][139] ([Intel XE#6874]) -> [SKIP][140] ([Intel XE#6703]) +12 other tests skip
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-userptr.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-userptr.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind:
    - shard-bmg:          [SKIP][141] ([Intel XE#7138]) -> [SKIP][142] ([Intel XE#6703]) +6 other tests skip
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-bmg:          [ABORT][143] ([Intel XE#5466] / [Intel XE#6652]) -> [ABORT][144] ([Intel XE#5466])
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-9/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  * igt@xe_oa@mmio-triggered-reports:
    - shard-bmg:          [FAIL][145] ([Intel XE#7522] / [Intel XE#7555]) -> [SKIP][146] ([Intel XE#6703])
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@xe_oa@mmio-triggered-reports.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@xe_oa@mmio-triggered-reports.html

  * igt@xe_pm@d3cold-mmap-vram:
    - shard-bmg:          [SKIP][147] ([Intel XE#2284] / [Intel XE#7370]) -> [SKIP][148] ([Intel XE#6703])
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-8/igt@xe_pm@d3cold-mmap-vram.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@xe_pm@d3cold-mmap-vram.html

  * igt@xe_pxp@pxp-termination-key-update-post-suspend:
    - shard-bmg:          [SKIP][149] ([Intel XE#4733] / [Intel XE#7417]) -> [SKIP][150] ([Intel XE#6703]) +1 other test skip
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@xe_pxp@pxp-termination-key-update-post-suspend.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-2/igt@xe_pxp@pxp-termination-key-update-post-suspend.html

  * igt@xe_query@multigpu-query-mem-usage:
    - shard-bmg:          [SKIP][151] ([Intel XE#944]) -> [SKIP][152] ([Intel XE#6703]) +1 other test skip
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9/shard-bmg-2/igt@xe_query@multigpu-query-mem-usage.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/shard-bmg-3/igt@xe_query@multigpu-query-mem-usage.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2504
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
  [Intel XE#5213]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5213
  [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5873
  [Intel XE#6126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6126
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
  [Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652
  [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
  [Intel XE#6693]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6693
  [Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#6983]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6983
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
  [Intel XE#7166]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7166
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7258]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7258
  [Intel XE#7265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7265
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7319]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7319
  [Intel XE#7340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7340
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
  [Intel XE#7350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7350
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7354
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7368]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7368
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7373
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
  [Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
  [Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
  [Intel XE#7522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7522
  [Intel XE#7555]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7555
  [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9 -> xe-pw-161555v4

  IGT_8782: eac3b04d1f76b82ac3a183fb293c44e9185d8dba @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4673-79792a2fc5d37b5446e543f1de05158ab0f551c9: 79792a2fc5d37b5446e543f1de05158ab0f551c9
  xe-pw-161555v4: 161555v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161555v4/index.html

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