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* [PATCH] drm/xe/vf: Print assumed values of the MOCS entries if VF
@ 2024-11-15 21:00 Michal Wajdeczko
  2024-11-15 21:43 ` ✓ CI.Patch_applied: success for " Patchwork
                   ` (7 more replies)
  0 siblings, 8 replies; 10+ messages in thread
From: Michal Wajdeczko @ 2024-11-15 21:00 UTC (permalink / raw)
  To: intel-xe; +Cc: Michal Wajdeczko, Matt Roper

VF drivers can't access the MOCS registers so their values can't
be printed as part of the gt0/mocs debugfs attribute, but since
MOCS settings are part of the Bspec and SLA between PF and VFs,
we can print assumed MOCS values instead.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/xe/xe_mocs.c | 42 +++++++++++++++++++++++++++++-------
 1 file changed, 34 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_mocs.c b/drivers/gpu/drm/xe/xe_mocs.c
index 54d199b5cfb2..9ad5366f4370 100644
--- a/drivers/gpu/drm/xe/xe_mocs.c
+++ b/drivers/gpu/drm/xe/xe_mocs.c
@@ -257,6 +257,14 @@ static const struct xe_mocs_entry gen12_mocs_desc[] = {
 		   L3_1_UC)
 };
 
+static u32 get_entry_control(const struct xe_mocs_info *info, unsigned int index);
+static u32 get_combined_entry_l3cc(const struct xe_mocs_info *info, unsigned int index);
+
+static bool regs_are_not_available(struct xe_gt *gt)
+{
+	return IS_SRIOV_VF(gt_to_xe(gt));
+}
+
 static bool regs_are_mcr(struct xe_gt *gt)
 {
 	struct xe_device *xe = gt_to_xe(gt);
@@ -275,7 +283,9 @@ static void xelp_lncf_dump(struct xe_mocs_info *info, struct xe_gt *gt, struct d
 	drm_printf(p, "LNCFCMOCS[idx] = [ESC, SCC, L3CC] (value)\n\n");
 
 	for (i = 0, j = 0; i < (info->num_mocs_regs + 1) / 2; i++, j++) {
-		if (regs_are_mcr(gt))
+		if (regs_are_not_available(gt))
+			reg_val = get_combined_entry_l3cc(info, i);
+		else if (regs_are_mcr(gt))
 			reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_LNCFCMOCS(i));
 		else
 			reg_val = xe_mmio_read32(&gt->mmio, XELP_LNCFCMOCS(i));
@@ -307,7 +317,9 @@ static void xelp_mocs_dump(struct xe_mocs_info *info, unsigned int flags,
 		drm_printf(p, "GLOB_MOCS[idx] = [LeCC, TC, LRUM, AOM, RSC, SCC, PFM, SCF, CoS, SSE] (value)\n\n");
 
 		for (i = 0; i < info->num_mocs_regs; i++) {
-			if (regs_are_mcr(gt))
+			if (regs_are_not_available(gt))
+				reg_val = get_entry_control(info, i);
+			else if (regs_are_mcr(gt))
 				reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_GLOBAL_MOCS(i));
 			else
 				reg_val = xe_mmio_read32(&gt->mmio, XELP_GLOBAL_MOCS(i));
@@ -380,7 +392,9 @@ static void xehp_lncf_dump(struct xe_mocs_info *info, unsigned int flags,
 	drm_printf(p, "LNCFCMOCS[idx] = [UCL3LOOKUP, GLBGO, L3CC] (value)\n\n");
 
 	for (i = 0, j = 0; i < (info->num_mocs_regs + 1) / 2; i++, j++) {
-		if (regs_are_mcr(gt))
+		if (regs_are_not_available(gt))
+			reg_val = get_combined_entry_l3cc(info, i);
+		else if (regs_are_mcr(gt))
 			reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_LNCFCMOCS(i));
 		else
 			reg_val = xe_mmio_read32(&gt->mmio, XELP_LNCFCMOCS(i));
@@ -425,7 +439,9 @@ static void pvc_mocs_dump(struct xe_mocs_info *info, unsigned int flags, struct
 	drm_printf(p, "LNCFCMOCS[idx] = [ L3CC ] (value)\n\n");
 
 	for (i = 0, j = 0; i < (info->num_mocs_regs + 1) / 2; i++, j++) {
-		if (regs_are_mcr(gt))
+		if (regs_are_not_available(gt))
+			reg_val = get_combined_entry_l3cc(info, i);
+		else if (regs_are_mcr(gt))
 			reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_LNCFCMOCS(i));
 		else
 			reg_val = xe_mmio_read32(&gt->mmio, XELP_LNCFCMOCS(i));
@@ -507,7 +523,9 @@ static void mtl_mocs_dump(struct xe_mocs_info *info, unsigned int flags,
 	drm_printf(p, "GLOB_MOCS[idx] = [IG_PAT, L4_CACHE_POLICY] (value)\n\n");
 
 	for (i = 0; i < info->num_mocs_regs; i++) {
-		if (regs_are_mcr(gt))
+		if (regs_are_not_available(gt))
+			reg_val = get_entry_control(info, i);
+		else if (regs_are_mcr(gt))
 			reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_GLOBAL_MOCS(i));
 		else
 			reg_val = xe_mmio_read32(&gt->mmio, XELP_GLOBAL_MOCS(i));
@@ -550,7 +568,9 @@ static void xe2_mocs_dump(struct xe_mocs_info *info, unsigned int flags,
 	drm_printf(p, "GLOB_MOCS[idx] = [IG_PAT, L3_CLOS, L3_CACHE_POLICY, L4_CACHE_POLICY] (value)\n\n");
 
 	for (i = 0; i < info->num_mocs_regs; i++) {
-		if (regs_are_mcr(gt))
+		if (regs_are_not_available(gt))
+			reg_val = get_entry_control(info, i);
+		else if (regs_are_mcr(gt))
 			reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_GLOBAL_MOCS(i));
 		else
 			reg_val = xe_mmio_read32(&gt->mmio, XELP_GLOBAL_MOCS(i));
@@ -713,6 +733,13 @@ static u32 l3cc_combine(u16 low, u16 high)
 	return low | (u32)high << 16;
 }
 
+static u32 get_combined_entry_l3cc(const struct xe_mocs_info *info,
+				   unsigned int index)
+{
+	return l3cc_combine(get_entry_l3cc(info, 2 * index),
+			    get_entry_l3cc(info, 2 * index + 1));
+}
+
 static void init_l3cc_table(struct xe_gt *gt,
 			    const struct xe_mocs_info *info)
 {
@@ -722,8 +749,7 @@ static void init_l3cc_table(struct xe_gt *gt,
 	mocs_dbg(gt, "l3cc entries: %d\n", info->num_mocs_regs);
 
 	for (i = 0; i < (info->num_mocs_regs + 1) / 2; i++) {
-		l3cc = l3cc_combine(get_entry_l3cc(info, 2 * i),
-				    get_entry_l3cc(info, 2 * i + 1));
+		l3cc = get_combined_entry_l3cc(info, i);
 
 		mocs_dbg(gt, "LNCFCMOCS[%d] 0x%x 0x%x\n", i,
 			 XELP_LNCFCMOCS(i).addr, l3cc);
-- 
2.43.0


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Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
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2024-11-15 21:00 [PATCH] drm/xe/vf: Print assumed values of the MOCS entries if VF Michal Wajdeczko
2024-11-15 21:43 ` ✓ CI.Patch_applied: success for " Patchwork
2024-11-15 21:43 ` ✓ CI.checkpatch: " Patchwork
2024-11-15 21:44 ` ✓ CI.KUnit: " Patchwork
2024-11-15 22:02 ` ✓ CI.Build: " Patchwork
2024-11-15 22:02 ` ✗ CI.Hooks: failure " Patchwork
2024-11-15 22:04 ` ✓ CI.checksparse: success " Patchwork
2024-11-15 22:24 ` ✗ CI.BAT: failure " Patchwork
2024-11-18 16:56 ` [PATCH] " Matt Roper
2024-11-18 17:17   ` Michal Wajdeczko

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