* [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning
@ 2025-09-15 14:33 Nareshkumar Gollakoti
2025-09-17 6:37 ` Varun Gupta
2025-09-22 17:42 ` Michal Wajdeczko
0 siblings, 2 replies; 14+ messages in thread
From: Nareshkumar Gollakoti @ 2025-09-15 14:33 UTC (permalink / raw)
To: intel-xe; +Cc: naresh.kumar.g, tejas.upadhyay
Multi CCS mode can only be enabled when SRIOV is in PF mode with
no VFs provisioned.
Similarly, provisioning VFs is not allowed when Multi CCS mode is active.
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/xe_gt_ccs_mode.c | 7 ++++---
drivers/gpu/drm/xe/xe_gt_ccs_mode.h | 10 ++++++++++
drivers/gpu/drm/xe/xe_pci_sriov.c | 7 +++++++
drivers/gpu/drm/xe/xe_sriov.h | 12 ++++++++++++
4 files changed, 33 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
index 50fffc9ebf62..39df801e9cd5 100644
--- a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
+++ b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
@@ -117,9 +117,10 @@ ccs_mode_store(struct device *kdev, struct device_attribute *attr,
u32 num_engines, num_slices;
int ret;
- if (IS_SRIOV(xe)) {
- xe_gt_dbg(gt, "Can't change compute mode when running as %s\n",
- xe_sriov_mode_to_string(xe_device_sriov_mode(xe)));
+ if (IS_SRIOV_VF_ENABLED(xe)) {
+ xe_gt_dbg(gt, "Can't change compute mode when running as %s / %s\n",
+ xe_sriov_mode_to_string(xe_device_sriov_mode(xe)),
+ "One or more VFs enabled");
return -EOPNOTSUPP;
}
diff --git a/drivers/gpu/drm/xe/xe_gt_ccs_mode.h b/drivers/gpu/drm/xe/xe_gt_ccs_mode.h
index f8779852cf0d..1a80a293daa2 100644
--- a/drivers/gpu/drm/xe/xe_gt_ccs_mode.h
+++ b/drivers/gpu/drm/xe/xe_gt_ccs_mode.h
@@ -20,5 +20,15 @@ static inline bool xe_gt_ccs_mode_enabled(const struct xe_gt *gt)
return hweight32(CCS_MASK(gt)) > 1;
}
+static inline bool xe_is_primary_gt_multi_ccs_enabled(struct xe_device *xe)
+{
+ /* multi CCS mode supported exclusively on GT0 */
+ struct xe_gt *gt = xe_device_get_gt(xe, 0);
+
+ return (gt->ccs_mode > 1);
+}
+
+#define IS_PRIMARY_GT_MULTI_CCS_ENABLED(xe) xe_is_primary_gt_multi_ccs_enabled(xe)
+
#endif
diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c b/drivers/gpu/drm/xe/xe_pci_sriov.c
index af05db07162e..96e3fd51b8f5 100644
--- a/drivers/gpu/drm/xe/xe_pci_sriov.c
+++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
@@ -19,6 +19,7 @@
#include "xe_sriov_pf.h"
#include "xe_sriov_pf_helpers.h"
#include "xe_sriov_printk.h"
+#include "xe_gt_ccs_mode.h"
static int pf_needs_provisioning(struct xe_gt *gt, unsigned int num_vfs)
{
@@ -153,6 +154,12 @@ static int pf_enable_vfs(struct xe_device *xe, int num_vfs)
xe_assert(xe, IS_SRIOV_PF(xe));
xe_assert(xe, num_vfs > 0);
xe_assert(xe, num_vfs <= total_vfs);
+
+ if (IS_PRIMARY_GT_MULTI_CCS_ENABLED(xe)) {
+ xe_sriov_info(xe, "Can't change the number of VFs while multi-CCS mode is enabled.");
+
+ return -EOPNOTSUPP;
+ }
xe_sriov_dbg(xe, "enabling %u VF%s\n", num_vfs, str_plural(num_vfs));
err = xe_sriov_pf_wait_ready(xe);
diff --git a/drivers/gpu/drm/xe/xe_sriov.h b/drivers/gpu/drm/xe/xe_sriov.h
index 6db45df55615..78019cee61fe 100644
--- a/drivers/gpu/drm/xe/xe_sriov.h
+++ b/drivers/gpu/drm/xe/xe_sriov.h
@@ -36,6 +36,16 @@ static inline bool xe_device_is_sriov_vf(const struct xe_device *xe)
return xe_device_sriov_mode(xe) == XE_SRIOV_MODE_VF;
}
+static inline bool xe_device_is_vf_enabled(const struct xe_device *xe)
+{
+ struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+
+ if (xe_device_is_sriov_vf(xe))
+ return true;
+
+ return (pci_num_vf(pdev) > 0);
+}
+
#ifdef CONFIG_PCI_IOV
#define IS_SRIOV_PF(xe) xe_device_is_sriov_pf(xe)
#else
@@ -45,4 +55,6 @@ static inline bool xe_device_is_sriov_vf(const struct xe_device *xe)
#define IS_SRIOV(xe) (IS_SRIOV_PF(xe) || IS_SRIOV_VF(xe))
+#define IS_SRIOV_VF_ENABLED(xe) xe_device_is_vf_enabled(xe)
+
#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning
2025-09-15 14:33 Nareshkumar Gollakoti
@ 2025-09-17 6:37 ` Varun Gupta
2025-09-22 17:42 ` Michal Wajdeczko
1 sibling, 0 replies; 14+ messages in thread
From: Varun Gupta @ 2025-09-17 6:37 UTC (permalink / raw)
To: igt-dev, naresh.kumar.g; +Cc: intel-xe
>Multi CCS mode can only be enabled when SRIOV is in PF mode with
>no VFs provisioned.
>Similarly, provisioning VFs is not allowed when Multi CCS mode is active.
>
>Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
>---
> drivers/gpu/drm/xe/xe_gt_ccs_mode.c | 7 ++++---
> drivers/gpu/drm/xe/xe_gt_ccs_mode.h | 10 ++++++++++
> drivers/gpu/drm/xe/xe_pci_sriov.c | 7 +++++++
> drivers/gpu/drm/xe/xe_sriov.h | 12 ++++++++++++
> 4 files changed, 33 insertions(+), 3 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
>index 50fffc9ebf62..39df801e9cd5 100644
>--- a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
>+++ b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
>@@ -117,9 +117,10 @@ ccs_mode_store(struct device *kdev, struct device_attribute *attr,
> u32 num_engines, num_slices;
> int ret;
>
>- if (IS_SRIOV(xe)) {
>- xe_gt_dbg(gt, "Can't change compute mode when running as %s\n",
>- xe_sriov_mode_to_string(xe_device_sriov_mode(xe)));
>+ if (IS_SRIOV_VF_ENABLED(xe)) {
>+ xe_gt_dbg(gt, "Can't change compute mode when running as %s / %s\n",
>+ xe_sriov_mode_to_string(xe_device_sriov_mode(xe)),
>+ "One or more VFs enabled");
Consider using the conditional (ternary) operator to differentiate
between the two SR-IOV cases instead of hardcoding the second string.
> return -EOPNOTSUPP;
> }
>
>diff --git a/drivers/gpu/drm/xe/xe_gt_ccs_mode.h b/drivers/gpu/drm/xe/xe_gt_ccs_mode.h
>index f8779852cf0d..1a80a293daa2 100644
>--- a/drivers/gpu/drm/xe/xe_gt_ccs_mode.h
>+++ b/drivers/gpu/drm/xe/xe_gt_ccs_mode.h
>@@ -20,5 +20,15 @@ static inline bool xe_gt_ccs_mode_enabled(const struct xe_gt *gt)
> return hweight32(CCS_MASK(gt)) > 1;
> }
>
>+static inline bool xe_is_primary_gt_multi_ccs_enabled(struct xe_device *xe)
>+{
>+ /* multi CCS mode supported exclusively on GT0 */
%s:/multi/Multi
>+ struct xe_gt *gt = xe_device_get_gt(xe, 0);
>+
>+ return (gt->ccs_mode > 1);
>+}
>+
>+#define IS_PRIMARY_GT_MULTI_CCS_ENABLED(xe) xe_is_primary_gt_multi_ccs_enabled(xe)
Rename to IS_GT0_MULTI_CCS_ENABLED and xe_is_gt0_multi_ccs_enabled
>+
> #endif
>
>diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c b/drivers/gpu/drm/xe/xe_pci_sriov.c
>index af05db07162e..96e3fd51b8f5 100644
>--- a/drivers/gpu/drm/xe/xe_pci_sriov.c
>+++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
>@@ -19,6 +19,7 @@
> #include "xe_sriov_pf.h"
> #include "xe_sriov_pf_helpers.h"
> #include "xe_sriov_printk.h"
>+#include "xe_gt_ccs_mode.h"
>
> static int pf_needs_provisioning(struct xe_gt *gt, unsigned int num_vfs)
> {
>@@ -153,6 +154,12 @@ static int pf_enable_vfs(struct xe_device *xe, int num_vfs)
> xe_assert(xe, IS_SRIOV_PF(xe));
> xe_assert(xe, num_vfs > 0);
> xe_assert(xe, num_vfs <= total_vfs);
>+
>+ if (IS_PRIMARY_GT_MULTI_CCS_ENABLED(xe)) {
>+ xe_sriov_info(xe, "Can't change the number of VFs while multi-CCS mode is enabled.");
Use "Cannot enable VF's" instead of "Can't change number of VF's"
>+
>+ return -EOPNOTSUPP;
>+ }
> xe_sriov_dbg(xe, "enabling %u VF%s\n", num_vfs, str_plural(num_vfs));
>
> err = xe_sriov_pf_wait_ready(xe);
>diff --git a/drivers/gpu/drm/xe/xe_sriov.h b/drivers/gpu/drm/xe/xe_sriov.h
>index 6db45df55615..78019cee61fe 100644
>--- a/drivers/gpu/drm/xe/xe_sriov.h
>+++ b/drivers/gpu/drm/xe/xe_sriov.h
>@@ -36,6 +36,16 @@ static inline bool xe_device_is_sriov_vf(const struct xe_device *xe)
> return xe_device_sriov_mode(xe) == XE_SRIOV_MODE_VF;
> }
>
>+static inline bool xe_device_is_vf_enabled(const struct xe_device *xe)
>+{
>+ struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
>+
>+ if (xe_device_is_sriov_vf(xe))
>+ return true;
Maybe remove this check since next return checks for provisioned VF's
and return true even when SRIOV-VF mode
>+
>+ return (pci_num_vf(pdev) > 0);
>+}
>+
> #ifdef CONFIG_PCI_IOV
> #define IS_SRIOV_PF(xe) xe_device_is_sriov_pf(xe)
> #else
>@@ -45,4 +55,6 @@ static inline bool xe_device_is_sriov_vf(const struct xe_device *xe)
>
> #define IS_SRIOV(xe) (IS_SRIOV_PF(xe) || IS_SRIOV_VF(xe))
>
>+#define IS_SRIOV_VF_ENABLED(xe) xe_device_is_vf_enabled(xe)
>+
> #endif
Thanks,
Varun
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning
2025-09-15 14:33 Nareshkumar Gollakoti
2025-09-17 6:37 ` Varun Gupta
@ 2025-09-22 17:42 ` Michal Wajdeczko
1 sibling, 0 replies; 14+ messages in thread
From: Michal Wajdeczko @ 2025-09-22 17:42 UTC (permalink / raw)
To: Nareshkumar Gollakoti, intel-xe; +Cc: tejas.upadhyay
On 9/15/2025 4:33 PM, Nareshkumar Gollakoti wrote:
> Multi CCS mode can only be enabled when SRIOV is in PF mode with
> no VFs provisioned.
maybe: "Due to SLA agreement between PF and VFs, multi CCS mode can't
be enabled when VFs are already enabled.
> Similarly, provisioning VFs is not allowed when Multi CCS mode is active.
>
> Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
> ---
> drivers/gpu/drm/xe/xe_gt_ccs_mode.c | 7 ++++---
> drivers/gpu/drm/xe/xe_gt_ccs_mode.h | 10 ++++++++++
> drivers/gpu/drm/xe/xe_pci_sriov.c | 7 +++++++
> drivers/gpu/drm/xe/xe_sriov.h | 12 ++++++++++++
> 4 files changed, 33 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
> index 50fffc9ebf62..39df801e9cd5 100644
> --- a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
> +++ b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
> @@ -117,9 +117,10 @@ ccs_mode_store(struct device *kdev, struct device_attribute *attr,
> u32 num_engines, num_slices;
> int ret;
>
> - if (IS_SRIOV(xe)) {
> - xe_gt_dbg(gt, "Can't change compute mode when running as %s\n",
> - xe_sriov_mode_to_string(xe_device_sriov_mode(xe)));
> + if (IS_SRIOV_VF_ENABLED(xe)) {
> + xe_gt_dbg(gt, "Can't change compute mode when running as %s / %s\n",
> + xe_sriov_mode_to_string(xe_device_sriov_mode(xe)),
> + "One or more VFs enabled");
this should be treated separately, as there is different rationale:
- it can't be changed on PF with enabled VFs, as this would impact existing VFs
- it can't be changed by VFs, as they simply can't do that at all
> return -EOPNOTSUPP;
> }
what if right after this check here someone else enables VFs?
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_ccs_mode.h b/drivers/gpu/drm/xe/xe_gt_ccs_mode.h
> index f8779852cf0d..1a80a293daa2 100644
> --- a/drivers/gpu/drm/xe/xe_gt_ccs_mode.h
> +++ b/drivers/gpu/drm/xe/xe_gt_ccs_mode.h
> @@ -20,5 +20,15 @@ static inline bool xe_gt_ccs_mode_enabled(const struct xe_gt *gt)
> return hweight32(CCS_MASK(gt)) > 1;
> }
>
it's always good to add kerne-doc for public functions
> +static inline bool xe_is_primary_gt_multi_ccs_enabled(struct xe_device *xe)
it's quite bad to have "xe" level function in "gt" level file
maybe move to xe_device.h where other top level helpers are defined?
> +{
> + /* multi CCS mode supported exclusively on GT0 */
> + struct xe_gt *gt = xe_device_get_gt(xe, 0);
> +
> + return (gt->ccs_mode > 1);
no need to use ( )
> +}
> +
> +#define IS_PRIMARY_GT_MULTI_CCS_ENABLED(xe) xe_is_primary_gt_multi_ccs_enabled(xe)
do you really need macro ?
> +
> #endif
>
> diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c b/drivers/gpu/drm/xe/xe_pci_sriov.c
> index af05db07162e..96e3fd51b8f5 100644
> --- a/drivers/gpu/drm/xe/xe_pci_sriov.c
> +++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
> @@ -19,6 +19,7 @@
> #include "xe_sriov_pf.h"
> #include "xe_sriov_pf_helpers.h"
> #include "xe_sriov_printk.h"
> +#include "xe_gt_ccs_mode.h"
>
> static int pf_needs_provisioning(struct xe_gt *gt, unsigned int num_vfs)
> {
> @@ -153,6 +154,12 @@ static int pf_enable_vfs(struct xe_device *xe, int num_vfs)
> xe_assert(xe, IS_SRIOV_PF(xe));
> xe_assert(xe, num_vfs > 0);
> xe_assert(xe, num_vfs <= total_vfs);
> +
move this extra condition below dbg message below [1]
> + if (IS_PRIMARY_GT_MULTI_CCS_ENABLED(xe)) {
if (xe_multi_ccs_mode_enabled(xe))
> + xe_sriov_info(xe, "Can't change the number of VFs while multi-CCS mode is enabled.");
"Disable multi-CCS mode before enabling VF%s.\n"
> +
> + return -EOPNOTSUPP;
this error suggest some permanent condition, which is not true here
maybe -EBUSY or -EUSERS or -ECANCELED ?
> + }
> xe_sriov_dbg(xe, "enabling %u VF%s\n", num_vfs, str_plural(num_vfs));
[1] this supposed to be first dbg message
>
> err = xe_sriov_pf_wait_ready(xe);
> diff --git a/drivers/gpu/drm/xe/xe_sriov.h b/drivers/gpu/drm/xe/xe_sriov.h
> index 6db45df55615..78019cee61fe 100644
> --- a/drivers/gpu/drm/xe/xe_sriov.h
> +++ b/drivers/gpu/drm/xe/xe_sriov.h
> @@ -36,6 +36,16 @@ static inline bool xe_device_is_sriov_vf(const struct xe_device *xe)
> return xe_device_sriov_mode(xe) == XE_SRIOV_MODE_VF;
> }
>
> +static inline bool xe_device_is_vf_enabled(const struct xe_device *xe)
> +{
> + struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> +
> + if (xe_device_is_sriov_vf(xe))
> + return true;
> +
> + return (pci_num_vf(pdev) > 0);
> +}
please don't mix PF and VF flows
use IS_SRIOV_VF(xe) separately
and if needed add (with kernel-doc)
static inline bool xe_sriov_pf_has_vfs_enabled(const struct xe_device *xe)
to xe_sriov_pf_helpers.h
> +
> #ifdef CONFIG_PCI_IOV
> #define IS_SRIOV_PF(xe) xe_device_is_sriov_pf(xe)
> #else
> @@ -45,4 +55,6 @@ static inline bool xe_device_is_sriov_vf(const struct xe_device *xe)
>
> #define IS_SRIOV(xe) (IS_SRIOV_PF(xe) || IS_SRIOV_VF(xe))
>
> +#define IS_SRIOV_VF_ENABLED(xe) xe_device_is_vf_enabled(xe)
please no
> +
> #endif
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning
@ 2025-09-29 5:43 Nareshkumar Gollakoti
0 siblings, 0 replies; 14+ messages in thread
From: Nareshkumar Gollakoti @ 2025-09-29 5:43 UTC (permalink / raw)
To: intel-xe; +Cc: naresh.kumar.g, Michal.Wajdeczko, varun.gupta
Due to SLA agreement between PF and VFs, multi CCS mode can't
be enabled when VFs are already enabled.
Similarly, enabling VFs is disabled when multi ccs mode enabled.
v2:function xe_device_is_vf_enabled has been refactored to
xe_sriov_pf_has_vfs_enabled and moved to xe_sriov_pf_helper.h.
The code now distinctly checks for SR-IOV VF mode and
SR-IOV PF with VFs enabled.
Log messages have been updated to explicitly state the current mode.
The function xe_multi_ccs_mode_enabled is moved to xe_device.h
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/xe_device.h | 8 ++++++++
drivers/gpu/drm/xe/xe_gt_ccs_mode.c | 14 +++++++++++---
drivers/gpu/drm/xe/xe_pci_sriov.c | 6 ++++++
drivers/gpu/drm/xe/xe_sriov_pf_helpers.h | 12 ++++++++++++
4 files changed, 37 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 32cc6323b7f6..986f9cabb897 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -172,6 +172,14 @@ static inline bool xe_device_has_lmtt(struct xe_device *xe)
return IS_DGFX(xe);
}
+static inline bool xe_multi_ccs_mode_enabled(struct xe_device *xe)
+{
+ /* Multi CCS mode supported exclusively on GT0 */
+ struct xe_gt *gt = xe_device_get_gt(xe, 0);
+
+ return gt->ccs_mode > 1;
+}
+
u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size);
void xe_device_snapshot_print(struct xe_device *xe, struct drm_printer *p);
diff --git a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
index 50fffc9ebf62..584f3245fc7d 100644
--- a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
+++ b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
@@ -13,6 +13,7 @@
#include "xe_gt_sysfs.h"
#include "xe_mmio.h"
#include "xe_sriov.h"
+#include "xe_sriov_pf_helpers.h"
static void __xe_gt_apply_ccs_mode(struct xe_gt *gt, u32 num_engines)
{
@@ -117,9 +118,16 @@ ccs_mode_store(struct device *kdev, struct device_attribute *attr,
u32 num_engines, num_slices;
int ret;
- if (IS_SRIOV(xe)) {
- xe_gt_dbg(gt, "Can't change compute mode when running as %s\n",
- xe_sriov_mode_to_string(xe_device_sriov_mode(xe)));
+ /*
+ * Check if the device is:
+ * 1. Operating as an SR-IOV Virtual Function (VF), or
+ * 2. An SR-IOV Physical Function (PF) with one or more VFs enabled.
+ * Enabling multi CCS mode is not permitted in either scenario.
+ */
+ if (IS_SRIOV_VF(xe) || xe_sriov_pf_has_vfs_enabled(xe)) {
+ const char *mode_str = !strcmp(xe_sriov_mode_to_string(xe_device_sriov_mode(xe)),
+ "SR-IOV VF") ? "SR-IOV VF" : "SR-IOV PF with VFs Enabled";
+ xe_gt_dbg(gt, "Can't change compute mode when running as %s\n", mode_str);
return -EOPNOTSUPP;
}
diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c b/drivers/gpu/drm/xe/xe_pci_sriov.c
index af05db07162e..71c1d998ba82 100644
--- a/drivers/gpu/drm/xe/xe_pci_sriov.c
+++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
@@ -155,6 +155,12 @@ static int pf_enable_vfs(struct xe_device *xe, int num_vfs)
xe_assert(xe, num_vfs <= total_vfs);
xe_sriov_dbg(xe, "enabling %u VF%s\n", num_vfs, str_plural(num_vfs));
+ if (xe_multi_ccs_mode_enabled(xe)) {
+ xe_sriov_info(xe, "Disable multi-ccs mode before enabling VF's\n");
+
+ return -ECANCELED;
+ }
+
err = xe_sriov_pf_wait_ready(xe);
if (err)
goto out;
diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
index dd1df950b021..35aff4fab56b 100644
--- a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
+++ b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
@@ -43,4 +43,16 @@ static inline struct mutex *xe_sriov_pf_master_mutex(struct xe_device *xe)
return &xe->sriov.pf.master_lock;
}
+/**
+ * xe_sriov_pf_has_vfs_enabled() - Determines if the PF has any VFs enabled
+ *
+ * Return: true if one or more VFs are enabled on the PF, false otherwise.
+ */
+static inline bool xe_sriov_pf_has_vfs_enabled(const struct xe_device *xe)
+{
+ struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+
+ return pci_num_vf(pdev) > 0;
+}
+
#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning
@ 2025-09-29 8:36 Nareshkumar Gollakoti
2025-09-29 10:19 ` Upadhyay, Tejas
` (8 more replies)
0 siblings, 9 replies; 14+ messages in thread
From: Nareshkumar Gollakoti @ 2025-09-29 8:36 UTC (permalink / raw)
To: intel-xe; +Cc: naresh.kumar.g, Michal.Wajdeczko, varun.gupta
Due to SLA agreement between PF and VFs, multi CCS mode can't
be enabled when VFs are already enabled.
Similarly, enabling VFs is disabled when multi ccs mode enabled.
v2:function xe_device_is_vf_enabled has been refactored to
xe_sriov_pf_has_vfs_enabled and moved to xe_sriov_pf_helper.h.
The code now distinctly checks for SR-IOV VF mode and
SR-IOV PF with VFs enabled.
Log messages have been updated to explicitly state the current mode.
The function xe_multi_ccs_mode_enabled is moved to xe_device.h
v3: Described missed arg documentation for xe_sriov_pf_has_vfs_enabled
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/xe_device.h | 8 ++++++++
drivers/gpu/drm/xe/xe_gt_ccs_mode.c | 14 +++++++++++---
drivers/gpu/drm/xe/xe_pci_sriov.c | 6 ++++++
drivers/gpu/drm/xe/xe_sriov_pf_helpers.h | 13 +++++++++++++
4 files changed, 38 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 32cc6323b7f6..986f9cabb897 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -172,6 +172,14 @@ static inline bool xe_device_has_lmtt(struct xe_device *xe)
return IS_DGFX(xe);
}
+static inline bool xe_multi_ccs_mode_enabled(struct xe_device *xe)
+{
+ /* Multi CCS mode supported exclusively on GT0 */
+ struct xe_gt *gt = xe_device_get_gt(xe, 0);
+
+ return gt->ccs_mode > 1;
+}
+
u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size);
void xe_device_snapshot_print(struct xe_device *xe, struct drm_printer *p);
diff --git a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
index 50fffc9ebf62..584f3245fc7d 100644
--- a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
+++ b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
@@ -13,6 +13,7 @@
#include "xe_gt_sysfs.h"
#include "xe_mmio.h"
#include "xe_sriov.h"
+#include "xe_sriov_pf_helpers.h"
static void __xe_gt_apply_ccs_mode(struct xe_gt *gt, u32 num_engines)
{
@@ -117,9 +118,16 @@ ccs_mode_store(struct device *kdev, struct device_attribute *attr,
u32 num_engines, num_slices;
int ret;
- if (IS_SRIOV(xe)) {
- xe_gt_dbg(gt, "Can't change compute mode when running as %s\n",
- xe_sriov_mode_to_string(xe_device_sriov_mode(xe)));
+ /*
+ * Check if the device is:
+ * 1. Operating as an SR-IOV Virtual Function (VF), or
+ * 2. An SR-IOV Physical Function (PF) with one or more VFs enabled.
+ * Enabling multi CCS mode is not permitted in either scenario.
+ */
+ if (IS_SRIOV_VF(xe) || xe_sriov_pf_has_vfs_enabled(xe)) {
+ const char *mode_str = !strcmp(xe_sriov_mode_to_string(xe_device_sriov_mode(xe)),
+ "SR-IOV VF") ? "SR-IOV VF" : "SR-IOV PF with VFs Enabled";
+ xe_gt_dbg(gt, "Can't change compute mode when running as %s\n", mode_str);
return -EOPNOTSUPP;
}
diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c b/drivers/gpu/drm/xe/xe_pci_sriov.c
index af05db07162e..71c1d998ba82 100644
--- a/drivers/gpu/drm/xe/xe_pci_sriov.c
+++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
@@ -155,6 +155,12 @@ static int pf_enable_vfs(struct xe_device *xe, int num_vfs)
xe_assert(xe, num_vfs <= total_vfs);
xe_sriov_dbg(xe, "enabling %u VF%s\n", num_vfs, str_plural(num_vfs));
+ if (xe_multi_ccs_mode_enabled(xe)) {
+ xe_sriov_info(xe, "Disable multi-ccs mode before enabling VF's\n");
+
+ return -ECANCELED;
+ }
+
err = xe_sriov_pf_wait_ready(xe);
if (err)
goto out;
diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
index dd1df950b021..e26837091375 100644
--- a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
+++ b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
@@ -43,4 +43,17 @@ static inline struct mutex *xe_sriov_pf_master_mutex(struct xe_device *xe)
return &xe->sriov.pf.master_lock;
}
+/**
+ * xe_sriov_pf_has_vfs_enabled() - Determines if the PF has any VFs enabled
+ * @xe: ptr to xe_device
+ *
+ * Return: true if one or more VFs are enabled on the PF, false otherwise.
+ */
+static inline bool xe_sriov_pf_has_vfs_enabled(const struct xe_device *xe)
+{
+ struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+
+ return pci_num_vf(pdev) > 0;
+}
+
#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* RE: [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning
2025-09-29 8:36 [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Nareshkumar Gollakoti
@ 2025-09-29 10:19 ` Upadhyay, Tejas
2025-09-29 11:27 ` ✓ CI.KUnit: success for drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning (rev3) Patchwork
` (7 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Upadhyay, Tejas @ 2025-09-29 10:19 UTC (permalink / raw)
To: Kumar G, Naresh, intel-xe@lists.freedesktop.org
Cc: Kumar G, Naresh, Wajdeczko, Michal, Gupta, Varun
Please use --subject-prefix="V2" or respective version number in patch subject as well.
Tejas
> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of
> Nareshkumar Gollakoti
> Sent: 29 September 2025 14:06
> To: intel-xe@lists.freedesktop.org
> Cc: Kumar G, Naresh <naresh.kumar.g@intel.com>; Wajdeczko, Michal
> <Michal.Wajdeczko@intel.com>; Gupta, Varun <varun.gupta@intel.com>
> Subject: [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF
> Provisioning
>
> Due to SLA agreement between PF and VFs, multi CCS mode can't be enabled
> when VFs are already enabled.
> Similarly, enabling VFs is disabled when multi ccs mode enabled.
>
> v2:function xe_device_is_vf_enabled has been refactored to
> xe_sriov_pf_has_vfs_enabled and moved to xe_sriov_pf_helper.h.
> The code now distinctly checks for SR-IOV VF mode and SR-IOV PF with VFs
> enabled.
> Log messages have been updated to explicitly state the current mode.
> The function xe_multi_ccs_mode_enabled is moved to xe_device.h
>
> v3: Described missed arg documentation for xe_sriov_pf_has_vfs_enabled
>
> Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
> ---
> drivers/gpu/drm/xe/xe_device.h | 8 ++++++++
> drivers/gpu/drm/xe/xe_gt_ccs_mode.c | 14 +++++++++++---
> drivers/gpu/drm/xe/xe_pci_sriov.c | 6 ++++++
> drivers/gpu/drm/xe/xe_sriov_pf_helpers.h | 13 +++++++++++++
> 4 files changed, 38 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.h
> b/drivers/gpu/drm/xe/xe_device.h index 32cc6323b7f6..986f9cabb897
> 100644
> --- a/drivers/gpu/drm/xe/xe_device.h
> +++ b/drivers/gpu/drm/xe/xe_device.h
> @@ -172,6 +172,14 @@ static inline bool xe_device_has_lmtt(struct
> xe_device *xe)
> return IS_DGFX(xe);
> }
>
> +static inline bool xe_multi_ccs_mode_enabled(struct xe_device *xe) {
> + /* Multi CCS mode supported exclusively on GT0 */
> + struct xe_gt *gt = xe_device_get_gt(xe, 0);
> +
> + return gt->ccs_mode > 1;
> +}
> +
> u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size);
>
> void xe_device_snapshot_print(struct xe_device *xe, struct drm_printer *p);
> diff --git a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
> b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
> index 50fffc9ebf62..584f3245fc7d 100644
> --- a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
> +++ b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
> @@ -13,6 +13,7 @@
> #include "xe_gt_sysfs.h"
> #include "xe_mmio.h"
> #include "xe_sriov.h"
> +#include "xe_sriov_pf_helpers.h"
>
> static void __xe_gt_apply_ccs_mode(struct xe_gt *gt, u32 num_engines) {
> @@ -117,9 +118,16 @@ ccs_mode_store(struct device *kdev, struct
> device_attribute *attr,
> u32 num_engines, num_slices;
> int ret;
>
> - if (IS_SRIOV(xe)) {
> - xe_gt_dbg(gt, "Can't change compute mode when running as
> %s\n",
> -
> xe_sriov_mode_to_string(xe_device_sriov_mode(xe)));
> + /*
> + * Check if the device is:
> + * 1. Operating as an SR-IOV Virtual Function (VF), or
> + * 2. An SR-IOV Physical Function (PF) with one or more VFs enabled.
> + * Enabling multi CCS mode is not permitted in either scenario.
> + */
> + if (IS_SRIOV_VF(xe) || xe_sriov_pf_has_vfs_enabled(xe)) {
> + const char *mode_str =
> !strcmp(xe_sriov_mode_to_string(xe_device_sriov_mode(xe)),
> + "SR-IOV VF") ? "SR-IOV VF" : "SR-IOV
> PF with VFs Enabled";
> + xe_gt_dbg(gt, "Can't change compute mode when running as
> %s\n",
> +mode_str);
> return -EOPNOTSUPP;
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c
> b/drivers/gpu/drm/xe/xe_pci_sriov.c
> index af05db07162e..71c1d998ba82 100644
> --- a/drivers/gpu/drm/xe/xe_pci_sriov.c
> +++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
> @@ -155,6 +155,12 @@ static int pf_enable_vfs(struct xe_device *xe, int
> num_vfs)
> xe_assert(xe, num_vfs <= total_vfs);
> xe_sriov_dbg(xe, "enabling %u VF%s\n", num_vfs,
> str_plural(num_vfs));
>
> + if (xe_multi_ccs_mode_enabled(xe)) {
> + xe_sriov_info(xe, "Disable multi-ccs mode before enabling
> VF's\n");
> +
> + return -ECANCELED;
> + }
> +
> err = xe_sriov_pf_wait_ready(xe);
> if (err)
> goto out;
> diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
> b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
> index dd1df950b021..e26837091375 100644
> --- a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
> +++ b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
> @@ -43,4 +43,17 @@ static inline struct mutex
> *xe_sriov_pf_master_mutex(struct xe_device *xe)
> return &xe->sriov.pf.master_lock;
> }
>
> +/**
> + * xe_sriov_pf_has_vfs_enabled() - Determines if the PF has any VFs
> +enabled
> + * @xe: ptr to xe_device
> + *
> + * Return: true if one or more VFs are enabled on the PF, false otherwise.
> + */
> +static inline bool xe_sriov_pf_has_vfs_enabled(const struct xe_device
> +*xe) {
> + struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> +
> + return pci_num_vf(pdev) > 0;
> +}
> +
> #endif
> --
> 2.43.0
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ CI.KUnit: success for drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning (rev3)
2025-09-29 8:36 [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Nareshkumar Gollakoti
2025-09-29 10:19 ` Upadhyay, Tejas
@ 2025-09-29 11:27 ` Patchwork
2025-09-29 12:04 ` ✓ Xe.CI.BAT: " Patchwork
` (6 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2025-09-29 11:27 UTC (permalink / raw)
To: Nareshkumar Gollakoti; +Cc: intel-xe
== Series Details ==
Series: drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning (rev3)
URL : https://patchwork.freedesktop.org/series/154538/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[11:25:54] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:25:58] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:26:27] Starting KUnit Kernel (1/1)...
[11:26:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:26:27] ================== guc_buf (11 subtests) ===================
[11:26:27] [PASSED] test_smallest
[11:26:27] [PASSED] test_largest
[11:26:27] [PASSED] test_granular
[11:26:27] [PASSED] test_unique
[11:26:27] [PASSED] test_overlap
[11:26:27] [PASSED] test_reusable
[11:26:27] [PASSED] test_too_big
[11:26:27] [PASSED] test_flush
[11:26:27] [PASSED] test_lookup
[11:26:27] [PASSED] test_data
[11:26:27] [PASSED] test_class
[11:26:27] ===================== [PASSED] guc_buf =====================
[11:26:27] =================== guc_dbm (7 subtests) ===================
[11:26:27] [PASSED] test_empty
[11:26:27] [PASSED] test_default
[11:26:27] ======================== test_size ========================
[11:26:27] [PASSED] 4
[11:26:27] [PASSED] 8
[11:26:27] [PASSED] 32
[11:26:27] [PASSED] 256
[11:26:27] ==================== [PASSED] test_size ====================
[11:26:27] ======================= test_reuse ========================
[11:26:27] [PASSED] 4
[11:26:27] [PASSED] 8
[11:26:27] [PASSED] 32
[11:26:27] [PASSED] 256
[11:26:27] =================== [PASSED] test_reuse ====================
[11:26:27] =================== test_range_overlap ====================
[11:26:27] [PASSED] 4
[11:26:27] [PASSED] 8
[11:26:27] [PASSED] 32
[11:26:27] [PASSED] 256
[11:26:27] =============== [PASSED] test_range_overlap ================
[11:26:27] =================== test_range_compact ====================
[11:26:27] [PASSED] 4
[11:26:27] [PASSED] 8
[11:26:27] [PASSED] 32
[11:26:27] [PASSED] 256
[11:26:27] =============== [PASSED] test_range_compact ================
[11:26:27] ==================== test_range_spare =====================
[11:26:27] [PASSED] 4
[11:26:27] [PASSED] 8
[11:26:27] [PASSED] 32
[11:26:27] [PASSED] 256
[11:26:27] ================ [PASSED] test_range_spare =================
[11:26:27] ===================== [PASSED] guc_dbm =====================
[11:26:27] =================== guc_idm (6 subtests) ===================
[11:26:27] [PASSED] bad_init
[11:26:27] [PASSED] no_init
[11:26:27] [PASSED] init_fini
[11:26:27] [PASSED] check_used
[11:26:27] [PASSED] check_quota
[11:26:27] [PASSED] check_all
[11:26:27] ===================== [PASSED] guc_idm =====================
[11:26:27] ================== no_relay (3 subtests) ===================
[11:26:27] [PASSED] xe_drops_guc2pf_if_not_ready
[11:26:27] [PASSED] xe_drops_guc2vf_if_not_ready
[11:26:27] [PASSED] xe_rejects_send_if_not_ready
[11:26:27] ==================== [PASSED] no_relay =====================
[11:26:27] ================== pf_relay (14 subtests) ==================
[11:26:27] [PASSED] pf_rejects_guc2pf_too_short
[11:26:27] [PASSED] pf_rejects_guc2pf_too_long
[11:26:27] [PASSED] pf_rejects_guc2pf_no_payload
[11:26:27] [PASSED] pf_fails_no_payload
[11:26:27] [PASSED] pf_fails_bad_origin
[11:26:27] [PASSED] pf_fails_bad_type
[11:26:27] [PASSED] pf_txn_reports_error
[11:26:27] [PASSED] pf_txn_sends_pf2guc
[11:26:27] [PASSED] pf_sends_pf2guc
[11:26:27] [SKIPPED] pf_loopback_nop
[11:26:27] [SKIPPED] pf_loopback_echo
[11:26:27] [SKIPPED] pf_loopback_fail
[11:26:27] [SKIPPED] pf_loopback_busy
[11:26:27] [SKIPPED] pf_loopback_retry
[11:26:27] ==================== [PASSED] pf_relay =====================
[11:26:27] ================== vf_relay (3 subtests) ===================
[11:26:27] [PASSED] vf_rejects_guc2vf_too_short
[11:26:27] [PASSED] vf_rejects_guc2vf_too_long
[11:26:27] [PASSED] vf_rejects_guc2vf_no_payload
[11:26:27] ==================== [PASSED] vf_relay =====================
[11:26:27] ===================== lmtt (1 subtest) =====================
[11:26:27] ======================== test_ops =========================
[11:26:27] [PASSED] 2-level
[11:26:27] [PASSED] multi-level
[11:26:27] ==================== [PASSED] test_ops =====================
[11:26:27] ====================== [PASSED] lmtt =======================
[11:26:27] ================= pf_service (11 subtests) =================
[11:26:27] [PASSED] pf_negotiate_any
[11:26:27] [PASSED] pf_negotiate_base_match
[11:26:27] [PASSED] pf_negotiate_base_newer
[11:26:27] [PASSED] pf_negotiate_base_next
[11:26:27] [SKIPPED] pf_negotiate_base_older
[11:26:27] [PASSED] pf_negotiate_base_prev
[11:26:27] [PASSED] pf_negotiate_latest_match
[11:26:27] [PASSED] pf_negotiate_latest_newer
[11:26:27] [PASSED] pf_negotiate_latest_next
[11:26:27] [SKIPPED] pf_negotiate_latest_older
[11:26:27] [SKIPPED] pf_negotiate_latest_prev
[11:26:27] =================== [PASSED] pf_service ====================
[11:26:27] ================= xe_guc_g2g (2 subtests) ==================
[11:26:27] ============== xe_live_guc_g2g_kunit_default ==============
[11:26:27] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[11:26:27] ============== xe_live_guc_g2g_kunit_allmem ===============
[11:26:27] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[11:26:27] =================== [SKIPPED] xe_guc_g2g ===================
[11:26:27] =================== xe_mocs (2 subtests) ===================
[11:26:27] ================ xe_live_mocs_kernel_kunit ================
[11:26:27] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[11:26:27] ================ xe_live_mocs_reset_kunit =================
[11:26:27] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[11:26:27] ==================== [SKIPPED] xe_mocs =====================
[11:26:27] ================= xe_migrate (2 subtests) ==================
[11:26:27] ================= xe_migrate_sanity_kunit =================
[11:26:27] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[11:26:27] ================== xe_validate_ccs_kunit ==================
[11:26:27] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[11:26:27] =================== [SKIPPED] xe_migrate ===================
[11:26:27] ================== xe_dma_buf (1 subtest) ==================
[11:26:27] ==================== xe_dma_buf_kunit =====================
[11:26:27] ================ [SKIPPED] xe_dma_buf_kunit ================
[11:26:27] =================== [SKIPPED] xe_dma_buf ===================
[11:26:27] ================= xe_bo_shrink (1 subtest) =================
[11:26:27] =================== xe_bo_shrink_kunit ====================
[11:26:27] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[11:26:27] ================== [SKIPPED] xe_bo_shrink ==================
[11:26:27] ==================== xe_bo (2 subtests) ====================
[11:26:27] ================== xe_ccs_migrate_kunit ===================
[11:26:27] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[11:26:27] ==================== xe_bo_evict_kunit ====================
[11:26:27] =============== [SKIPPED] xe_bo_evict_kunit ================
[11:26:27] ===================== [SKIPPED] xe_bo ======================
[11:26:27] ==================== args (11 subtests) ====================
[11:26:27] [PASSED] count_args_test
[11:26:27] [PASSED] call_args_example
[11:26:27] [PASSED] call_args_test
[11:26:27] [PASSED] drop_first_arg_example
[11:26:27] [PASSED] drop_first_arg_test
[11:26:27] [PASSED] first_arg_example
[11:26:27] [PASSED] first_arg_test
[11:26:27] [PASSED] last_arg_example
[11:26:27] [PASSED] last_arg_test
[11:26:27] [PASSED] pick_arg_example
[11:26:27] [PASSED] sep_comma_example
[11:26:27] ====================== [PASSED] args =======================
[11:26:27] =================== xe_pci (3 subtests) ====================
[11:26:27] ==================== check_graphics_ip ====================
[11:26:27] [PASSED] 12.00 Xe_LP
[11:26:27] [PASSED] 12.10 Xe_LP+
[11:26:27] [PASSED] 12.55 Xe_HPG
[11:26:27] [PASSED] 12.60 Xe_HPC
[11:26:27] [PASSED] 12.70 Xe_LPG
[11:26:27] [PASSED] 12.71 Xe_LPG
[11:26:27] [PASSED] 12.74 Xe_LPG+
[11:26:27] [PASSED] 20.01 Xe2_HPG
[11:26:27] [PASSED] 20.02 Xe2_HPG
[11:26:27] [PASSED] 20.04 Xe2_LPG
[11:26:27] [PASSED] 30.00 Xe3_LPG
[11:26:27] [PASSED] 30.01 Xe3_LPG
[11:26:27] [PASSED] 30.03 Xe3_LPG
[11:26:27] ================ [PASSED] check_graphics_ip ================
[11:26:27] ===================== check_media_ip ======================
[11:26:27] [PASSED] 12.00 Xe_M
[11:26:27] [PASSED] 12.55 Xe_HPM
[11:26:27] [PASSED] 13.00 Xe_LPM+
[11:26:27] [PASSED] 13.01 Xe2_HPM
[11:26:27] [PASSED] 20.00 Xe2_LPM
[11:26:27] [PASSED] 30.00 Xe3_LPM
[11:26:27] [PASSED] 30.02 Xe3_LPM
[11:26:27] ================= [PASSED] check_media_ip ==================
[11:26:27] ================= check_platform_gt_count =================
[11:26:27] [PASSED] 0x9A60 (TIGERLAKE)
[11:26:27] [PASSED] 0x9A68 (TIGERLAKE)
[11:26:27] [PASSED] 0x9A70 (TIGERLAKE)
[11:26:27] [PASSED] 0x9A40 (TIGERLAKE)
[11:26:27] [PASSED] 0x9A49 (TIGERLAKE)
[11:26:27] [PASSED] 0x9A59 (TIGERLAKE)
[11:26:27] [PASSED] 0x9A78 (TIGERLAKE)
[11:26:27] [PASSED] 0x9AC0 (TIGERLAKE)
[11:26:27] [PASSED] 0x9AC9 (TIGERLAKE)
[11:26:27] [PASSED] 0x9AD9 (TIGERLAKE)
[11:26:27] [PASSED] 0x9AF8 (TIGERLAKE)
[11:26:27] [PASSED] 0x4C80 (ROCKETLAKE)
[11:26:27] [PASSED] 0x4C8A (ROCKETLAKE)
[11:26:27] [PASSED] 0x4C8B (ROCKETLAKE)
[11:26:27] [PASSED] 0x4C8C (ROCKETLAKE)
[11:26:27] [PASSED] 0x4C90 (ROCKETLAKE)
[11:26:27] [PASSED] 0x4C9A (ROCKETLAKE)
[11:26:27] [PASSED] 0x4680 (ALDERLAKE_S)
[11:26:27] [PASSED] 0x4682 (ALDERLAKE_S)
[11:26:27] [PASSED] 0x4688 (ALDERLAKE_S)
[11:26:27] [PASSED] 0x468A (ALDERLAKE_S)
[11:26:27] [PASSED] 0x468B (ALDERLAKE_S)
[11:26:27] [PASSED] 0x4690 (ALDERLAKE_S)
[11:26:27] [PASSED] 0x4692 (ALDERLAKE_S)
[11:26:27] [PASSED] 0x4693 (ALDERLAKE_S)
[11:26:27] [PASSED] 0x46A0 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x46A1 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x46A2 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x46A3 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x46A6 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x46A8 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x46AA (ALDERLAKE_P)
[11:26:27] [PASSED] 0x462A (ALDERLAKE_P)
[11:26:27] [PASSED] 0x4626 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x4628 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x46B0 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x46B1 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x46B2 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x46B3 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x46C0 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x46C1 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x46C2 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x46C3 (ALDERLAKE_P)
[11:26:27] [PASSED] 0x46D0 (ALDERLAKE_N)
[11:26:27] [PASSED] 0x46D1 (ALDERLAKE_N)
[11:26:27] [PASSED] 0x46D2 (ALDERLAKE_N)
[11:26:27] [PASSED] 0x46D3 (ALDERLAKE_N)
[11:26:27] [PASSED] 0x46D4 (ALDERLAKE_N)
[11:26:27] [PASSED] 0xA721 (ALDERLAKE_P)
[11:26:27] [PASSED] 0xA7A1 (ALDERLAKE_P)
[11:26:27] [PASSED] 0xA7A9 (ALDERLAKE_P)
[11:26:27] [PASSED] 0xA7AC (ALDERLAKE_P)
[11:26:27] [PASSED] 0xA7AD (ALDERLAKE_P)
[11:26:27] [PASSED] 0xA720 (ALDERLAKE_P)
[11:26:27] [PASSED] 0xA7A0 (ALDERLAKE_P)
[11:26:27] [PASSED] 0xA7A8 (ALDERLAKE_P)
[11:26:27] [PASSED] 0xA7AA (ALDERLAKE_P)
[11:26:27] [PASSED] 0xA7AB (ALDERLAKE_P)
[11:26:27] [PASSED] 0xA780 (ALDERLAKE_S)
[11:26:27] [PASSED] 0xA781 (ALDERLAKE_S)
[11:26:27] [PASSED] 0xA782 (ALDERLAKE_S)
[11:26:27] [PASSED] 0xA783 (ALDERLAKE_S)
[11:26:27] [PASSED] 0xA788 (ALDERLAKE_S)
[11:26:27] [PASSED] 0xA789 (ALDERLAKE_S)
[11:26:27] [PASSED] 0xA78A (ALDERLAKE_S)
[11:26:27] [PASSED] 0xA78B (ALDERLAKE_S)
[11:26:27] [PASSED] 0x4905 (DG1)
[11:26:27] [PASSED] 0x4906 (DG1)
[11:26:27] [PASSED] 0x4907 (DG1)
[11:26:27] [PASSED] 0x4908 (DG1)
[11:26:27] [PASSED] 0x4909 (DG1)
[11:26:27] [PASSED] 0x56C0 (DG2)
[11:26:27] [PASSED] 0x56C2 (DG2)
[11:26:27] [PASSED] 0x56C1 (DG2)
[11:26:27] [PASSED] 0x7D51 (METEORLAKE)
[11:26:27] [PASSED] 0x7DD1 (METEORLAKE)
[11:26:27] [PASSED] 0x7D41 (METEORLAKE)
[11:26:27] [PASSED] 0x7D67 (METEORLAKE)
[11:26:27] [PASSED] 0xB640 (METEORLAKE)
[11:26:27] [PASSED] 0x56A0 (DG2)
[11:26:27] [PASSED] 0x56A1 (DG2)
[11:26:27] [PASSED] 0x56A2 (DG2)
[11:26:27] [PASSED] 0x56BE (DG2)
[11:26:27] [PASSED] 0x56BF (DG2)
[11:26:27] [PASSED] 0x5690 (DG2)
[11:26:27] [PASSED] 0x5691 (DG2)
[11:26:27] [PASSED] 0x5692 (DG2)
[11:26:27] [PASSED] 0x56A5 (DG2)
[11:26:27] [PASSED] 0x56A6 (DG2)
[11:26:27] [PASSED] 0x56B0 (DG2)
[11:26:27] [PASSED] 0x56B1 (DG2)
[11:26:27] [PASSED] 0x56BA (DG2)
[11:26:27] [PASSED] 0x56BB (DG2)
[11:26:27] [PASSED] 0x56BC (DG2)
[11:26:27] [PASSED] 0x56BD (DG2)
[11:26:27] [PASSED] 0x5693 (DG2)
[11:26:27] [PASSED] 0x5694 (DG2)
[11:26:27] [PASSED] 0x5695 (DG2)
[11:26:27] [PASSED] 0x56A3 (DG2)
[11:26:27] [PASSED] 0x56A4 (DG2)
[11:26:27] [PASSED] 0x56B2 (DG2)
[11:26:27] [PASSED] 0x56B3 (DG2)
[11:26:27] [PASSED] 0x5696 (DG2)
[11:26:27] [PASSED] 0x5697 (DG2)
[11:26:27] [PASSED] 0xB69 (PVC)
[11:26:27] [PASSED] 0xB6E (PVC)
[11:26:27] [PASSED] 0xBD4 (PVC)
[11:26:27] [PASSED] 0xBD5 (PVC)
[11:26:27] [PASSED] 0xBD6 (PVC)
[11:26:27] [PASSED] 0xBD7 (PVC)
[11:26:27] [PASSED] 0xBD8 (PVC)
[11:26:27] [PASSED] 0xBD9 (PVC)
[11:26:27] [PASSED] 0xBDA (PVC)
[11:26:27] [PASSED] 0xBDB (PVC)
[11:26:27] [PASSED] 0xBE0 (PVC)
[11:26:27] [PASSED] 0xBE1 (PVC)
[11:26:27] [PASSED] 0xBE5 (PVC)
[11:26:27] [PASSED] 0x7D40 (METEORLAKE)
[11:26:27] [PASSED] 0x7D45 (METEORLAKE)
[11:26:27] [PASSED] 0x7D55 (METEORLAKE)
[11:26:27] [PASSED] 0x7D60 (METEORLAKE)
[11:26:27] [PASSED] 0x7DD5 (METEORLAKE)
[11:26:27] [PASSED] 0x6420 (LUNARLAKE)
[11:26:27] [PASSED] 0x64A0 (LUNARLAKE)
[11:26:27] [PASSED] 0x64B0 (LUNARLAKE)
[11:26:27] [PASSED] 0xE202 (BATTLEMAGE)
[11:26:27] [PASSED] 0xE209 (BATTLEMAGE)
[11:26:27] [PASSED] 0xE20B (BATTLEMAGE)
[11:26:27] [PASSED] 0xE20C (BATTLEMAGE)
[11:26:27] [PASSED] 0xE20D (BATTLEMAGE)
[11:26:27] [PASSED] 0xE210 (BATTLEMAGE)
[11:26:27] [PASSED] 0xE211 (BATTLEMAGE)
[11:26:27] [PASSED] 0xE212 (BATTLEMAGE)
[11:26:27] [PASSED] 0xE216 (BATTLEMAGE)
[11:26:27] [PASSED] 0xE220 (BATTLEMAGE)
[11:26:27] [PASSED] 0xE221 (BATTLEMAGE)
[11:26:27] [PASSED] 0xE222 (BATTLEMAGE)
[11:26:27] [PASSED] 0xE223 (BATTLEMAGE)
[11:26:27] [PASSED] 0xB080 (PANTHERLAKE)
[11:26:27] [PASSED] 0xB081 (PANTHERLAKE)
[11:26:27] [PASSED] 0xB082 (PANTHERLAKE)
[11:26:27] [PASSED] 0xB083 (PANTHERLAKE)
[11:26:27] [PASSED] 0xB084 (PANTHERLAKE)
[11:26:27] [PASSED] 0xB085 (PANTHERLAKE)
[11:26:27] [PASSED] 0xB086 (PANTHERLAKE)
[11:26:27] [PASSED] 0xB087 (PANTHERLAKE)
[11:26:27] [PASSED] 0xB08F (PANTHERLAKE)
[11:26:27] [PASSED] 0xB090 (PANTHERLAKE)
[11:26:27] [PASSED] 0xB0A0 (PANTHERLAKE)
[11:26:27] [PASSED] 0xB0B0 (PANTHERLAKE)
[11:26:27] [PASSED] 0xFD80 (PANTHERLAKE)
[11:26:27] [PASSED] 0xFD81 (PANTHERLAKE)
[11:26:27] ============= [PASSED] check_platform_gt_count =============
[11:26:27] ===================== [PASSED] xe_pci ======================
[11:26:27] =================== xe_rtp (2 subtests) ====================
[11:26:27] =============== xe_rtp_process_to_sr_tests ================
[11:26:27] [PASSED] coalesce-same-reg
[11:26:27] [PASSED] no-match-no-add
[11:26:27] [PASSED] match-or
[11:26:27] [PASSED] match-or-xfail
[11:26:27] [PASSED] no-match-no-add-multiple-rules
[11:26:27] [PASSED] two-regs-two-entries
[11:26:27] [PASSED] clr-one-set-other
[11:26:27] [PASSED] set-field
[11:26:27] [PASSED] conflict-duplicate
[11:26:27] [PASSED] conflict-not-disjoint
[11:26:27] [PASSED] conflict-reg-type
[11:26:27] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[11:26:27] ================== xe_rtp_process_tests ===================
[11:26:27] [PASSED] active1
[11:26:27] [PASSED] active2
[11:26:27] [PASSED] active-inactive
[11:26:27] [PASSED] inactive-active
[11:26:27] [PASSED] inactive-1st_or_active-inactive
[11:26:27] [PASSED] inactive-2nd_or_active-inactive
[11:26:27] [PASSED] inactive-last_or_active-inactive
[11:26:27] [PASSED] inactive-no_or_active-inactive
[11:26:27] ============== [PASSED] xe_rtp_process_tests ===============
[11:26:27] ===================== [PASSED] xe_rtp ======================
[11:26:27] ==================== xe_wa (1 subtest) =====================
[11:26:27] ======================== xe_wa_gt =========================
[11:26:27] [PASSED] TIGERLAKE B0
[11:26:27] [PASSED] DG1 A0
[11:26:27] [PASSED] DG1 B0
[11:26:27] [PASSED] ALDERLAKE_S A0
[11:26:27] [PASSED] ALDERLAKE_S B0
stty: 'standard input': Inappropriate ioctl for device
[11:26:27] [PASSED] ALDERLAKE_S C0
[11:26:27] [PASSED] ALDERLAKE_S D0
[11:26:27] [PASSED] ALDERLAKE_P A0
[11:26:27] [PASSED] ALDERLAKE_P B0
[11:26:27] [PASSED] ALDERLAKE_P C0
[11:26:27] [PASSED] ALDERLAKE_S RPLS D0
[11:26:27] [PASSED] ALDERLAKE_P RPLU E0
[11:26:27] [PASSED] DG2 G10 C0
[11:26:27] [PASSED] DG2 G11 B1
[11:26:27] [PASSED] DG2 G12 A1
[11:26:27] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:26:27] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:26:27] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[11:26:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[11:26:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[11:26:27] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[11:26:27] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[11:26:27] ==================== [PASSED] xe_wa_gt =====================
[11:26:27] ====================== [PASSED] xe_wa ======================
[11:26:27] ============================================================
[11:26:27] Testing complete. Ran 306 tests: passed: 288, skipped: 18
[11:26:27] Elapsed time: 33.588s total, 4.216s configuring, 29.006s building, 0.327s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[11:26:27] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:26:29] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:26:53] Starting KUnit Kernel (1/1)...
[11:26:53] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:26:53] ============ drm_test_pick_cmdline (2 subtests) ============
[11:26:53] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[11:26:53] =============== drm_test_pick_cmdline_named ===============
[11:26:53] [PASSED] NTSC
[11:26:53] [PASSED] NTSC-J
[11:26:53] [PASSED] PAL
[11:26:53] [PASSED] PAL-M
[11:26:53] =========== [PASSED] drm_test_pick_cmdline_named ===========
[11:26:53] ============== [PASSED] drm_test_pick_cmdline ==============
[11:26:53] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[11:26:53] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[11:26:53] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[11:26:53] =========== drm_validate_clone_mode (2 subtests) ===========
[11:26:53] ============== drm_test_check_in_clone_mode ===============
[11:26:53] [PASSED] in_clone_mode
[11:26:53] [PASSED] not_in_clone_mode
[11:26:53] ========== [PASSED] drm_test_check_in_clone_mode ===========
[11:26:53] =============== drm_test_check_valid_clones ===============
[11:26:53] [PASSED] not_in_clone_mode
[11:26:53] [PASSED] valid_clone
[11:26:53] [PASSED] invalid_clone
[11:26:53] =========== [PASSED] drm_test_check_valid_clones ===========
[11:26:53] ============= [PASSED] drm_validate_clone_mode =============
[11:26:53] ============= drm_validate_modeset (1 subtest) =============
[11:26:53] [PASSED] drm_test_check_connector_changed_modeset
[11:26:53] ============== [PASSED] drm_validate_modeset ===============
[11:26:53] ====== drm_test_bridge_get_current_state (2 subtests) ======
[11:26:53] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[11:26:53] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[11:26:53] ======== [PASSED] drm_test_bridge_get_current_state ========
[11:26:53] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[11:26:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[11:26:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[11:26:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[11:26:53] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[11:26:53] ============== drm_bridge_alloc (2 subtests) ===============
[11:26:53] [PASSED] drm_test_drm_bridge_alloc_basic
[11:26:53] [PASSED] drm_test_drm_bridge_alloc_get_put
[11:26:53] ================ [PASSED] drm_bridge_alloc =================
[11:26:53] ================== drm_buddy (7 subtests) ==================
[11:26:53] [PASSED] drm_test_buddy_alloc_limit
[11:26:53] [PASSED] drm_test_buddy_alloc_optimistic
[11:26:53] [PASSED] drm_test_buddy_alloc_pessimistic
[11:26:53] [PASSED] drm_test_buddy_alloc_pathological
[11:26:53] [PASSED] drm_test_buddy_alloc_contiguous
[11:26:53] [PASSED] drm_test_buddy_alloc_clear
[11:26:53] [PASSED] drm_test_buddy_alloc_range_bias
[11:26:53] ==================== [PASSED] drm_buddy ====================
[11:26:53] ============= drm_cmdline_parser (40 subtests) =============
[11:26:53] [PASSED] drm_test_cmdline_force_d_only
[11:26:53] [PASSED] drm_test_cmdline_force_D_only_dvi
[11:26:53] [PASSED] drm_test_cmdline_force_D_only_hdmi
[11:26:53] [PASSED] drm_test_cmdline_force_D_only_not_digital
[11:26:53] [PASSED] drm_test_cmdline_force_e_only
[11:26:53] [PASSED] drm_test_cmdline_res
[11:26:53] [PASSED] drm_test_cmdline_res_vesa
[11:26:53] [PASSED] drm_test_cmdline_res_vesa_rblank
[11:26:53] [PASSED] drm_test_cmdline_res_rblank
[11:26:53] [PASSED] drm_test_cmdline_res_bpp
[11:26:53] [PASSED] drm_test_cmdline_res_refresh
[11:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh
[11:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[11:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[11:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[11:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[11:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[11:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[11:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[11:26:53] [PASSED] drm_test_cmdline_res_margins_force_on
[11:26:53] [PASSED] drm_test_cmdline_res_vesa_margins
[11:26:53] [PASSED] drm_test_cmdline_name
[11:26:53] [PASSED] drm_test_cmdline_name_bpp
[11:26:53] [PASSED] drm_test_cmdline_name_option
[11:26:53] [PASSED] drm_test_cmdline_name_bpp_option
[11:26:53] [PASSED] drm_test_cmdline_rotate_0
[11:26:53] [PASSED] drm_test_cmdline_rotate_90
[11:26:53] [PASSED] drm_test_cmdline_rotate_180
[11:26:53] [PASSED] drm_test_cmdline_rotate_270
[11:26:53] [PASSED] drm_test_cmdline_hmirror
[11:26:53] [PASSED] drm_test_cmdline_vmirror
[11:26:53] [PASSED] drm_test_cmdline_margin_options
[11:26:53] [PASSED] drm_test_cmdline_multiple_options
[11:26:53] [PASSED] drm_test_cmdline_bpp_extra_and_option
[11:26:53] [PASSED] drm_test_cmdline_extra_and_option
[11:26:53] [PASSED] drm_test_cmdline_freestanding_options
[11:26:53] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[11:26:53] [PASSED] drm_test_cmdline_panel_orientation
[11:26:53] ================ drm_test_cmdline_invalid =================
[11:26:53] [PASSED] margin_only
[11:26:53] [PASSED] interlace_only
[11:26:53] [PASSED] res_missing_x
[11:26:53] [PASSED] res_missing_y
[11:26:53] [PASSED] res_bad_y
[11:26:53] [PASSED] res_missing_y_bpp
[11:26:53] [PASSED] res_bad_bpp
[11:26:53] [PASSED] res_bad_refresh
[11:26:53] [PASSED] res_bpp_refresh_force_on_off
[11:26:53] [PASSED] res_invalid_mode
[11:26:53] [PASSED] res_bpp_wrong_place_mode
[11:26:53] [PASSED] name_bpp_refresh
[11:26:53] [PASSED] name_refresh
[11:26:53] [PASSED] name_refresh_wrong_mode
[11:26:53] [PASSED] name_refresh_invalid_mode
[11:26:53] [PASSED] rotate_multiple
[11:26:53] [PASSED] rotate_invalid_val
[11:26:53] [PASSED] rotate_truncated
[11:26:53] [PASSED] invalid_option
[11:26:53] [PASSED] invalid_tv_option
[11:26:53] [PASSED] truncated_tv_option
[11:26:53] ============ [PASSED] drm_test_cmdline_invalid =============
[11:26:53] =============== drm_test_cmdline_tv_options ===============
[11:26:53] [PASSED] NTSC
[11:26:53] [PASSED] NTSC_443
[11:26:53] [PASSED] NTSC_J
[11:26:53] [PASSED] PAL
[11:26:53] [PASSED] PAL_M
[11:26:53] [PASSED] PAL_N
[11:26:53] [PASSED] SECAM
[11:26:53] [PASSED] MONO_525
[11:26:53] [PASSED] MONO_625
[11:26:53] =========== [PASSED] drm_test_cmdline_tv_options ===========
[11:26:53] =============== [PASSED] drm_cmdline_parser ================
[11:26:53] ========== drmm_connector_hdmi_init (20 subtests) ==========
[11:26:53] [PASSED] drm_test_connector_hdmi_init_valid
[11:26:53] [PASSED] drm_test_connector_hdmi_init_bpc_8
[11:26:53] [PASSED] drm_test_connector_hdmi_init_bpc_10
[11:26:53] [PASSED] drm_test_connector_hdmi_init_bpc_12
[11:26:53] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[11:26:53] [PASSED] drm_test_connector_hdmi_init_bpc_null
[11:26:53] [PASSED] drm_test_connector_hdmi_init_formats_empty
[11:26:53] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[11:26:53] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:26:53] [PASSED] supported_formats=0x9 yuv420_allowed=1
[11:26:53] [PASSED] supported_formats=0x9 yuv420_allowed=0
[11:26:53] [PASSED] supported_formats=0x3 yuv420_allowed=1
[11:26:53] [PASSED] supported_formats=0x3 yuv420_allowed=0
[11:26:53] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:26:53] [PASSED] drm_test_connector_hdmi_init_null_ddc
[11:26:53] [PASSED] drm_test_connector_hdmi_init_null_product
[11:26:53] [PASSED] drm_test_connector_hdmi_init_null_vendor
[11:26:53] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[11:26:53] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[11:26:53] [PASSED] drm_test_connector_hdmi_init_product_valid
[11:26:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[11:26:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[11:26:53] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[11:26:53] ========= drm_test_connector_hdmi_init_type_valid =========
[11:26:53] [PASSED] HDMI-A
[11:26:53] [PASSED] HDMI-B
[11:26:53] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[11:26:53] ======== drm_test_connector_hdmi_init_type_invalid ========
[11:26:53] [PASSED] Unknown
[11:26:53] [PASSED] VGA
[11:26:53] [PASSED] DVI-I
[11:26:53] [PASSED] DVI-D
[11:26:53] [PASSED] DVI-A
[11:26:53] [PASSED] Composite
[11:26:53] [PASSED] SVIDEO
[11:26:53] [PASSED] LVDS
[11:26:53] [PASSED] Component
[11:26:53] [PASSED] DIN
[11:26:53] [PASSED] DP
[11:26:53] [PASSED] TV
[11:26:53] [PASSED] eDP
[11:26:53] [PASSED] Virtual
[11:26:53] [PASSED] DSI
[11:26:53] [PASSED] DPI
[11:26:53] [PASSED] Writeback
[11:26:53] [PASSED] SPI
[11:26:53] [PASSED] USB
[11:26:53] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[11:26:53] ============ [PASSED] drmm_connector_hdmi_init =============
[11:26:53] ============= drmm_connector_init (3 subtests) =============
[11:26:53] [PASSED] drm_test_drmm_connector_init
[11:26:53] [PASSED] drm_test_drmm_connector_init_null_ddc
[11:26:53] ========= drm_test_drmm_connector_init_type_valid =========
[11:26:53] [PASSED] Unknown
[11:26:53] [PASSED] VGA
[11:26:53] [PASSED] DVI-I
[11:26:53] [PASSED] DVI-D
[11:26:53] [PASSED] DVI-A
[11:26:53] [PASSED] Composite
[11:26:53] [PASSED] SVIDEO
[11:26:53] [PASSED] LVDS
[11:26:53] [PASSED] Component
[11:26:53] [PASSED] DIN
[11:26:53] [PASSED] DP
[11:26:53] [PASSED] HDMI-A
[11:26:53] [PASSED] HDMI-B
[11:26:53] [PASSED] TV
[11:26:53] [PASSED] eDP
[11:26:53] [PASSED] Virtual
[11:26:53] [PASSED] DSI
[11:26:53] [PASSED] DPI
[11:26:53] [PASSED] Writeback
[11:26:53] [PASSED] SPI
[11:26:53] [PASSED] USB
[11:26:53] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[11:26:53] =============== [PASSED] drmm_connector_init ===============
[11:26:53] ========= drm_connector_dynamic_init (6 subtests) ==========
[11:26:53] [PASSED] drm_test_drm_connector_dynamic_init
[11:26:53] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[11:26:53] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[11:26:53] [PASSED] drm_test_drm_connector_dynamic_init_properties
[11:26:53] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[11:26:53] [PASSED] Unknown
[11:26:53] [PASSED] VGA
[11:26:53] [PASSED] DVI-I
[11:26:53] [PASSED] DVI-D
[11:26:53] [PASSED] DVI-A
[11:26:53] [PASSED] Composite
[11:26:53] [PASSED] SVIDEO
[11:26:53] [PASSED] LVDS
[11:26:53] [PASSED] Component
[11:26:53] [PASSED] DIN
[11:26:53] [PASSED] DP
[11:26:53] [PASSED] HDMI-A
[11:26:53] [PASSED] HDMI-B
[11:26:53] [PASSED] TV
[11:26:53] [PASSED] eDP
[11:26:53] [PASSED] Virtual
[11:26:53] [PASSED] DSI
[11:26:53] [PASSED] DPI
[11:26:53] [PASSED] Writeback
[11:26:53] [PASSED] SPI
[11:26:53] [PASSED] USB
[11:26:53] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[11:26:53] ======== drm_test_drm_connector_dynamic_init_name =========
[11:26:53] [PASSED] Unknown
[11:26:53] [PASSED] VGA
[11:26:53] [PASSED] DVI-I
[11:26:53] [PASSED] DVI-D
[11:26:53] [PASSED] DVI-A
[11:26:53] [PASSED] Composite
[11:26:53] [PASSED] SVIDEO
[11:26:53] [PASSED] LVDS
[11:26:53] [PASSED] Component
[11:26:53] [PASSED] DIN
[11:26:53] [PASSED] DP
[11:26:53] [PASSED] HDMI-A
[11:26:53] [PASSED] HDMI-B
[11:26:53] [PASSED] TV
[11:26:53] [PASSED] eDP
[11:26:53] [PASSED] Virtual
[11:26:53] [PASSED] DSI
[11:26:53] [PASSED] DPI
[11:26:53] [PASSED] Writeback
[11:26:53] [PASSED] SPI
[11:26:53] [PASSED] USB
[11:26:53] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[11:26:53] =========== [PASSED] drm_connector_dynamic_init ============
[11:26:53] ==== drm_connector_dynamic_register_early (4 subtests) =====
[11:26:53] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[11:26:53] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[11:26:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[11:26:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[11:26:53] ====== [PASSED] drm_connector_dynamic_register_early =======
[11:26:53] ======= drm_connector_dynamic_register (7 subtests) ========
[11:26:53] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[11:26:53] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[11:26:53] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[11:26:53] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[11:26:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[11:26:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[11:26:53] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[11:26:53] ========= [PASSED] drm_connector_dynamic_register ==========
[11:26:53] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[11:26:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[11:26:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[11:26:53] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[11:26:53] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[11:26:53] ========== drm_test_get_tv_mode_from_name_valid ===========
[11:26:53] [PASSED] NTSC
[11:26:53] [PASSED] NTSC-443
[11:26:53] [PASSED] NTSC-J
[11:26:53] [PASSED] PAL
[11:26:53] [PASSED] PAL-M
[11:26:53] [PASSED] PAL-N
[11:26:53] [PASSED] SECAM
[11:26:53] [PASSED] Mono
[11:26:53] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[11:26:53] [PASSED] drm_test_get_tv_mode_from_name_truncated
[11:26:53] ============ [PASSED] drm_get_tv_mode_from_name ============
[11:26:53] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[11:26:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[11:26:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[11:26:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[11:26:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[11:26:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[11:26:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[11:26:53] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[11:26:53] [PASSED] VIC 96
[11:26:53] [PASSED] VIC 97
[11:26:53] [PASSED] VIC 101
[11:26:53] [PASSED] VIC 102
[11:26:53] [PASSED] VIC 106
[11:26:53] [PASSED] VIC 107
[11:26:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[11:26:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[11:26:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[11:26:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[11:26:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[11:26:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[11:26:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[11:26:53] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[11:26:53] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[11:26:53] [PASSED] Automatic
[11:26:53] [PASSED] Full
[11:26:53] [PASSED] Limited 16:235
[11:26:53] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[11:26:53] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[11:26:53] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[11:26:53] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[11:26:53] === drm_test_drm_hdmi_connector_get_output_format_name ====
[11:26:53] [PASSED] RGB
[11:26:53] [PASSED] YUV 4:2:0
[11:26:53] [PASSED] YUV 4:2:2
[11:26:53] [PASSED] YUV 4:4:4
[11:26:53] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[11:26:53] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[11:26:53] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[11:26:53] ============= drm_damage_helper (21 subtests) ==============
[11:26:53] [PASSED] drm_test_damage_iter_no_damage
[11:26:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[11:26:53] [PASSED] drm_test_damage_iter_no_damage_src_moved
[11:26:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[11:26:53] [PASSED] drm_test_damage_iter_no_damage_not_visible
[11:26:53] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[11:26:53] [PASSED] drm_test_damage_iter_no_damage_no_fb
[11:26:53] [PASSED] drm_test_damage_iter_simple_damage
[11:26:53] [PASSED] drm_test_damage_iter_single_damage
[11:26:53] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[11:26:53] [PASSED] drm_test_damage_iter_single_damage_outside_src
[11:26:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[11:26:53] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[11:26:53] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[11:26:53] [PASSED] drm_test_damage_iter_single_damage_src_moved
[11:26:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[11:26:53] [PASSED] drm_test_damage_iter_damage
[11:26:53] [PASSED] drm_test_damage_iter_damage_one_intersect
[11:26:53] [PASSED] drm_test_damage_iter_damage_one_outside
[11:26:53] [PASSED] drm_test_damage_iter_damage_src_moved
[11:26:53] [PASSED] drm_test_damage_iter_damage_not_visible
[11:26:53] ================ [PASSED] drm_damage_helper ================
[11:26:53] ============== drm_dp_mst_helper (3 subtests) ==============
[11:26:53] ============== drm_test_dp_mst_calc_pbn_mode ==============
[11:26:53] [PASSED] Clock 154000 BPP 30 DSC disabled
[11:26:53] [PASSED] Clock 234000 BPP 30 DSC disabled
[11:26:53] [PASSED] Clock 297000 BPP 24 DSC disabled
[11:26:53] [PASSED] Clock 332880 BPP 24 DSC enabled
[11:26:53] [PASSED] Clock 324540 BPP 24 DSC enabled
[11:26:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[11:26:53] ============== drm_test_dp_mst_calc_pbn_div ===============
[11:26:53] [PASSED] Link rate 2000000 lane count 4
[11:26:53] [PASSED] Link rate 2000000 lane count 2
[11:26:53] [PASSED] Link rate 2000000 lane count 1
[11:26:53] [PASSED] Link rate 1350000 lane count 4
[11:26:53] [PASSED] Link rate 1350000 lane count 2
[11:26:53] [PASSED] Link rate 1350000 lane count 1
[11:26:53] [PASSED] Link rate 1000000 lane count 4
[11:26:53] [PASSED] Link rate 1000000 lane count 2
[11:26:53] [PASSED] Link rate 1000000 lane count 1
[11:26:53] [PASSED] Link rate 810000 lane count 4
[11:26:53] [PASSED] Link rate 810000 lane count 2
[11:26:53] [PASSED] Link rate 810000 lane count 1
[11:26:53] [PASSED] Link rate 540000 lane count 4
[11:26:53] [PASSED] Link rate 540000 lane count 2
[11:26:53] [PASSED] Link rate 540000 lane count 1
[11:26:53] [PASSED] Link rate 270000 lane count 4
[11:26:53] [PASSED] Link rate 270000 lane count 2
[11:26:53] [PASSED] Link rate 270000 lane count 1
[11:26:53] [PASSED] Link rate 162000 lane count 4
[11:26:53] [PASSED] Link rate 162000 lane count 2
[11:26:53] [PASSED] Link rate 162000 lane count 1
[11:26:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[11:26:53] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[11:26:53] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[11:26:53] [PASSED] DP_POWER_UP_PHY with port number
[11:26:53] [PASSED] DP_POWER_DOWN_PHY with port number
[11:26:53] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[11:26:53] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[11:26:53] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[11:26:53] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[11:26:53] [PASSED] DP_QUERY_PAYLOAD with port number
[11:26:53] [PASSED] DP_QUERY_PAYLOAD with VCPI
[11:26:53] [PASSED] DP_REMOTE_DPCD_READ with port number
[11:26:53] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[11:26:53] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[11:26:53] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[11:26:53] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[11:26:53] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[11:26:53] [PASSED] DP_REMOTE_I2C_READ with port number
[11:26:53] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[11:26:53] [PASSED] DP_REMOTE_I2C_READ with transactions array
[11:26:53] [PASSED] DP_REMOTE_I2C_WRITE with port number
[11:26:53] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[11:26:53] [PASSED] DP_REMOTE_I2C_WRITE with data array
[11:26:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[11:26:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[11:26:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[11:26:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[11:26:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[11:26:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[11:26:53] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[11:26:53] ================ [PASSED] drm_dp_mst_helper ================
[11:26:53] ================== drm_exec (7 subtests) ===================
[11:26:53] [PASSED] sanitycheck
[11:26:53] [PASSED] test_lock
[11:26:53] [PASSED] test_lock_unlock
[11:26:53] [PASSED] test_duplicates
[11:26:53] [PASSED] test_prepare
[11:26:53] [PASSED] test_prepare_array
[11:26:53] [PASSED] test_multiple_loops
[11:26:53] ==================== [PASSED] drm_exec =====================
[11:26:53] =========== drm_format_helper_test (17 subtests) ===========
[11:26:53] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[11:26:53] [PASSED] single_pixel_source_buffer
[11:26:53] [PASSED] single_pixel_clip_rectangle
[11:26:53] [PASSED] well_known_colors
[11:26:53] [PASSED] destination_pitch
[11:26:53] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[11:26:53] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[11:26:53] [PASSED] single_pixel_source_buffer
[11:26:53] [PASSED] single_pixel_clip_rectangle
[11:26:53] [PASSED] well_known_colors
[11:26:53] [PASSED] destination_pitch
[11:26:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[11:26:53] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[11:26:53] [PASSED] single_pixel_source_buffer
[11:26:53] [PASSED] single_pixel_clip_rectangle
[11:26:53] [PASSED] well_known_colors
[11:26:53] [PASSED] destination_pitch
[11:26:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[11:26:53] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[11:26:53] [PASSED] single_pixel_source_buffer
[11:26:53] [PASSED] single_pixel_clip_rectangle
[11:26:53] [PASSED] well_known_colors
[11:26:53] [PASSED] destination_pitch
[11:26:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[11:26:53] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[11:26:53] [PASSED] single_pixel_source_buffer
[11:26:53] [PASSED] single_pixel_clip_rectangle
[11:26:53] [PASSED] well_known_colors
[11:26:53] [PASSED] destination_pitch
[11:26:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[11:26:53] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[11:26:53] [PASSED] single_pixel_source_buffer
[11:26:53] [PASSED] single_pixel_clip_rectangle
[11:26:53] [PASSED] well_known_colors
[11:26:53] [PASSED] destination_pitch
[11:26:53] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[11:26:53] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[11:26:53] [PASSED] single_pixel_source_buffer
[11:26:53] [PASSED] single_pixel_clip_rectangle
[11:26:53] [PASSED] well_known_colors
[11:26:53] [PASSED] destination_pitch
[11:26:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[11:26:53] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[11:26:53] [PASSED] single_pixel_source_buffer
[11:26:53] [PASSED] single_pixel_clip_rectangle
[11:26:53] [PASSED] well_known_colors
[11:26:53] [PASSED] destination_pitch
[11:26:53] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[11:26:53] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[11:26:53] [PASSED] single_pixel_source_buffer
[11:26:53] [PASSED] single_pixel_clip_rectangle
[11:26:53] [PASSED] well_known_colors
[11:26:53] [PASSED] destination_pitch
[11:26:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[11:26:53] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[11:26:53] [PASSED] single_pixel_source_buffer
[11:26:53] [PASSED] single_pixel_clip_rectangle
[11:26:53] [PASSED] well_known_colors
[11:26:53] [PASSED] destination_pitch
[11:26:53] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[11:26:53] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[11:26:53] [PASSED] single_pixel_source_buffer
[11:26:53] [PASSED] single_pixel_clip_rectangle
[11:26:53] [PASSED] well_known_colors
[11:26:53] [PASSED] destination_pitch
[11:26:53] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[11:26:53] ============== drm_test_fb_xrgb8888_to_mono ===============
[11:26:53] [PASSED] single_pixel_source_buffer
[11:26:53] [PASSED] single_pixel_clip_rectangle
[11:26:53] [PASSED] well_known_colors
[11:26:53] [PASSED] destination_pitch
[11:26:53] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[11:26:53] ==================== drm_test_fb_swab =====================
[11:26:53] [PASSED] single_pixel_source_buffer
[11:26:53] [PASSED] single_pixel_clip_rectangle
[11:26:53] [PASSED] well_known_colors
[11:26:53] [PASSED] destination_pitch
[11:26:53] ================ [PASSED] drm_test_fb_swab =================
[11:26:53] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[11:26:53] [PASSED] single_pixel_source_buffer
[11:26:53] [PASSED] single_pixel_clip_rectangle
[11:26:53] [PASSED] well_known_colors
[11:26:53] [PASSED] destination_pitch
[11:26:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[11:26:53] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[11:26:53] [PASSED] single_pixel_source_buffer
[11:26:53] [PASSED] single_pixel_clip_rectangle
[11:26:53] [PASSED] well_known_colors
[11:26:53] [PASSED] destination_pitch
[11:26:53] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[11:26:53] ================= drm_test_fb_clip_offset =================
[11:26:53] [PASSED] pass through
[11:26:53] [PASSED] horizontal offset
[11:26:53] [PASSED] vertical offset
[11:26:53] [PASSED] horizontal and vertical offset
[11:26:53] [PASSED] horizontal offset (custom pitch)
[11:26:53] [PASSED] vertical offset (custom pitch)
[11:26:53] [PASSED] horizontal and vertical offset (custom pitch)
[11:26:53] ============= [PASSED] drm_test_fb_clip_offset =============
[11:26:53] =================== drm_test_fb_memcpy ====================
[11:26:53] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[11:26:53] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[11:26:53] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[11:26:53] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[11:26:53] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[11:26:53] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[11:26:53] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[11:26:53] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[11:26:53] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[11:26:53] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[11:26:53] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[11:26:53] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[11:26:53] =============== [PASSED] drm_test_fb_memcpy ================
[11:26:53] ============= [PASSED] drm_format_helper_test ==============
[11:26:53] ================= drm_format (18 subtests) =================
[11:26:53] [PASSED] drm_test_format_block_width_invalid
[11:26:53] [PASSED] drm_test_format_block_width_one_plane
[11:26:53] [PASSED] drm_test_format_block_width_two_plane
[11:26:53] [PASSED] drm_test_format_block_width_three_plane
[11:26:53] [PASSED] drm_test_format_block_width_tiled
[11:26:53] [PASSED] drm_test_format_block_height_invalid
[11:26:53] [PASSED] drm_test_format_block_height_one_plane
[11:26:53] [PASSED] drm_test_format_block_height_two_plane
[11:26:53] [PASSED] drm_test_format_block_height_three_plane
[11:26:53] [PASSED] drm_test_format_block_height_tiled
[11:26:53] [PASSED] drm_test_format_min_pitch_invalid
[11:26:53] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[11:26:53] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[11:26:53] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[11:26:53] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[11:26:53] [PASSED] drm_test_format_min_pitch_two_plane
[11:26:53] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[11:26:53] [PASSED] drm_test_format_min_pitch_tiled
[11:26:53] =================== [PASSED] drm_format ====================
[11:26:53] ============== drm_framebuffer (10 subtests) ===============
[11:26:53] ========== drm_test_framebuffer_check_src_coords ==========
[11:26:53] [PASSED] Success: source fits into fb
[11:26:53] [PASSED] Fail: overflowing fb with x-axis coordinate
[11:26:53] [PASSED] Fail: overflowing fb with y-axis coordinate
[11:26:53] [PASSED] Fail: overflowing fb with source width
[11:26:53] [PASSED] Fail: overflowing fb with source height
[11:26:53] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[11:26:53] [PASSED] drm_test_framebuffer_cleanup
[11:26:53] =============== drm_test_framebuffer_create ===============
[11:26:53] [PASSED] ABGR8888 normal sizes
[11:26:53] [PASSED] ABGR8888 max sizes
[11:26:53] [PASSED] ABGR8888 pitch greater than min required
[11:26:53] [PASSED] ABGR8888 pitch less than min required
[11:26:53] [PASSED] ABGR8888 Invalid width
[11:26:53] [PASSED] ABGR8888 Invalid buffer handle
[11:26:53] [PASSED] No pixel format
[11:26:53] [PASSED] ABGR8888 Width 0
[11:26:53] [PASSED] ABGR8888 Height 0
[11:26:53] [PASSED] ABGR8888 Out of bound height * pitch combination
[11:26:53] [PASSED] ABGR8888 Large buffer offset
[11:26:53] [PASSED] ABGR8888 Buffer offset for inexistent plane
[11:26:53] [PASSED] ABGR8888 Invalid flag
[11:26:53] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[11:26:53] [PASSED] ABGR8888 Valid buffer modifier
[11:26:53] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[11:26:53] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[11:26:53] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[11:26:53] [PASSED] NV12 Normal sizes
[11:26:53] [PASSED] NV12 Max sizes
[11:26:53] [PASSED] NV12 Invalid pitch
[11:26:53] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[11:26:53] [PASSED] NV12 different modifier per-plane
[11:26:53] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[11:26:53] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[11:26:53] [PASSED] NV12 Modifier for inexistent plane
[11:26:53] [PASSED] NV12 Handle for inexistent plane
[11:26:53] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[11:26:53] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[11:26:53] [PASSED] YVU420 Normal sizes
[11:26:53] [PASSED] YVU420 Max sizes
[11:26:53] [PASSED] YVU420 Invalid pitch
[11:26:53] [PASSED] YVU420 Different pitches
[11:26:53] [PASSED] YVU420 Different buffer offsets/pitches
[11:26:53] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[11:26:53] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[11:26:53] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[11:26:53] [PASSED] YVU420 Valid modifier
[11:26:53] [PASSED] YVU420 Different modifiers per plane
[11:26:53] [PASSED] YVU420 Modifier for inexistent plane
[11:26:53] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[11:26:53] [PASSED] X0L2 Normal sizes
[11:26:53] [PASSED] X0L2 Max sizes
[11:26:53] [PASSED] X0L2 Invalid pitch
[11:26:53] [PASSED] X0L2 Pitch greater than minimum required
[11:26:53] [PASSED] X0L2 Handle for inexistent plane
[11:26:53] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[11:26:53] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[11:26:53] [PASSED] X0L2 Valid modifier
[11:26:53] [PASSED] X0L2 Modifier for inexistent plane
[11:26:53] =========== [PASSED] drm_test_framebuffer_create ===========
[11:26:53] [PASSED] drm_test_framebuffer_free
[11:26:53] [PASSED] drm_test_framebuffer_init
[11:26:53] [PASSED] drm_test_framebuffer_init_bad_format
[11:26:53] [PASSED] drm_test_framebuffer_init_dev_mismatch
[11:26:53] [PASSED] drm_test_framebuffer_lookup
[11:26:53] [PASSED] drm_test_framebuffer_lookup_inexistent
[11:26:53] [PASSED] drm_test_framebuffer_modifiers_not_supported
[11:26:53] ================= [PASSED] drm_framebuffer =================
[11:26:53] ================ drm_gem_shmem (8 subtests) ================
[11:26:53] [PASSED] drm_gem_shmem_test_obj_create
[11:26:53] [PASSED] drm_gem_shmem_test_obj_create_private
[11:26:53] [PASSED] drm_gem_shmem_test_pin_pages
[11:26:53] [PASSED] drm_gem_shmem_test_vmap
[11:26:53] [PASSED] drm_gem_shmem_test_get_pages_sgt
[11:26:53] [PASSED] drm_gem_shmem_test_get_sg_table
[11:26:53] [PASSED] drm_gem_shmem_test_madvise
[11:26:53] [PASSED] drm_gem_shmem_test_purge
[11:26:53] ================== [PASSED] drm_gem_shmem ==================
[11:26:53] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[11:26:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[11:26:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[11:26:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[11:26:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[11:26:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[11:26:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[11:26:53] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[11:26:53] [PASSED] Automatic
[11:26:53] [PASSED] Full
[11:26:53] [PASSED] Limited 16:235
[11:26:53] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[11:26:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[11:26:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[11:26:53] [PASSED] drm_test_check_disable_connector
[11:26:53] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[11:26:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[11:26:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[11:26:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[11:26:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[11:26:53] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[11:26:53] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[11:26:53] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[11:26:53] [PASSED] drm_test_check_output_bpc_dvi
[11:26:53] [PASSED] drm_test_check_output_bpc_format_vic_1
[11:26:53] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[11:26:53] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[11:26:53] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[11:26:53] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[11:26:53] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[11:26:53] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[11:26:53] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[11:26:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[11:26:53] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[11:26:53] [PASSED] drm_test_check_broadcast_rgb_value
[11:26:53] [PASSED] drm_test_check_bpc_8_value
[11:26:53] [PASSED] drm_test_check_bpc_10_value
[11:26:53] [PASSED] drm_test_check_bpc_12_value
[11:26:53] [PASSED] drm_test_check_format_value
[11:26:53] [PASSED] drm_test_check_tmds_char_value
[11:26:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[11:26:53] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[11:26:53] [PASSED] drm_test_check_mode_valid
[11:26:53] [PASSED] drm_test_check_mode_valid_reject
[11:26:53] [PASSED] drm_test_check_mode_valid_reject_rate
[11:26:53] [PASSED] drm_test_check_mode_valid_reject_max_clock
[11:26:53] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[11:26:53] ================= drm_managed (2 subtests) =================
[11:26:53] [PASSED] drm_test_managed_release_action
[11:26:53] [PASSED] drm_test_managed_run_action
[11:26:53] =================== [PASSED] drm_managed ===================
[11:26:53] =================== drm_mm (6 subtests) ====================
[11:26:53] [PASSED] drm_test_mm_init
[11:26:53] [PASSED] drm_test_mm_debug
[11:26:53] [PASSED] drm_test_mm_align32
[11:26:53] [PASSED] drm_test_mm_align64
[11:26:53] [PASSED] drm_test_mm_lowest
[11:26:53] [PASSED] drm_test_mm_highest
[11:26:53] ===================== [PASSED] drm_mm ======================
[11:26:53] ============= drm_modes_analog_tv (5 subtests) =============
[11:26:53] [PASSED] drm_test_modes_analog_tv_mono_576i
[11:26:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[11:26:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[11:26:53] [PASSED] drm_test_modes_analog_tv_pal_576i
[11:26:53] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[11:26:53] =============== [PASSED] drm_modes_analog_tv ===============
[11:26:53] ============== drm_plane_helper (2 subtests) ===============
[11:26:53] =============== drm_test_check_plane_state ================
[11:26:53] [PASSED] clipping_simple
[11:26:53] [PASSED] clipping_rotate_reflect
[11:26:53] [PASSED] positioning_simple
[11:26:53] [PASSED] upscaling
[11:26:53] [PASSED] downscaling
[11:26:53] [PASSED] rounding1
[11:26:53] [PASSED] rounding2
[11:26:53] [PASSED] rounding3
[11:26:53] [PASSED] rounding4
[11:26:53] =========== [PASSED] drm_test_check_plane_state ============
[11:26:53] =========== drm_test_check_invalid_plane_state ============
[11:26:53] [PASSED] positioning_invalid
[11:26:53] [PASSED] upscaling_invalid
[11:26:53] [PASSED] downscaling_invalid
[11:26:53] ======= [PASSED] drm_test_check_invalid_plane_state ========
[11:26:53] ================ [PASSED] drm_plane_helper =================
[11:26:53] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[11:26:53] ====== drm_test_connector_helper_tv_get_modes_check =======
[11:26:53] [PASSED] None
[11:26:53] [PASSED] PAL
[11:26:53] [PASSED] NTSC
[11:26:53] [PASSED] Both, NTSC Default
[11:26:53] [PASSED] Both, PAL Default
[11:26:53] [PASSED] Both, NTSC Default, with PAL on command-line
[11:26:53] [PASSED] Both, PAL Default, with NTSC on command-line
[11:26:53] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[11:26:53] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[11:26:53] ================== drm_rect (9 subtests) ===================
[11:26:53] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[11:26:53] [PASSED] drm_test_rect_clip_scaled_not_clipped
[11:26:53] [PASSED] drm_test_rect_clip_scaled_clipped
[11:26:53] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[11:26:53] ================= drm_test_rect_intersect =================
[11:26:53] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[11:26:53] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[11:26:53] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[11:26:53] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[11:26:53] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[11:26:53] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[11:26:53] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[11:26:53] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[11:26:53] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[11:26:53] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[11:26:53] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[11:26:53] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[11:26:53] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[11:26:53] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[11:26:53] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[11:26:53] ============= [PASSED] drm_test_rect_intersect =============
[11:26:53] ================ drm_test_rect_calc_hscale ================
[11:26:53] [PASSED] normal use
[11:26:53] [PASSED] out of max range
[11:26:53] [PASSED] out of min range
[11:26:53] [PASSED] zero dst
[11:26:53] [PASSED] negative src
[11:26:53] [PASSED] negative dst
[11:26:53] ============ [PASSED] drm_test_rect_calc_hscale ============
[11:26:53] ================ drm_test_rect_calc_vscale ================
[11:26:53] [PASSED] normal use
[11:26:53] [PASSED] out of max range
[11:26:53] [PASSED] out of min range
[11:26:53] [PASSED] zero dst
[11:26:53] [PASSED] negative src
stty: 'standard input': Inappropriate ioctl for device
[11:26:53] [PASSED] negative dst
[11:26:53] ============ [PASSED] drm_test_rect_calc_vscale ============
[11:26:53] ================== drm_test_rect_rotate ===================
[11:26:53] [PASSED] reflect-x
[11:26:53] [PASSED] reflect-y
[11:26:53] [PASSED] rotate-0
[11:26:53] [PASSED] rotate-90
[11:26:53] [PASSED] rotate-180
[11:26:53] [PASSED] rotate-270
[11:26:53] ============== [PASSED] drm_test_rect_rotate ===============
[11:26:53] ================ drm_test_rect_rotate_inv =================
[11:26:53] [PASSED] reflect-x
[11:26:53] [PASSED] reflect-y
[11:26:53] [PASSED] rotate-0
[11:26:53] [PASSED] rotate-90
[11:26:53] [PASSED] rotate-180
[11:26:53] [PASSED] rotate-270
[11:26:53] ============ [PASSED] drm_test_rect_rotate_inv =============
[11:26:53] ==================== [PASSED] drm_rect =====================
[11:26:53] ============ drm_sysfb_modeset_test (1 subtest) ============
[11:26:53] ============ drm_test_sysfb_build_fourcc_list =============
[11:26:53] [PASSED] no native formats
[11:26:53] [PASSED] XRGB8888 as native format
[11:26:53] [PASSED] remove duplicates
[11:26:53] [PASSED] convert alpha formats
[11:26:53] [PASSED] random formats
[11:26:53] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[11:26:53] ============= [PASSED] drm_sysfb_modeset_test ==============
[11:26:53] ============================================================
[11:26:53] Testing complete. Ran 621 tests: passed: 621
[11:26:53] Elapsed time: 25.545s total, 1.738s configuring, 23.589s building, 0.181s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[11:26:53] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:26:55] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:27:04] Starting KUnit Kernel (1/1)...
[11:27:04] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:27:04] ================= ttm_device (5 subtests) ==================
[11:27:04] [PASSED] ttm_device_init_basic
[11:27:04] [PASSED] ttm_device_init_multiple
[11:27:04] [PASSED] ttm_device_fini_basic
[11:27:04] [PASSED] ttm_device_init_no_vma_man
[11:27:04] ================== ttm_device_init_pools ==================
[11:27:04] [PASSED] No DMA allocations, no DMA32 required
[11:27:04] [PASSED] DMA allocations, DMA32 required
[11:27:04] [PASSED] No DMA allocations, DMA32 required
[11:27:04] [PASSED] DMA allocations, no DMA32 required
[11:27:04] ============== [PASSED] ttm_device_init_pools ==============
[11:27:04] =================== [PASSED] ttm_device ====================
[11:27:04] ================== ttm_pool (8 subtests) ===================
[11:27:04] ================== ttm_pool_alloc_basic ===================
[11:27:04] [PASSED] One page
[11:27:04] [PASSED] More than one page
[11:27:04] [PASSED] Above the allocation limit
[11:27:04] [PASSED] One page, with coherent DMA mappings enabled
[11:27:04] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:27:04] ============== [PASSED] ttm_pool_alloc_basic ===============
[11:27:04] ============== ttm_pool_alloc_basic_dma_addr ==============
[11:27:04] [PASSED] One page
[11:27:04] [PASSED] More than one page
[11:27:04] [PASSED] Above the allocation limit
[11:27:04] [PASSED] One page, with coherent DMA mappings enabled
[11:27:04] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:27:04] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[11:27:04] [PASSED] ttm_pool_alloc_order_caching_match
[11:27:04] [PASSED] ttm_pool_alloc_caching_mismatch
[11:27:04] [PASSED] ttm_pool_alloc_order_mismatch
[11:27:04] [PASSED] ttm_pool_free_dma_alloc
[11:27:04] [PASSED] ttm_pool_free_no_dma_alloc
[11:27:04] [PASSED] ttm_pool_fini_basic
[11:27:04] ==================== [PASSED] ttm_pool =====================
[11:27:04] ================ ttm_resource (8 subtests) =================
[11:27:04] ================= ttm_resource_init_basic =================
[11:27:04] [PASSED] Init resource in TTM_PL_SYSTEM
[11:27:04] [PASSED] Init resource in TTM_PL_VRAM
[11:27:04] [PASSED] Init resource in a private placement
[11:27:04] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[11:27:04] ============= [PASSED] ttm_resource_init_basic =============
[11:27:04] [PASSED] ttm_resource_init_pinned
[11:27:04] [PASSED] ttm_resource_fini_basic
[11:27:04] [PASSED] ttm_resource_manager_init_basic
[11:27:04] [PASSED] ttm_resource_manager_usage_basic
[11:27:04] [PASSED] ttm_resource_manager_set_used_basic
[11:27:04] [PASSED] ttm_sys_man_alloc_basic
[11:27:04] [PASSED] ttm_sys_man_free_basic
[11:27:04] ================== [PASSED] ttm_resource ===================
[11:27:04] =================== ttm_tt (15 subtests) ===================
[11:27:04] ==================== ttm_tt_init_basic ====================
[11:27:04] [PASSED] Page-aligned size
[11:27:04] [PASSED] Extra pages requested
[11:27:04] ================ [PASSED] ttm_tt_init_basic ================
[11:27:04] [PASSED] ttm_tt_init_misaligned
[11:27:04] [PASSED] ttm_tt_fini_basic
[11:27:04] [PASSED] ttm_tt_fini_sg
[11:27:04] [PASSED] ttm_tt_fini_shmem
[11:27:04] [PASSED] ttm_tt_create_basic
[11:27:04] [PASSED] ttm_tt_create_invalid_bo_type
[11:27:04] [PASSED] ttm_tt_create_ttm_exists
[11:27:04] [PASSED] ttm_tt_create_failed
[11:27:04] [PASSED] ttm_tt_destroy_basic
[11:27:04] [PASSED] ttm_tt_populate_null_ttm
[11:27:04] [PASSED] ttm_tt_populate_populated_ttm
[11:27:04] [PASSED] ttm_tt_unpopulate_basic
[11:27:04] [PASSED] ttm_tt_unpopulate_empty_ttm
[11:27:04] [PASSED] ttm_tt_swapin_basic
[11:27:04] ===================== [PASSED] ttm_tt ======================
[11:27:04] =================== ttm_bo (14 subtests) ===================
[11:27:04] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[11:27:04] [PASSED] Cannot be interrupted and sleeps
[11:27:04] [PASSED] Cannot be interrupted, locks straight away
[11:27:04] [PASSED] Can be interrupted, sleeps
[11:27:04] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[11:27:04] [PASSED] ttm_bo_reserve_locked_no_sleep
[11:27:04] [PASSED] ttm_bo_reserve_no_wait_ticket
[11:27:04] [PASSED] ttm_bo_reserve_double_resv
[11:27:04] [PASSED] ttm_bo_reserve_interrupted
[11:27:04] [PASSED] ttm_bo_reserve_deadlock
[11:27:04] [PASSED] ttm_bo_unreserve_basic
[11:27:04] [PASSED] ttm_bo_unreserve_pinned
[11:27:04] [PASSED] ttm_bo_unreserve_bulk
[11:27:04] [PASSED] ttm_bo_fini_basic
[11:27:04] [PASSED] ttm_bo_fini_shared_resv
[11:27:04] [PASSED] ttm_bo_pin_basic
[11:27:04] [PASSED] ttm_bo_pin_unpin_resource
[11:27:04] [PASSED] ttm_bo_multiple_pin_one_unpin
[11:27:04] ===================== [PASSED] ttm_bo ======================
[11:27:04] ============== ttm_bo_validate (21 subtests) ===============
[11:27:04] ============== ttm_bo_init_reserved_sys_man ===============
[11:27:04] [PASSED] Buffer object for userspace
[11:27:04] [PASSED] Kernel buffer object
[11:27:04] [PASSED] Shared buffer object
[11:27:04] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[11:27:04] ============== ttm_bo_init_reserved_mock_man ==============
[11:27:04] [PASSED] Buffer object for userspace
[11:27:04] [PASSED] Kernel buffer object
[11:27:04] [PASSED] Shared buffer object
[11:27:04] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[11:27:04] [PASSED] ttm_bo_init_reserved_resv
[11:27:04] ================== ttm_bo_validate_basic ==================
[11:27:04] [PASSED] Buffer object for userspace
[11:27:04] [PASSED] Kernel buffer object
[11:27:04] [PASSED] Shared buffer object
[11:27:04] ============== [PASSED] ttm_bo_validate_basic ==============
[11:27:04] [PASSED] ttm_bo_validate_invalid_placement
[11:27:04] ============= ttm_bo_validate_same_placement ==============
[11:27:04] [PASSED] System manager
[11:27:04] [PASSED] VRAM manager
[11:27:04] ========= [PASSED] ttm_bo_validate_same_placement ==========
[11:27:04] [PASSED] ttm_bo_validate_failed_alloc
[11:27:04] [PASSED] ttm_bo_validate_pinned
[11:27:04] [PASSED] ttm_bo_validate_busy_placement
[11:27:04] ================ ttm_bo_validate_multihop =================
[11:27:04] [PASSED] Buffer object for userspace
[11:27:04] [PASSED] Kernel buffer object
[11:27:04] [PASSED] Shared buffer object
[11:27:04] ============ [PASSED] ttm_bo_validate_multihop =============
[11:27:04] ========== ttm_bo_validate_no_placement_signaled ==========
[11:27:04] [PASSED] Buffer object in system domain, no page vector
[11:27:04] [PASSED] Buffer object in system domain with an existing page vector
[11:27:04] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[11:27:04] ======== ttm_bo_validate_no_placement_not_signaled ========
[11:27:04] [PASSED] Buffer object for userspace
[11:27:04] [PASSED] Kernel buffer object
[11:27:04] [PASSED] Shared buffer object
[11:27:04] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[11:27:04] [PASSED] ttm_bo_validate_move_fence_signaled
[11:27:04] ========= ttm_bo_validate_move_fence_not_signaled =========
[11:27:04] [PASSED] Waits for GPU
[11:27:04] [PASSED] Tries to lock straight away
[11:27:04] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[11:27:04] [PASSED] ttm_bo_validate_happy_evict
[11:27:04] [PASSED] ttm_bo_validate_all_pinned_evict
[11:27:04] [PASSED] ttm_bo_validate_allowed_only_evict
[11:27:04] [PASSED] ttm_bo_validate_deleted_evict
[11:27:04] [PASSED] ttm_bo_validate_busy_domain_evict
[11:27:04] [PASSED] ttm_bo_validate_evict_gutting
[11:27:04] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[11:27:04] ================= [PASSED] ttm_bo_validate =================
[11:27:04] ============================================================
[11:27:04] Testing complete. Ran 101 tests: passed: 101
[11:27:04] Elapsed time: 11.302s total, 1.767s configuring, 9.319s building, 0.182s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning (rev3)
2025-09-29 8:36 [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Nareshkumar Gollakoti
2025-09-29 10:19 ` Upadhyay, Tejas
2025-09-29 11:27 ` ✓ CI.KUnit: success for drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning (rev3) Patchwork
@ 2025-09-29 12:04 ` Patchwork
2025-09-29 13:52 ` ✓ Xe.CI.Full: " Patchwork
` (5 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2025-09-29 12:04 UTC (permalink / raw)
To: Nareshkumar Gollakoti; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 991 bytes --]
== Series Details ==
Series: drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning (rev3)
URL : https://patchwork.freedesktop.org/series/154538/
State : success
== Summary ==
CI Bug Log - changes from xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e_BAT -> xe-pw-154538v3_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e -> xe-pw-154538v3
IGT_8556: e5eda2a187432a54f5e6fada18e4187e5175a10c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e: 63576a67d36e0d55003b5eb4d13055eee675bd0e
xe-pw-154538v3: 154538v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/index.html
[-- Attachment #2: Type: text/html, Size: 1543 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ Xe.CI.Full: success for drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning (rev3)
2025-09-29 8:36 [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Nareshkumar Gollakoti
` (2 preceding siblings ...)
2025-09-29 12:04 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-09-29 13:52 ` Patchwork
2025-09-29 15:34 ` [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Summers, Stuart
` (4 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2025-09-29 13:52 UTC (permalink / raw)
To: Nareshkumar Gollakoti; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 54028 bytes --]
== Series Details ==
Series: drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning (rev3)
URL : https://patchwork.freedesktop.org/series/154538/
State : success
== Summary ==
CI Bug Log - changes from xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e_FULL -> xe-pw-154538v3_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
New tests
---------
New tests have been introduced between xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e_FULL and xe-pw-154538v3_FULL:
### New IGT tests (1) ###
* igt@kms_lease@lease-invalid-connector@pipe-d-hdmi-a-2:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in xe-pw-154538v3_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@4-tiled-32bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][1] ([Intel XE#2327])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@linear-16bpp-rotate-90:
- shard-lnl: NOTRUN -> [SKIP][2] ([Intel XE#1407]) +1 other test skip
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_big_fb@linear-16bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-180:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#1124]) +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@kms_big_fb@yf-tiled-8bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
- shard-lnl: NOTRUN -> [SKIP][4] ([Intel XE#1124])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html
* igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p:
- shard-lnl: NOTRUN -> [SKIP][5] ([Intel XE#2191])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-3-displays-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#367])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@kms_bw@linear-tiling-3-displays-2560x1440p.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-b-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][7] ([Intel XE#787]) +167 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-432/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-b-dp-2.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs:
- shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#2887]) +3 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2887]) +1 other test skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs:
- shard-lnl: NOTRUN -> [SKIP][10] ([Intel XE#3432])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [PASS][11] -> [INCOMPLETE][12] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6:
- shard-dg2-set2: [PASS][13] -> [INCOMPLETE][14] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-d-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][15] ([Intel XE#455] / [Intel XE#787]) +23 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-432/igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-d-dp-2.html
* igt@kms_cdclk@mode-transition@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][16] ([Intel XE#4417]) +3 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-433/igt@kms_cdclk@mode-transition@pipe-d-dp-4.html
* igt@kms_chamelium_color@degamma:
- shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#306])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_chamelium_color@degamma.html
* igt@kms_chamelium_edid@vga-edid-read:
- shard-lnl: NOTRUN -> [SKIP][18] ([Intel XE#373]) +1 other test skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_chamelium_edid@vga-edid-read.html
* igt@kms_content_protection@content-type-change:
- shard-lnl: NOTRUN -> [SKIP][19] ([Intel XE#3278])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@uevent@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][20] ([Intel XE#1188])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-464/igt@kms_content_protection@uevent@pipe-a-dp-4.html
* igt@kms_cursor_crc@cursor-rapid-movement-64x21:
- shard-lnl: NOTRUN -> [SKIP][21] ([Intel XE#1424])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_cursor_crc@cursor-rapid-movement-64x21.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
- shard-bmg: [PASS][22] -> [SKIP][23] ([Intel XE#2291])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-3/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-bmg: [PASS][24] -> [FAIL][25] ([Intel XE#1475])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#4354])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_flip@2x-flip-vs-blocking-wf-vblank:
- shard-bmg: [PASS][27] -> [SKIP][28] ([Intel XE#2316])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-3/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-6/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [PASS][29] -> [FAIL][30] ([Intel XE#301])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-adlp: [PASS][31] -> [DMESG-WARN][32] ([Intel XE#4543]) +11 other tests dmesg-warn
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-adlp-3/igt@kms_flip@flip-vs-suspend-interruptible.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-adlp-6/igt@kms_flip@flip-vs-suspend-interruptible.html
- shard-dg2-set2: [PASS][33] -> [INCOMPLETE][34] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-463/igt@kms_flip@flip-vs-suspend-interruptible.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-435/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
- shard-lnl: NOTRUN -> [SKIP][35] ([Intel XE#1401] / [Intel XE#1745])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][36] ([Intel XE#1401])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling@pipe-a-default-mode.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-x:
- shard-adlp: [PASS][37] -> [DMESG-FAIL][38] ([Intel XE#4543])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-adlp-2/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-x.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-x.html
* igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#2311]) +5 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#5390]) +1 other test skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][41] ([Intel XE#656]) +7 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-tiling-4:
- shard-lnl: NOTRUN -> [SKIP][42] ([Intel XE#651]) +3 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#2313]) +2 other tests skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-lnl: NOTRUN -> [SKIP][44] ([Intel XE#1469])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#4298])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_plane_lowres@tiling-x@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][46] ([Intel XE#599]) +3 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_plane_lowres@tiling-x@pipe-b-edp-1.html
* igt@kms_plane_scaling@2x-scaler-multi-pipe:
- shard-bmg: [PASS][47] -> [SKIP][48] ([Intel XE#2571])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-8/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-6/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a:
- shard-lnl: NOTRUN -> [SKIP][49] ([Intel XE#2763]) +5 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2763]) +4 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html
* igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area:
- shard-lnl: NOTRUN -> [SKIP][51] ([Intel XE#1406] / [Intel XE#2893] / [Intel XE#4608]) +1 other test skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][52] ([Intel XE#1406] / [Intel XE#4608]) +3 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area@pipe-b-edp-1.html
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#1406] / [Intel XE#1489])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr@fbc-psr-primary-page-flip:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@kms_psr@fbc-psr-primary-page-flip.html
* igt@kms_psr@fbc-psr2-sprite-blt:
- shard-lnl: NOTRUN -> [SKIP][55] ([Intel XE#1406]) +1 other test skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_psr@fbc-psr2-sprite-blt.html
* igt@kms_psr@fbc-psr2-sprite-blt@edp-1:
- shard-lnl: NOTRUN -> [SKIP][56] ([Intel XE#1406] / [Intel XE#4609])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@kms_psr@fbc-psr2-sprite-blt@edp-1.html
* igt@kms_setmode@clone-exclusive-crtc:
- shard-bmg: [PASS][57] -> [SKIP][58] ([Intel XE#1435])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-3/igt@kms_setmode@clone-exclusive-crtc.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-6/igt@kms_setmode@clone-exclusive-crtc.html
* igt@xe_eudebug@basic-vm-bind-vm-destroy-discovery:
- shard-lnl: NOTRUN -> [SKIP][59] ([Intel XE#4837])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@xe_eudebug@basic-vm-bind-vm-destroy-discovery.html
* igt@xe_eudebug_online@breakpoint-many-sessions-tiles:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#4837]) +1 other test skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@xe_eudebug_online@breakpoint-many-sessions-tiles.html
* igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
- shard-lnl: NOTRUN -> [SKIP][61] ([Intel XE#1392]) +1 other test skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue:
- shard-dg2-set2: [PASS][62] -> [SKIP][63] ([Intel XE#1392]) +5 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-434/igt@xe_exec_basic@multigpu-once-bindexecqueue.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-432/igt@xe_exec_basic@multigpu-once-bindexecqueue.html
* igt@xe_exec_reset@parallel-gt-reset:
- shard-adlp: [PASS][64] -> [DMESG-WARN][65] ([Intel XE#3876])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-adlp-6/igt@xe_exec_reset@parallel-gt-reset.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-adlp-9/igt@xe_exec_reset@parallel-gt-reset.html
* igt@xe_exec_system_allocator@once-large-mmap-free-huge-nomemset:
- shard-lnl: NOTRUN -> [SKIP][66] ([Intel XE#4943]) +8 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@xe_exec_system_allocator@once-large-mmap-free-huge-nomemset.html
* igt@xe_exec_system_allocator@once-mmap-new-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][67] ([Intel XE#4943]) +1 other test skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@xe_exec_system_allocator@once-mmap-new-huge-nomemset.html
* igt@xe_exec_system_allocator@partial-remap-no-cpu-fault:
- shard-bmg: [PASS][68] -> [FAIL][69] ([Intel XE#4937])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-1/igt@xe_exec_system_allocator@partial-remap-no-cpu-fault.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@xe_exec_system_allocator@partial-remap-no-cpu-fault.html
* igt@xe_exec_system_allocator@process-many-execqueues-new-race:
- shard-dg2-set2: NOTRUN -> [SKIP][70] ([Intel XE#4915]) +1 other test skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-464/igt@xe_exec_system_allocator@process-many-execqueues-new-race.html
* igt@xe_exec_threads@threads-bal-fd-userptr-invalidate-race:
- shard-adlp: [PASS][71] -> [DMESG-FAIL][72] ([Intel XE#3876]) +2 other tests dmesg-fail
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-adlp-6/igt@xe_exec_threads@threads-bal-fd-userptr-invalidate-race.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-adlp-9/igt@xe_exec_threads@threads-bal-fd-userptr-invalidate-race.html
* igt@xe_mmap@pci-membarrier-bad-pagesize:
- shard-lnl: NOTRUN -> [SKIP][73] ([Intel XE#5100])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@xe_mmap@pci-membarrier-bad-pagesize.html
* igt@xe_module_load@force-load:
- shard-lnl: NOTRUN -> [SKIP][74] ([Intel XE#378])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@xe_module_load@force-load.html
* igt@xe_pm@s2idle-basic:
- shard-adlp: [PASS][75] -> [DMESG-WARN][76] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4504])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-adlp-2/igt@xe_pm@s2idle-basic.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-adlp-3/igt@xe_pm@s2idle-basic.html
* igt@xe_pm@s3-multiple-execs:
- shard-lnl: NOTRUN -> [SKIP][77] ([Intel XE#584])
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@xe_pm@s3-multiple-execs.html
* igt@xe_pm_residency@cpg-basic:
- shard-adlp: [PASS][78] -> [DMESG-WARN][79] ([Intel XE#2953] / [Intel XE#4173]) +2 other tests dmesg-warn
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-adlp-6/igt@xe_pm_residency@cpg-basic.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-adlp-9/igt@xe_pm_residency@cpg-basic.html
* igt@xe_pmu@engine-activity-idle@engine-drm_xe_engine_class_video_enhance1:
- shard-bmg: NOTRUN -> [DMESG-WARN][80] ([Intel XE#6190]) +3 other tests dmesg-warn
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@xe_pmu@engine-activity-idle@engine-drm_xe_engine_class_video_enhance1.html
* igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
- shard-bmg: NOTRUN -> [SKIP][81] ([Intel XE#944])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html
* igt@xe_query@multigpu-query-topology-l3-bank-mask:
- shard-lnl: NOTRUN -> [SKIP][82] ([Intel XE#944]) +1 other test skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@xe_query@multigpu-query-topology-l3-bank-mask.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-dg2-set2: NOTRUN -> [SKIP][83] ([Intel XE#3342])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-464/igt@xe_sriov_flr@flr-vf1-clear.html
#### Possible fixes ####
* igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1:
- shard-lnl: [FAIL][84] ([Intel XE#6054]) -> [PASS][85] +3 other tests pass
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-lnl-1/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-3/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html
* igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
- shard-bmg: [SKIP][86] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][87] +2 other tests pass
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
- shard-bmg: [SKIP][88] ([Intel XE#2291]) -> [PASS][89] +2 other tests pass
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: [FAIL][90] ([Intel XE#4633]) -> [PASS][91]
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_dp_aux_dev:
- shard-bmg: [SKIP][92] ([Intel XE#3009]) -> [PASS][93]
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-6/igt@kms_dp_aux_dev.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-5/igt@kms_dp_aux_dev.html
* igt@kms_feature_discovery@display-2x:
- shard-bmg: [SKIP][94] ([Intel XE#2373]) -> [PASS][95]
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-6/igt@kms_feature_discovery@display-2x.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-5/igt@kms_feature_discovery@display-2x.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-bmg: [SKIP][96] ([Intel XE#2316]) -> [PASS][97] +3 other tests pass
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-6/igt@kms_flip@2x-plain-flip-interruptible.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-5/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [FAIL][98] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip@flip-vs-suspend@a-hdmi-a6:
- shard-dg2-set2: [INCOMPLETE][100] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][101] +1 other test pass
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-466/igt@kms_flip@flip-vs-suspend@a-hdmi-a6.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-464/igt@kms_flip@flip-vs-suspend@a-hdmi-a6.html
* igt@kms_flip@flip-vs-suspend@b-hdmi-a1:
- shard-adlp: [DMESG-WARN][102] ([Intel XE#4543]) -> [PASS][103] +6 other tests pass
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-adlp-2/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-adlp-4/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-y:
- shard-adlp: [DMESG-FAIL][104] ([Intel XE#4543]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-adlp-2/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-y.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-y.html
* igt@kms_hdr@static-swap:
- shard-bmg: [SKIP][106] ([Intel XE#1503]) -> [PASS][107] +2 other tests pass
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-6/igt@kms_hdr@static-swap.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-7/igt@kms_hdr@static-swap.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-bmg: [SKIP][108] ([Intel XE#4596]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-4.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75:
- shard-adlp: [DMESG-WARN][110] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][111] +2 other tests pass
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-adlp-9/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-adlp-2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html
* igt@xe_compute@ccs-mode-basic:
- shard-bmg: [FAIL][112] ([Intel XE#5794]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-7/igt@xe_compute@ccs-mode-basic.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@xe_compute@ccs-mode-basic.html
* igt@xe_compute@ccs-mode-compute-kernel:
- shard-bmg: [FAIL][114] ([Intel XE#5963]) -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-6/igt@xe_compute@ccs-mode-compute-kernel.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-5/igt@xe_compute@ccs-mode-compute-kernel.html
* {igt@xe_configfs@ctx-restore-post-bb-invalid}:
- shard-lnl: [DMESG-WARN][116] ([Intel XE#5732]) -> [PASS][117]
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-lnl-3/igt@xe_configfs@ctx-restore-post-bb-invalid.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@xe_configfs@ctx-restore-post-bb-invalid.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate-race:
- shard-dg2-set2: [SKIP][118] ([Intel XE#1392]) -> [PASS][119] +6 other tests pass
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-432/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate-race.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-464/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate-race.html
* {igt@xe_exec_system_allocator@many-64k-mmap-prefetch-shared}:
- shard-bmg: [CRASH][120] ([Intel XE#6192]) -> [PASS][121] +5 other tests pass
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-1/igt@xe_exec_system_allocator@many-64k-mmap-prefetch-shared.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-7/igt@xe_exec_system_allocator@many-64k-mmap-prefetch-shared.html
* {igt@xe_exec_system_allocator@many-64k-new-prefetch}:
- shard-lnl: [CRASH][122] ([Intel XE#6192]) -> [PASS][123] +5 other tests pass
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-lnl-1/igt@xe_exec_system_allocator@many-64k-new-prefetch.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-1/igt@xe_exec_system_allocator@many-64k-new-prefetch.html
* {igt@xe_exec_system_allocator@threads-many-execqueues-mmap-prefetch}:
- shard-bmg: [WARN][124] ([Intel XE#5786]) -> [PASS][125]
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-6/igt@xe_exec_system_allocator@threads-many-execqueues-mmap-prefetch.html
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-5/igt@xe_exec_system_allocator@threads-many-execqueues-mmap-prefetch.html
* igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv:
- shard-dg2-set2: [DMESG-WARN][126] ([Intel XE#5893]) -> [PASS][127]
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-466/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-464/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
* igt@xe_module_load@load:
- shard-dg2-set2: ([PASS][128], [PASS][129], [PASS][130], [PASS][131], [PASS][132], [PASS][133], [SKIP][134], [PASS][135], [PASS][136], [PASS][137], [PASS][138], [PASS][139], [PASS][140], [PASS][141], [PASS][142], [PASS][143], [PASS][144], [PASS][145], [PASS][146], [PASS][147], [PASS][148], [PASS][149], [PASS][150], [PASS][151], [PASS][152], [PASS][153]) ([Intel XE#378]) -> ([PASS][154], [PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [PASS][162], [PASS][163], [PASS][164], [PASS][165], [PASS][166], [PASS][167], [PASS][168], [PASS][169], [PASS][170], [PASS][171], [PASS][172], [PASS][173], [PASS][174], [PASS][175], [PASS][176], [PASS][177], [PASS][178])
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-436/igt@xe_module_load@load.html
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-436/igt@xe_module_load@load.html
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-466/igt@xe_module_load@load.html
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-434/igt@xe_module_load@load.html
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-463/igt@xe_module_load@load.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-436/igt@xe_module_load@load.html
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-435/igt@xe_module_load@load.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-433/igt@xe_module_load@load.html
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-434/igt@xe_module_load@load.html
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-434/igt@xe_module_load@load.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-433/igt@xe_module_load@load.html
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-464/igt@xe_module_load@load.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-464/igt@xe_module_load@load.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-463/igt@xe_module_load@load.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-466/igt@xe_module_load@load.html
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-435/igt@xe_module_load@load.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-432/igt@xe_module_load@load.html
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-435/igt@xe_module_load@load.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-434/igt@xe_module_load@load.html
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-433/igt@xe_module_load@load.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-466/igt@xe_module_load@load.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-464/igt@xe_module_load@load.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-432/igt@xe_module_load@load.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-466/igt@xe_module_load@load.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-435/igt@xe_module_load@load.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-432/igt@xe_module_load@load.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-433/igt@xe_module_load@load.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-464/igt@xe_module_load@load.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-466/igt@xe_module_load@load.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-463/igt@xe_module_load@load.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-434/igt@xe_module_load@load.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-434/igt@xe_module_load@load.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-435/igt@xe_module_load@load.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-434/igt@xe_module_load@load.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-434/igt@xe_module_load@load.html
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-463/igt@xe_module_load@load.html
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-432/igt@xe_module_load@load.html
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-432/igt@xe_module_load@load.html
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-464/igt@xe_module_load@load.html
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-433/igt@xe_module_load@load.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-432/igt@xe_module_load@load.html
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-464/igt@xe_module_load@load.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-466/igt@xe_module_load@load.html
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-466/igt@xe_module_load@load.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-435/igt@xe_module_load@load.html
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-435/igt@xe_module_load@load.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-432/igt@xe_module_load@load.html
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-463/igt@xe_module_load@load.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-433/igt@xe_module_load@load.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-436/igt@xe_module_load@load.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-436/igt@xe_module_load@load.html
* igt@xe_pm@s2idle-vm-bind-prefetch:
- shard-lnl: [ABORT][179] ([Intel XE#4847]) -> [PASS][180]
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-lnl-3/igt@xe_pm@s2idle-vm-bind-prefetch.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-8/igt@xe_pm@s2idle-vm-bind-prefetch.html
#### Warnings ####
* igt@kms_content_protection@uevent:
- shard-bmg: [FAIL][181] ([Intel XE#1188]) -> [SKIP][182] ([Intel XE#2341])
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-3/igt@kms_content_protection@uevent.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-6/igt@kms_content_protection@uevent.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-lnl: [FAIL][183] ([Intel XE#301] / [Intel XE#3149]) -> [FAIL][184] ([Intel XE#301])
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
- shard-bmg: [SKIP][185] ([Intel XE#2311]) -> [SKIP][186] ([Intel XE#2312]) +9 other tests skip
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-move:
- shard-bmg: [SKIP][187] ([Intel XE#2312]) -> [SKIP][188] ([Intel XE#2311]) +11 other tests skip
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-move.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt:
- shard-adlp: [DMESG-FAIL][189] ([Intel XE#4543]) -> [DMESG-FAIL][190] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4543])
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-adlp-3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-adlp-6/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][191] ([Intel XE#2312]) -> [SKIP][192] ([Intel XE#5390]) +4 other tests skip
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][193] ([Intel XE#5390]) -> [SKIP][194] ([Intel XE#2312]) +2 other tests skip
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt:
- shard-bmg: [SKIP][195] ([Intel XE#2312]) -> [SKIP][196] ([Intel XE#2313]) +11 other tests skip
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen:
- shard-bmg: [SKIP][197] ([Intel XE#2313]) -> [SKIP][198] ([Intel XE#2312]) +7 other tests skip
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][199] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][200] ([Intel XE#3544])
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-dg2-set2: [SKIP][201] ([Intel XE#362]) -> [FAIL][202] ([Intel XE#1729])
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern.html
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-466/igt@kms_tiled_display@basic-test-pattern.html
* igt@xe_exec_threads@threads-bal-fd-userptr-invalidate-race:
- shard-bmg: [DMESG-FAIL][203] ([Intel XE#3876]) -> [DMESG-WARN][204] ([Intel XE#3876])
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-2/igt@xe_exec_threads@threads-bal-fd-userptr-invalidate-race.html
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-2/igt@xe_exec_threads@threads-bal-fd-userptr-invalidate-race.html
* igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
- shard-dg2-set2: [ABORT][205] ([Intel XE#5466]) -> [ABORT][206] ([Intel XE#4917] / [Intel XE#5466])
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-434/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-436/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
- shard-bmg: [ABORT][207] ([Intel XE#5466] / [Intel XE#5530]) -> [ABORT][208] ([Intel XE#4917] / [Intel XE#5466] / [Intel XE#5530])
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-bmg-4/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-bmg-8/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
* igt@xe_peer2peer@write:
- shard-dg2-set2: [FAIL][209] ([Intel XE#1173]) -> [SKIP][210] ([Intel XE#1061])
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-dg2-464/igt@xe_peer2peer@write.html
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-dg2-432/igt@xe_peer2peer@write.html
* igt@xe_sriov_scheduling@equal-throughput:
- shard-adlp: [DMESG-FAIL][211] ([Intel XE#5213]) -> [ABORT][212] ([Intel XE#4917]) +1 other test abort
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e/shard-adlp-4/igt@xe_sriov_scheduling@equal-throughput.html
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/shard-adlp-6/igt@xe_sriov_scheduling@equal-throughput.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1469]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1469
[Intel XE#1475]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1475
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
[Intel XE#2571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2571
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
[Intel XE#4504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4504
[Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
[Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
[Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4847]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4847
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917
[Intel XE#4937]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4937
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
[Intel XE#5213]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5213
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
[Intel XE#5530]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5530
[Intel XE#5732]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5732
[Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
[Intel XE#5794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5794
[Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
[Intel XE#5893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5893
[Intel XE#5963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5963
[Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
[Intel XE#6011]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6011
[Intel XE#6054]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6054
[Intel XE#6190]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6190
[Intel XE#6192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6192
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e -> xe-pw-154538v3
IGT_8556: e5eda2a187432a54f5e6fada18e4187e5175a10c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3837-63576a67d36e0d55003b5eb4d13055eee675bd0e: 63576a67d36e0d55003b5eb4d13055eee675bd0e
xe-pw-154538v3: 154538v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154538v3/index.html
[-- Attachment #2: Type: text/html, Size: 61738 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning
2025-09-29 8:36 [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Nareshkumar Gollakoti
` (3 preceding siblings ...)
2025-09-29 13:52 ` ✓ Xe.CI.Full: " Patchwork
@ 2025-09-29 15:34 ` Summers, Stuart
2025-09-29 17:53 ` Michal Wajdeczko
` (3 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Summers, Stuart @ 2025-09-29 15:34 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Kumar G, Naresh
Cc: Gupta, Varun, Wajdeczko, Michal
On Mon, 2025-09-29 at 14:06 +0530, Nareshkumar Gollakoti wrote:
> Due to SLA agreement between PF and VFs, multi CCS mode can't
> be enabled when VFs are already enabled.
> Similarly, enabling VFs is disabled when multi ccs mode enabled.
I have a similar comment inline below as well, but while you're
describing what you're doing here, I don't understand why we need to do
it. The previous check should have covered this too right?
>
> v2:function xe_device_is_vf_enabled has been refactored to
> xe_sriov_pf_has_vfs_enabled and moved to xe_sriov_pf_helper.h.
> The code now distinctly checks for SR-IOV VF mode and
> SR-IOV PF with VFs enabled.
> Log messages have been updated to explicitly state the current mode.
> The function xe_multi_ccs_mode_enabled is moved to xe_device.h
>
> v3: Described missed arg documentation for
> xe_sriov_pf_has_vfs_enabled
>
> Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
> ---
> drivers/gpu/drm/xe/xe_device.h | 8 ++++++++
> drivers/gpu/drm/xe/xe_gt_ccs_mode.c | 14 +++++++++++---
> drivers/gpu/drm/xe/xe_pci_sriov.c | 6 ++++++
> drivers/gpu/drm/xe/xe_sriov_pf_helpers.h | 13 +++++++++++++
> 4 files changed, 38 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.h
> b/drivers/gpu/drm/xe/xe_device.h
> index 32cc6323b7f6..986f9cabb897 100644
> --- a/drivers/gpu/drm/xe/xe_device.h
> +++ b/drivers/gpu/drm/xe/xe_device.h
> @@ -172,6 +172,14 @@ static inline bool xe_device_has_lmtt(struct
> xe_device *xe)
> return IS_DGFX(xe);
> }
>
> +static inline bool xe_multi_ccs_mode_enabled(struct xe_device *xe)
> +{
> + /* Multi CCS mode supported exclusively on GT0 */
> + struct xe_gt *gt = xe_device_get_gt(xe, 0);
> +
> + return gt->ccs_mode > 1;
> +}
> +
> u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size);
>
> void xe_device_snapshot_print(struct xe_device *xe, struct
> drm_printer *p);
> diff --git a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
> b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
> index 50fffc9ebf62..584f3245fc7d 100644
> --- a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
> +++ b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
> @@ -13,6 +13,7 @@
> #include "xe_gt_sysfs.h"
> #include "xe_mmio.h"
> #include "xe_sriov.h"
> +#include "xe_sriov_pf_helpers.h"
>
> static void __xe_gt_apply_ccs_mode(struct xe_gt *gt, u32
> num_engines)
> {
> @@ -117,9 +118,16 @@ ccs_mode_store(struct device *kdev, struct
> device_attribute *attr,
> u32 num_engines, num_slices;
> int ret;
>
> - if (IS_SRIOV(xe)) {
> - xe_gt_dbg(gt, "Can't change compute mode when running
> as %s\n",
> -
> xe_sriov_mode_to_string(xe_device_sriov_mode(xe)));
> + /*
> + * Check if the device is:
> + * 1. Operating as an SR-IOV Virtual Function (VF), or
> + * 2. An SR-IOV Physical Function (PF) with one or more VFs
> enabled.
> + * Enabling multi CCS mode is not permitted in either
> scenario.
> + */
IMO this comment isn't needed. The two conditions you have below are
self-explanatory.
> + if (IS_SRIOV_VF(xe) || xe_sriov_pf_has_vfs_enabled(xe)) {
Also as I mentioned earlier, why do we need to make this change here?
Is there a requirement to enable this in SRIOV_PF mode? My
understanding is we wanted to explicitly stick to the default mode (one
CCS) in this case.
Thanks,
Stuart
> + const char *mode_str =
> !strcmp(xe_sriov_mode_to_string(xe_device_sriov_mode(xe)),
> + "SR-IOV VF") ? "SR-IOV VF" :
> "SR-IOV PF with VFs Enabled";
> + xe_gt_dbg(gt, "Can't change compute mode when running
> as %s\n", mode_str);
> return -EOPNOTSUPP;
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c
> b/drivers/gpu/drm/xe/xe_pci_sriov.c
> index af05db07162e..71c1d998ba82 100644
> --- a/drivers/gpu/drm/xe/xe_pci_sriov.c
> +++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
> @@ -155,6 +155,12 @@ static int pf_enable_vfs(struct xe_device *xe,
> int num_vfs)
> xe_assert(xe, num_vfs <= total_vfs);
> xe_sriov_dbg(xe, "enabling %u VF%s\n", num_vfs,
> str_plural(num_vfs));
>
> + if (xe_multi_ccs_mode_enabled(xe)) {
> + xe_sriov_info(xe, "Disable multi-ccs mode before
> enabling VF's\n");
> +
> + return -ECANCELED;
> + }
> +
> err = xe_sriov_pf_wait_ready(xe);
> if (err)
> goto out;
> diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
> b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
> index dd1df950b021..e26837091375 100644
> --- a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
> +++ b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
> @@ -43,4 +43,17 @@ static inline struct mutex
> *xe_sriov_pf_master_mutex(struct xe_device *xe)
> return &xe->sriov.pf.master_lock;
> }
>
> +/**
> + * xe_sriov_pf_has_vfs_enabled() - Determines if the PF has any VFs
> enabled
> + * @xe: ptr to xe_device
> + *
> + * Return: true if one or more VFs are enabled on the PF, false
> otherwise.
> + */
> +static inline bool xe_sriov_pf_has_vfs_enabled(const struct
> xe_device *xe)
> +{
> + struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> +
> + return pci_num_vf(pdev) > 0;
> +}
> +
> #endif
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning
2025-09-29 8:36 [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Nareshkumar Gollakoti
` (4 preceding siblings ...)
2025-09-29 15:34 ` [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Summers, Stuart
@ 2025-09-29 17:53 ` Michal Wajdeczko
2025-10-02 11:13 ` Nareshkumar Gollakoti
` (2 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Michal Wajdeczko @ 2025-09-29 17:53 UTC (permalink / raw)
To: Nareshkumar Gollakoti, intel-xe; +Cc: varun.gupta
On 9/29/2025 10:36 AM, Nareshkumar Gollakoti wrote:
> Due to SLA agreement between PF and VFs, multi CCS mode can't
> be enabled when VFs are already enabled.
> Similarly, enabling VFs is disabled when multi ccs mode enabled.
s/ccs/CCS
>
> v2:function xe_device_is_vf_enabled has been refactored to
> xe_sriov_pf_has_vfs_enabled and moved to xe_sriov_pf_helper.h.
> The code now distinctly checks for SR-IOV VF mode and
> SR-IOV PF with VFs enabled.
> Log messages have been updated to explicitly state the current mode.
> The function xe_multi_ccs_mode_enabled is moved to xe_device.h
>
> v3: Described missed arg documentation for xe_sriov_pf_has_vfs_enabled
you can keep version log under ---
>
> Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
> ---
> drivers/gpu/drm/xe/xe_device.h | 8 ++++++++
> drivers/gpu/drm/xe/xe_gt_ccs_mode.c | 14 +++++++++++---
> drivers/gpu/drm/xe/xe_pci_sriov.c | 6 ++++++
> drivers/gpu/drm/xe/xe_sriov_pf_helpers.h | 13 +++++++++++++
> 4 files changed, 38 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
> index 32cc6323b7f6..986f9cabb897 100644
> --- a/drivers/gpu/drm/xe/xe_device.h
> +++ b/drivers/gpu/drm/xe/xe_device.h
> @@ -172,6 +172,14 @@ static inline bool xe_device_has_lmtt(struct xe_device *xe)
> return IS_DGFX(xe);
> }
>
> +static inline bool xe_multi_ccs_mode_enabled(struct xe_device *xe)
> +{
> + /* Multi CCS mode supported exclusively on GT0 */
> + struct xe_gt *gt = xe_device_get_gt(xe, 0);
beware of the discussion at https://patchwork.freedesktop.org/series/155114/#rev1
> +
> + return gt->ccs_mode > 1;
> +}
> +
> u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size);
>
> void xe_device_snapshot_print(struct xe_device *xe, struct drm_printer *p);
> diff --git a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
> index 50fffc9ebf62..584f3245fc7d 100644
> --- a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
> +++ b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
> @@ -13,6 +13,7 @@
> #include "xe_gt_sysfs.h"
> #include "xe_mmio.h"
> #include "xe_sriov.h"
> +#include "xe_sriov_pf_helpers.h"
>
> static void __xe_gt_apply_ccs_mode(struct xe_gt *gt, u32 num_engines)
> {
> @@ -117,9 +118,16 @@ ccs_mode_store(struct device *kdev, struct device_attribute *attr,
> u32 num_engines, num_slices;
> int ret;
>
> - if (IS_SRIOV(xe)) {
> - xe_gt_dbg(gt, "Can't change compute mode when running as %s\n",
> - xe_sriov_mode_to_string(xe_device_sriov_mode(xe)));
> + /*
> + * Check if the device is:
> + * 1. Operating as an SR-IOV Virtual Function (VF), or
> + * 2. An SR-IOV Physical Function (PF) with one or more VFs enabled.
> + * Enabling multi CCS mode is not permitted in either scenario.
in case 1 it is rather "not possible", so I would split that case, as suggested in [1]
[1] https://patchwork.freedesktop.org/patch/674760/?series=154538&rev=1#comment_1240131
> + */
> + if (IS_SRIOV_VF(xe) || xe_sriov_pf_has_vfs_enabled(xe)) {
> + const char *mode_str = !strcmp(xe_sriov_mode_to_string(xe_device_sriov_mode(xe)),
hmm, what's the goal of comparing mode string, where you already have access to the mode?
but, what's the point of exposing "gt_ccs_mode_attrs" for VFs when they can't do anything with them?
maybe you can get rid of one condition above, by simply checking for IS_VF when adding sysfs attributes?
> + "SR-IOV VF") ? "SR-IOV VF" : "SR-IOV PF with VFs Enabled";
> + xe_gt_dbg(gt, "Can't change compute mode when running as %s\n", mode_str);
> return -EOPNOTSUPP;
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c b/drivers/gpu/drm/xe/xe_pci_sriov.c
> index af05db07162e..71c1d998ba82 100644
> --- a/drivers/gpu/drm/xe/xe_pci_sriov.c
> +++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
> @@ -155,6 +155,12 @@ static int pf_enable_vfs(struct xe_device *xe, int num_vfs)
> xe_assert(xe, num_vfs <= total_vfs);
> xe_sriov_dbg(xe, "enabling %u VF%s\n", num_vfs, str_plural(num_vfs));
>
> + if (xe_multi_ccs_mode_enabled(xe)) {
> + xe_sriov_info(xe, "Disable multi-ccs mode before enabling VF's\n");
multi-CCS ?
> +
> + return -ECANCELED;
> + }
> +
I still don't see how do you want to protect against the case when CCS mode will be
changed right after above check but before PF actually enable VFs
> err = xe_sriov_pf_wait_ready(xe);
> if (err)
> goto out;
> diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
> index dd1df950b021..e26837091375 100644
> --- a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
> +++ b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
> @@ -43,4 +43,17 @@ static inline struct mutex *xe_sriov_pf_master_mutex(struct xe_device *xe)
> return &xe->sriov.pf.master_lock;
> }
>
> +/**
> + * xe_sriov_pf_has_vfs_enabled() - Determines if the PF has any VFs enabled
> + * @xe: ptr to xe_device
> + *
> + * Return: true if one or more VFs are enabled on the PF, false otherwise.
> + */
> +static inline bool xe_sriov_pf_has_vfs_enabled(const struct xe_device *xe)
> +{
> + struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> +
> + return pci_num_vf(pdev) > 0;
> +}
> +
> #endif
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning
2025-09-29 8:36 [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Nareshkumar Gollakoti
` (5 preceding siblings ...)
2025-09-29 17:53 ` Michal Wajdeczko
@ 2025-10-02 11:13 ` Nareshkumar Gollakoti
2025-10-06 8:02 ` Nareshkumar Gollakoti
2025-10-06 9:37 ` [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Nareshkumar Gollakoti
8 siblings, 0 replies; 14+ messages in thread
From: Nareshkumar Gollakoti @ 2025-10-02 11:13 UTC (permalink / raw)
To: naresh.kumar.g, intel-xe; +Cc: Michal.Wajdeczko, varun.gupta
In My Test check:
Although I attempted to acquire a lock within ccs_mode_store to ensure protection,
a deadlock occurs because the lock has already been acquired earlier in the code flow before entering the function.
As a result, trying to acquire the same lock again inside ccsmode_store leads to a deadlock situation.
>> err = xe_sriov_pf_wait_ready(xe);
>> if (err)
>> goto out;
>> diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
>> b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
>> index dd1df950b021..e26837091375 100644
>> --- a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
>> +++ b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
>> @@ -43,4 +43,17 @@ static inline struct mutex *xe_sriov_pf_master_mutex(struct xe_device *xe)
>> return &xe->sriov.pf.master_lock;
>> }
>>
>> +/**
>> + * xe_sriov_pf_has_vfs_enabled() - Determines if the PF has any VFs
>> +enabled
>> + * @xe: ptr to xe_device
>> + *
>> + * Return: true if one or more VFs are enabled on the PF, false otherwise.
>> + */
>> +static inline bool xe_sriov_pf_has_vfs_enabled(const struct xe_device
>> +*xe) {
>> + struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
>> +
>> + return pci_num_vf(pdev) > 0;
>> +}
>> +
>> #endif
^ permalink raw reply [flat|nested] 14+ messages in thread
* (no subject)
2025-09-29 8:36 [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Nareshkumar Gollakoti
` (6 preceding siblings ...)
2025-10-02 11:13 ` Nareshkumar Gollakoti
@ 2025-10-06 8:02 ` Nareshkumar Gollakoti
2025-10-06 9:37 ` [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Nareshkumar Gollakoti
8 siblings, 0 replies; 14+ messages in thread
From: Nareshkumar Gollakoti @ 2025-10-06 8:02 UTC (permalink / raw)
To: intel-xe; +Cc: Michal.Wajdeczko, varun.gupta, naresh.kumar.g
Subject: Re: [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning
From: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: naresh.kumar.g@intel.com, Michal.Wajdeczko@intel.com,
varun.gupta@intel.com
>On 9/29/2025 10:36 AM, Nareshkumar Gollakoti wrote:
>> Due to SLA agreement between PF and VFs, multi CCS mode can't be
>> enabled when VFs are already enabled.
>> Similarly, enabling VFs is disabled when multi ccs mode enabled.
>
>s/ccs/CCS
Incorporated in V4
>>
>> v2:function xe_device_is_vf_enabled has been refactored to
>> xe_sriov_pf_has_vfs_enabled and moved to xe_sriov_pf_helper.h.
>> The code now distinctly checks for SR-IOV VF mode and SR-IOV PF with
>> VFs enabled.
>> Log messages have been updated to explicitly state the current mode.
>> The function xe_multi_ccs_mode_enabled is moved to xe_device.h
>>
>> v3: Described missed arg documentation for xe_sriov_pf_has_vfs_enabled
>
>you can keep version log under ---
>
Incorporated in V4
>>
>> Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_device.h | 8 ++++++++
>> drivers/gpu/drm/xe/xe_gt_ccs_mode.c | 14 +++++++++++---
>> drivers/gpu/drm/xe/xe_pci_sriov.c | 6 ++++++
>> drivers/gpu/drm/xe/xe_sriov_pf_helpers.h | 13 +++++++++++++
>> 4 files changed, 38 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_device.h
>> b/drivers/gpu/drm/xe/xe_device.h index 32cc6323b7f6..986f9cabb897
>> 100644
>> --- a/drivers/gpu/drm/xe/xe_device.h
>> +++ b/drivers/gpu/drm/xe/xe_device.h
>> @@ -172,6 +172,14 @@ static inline bool xe_device_has_lmtt(struct xe_device *xe)
>> return IS_DGFX(xe);
>> }
>>
>> +static inline bool xe_multi_ccs_mode_enabled(struct xe_device *xe) {
>> + /* Multi CCS mode supported exclusively on GT0 */
>> + struct xe_gt *gt = xe_device_get_gt(xe, 0);
>
>beware of the discussion at https://patchwork.freedesktop.org/series/155114/#rev1
>
In my case am using existing gt id '0' and here expectation is will get proper gt.
do we really get gt as NULL?
>> +
>> + return gt->ccs_mode > 1;
>> +}
>> +
>> u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size);
>>
>> void xe_device_snapshot_print(struct xe_device *xe, struct
>> drm_printer *p); diff --git a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
>> b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
>> index 50fffc9ebf62..584f3245fc7d 100644
>> --- a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
>> +++ b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
>> @@ -13,6 +13,7 @@
>> #include "xe_gt_sysfs.h"
>> #include "xe_mmio.h"
>> #include "xe_sriov.h"
>> +#include "xe_sriov_pf_helpers.h"
>>
>> static void __xe_gt_apply_ccs_mode(struct xe_gt *gt, u32 num_engines)
>> { @@ -117,9 +118,16 @@ ccs_mode_store(struct device *kdev, struct
>> device_attribute *attr,
>> u32 num_engines, num_slices;
>> int ret;
>>
>> - if (IS_SRIOV(xe)) {
>> - xe_gt_dbg(gt, "Can't change compute mode when running as %s\n",
>> - xe_sriov_mode_to_string(xe_device_sriov_mode(xe)));
>> + /*
>> + * Check if the device is:
>> + * 1. Operating as an SR-IOV Virtual Function (VF), or
>> + * 2. An SR-IOV Physical Function (PF) with one or more VFs enabled.
>> + * Enabling multi CCS mode is not permitted in either scenario.
>
>in case 1 it is rather "not possible", so I would split that case, as suggested in [1]
>
>[1] https://patchwork.freedesktop.org/patch/674760/?series=154538&rev=1#comment_1240131
>
Interpreted the previous comment as suggesting two separate checks,
rather than combining the PF and VF flows.
However, based on the latest feedback below, by skipping the creation of the CCS mode store sysfs entry in VF mode,
we can now use a single check of PF with VFs enabled.This update has been incorporated in V4
>> + */
>> + if (IS_SRIOV_VF(xe) || xe_sriov_pf_has_vfs_enabled(xe)) {
>> + const char *mode_str =
>> +!strcmp(xe_sriov_mode_to_string(xe_device_sriov_mode(xe)),
>
>hmm, what's the goal of comparing mode string, where you already have access to the mode?
>
>but, what's the point of exposing "gt_ccs_mode_attrs" for VFs when they can't do anything with them?
>
>maybe you can get rid of one condition above, by simply checking for IS_VF when adding sysfs attributes?
>
Incorporated in V4, during sysfs_init for gt_ccs_mode_attrs is not allowing when running in IS_SRIOV_VF Mode.
>> + "SR-IOV VF") ? "SR-IOV VF" : "SR-IOV PF with VFs Enabled";
>> + xe_gt_dbg(gt, "Can't change compute mode when running as %s\n",
>> +mode_str);
>> return -EOPNOTSUPP;
>> }
>>
>> diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c
>> b/drivers/gpu/drm/xe/xe_pci_sriov.c
>> index af05db07162e..71c1d998ba82 100644
>> --- a/drivers/gpu/drm/xe/xe_pci_sriov.c
>> +++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
>> @@ -155,6 +155,12 @@ static int pf_enable_vfs(struct xe_device *xe, int num_vfs)
>> xe_assert(xe, num_vfs <= total_vfs);
>> xe_sriov_dbg(xe, "enabling %u VF%s\n", num_vfs,
>> str_plural(num_vfs));
>>
>> + if (xe_multi_ccs_mode_enabled(xe)) {
>> + xe_sriov_info(xe, "Disable multi-ccs mode before enabling VF's\n");
>
>multi-CCS ?
>
Corrected in V4
>> +
>> + return -ECANCELED;
>> + }
>> +
>
>I still don't see how do you want to protect against the case when CCS mode will be changed right after above check but before PF actually enable VFs
The execution of the sysfs ccs_mode_store function is already protected by the
kernel's filesystem write operation lock, so no additional specific locking is required here.
In My Test check:
Although I attempted to acquire a lock within ccs_mode_store to ensure protection,
a deadlock occurs because the lock has already been acquired earlier in the code flow before entering the function.
As a result, trying to acquire the same lock again inside ccsmode_store leads to a deadlock situation.
>> err = xe_sriov_pf_wait_ready(xe);
>> if (err)
>> goto out;
>> diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
>> b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
>> index dd1df950b021..e26837091375 100644
>> --- a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
>> +++ b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
>> @@ -43,4 +43,17 @@ static inline struct mutex *xe_sriov_pf_master_mutex(struct xe_device *xe)
>> return &xe->sriov.pf.master_lock;
>> }
>>
>> +/**
>> + * xe_sriov_pf_has_vfs_enabled() - Determines if the PF has any VFs
>> +enabled
>> + * @xe: ptr to xe_device
>> + *
>> + * Return: true if one or more VFs are enabled on the PF, false otherwise.
>> + */
>> +static inline bool xe_sriov_pf_has_vfs_enabled(const struct xe_device
>> +*xe) {
>> + struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
>> +
>> + return pci_num_vf(pdev) > 0;
>> +}
>> +
>> #endif
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning
2025-09-29 8:36 [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Nareshkumar Gollakoti
` (7 preceding siblings ...)
2025-10-06 8:02 ` Nareshkumar Gollakoti
@ 2025-10-06 9:37 ` Nareshkumar Gollakoti
8 siblings, 0 replies; 14+ messages in thread
From: Nareshkumar Gollakoti @ 2025-10-06 9:37 UTC (permalink / raw)
To: intel-xe; +Cc: stuart.summers
Hi Stuart,
Please find my comments,
>On Mon, 2025-09-29 at 14:06 +0530, Nareshkumar Gollakoti wrote:
>> Due to SLA agreement between PF and VFs, multi CCS mode can't
>
>> be enabled when VFs are already enabled.
>
>> Similarly, enabling VFs is disabled when multi ccs mode enabled.
>
>
>I have a similar comment inline below as well, but while you're
>describing what you're doing here, I don't understand why we need to do
>it. The previous check should have covered this too right?
The previous logic prevented changing the CCS mode when operating in either SR-IOV PF or VF mode.However, in practice, the default scenario is that SR-IOV is enabled and the device is in PF mode,but no VFs are enabled or provisioned. In this situation,we can allow users to enable multi-CCS mode.To support this, the updated logic ensures that while multi-CCS mode can be enabled in PF mode without any VFs,it also blocks the ability to enable VFs when multi-CCS mode enabled.maintaining the necessary protections
>>
>
>> v2:function xe_device_is_vf_enabled has been refactored to
>
>> xe_sriov_pf_has_vfs_enabled and moved to xe_sriov_pf_helper.h.
>
>> The code now distinctly checks for SR-IOV VF mode and
>
>> SR-IOV PF with VFs enabled.
>
>> Log messages have been updated to explicitly state the current mode.
>
>> The function xe_multi_ccs_mode_enabled is moved to xe_device.h
>
>>
>
>> v3: Described missed arg documentation for
>
>> xe_sriov_pf_has_vfs_enabled
>
>>
>
>> Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
>
>> ---
>
>> drivers/gpu/drm/xe/xe_device.h | 8 ++++++++
>
>> drivers/gpu/drm/xe/xe_gt_ccs_mode.c | 14 +++++++++++---
>
>> drivers/gpu/drm/xe/xe_pci_sriov.c | 6 ++++++
>
>> drivers/gpu/drm/xe/xe_sriov_pf_helpers.h | 13 +++++++++++++
>
>> 4 files changed, 38 insertions(+), 3 deletions(-)
>
>>
>
>> diff --git a/drivers/gpu/drm/xe/xe_device.h
>
>> b/drivers/gpu/drm/xe/xe_device.h
>
>> index 32cc6323b7f6..986f9cabb897 100644
>
>> --- a/drivers/gpu/drm/xe/xe_device.h
>
>> +++ b/drivers/gpu/drm/xe/xe_device.h
>
>> @@ -172,6 +172,14 @@ static inline bool xe_device_has_lmtt(struct
>
>> xe_device *xe)
>
>> return IS_DGFX(xe);
>
>> }
>
>>
>
>> +static inline bool xe_multi_ccs_mode_enabled(struct xe_device *xe)
>
>> +{
>
>> + /* Multi CCS mode supported exclusively on GT0 */
>
>> + struct xe_gt *gt = xe_device_get_gt(xe, 0);
>
>> +
>
>> + return gt->ccs_mode > 1;
>
>> +}
>
>> +
>
>> u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size);
>
>>
>
>> void xe_device_snapshot_print(struct xe_device *xe, struct
>
>> drm_printer *p);
>
>> diff --git a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
>
>> b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
>
>> index 50fffc9ebf62..584f3245fc7d 100644
>
>> --- a/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
>
>> +++ b/drivers/gpu/drm/xe/xe_gt_ccs_mode.c
>
>> @@ -13,6 +13,7 @@
>
>> #include "xe_gt_sysfs.h"
>
>> #include "xe_mmio.h"
>
>> #include "xe_sriov.h"
>
>> +#include "xe_sriov_pf_helpers.h"
>
>>
>
>> static void __xe_gt_apply_ccs_mode(struct xe_gt *gt, u32
>
>> num_engines)
>
>> {
>
>> @@ -117,9 +118,16 @@ ccs_mode_store(struct device *kdev, struct
>
>> device_attribute *attr,
>
>> u32 num_engines, num_slices;
>
>> int ret;
>
>>
>
>> - if (IS_SRIOV(xe)) {
>
>> - xe_gt_dbg(gt, "Can't change compute mode when running
>
>> as %s\n",
>
>> -
>
>> xe_sriov_mode_to_string(xe_device_sriov_mode(xe)));
>
>> + /*
>
>> + * Check if the device is:
>
>> + * 1. Operating as an SR-IOV Virtual Function (VF), or
>
>> + * 2. An SR-IOV Physical Function (PF) with one or more VFs
>
>> enabled.
>
>> + * Enabling multi CCS mode is not permitted in either
>
>> scenario.
>
>> + */
>
>
>IMO this comment isn't needed. The two conditions you have below are
>self-explanatory.
>
incorporated in V4
>> + if (IS_SRIOV_VF(xe) || xe_sriov_pf_has_vfs_enabled(xe)) {
>
>
>Also as I mentioned earlier, why do we need to make this change here?
>Is there a requirement to enable this in SRIOV_PF mode? My
>understanding is we wanted to explicitly stick to the default mode (one
>CCS) in this case.
>
Provided context in the above comment.
Yeah we will stick to one CCS if any VF is provisioned otherwise we can allow multi CCS Mode if platform supports as requested from IGT team.
>Thanks,
>Stuart
>
>> + const char *mode_str =
>
>> !strcmp(xe_sriov_mode_to_string(xe_device_sriov_mode(xe)),
>
>> + "SR-IOV VF") ? "SR-IOV VF" :
>
>> "SR-IOV PF with VFs Enabled";
>
>> + xe_gt_dbg(gt, "Can't change compute mode when running
>
>> as %s\n", mode_str);
>
>> return -EOPNOTSUPP;
>
>> }
>
>>
>
>> diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c
>
>> b/drivers/gpu/drm/xe/xe_pci_sriov.c
>
>> index af05db07162e..71c1d998ba82 100644
>
>> --- a/drivers/gpu/drm/xe/xe_pci_sriov.c
>
>> +++ b/drivers/gpu/drm/xe/xe_pci_sriov.c
>
>> @@ -155,6 +155,12 @@ static int pf_enable_vfs(struct xe_device *xe,
>
>> int num_vfs)
>
>> xe_assert(xe, num_vfs <= total_vfs);
>
>> xe_sriov_dbg(xe, "enabling %u VF%s\n", num_vfs,
>
>> str_plural(num_vfs));
>
>>
>
>> + if (xe_multi_ccs_mode_enabled(xe)) {
>
>> + xe_sriov_info(xe, "Disable multi-ccs mode before
>
>> enabling VF's\n");
>
>> +
>
>> + return -ECANCELED;
>
>> + }
>
>> +
>
>> err = xe_sriov_pf_wait_ready(xe);
>
>> if (err)
>
>> goto out;
>
>> diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
>
>> b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
>
>> index dd1df950b021..e26837091375 100644
>
>> --- a/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
>
>> +++ b/drivers/gpu/drm/xe/xe_sriov_pf_helpers.h
>
>> @@ -43,4 +43,17 @@ static inline struct mutex
>
>> *xe_sriov_pf_master_mutex(struct xe_device *xe)
>
>> return &xe->sriov.pf.master_lock;
>
>> }
>
>>
>
>> +/**
>
>> + * xe_sriov_pf_has_vfs_enabled() - Determines if the PF has any VFs
>
>> enabled
>
>> + * @xe: ptr to xe_device
>
>> + *
>
>> + * Return: true if one or more VFs are enabled on the PF, false
>
>> otherwise.
>
>> + */
>
>> +static inline bool xe_sriov_pf_has_vfs_enabled(const struct
>
>> xe_device *xe)
>
>> +{
>
>> + struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
>
>> +
>
>> + return pci_num_vf(pdev) > 0;
>
>> +}
>
>> +
>
>> #endif
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2025-10-06 9:42 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-09-29 8:36 [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Nareshkumar Gollakoti
2025-09-29 10:19 ` Upadhyay, Tejas
2025-09-29 11:27 ` ✓ CI.KUnit: success for drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning (rev3) Patchwork
2025-09-29 12:04 ` ✓ Xe.CI.BAT: " Patchwork
2025-09-29 13:52 ` ✓ Xe.CI.Full: " Patchwork
2025-09-29 15:34 ` [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Summers, Stuart
2025-09-29 17:53 ` Michal Wajdeczko
2025-10-02 11:13 ` Nareshkumar Gollakoti
2025-10-06 8:02 ` Nareshkumar Gollakoti
2025-10-06 9:37 ` [PATCH] drm/xe/: Mutual Exclusivity b/w Multi CCS Mode & SRIOV VF Provisioning Nareshkumar Gollakoti
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2025-09-29 5:43 Nareshkumar Gollakoti
2025-09-15 14:33 Nareshkumar Gollakoti
2025-09-17 6:37 ` Varun Gupta
2025-09-22 17:42 ` Michal Wajdeczko
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