[PATCH v6 00/10] Introducing firmware late binding

[PATCH v6 00/10] Introducing firmware late binding

[Badal Nilawar]

Introducing firmware late binding feature to enable firmware loading
for the devices, such as the fan controller and voltage regulator,
during the driver probe.
Typically, firmware for these devices are part of IFWI flash image but
can be replaced at probe after OEM tuning.

v2:
 - Dropped voltage regulator specific code as binaries for it will not
   be available for upstreaming as of now.
 - Address review comments
v3:
 - Dropped fwctl patch for now
 - Added new patch to extract binary version
 - Address v2 review comments
v4:
 - Address v3 review comments
v5:
 xe_kmd:
 - Dropped mutex is worker flush in unbind blocking component
   removal while fw download is in progress
 - Handled the fw load in all 3 scenarios (probe, system resume, rpm resume)
   by holding rpm wake ref in outer bounds of worker.
 mei:
 - Most of the review comments
v6:
 - rebased
 - Disabled fw load upon error

Alexander Usyskin (2):
  mei: bus: add mei_cldev_mtu interface
  mei: late_bind: add late binding component driver

Badal Nilawar (8):
  drm/xe/xe_late_bind_fw: Introducing xe_late_bind_fw
  drm/xe/xe_late_bind_fw: Initialize late binding firmware
  drm/xe/xe_late_bind_fw: Load late binding firmware
  drm/xe/xe_late_bind_fw: Reload late binding fw in rpm resume
  drm/xe/xe_late_bind_fw: Reload late binding fw during system resume
  drm/xe/xe_late_bind_fw: Introduce debug fs node to disable late
    binding
  drm/xe/xe_late_bind_fw: Extract and print version info
  drm/xe/xe_late_bind_fw: Select INTEL_MEI_LATE_BIND for CI

 drivers/gpu/drm/xe/Kconfig                  |   1 +
 drivers/gpu/drm/xe/Makefile                 |   1 +
 drivers/gpu/drm/xe/xe_debugfs.c             |  41 ++
 drivers/gpu/drm/xe/xe_device.c              |   5 +
 drivers/gpu/drm/xe/xe_device_types.h        |   6 +
 drivers/gpu/drm/xe/xe_late_bind_fw.c        | 461 ++++++++++++++++++++
 drivers/gpu/drm/xe/xe_late_bind_fw.h        |  17 +
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h  |  77 ++++
 drivers/gpu/drm/xe/xe_pci.c                 |   2 +
 drivers/gpu/drm/xe/xe_pci_types.h           |   1 +
 drivers/gpu/drm/xe/xe_pm.c                  |   8 +
 drivers/gpu/drm/xe/xe_uc_fw_abi.h           |  66 +++
 drivers/misc/mei/Kconfig                    |   1 +
 drivers/misc/mei/Makefile                   |   1 +
 drivers/misc/mei/bus.c                      |  13 +
 drivers/misc/mei/late_bind/Kconfig          |  13 +
 drivers/misc/mei/late_bind/Makefile         |   9 +
 drivers/misc/mei/late_bind/mei_late_bind.c  | 272 ++++++++++++
 include/drm/intel/i915_component.h          |   1 +
 include/drm/intel/late_bind_mei_interface.h |  64 +++
 include/linux/mei_cl_bus.h                  |   1 +
 21 files changed, 1061 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw.c
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw.h
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw_types.h
 create mode 100644 drivers/misc/mei/late_bind/Kconfig
 create mode 100644 drivers/misc/mei/late_bind/Makefile
 create mode 100644 drivers/misc/mei/late_bind/mei_late_bind.c
 create mode 100644 include/drm/intel/late_bind_mei_interface.h

-- 
2.34.1

[PATCH v6 01/10] mei: bus: add mei_cldev_mtu interface

[Badal Nilawar]

From: Alexander Usyskin <alexander.usyskin@intel.com>

Allow to bus client to obtain client mtu.

Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/misc/mei/bus.c     | 13 +++++++++++++
 include/linux/mei_cl_bus.h |  1 +
 2 files changed, 14 insertions(+)

diff --git a/drivers/misc/mei/bus.c b/drivers/misc/mei/bus.c
index 67176caf5416..f860b1b6eda0 100644
--- a/drivers/misc/mei/bus.c
+++ b/drivers/misc/mei/bus.c
@@ -614,6 +614,19 @@ u8 mei_cldev_ver(const struct mei_cl_device *cldev)
 }
 EXPORT_SYMBOL_GPL(mei_cldev_ver);
 
+/**
+ * mei_cldev_mtu - max message that client can send and receive
+ *
+ * @cldev: mei client device
+ *
+ * Return: mtu or 0 if client is not connected
+ */
+size_t mei_cldev_mtu(const struct mei_cl_device *cldev)
+{
+	return mei_cl_mtu(cldev->cl);
+}
+EXPORT_SYMBOL_GPL(mei_cldev_mtu);
+
 /**
  * mei_cldev_enabled - check whether the device is enabled
  *
diff --git a/include/linux/mei_cl_bus.h b/include/linux/mei_cl_bus.h
index 725fd7727422..a82755e1fc40 100644
--- a/include/linux/mei_cl_bus.h
+++ b/include/linux/mei_cl_bus.h
@@ -113,6 +113,7 @@ int mei_cldev_register_notif_cb(struct mei_cl_device *cldev,
 				mei_cldev_cb_t notif_cb);
 
 u8 mei_cldev_ver(const struct mei_cl_device *cldev);
+size_t mei_cldev_mtu(const struct mei_cl_device *cldev);
 
 void *mei_cldev_get_drvdata(const struct mei_cl_device *cldev);
 void mei_cldev_set_drvdata(struct mei_cl_device *cldev, void *data);
-- 
2.34.1

[PATCH v6 02/10] mei: late_bind: add late binding component driver

[Badal Nilawar]

From: Alexander Usyskin <alexander.usyskin@intel.com>

Add late binding component driver.
It allows pushing the late binding configuration from, for example,
the Xe graphics driver to the Intel discrete graphics card's CSE device.

Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/misc/mei/Kconfig                    |   1 +
 drivers/misc/mei/Makefile                   |   1 +
 drivers/misc/mei/late_bind/Kconfig          |  13 +
 drivers/misc/mei/late_bind/Makefile         |   9 +
 drivers/misc/mei/late_bind/mei_late_bind.c  | 272 ++++++++++++++++++++
 include/drm/intel/i915_component.h          |   1 +
 include/drm/intel/late_bind_mei_interface.h |  64 +++++
 7 files changed, 361 insertions(+)
 create mode 100644 drivers/misc/mei/late_bind/Kconfig
 create mode 100644 drivers/misc/mei/late_bind/Makefile
 create mode 100644 drivers/misc/mei/late_bind/mei_late_bind.c
 create mode 100644 include/drm/intel/late_bind_mei_interface.h

diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig
index 7575fee96cc6..771becc68095 100644
--- a/drivers/misc/mei/Kconfig
+++ b/drivers/misc/mei/Kconfig
@@ -84,5 +84,6 @@ config INTEL_MEI_VSC
 source "drivers/misc/mei/hdcp/Kconfig"
 source "drivers/misc/mei/pxp/Kconfig"
 source "drivers/misc/mei/gsc_proxy/Kconfig"
+source "drivers/misc/mei/late_bind/Kconfig"
 
 endif
diff --git a/drivers/misc/mei/Makefile b/drivers/misc/mei/Makefile
index 6f9fdbf1a495..84bfde888d81 100644
--- a/drivers/misc/mei/Makefile
+++ b/drivers/misc/mei/Makefile
@@ -31,6 +31,7 @@ CFLAGS_mei-trace.o = -I$(src)
 obj-$(CONFIG_INTEL_MEI_HDCP) += hdcp/
 obj-$(CONFIG_INTEL_MEI_PXP) += pxp/
 obj-$(CONFIG_INTEL_MEI_GSC_PROXY) += gsc_proxy/
+obj-$(CONFIG_INTEL_MEI_LATE_BIND) += late_bind/
 
 obj-$(CONFIG_INTEL_MEI_VSC_HW) += mei-vsc-hw.o
 mei-vsc-hw-y := vsc-tp.o
diff --git a/drivers/misc/mei/late_bind/Kconfig b/drivers/misc/mei/late_bind/Kconfig
new file mode 100644
index 000000000000..65c7180c5678
--- /dev/null
+++ b/drivers/misc/mei/late_bind/Kconfig
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright (c) 2025, Intel Corporation. All rights reserved.
+#
+config INTEL_MEI_LATE_BIND
+	tristate "Intel late binding support on ME Interface"
+	select INTEL_MEI_ME
+	depends on DRM_XE
+	help
+	  MEI Support for Late Binding for Intel graphics card.
+
+	  Enables the ME FW interfaces for Late Binding feature,
+	  allowing loading of firmware for the devices like Fan
+	  Controller during by Intel Xe driver.
diff --git a/drivers/misc/mei/late_bind/Makefile b/drivers/misc/mei/late_bind/Makefile
new file mode 100644
index 000000000000..a0aeda5853f0
--- /dev/null
+++ b/drivers/misc/mei/late_bind/Makefile
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Copyright (c) 2025, Intel Corporation. All rights reserved.
+#
+# Makefile - Late Binding client driver for Intel MEI Bus Driver.
+
+subdir-ccflags-y += -I$(srctree)/drivers/misc/mei/
+
+obj-$(CONFIG_INTEL_MEI_LATE_BIND) += mei_late_bind.o
diff --git a/drivers/misc/mei/late_bind/mei_late_bind.c b/drivers/misc/mei/late_bind/mei_late_bind.c
new file mode 100644
index 000000000000..0a8d6b2e0666
--- /dev/null
+++ b/drivers/misc/mei/late_bind/mei_late_bind.c
@@ -0,0 +1,272 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 Intel Corporation
+ */
+#include <drm/intel/i915_component.h>
+#include <drm/intel/late_bind_mei_interface.h>
+#include <linux/component.h>
+#include <linux/pci.h>
+#include <linux/mei_cl_bus.h>
+#include <linux/module.h>
+#include <linux/overflow.h>
+#include <linux/slab.h>
+#include <linux/uuid.h>
+
+#include "mkhi.h"
+
+#define GFX_SRV_MKHI_LATE_BINDING_CMD 0x12
+#define GFX_SRV_MKHI_LATE_BINDING_RSP (GFX_SRV_MKHI_LATE_BINDING_CMD | 0x80)
+
+#define LATE_BIND_SEND_TIMEOUT_MSEC 3000
+#define LATE_BIND_RECV_TIMEOUT_MSEC 3000
+
+/**
+ * struct csc_heci_late_bind_req - late binding request
+ * @header: @ref mkhi_msg_hdr
+ * @type: type of the late binding payload
+ * @flags: flags to be passed to the firmware
+ * @reserved: reserved field
+ * @payload_size: size of the payload data in bytes
+ * @payload: data to be sent to the firmware
+ */
+struct csc_heci_late_bind_req {
+	struct mkhi_msg_hdr header;
+	u32 type;
+	u32 flags;
+	u32 reserved[2];
+	u32 payload_size;
+	u8  payload[] __counted_by(payload_size);
+} __packed;
+
+/**
+ * struct csc_heci_late_bind_rsp - late binding response
+ * @header: @ref mkhi_msg_hdr
+ * @type: type of the late binding payload
+ * @reserved: reserved field
+ * @status: status of the late binding command execution by firmware
+ */
+struct csc_heci_late_bind_rsp {
+	struct mkhi_msg_hdr header;
+	u32 type;
+	u32 reserved[2];
+	u32 status;
+} __packed;
+
+static int mei_late_bind_check_response(const struct device *dev, const struct mkhi_msg_hdr *hdr)
+{
+	if (hdr->group_id != MKHI_GROUP_ID_GFX) {
+		dev_err(dev, "Mismatch group id: 0x%x instead of 0x%x\n",
+			hdr->group_id, MKHI_GROUP_ID_GFX);
+		return -EINVAL;
+	}
+
+	if (hdr->command != GFX_SRV_MKHI_LATE_BINDING_RSP) {
+		dev_err(dev, "Mismatch command: 0x%x instead of 0x%x\n",
+			hdr->command, GFX_SRV_MKHI_LATE_BINDING_RSP);
+		return -EINVAL;
+	}
+
+	if (hdr->result) {
+		dev_err(dev, "Error in result: 0x%x\n", hdr->result);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int mei_late_bind_push_config(struct device *dev, enum late_bind_type type, u32 flags,
+				     const void *payload, size_t payload_size)
+{
+	struct mei_cl_device *cldev;
+	struct csc_heci_late_bind_req *req = NULL;
+	struct csc_heci_late_bind_rsp rsp;
+	size_t req_size;
+	ssize_t bytes;
+	int ret;
+
+	cldev = to_mei_cl_device(dev);
+
+	ret = mei_cldev_enable(cldev);
+	if (ret) {
+		dev_dbg(dev, "mei_cldev_enable failed. %d\n", ret);
+		return ret;
+	}
+
+	req_size = struct_size(req, payload, payload_size);
+	if (req_size > mei_cldev_mtu(cldev)) {
+		dev_err(dev, "Payload is too big %zu\n", payload_size);
+		ret = -EMSGSIZE;
+		goto end;
+	}
+
+	req = kmalloc(req_size, GFP_KERNEL);
+	if (!req) {
+		ret = -ENOMEM;
+		goto end;
+	}
+
+	req->header.group_id = MKHI_GROUP_ID_GFX;
+	req->header.command = GFX_SRV_MKHI_LATE_BINDING_CMD;
+	req->type = type;
+	req->flags = flags;
+	req->reserved[0] = 0;
+	req->reserved[1] = 0;
+	req->payload_size = payload_size;
+	memcpy(req->payload, payload, payload_size);
+
+	bytes = mei_cldev_send_timeout(cldev,
+				       (void *)req, req_size, LATE_BIND_SEND_TIMEOUT_MSEC);
+	if (bytes < 0) {
+		dev_err(dev, "mei_cldev_send failed. %zd\n", bytes);
+		ret = bytes;
+		goto end;
+	}
+
+	bytes = mei_cldev_recv_timeout(cldev,
+				       (void *)&rsp, sizeof(rsp), LATE_BIND_RECV_TIMEOUT_MSEC);
+	if (bytes < 0) {
+		dev_err(dev, "mei_cldev_recv failed. %zd\n", bytes);
+		ret = bytes;
+		goto end;
+	}
+	if (bytes < sizeof(rsp.header)) {
+		dev_err(dev, "bad response header from the firmware: size %zd < %zu\n",
+			bytes, sizeof(rsp.header));
+		ret = -EPROTO;
+		goto end;
+	}
+	if (mei_late_bind_check_response(dev, &rsp.header)) {
+		dev_err(dev, "bad result response from the firmware: 0x%x\n",
+			*(uint32_t *)&rsp.header);
+		ret = -EPROTO;
+		goto end;
+	}
+	if (bytes < sizeof(rsp)) {
+		dev_err(dev, "bad response from the firmware: size %zd < %zu\n",
+			bytes, sizeof(rsp));
+		ret = -EPROTO;
+		goto end;
+	}
+
+	dev_dbg(dev, "%s status = %u\n", __func__, rsp.status);
+	ret = (int)rsp.status;
+end:
+	mei_cldev_disable(cldev);
+	kfree(req);
+	return ret;
+}
+
+static const struct late_bind_component_ops mei_late_bind_ops = {
+	.owner = THIS_MODULE,
+	.push_config = mei_late_bind_push_config,
+};
+
+static int mei_component_master_bind(struct device *dev)
+{
+	return component_bind_all(dev, (void *)&mei_late_bind_ops);
+}
+
+static void mei_component_master_unbind(struct device *dev)
+{
+	component_unbind_all(dev, (void *)&mei_late_bind_ops);
+}
+
+static const struct component_master_ops mei_component_master_ops = {
+	.bind = mei_component_master_bind,
+	.unbind = mei_component_master_unbind,
+};
+
+/**
+ * mei_late_bind_component_match - compare function for matching mei late bind.
+ *
+ *    This function checks if requester is Intel PCI_CLASS_DISPLAY_VGA or
+ *    PCI_CLASS_DISPLAY_OTHER device, and checks if the requester is the
+ *    grand parent of mei_if i.e. late_bind mei device
+ *
+ * @dev: master device
+ * @subcomponent: subcomponent to match (INTEL_COMPONENT_LATE_BIND)
+ * @data: compare data (late_bind mei device on mei bus)
+ *
+ * Return:
+ * * 1 - if components match
+ * * 0 - otherwise
+ */
+static int mei_late_bind_component_match(struct device *dev, int subcomponent,
+					 void *data)
+{
+	struct device *base = data;
+	struct pci_dev *pdev;
+
+	if (!dev)
+		return 0;
+
+	if (!dev_is_pci(dev))
+		return 0;
+
+	pdev = to_pci_dev(dev);
+
+	if (pdev->vendor != PCI_VENDOR_ID_INTEL)
+		return 0;
+
+	if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8) &&
+	    pdev->class != (PCI_CLASS_DISPLAY_OTHER << 8))
+		return 0;
+
+	if (subcomponent != INTEL_COMPONENT_LATE_BIND)
+		return 0;
+
+	base = base->parent;
+	if (!base) /* mei device */
+		return 0;
+
+	base = base->parent; /* pci device */
+
+	return !!base && dev == base;
+}
+
+static int mei_late_bind_probe(struct mei_cl_device *cldev,
+			       const struct mei_cl_device_id *id)
+{
+	struct component_match *master_match = NULL;
+	int ret;
+
+	component_match_add_typed(&cldev->dev, &master_match,
+				  mei_late_bind_component_match, &cldev->dev);
+	if (IS_ERR_OR_NULL(master_match))
+		return -ENOMEM;
+
+	ret = component_master_add_with_match(&cldev->dev,
+					      &mei_component_master_ops,
+					      master_match);
+	if (ret < 0)
+		dev_err(&cldev->dev, "Master comp add failed %d\n", ret);
+
+	return ret;
+}
+
+static void mei_late_bind_remove(struct mei_cl_device *cldev)
+{
+	component_master_del(&cldev->dev, &mei_component_master_ops);
+}
+
+#define MEI_GUID_MKHI UUID_LE(0xe2c2afa2, 0x3817, 0x4d19, \
+			      0x9d, 0x95, 0x6, 0xb1, 0x6b, 0x58, 0x8a, 0x5d)
+
+static struct mei_cl_device_id mei_late_bind_tbl[] = {
+	{ .uuid = MEI_GUID_MKHI, .version = MEI_CL_VERSION_ANY },
+	{ }
+};
+MODULE_DEVICE_TABLE(mei, mei_late_bind_tbl);
+
+static struct mei_cl_driver mei_late_bind_driver = {
+	.id_table = mei_late_bind_tbl,
+	.name = KBUILD_MODNAME,
+	.probe = mei_late_bind_probe,
+	.remove	= mei_late_bind_remove,
+};
+
+module_mei_cl_driver(mei_late_bind_driver);
+
+MODULE_AUTHOR("Intel Corporation");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("MEI Late Binding");
diff --git a/include/drm/intel/i915_component.h b/include/drm/intel/i915_component.h
index 4ea3b17aa143..456849a97d75 100644
--- a/include/drm/intel/i915_component.h
+++ b/include/drm/intel/i915_component.h
@@ -31,6 +31,7 @@ enum i915_component_type {
 	I915_COMPONENT_HDCP,
 	I915_COMPONENT_PXP,
 	I915_COMPONENT_GSC_PROXY,
+	INTEL_COMPONENT_LATE_BIND,
 };
 
 /* MAX_PORT is the number of port
diff --git a/include/drm/intel/late_bind_mei_interface.h b/include/drm/intel/late_bind_mei_interface.h
new file mode 100644
index 000000000000..ec58ef1ab4e8
--- /dev/null
+++ b/include/drm/intel/late_bind_mei_interface.h
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright (c) 2025 Intel Corporation
+ */
+
+#ifndef _LATE_BIND_MEI_INTERFACE_H_
+#define _LATE_BIND_MEI_INTERFACE_H_
+
+#include <linux/types.h>
+
+struct device;
+struct module;
+
+/**
+ * Late Binding flags
+ * Persistent across warm reset
+ */
+#define CSC_LATE_BINDING_FLAGS_IS_PERSISTENT	BIT(0)
+
+/**
+ * xe_late_bind_fw_type - enum to determine late binding fw type
+ */
+enum late_bind_type {
+	CSC_LATE_BINDING_TYPE_FAN_CONTROL = 1,
+};
+
+/**
+ * Late Binding payload status
+ */
+enum csc_late_binding_status {
+	CSC_LATE_BINDING_STATUS_SUCCESS           = 0,
+	CSC_LATE_BINDING_STATUS_4ID_MISMATCH      = 1,
+	CSC_LATE_BINDING_STATUS_ARB_FAILURE       = 2,
+	CSC_LATE_BINDING_STATUS_GENERAL_ERROR     = 3,
+	CSC_LATE_BINDING_STATUS_INVALID_PARAMS    = 4,
+	CSC_LATE_BINDING_STATUS_INVALID_SIGNATURE = 5,
+	CSC_LATE_BINDING_STATUS_INVALID_PAYLOAD   = 6,
+	CSC_LATE_BINDING_STATUS_TIMEOUT           = 7,
+};
+
+/**
+ * struct late_bind_component_ops - ops for Late Binding services.
+ * @owner: Module providing the ops
+ * @push_config: Sends a config to FW.
+ */
+struct late_bind_component_ops {
+	struct module *owner;
+
+	/**
+	 * @push_config: Sends a config to FW.
+	 * @dev: device struct corresponding to the mei device
+	 * @type: payload type
+	 * @flags: payload flags
+	 * @payload: payload buffer
+	 * @payload_size: payload buffer size
+	 *
+	 * Return: 0 success, negative errno value on transport failure,
+	 *         positive status returned by FW
+	 */
+	int (*push_config)(struct device *dev, u32 type, u32 flags,
+			   const void *payload, size_t payload_size);
+};
+
+#endif /* _LATE_BIND_MEI_INTERFACE_H_ */
-- 
2.34.1

[PATCH v6 03/10] drm/xe/xe_late_bind_fw: Introducing xe_late_bind_fw

[Badal Nilawar]

Introducing xe_late_bind_fw to enable firmware loading for the devices,
such as the fan controller, during the driver probe. Typically,
firmware for such devices are part of IFWI flash image but can be
replaced at probe after OEM tuning.
This patch binds mei late binding component to enable firmware loading.

v2:
 - Add devm_add_action_or_reset to remove the component (Daniele)
 - Add INTEL_MEI_GSC check in xe_late_bind_init() (Daniele)
v3:
 - Fail driver probe if late bind initialization fails,
   add has_late_bind flag (Daniele)
v4:
 - %S/I915_COMPONENT_LATE_BIND/INTEL_COMPONENT_LATE_BIND/
v6:
 - rebased

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/xe/Makefile                |  1 +
 drivers/gpu/drm/xe/xe_device.c             |  5 ++
 drivers/gpu/drm/xe/xe_device_types.h       |  6 ++
 drivers/gpu/drm/xe/xe_late_bind_fw.c       | 83 ++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_late_bind_fw.h       | 15 ++++
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h | 35 +++++++++
 drivers/gpu/drm/xe/xe_pci.c                |  2 +
 drivers/gpu/drm/xe/xe_pci_types.h          |  1 +
 8 files changed, 148 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw.c
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw.h
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw_types.h

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 7c039caefd00..521547d78fd2 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -76,6 +76,7 @@ xe-y += xe_bb.o \
 	xe_hw_fence.o \
 	xe_irq.o \
 	xe_lrc.o \
+	xe_late_bind_fw.o \
 	xe_migrate.o \
 	xe_mmio.o \
 	xe_mocs.o \
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 0b73cb72bad1..cb595bae5f55 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -44,6 +44,7 @@
 #include "xe_hw_engine_group.h"
 #include "xe_hwmon.h"
 #include "xe_irq.h"
+#include "xe_late_bind_fw.h"
 #include "xe_mmio.h"
 #include "xe_module.h"
 #include "xe_nvm.h"
@@ -866,6 +867,10 @@ int xe_device_probe(struct xe_device *xe)
 	if (err)
 		return err;
 
+	err = xe_late_bind_init(&xe->late_bind);
+	if (err && err != -ENODEV)
+		return err;
+
 	err = xe_oa_init(xe);
 	if (err)
 		return err;
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 78c4acafd268..a8891833f980 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -16,6 +16,7 @@
 #include "xe_devcoredump_types.h"
 #include "xe_heci_gsc.h"
 #include "xe_lmtt_types.h"
+#include "xe_late_bind_fw_types.h"
 #include "xe_memirq_types.h"
 #include "xe_oa_types.h"
 #include "xe_platform_types.h"
@@ -325,6 +326,8 @@ struct xe_device {
 		u8 has_heci_cscfi:1;
 		/** @info.has_heci_gscfi: device has heci gscfi */
 		u8 has_heci_gscfi:1;
+		/** @info.has_late_bind: Device has firmware late binding support */
+		u8 has_late_bind:1;
 		/** @info.has_llc: Device has a shared CPU+GPU last level cache */
 		u8 has_llc:1;
 		/** @info.has_mbx_power_limits: Device has support to manage power limits using
@@ -557,6 +560,9 @@ struct xe_device {
 	/** @nvm: discrete graphics non-volatile memory */
 	struct intel_dg_nvm_dev *nvm;
 
+	/** @late_bind: xe mei late bind interface */
+	struct xe_late_bind late_bind;
+
 	/** @oa: oa observation subsystem */
 	struct xe_oa oa;
 
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
new file mode 100644
index 000000000000..22e79f0dbbdf
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -0,0 +1,83 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#include <linux/component.h>
+#include <linux/delay.h>
+
+#include <drm/drm_managed.h>
+#include <drm/intel/i915_component.h>
+#include <drm/intel/late_bind_mei_interface.h>
+#include <drm/drm_print.h>
+
+#include "xe_device.h"
+#include "xe_late_bind_fw.h"
+
+static struct xe_device *
+late_bind_to_xe(struct xe_late_bind *late_bind)
+{
+	return container_of(late_bind, struct xe_device, late_bind);
+}
+
+static int xe_late_bind_component_bind(struct device *xe_kdev,
+				       struct device *mei_kdev, void *data)
+{
+	struct xe_device *xe = kdev_to_xe_device(xe_kdev);
+	struct xe_late_bind *late_bind = &xe->late_bind;
+
+	late_bind->component.ops = data;
+	late_bind->component.mei_dev = mei_kdev;
+
+	return 0;
+}
+
+static void xe_late_bind_component_unbind(struct device *xe_kdev,
+					  struct device *mei_kdev, void *data)
+{
+	struct xe_device *xe = kdev_to_xe_device(xe_kdev);
+	struct xe_late_bind *late_bind = &xe->late_bind;
+
+	late_bind->component.ops = NULL;
+}
+
+static const struct component_ops xe_late_bind_component_ops = {
+	.bind   = xe_late_bind_component_bind,
+	.unbind = xe_late_bind_component_unbind,
+};
+
+static void xe_late_bind_remove(void *arg)
+{
+	struct xe_late_bind *late_bind = arg;
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+
+	component_del(xe->drm.dev, &xe_late_bind_component_ops);
+}
+
+/**
+ * xe_late_bind_init() - add xe mei late binding component
+ *
+ * Return: 0 if the initialization was successful, a negative errno otherwise.
+ */
+int xe_late_bind_init(struct xe_late_bind *late_bind)
+{
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	int err;
+
+	if (!xe->info.has_late_bind)
+		return 0;
+
+	if (!IS_ENABLED(CONFIG_INTEL_MEI_LATE_BIND) || !IS_ENABLED(CONFIG_INTEL_MEI_GSC)) {
+		drm_info(&xe->drm, "Can't init xe mei late bind missing mei component\n");
+		return -ENODEV;
+	}
+
+	err = component_add_typed(xe->drm.dev, &xe_late_bind_component_ops,
+				  INTEL_COMPONENT_LATE_BIND);
+	if (err < 0) {
+		drm_info(&xe->drm, "Failed to add mei late bind component (%pe)\n", ERR_PTR(err));
+		return err;
+	}
+
+	return devm_add_action_or_reset(xe->drm.dev, xe_late_bind_remove, late_bind);
+}
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.h b/drivers/gpu/drm/xe/xe_late_bind_fw.h
new file mode 100644
index 000000000000..4c73571c3e62
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef _XE_LATE_BIND_FW_H_
+#define _XE_LATE_BIND_FW_H_
+
+#include <linux/types.h>
+
+struct xe_late_bind;
+
+int xe_late_bind_init(struct xe_late_bind *late_bind);
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
new file mode 100644
index 000000000000..9806d17291ad
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef _XE_LATE_BIND_TYPES_H_
+#define _XE_LATE_BIND_TYPES_H_
+
+#include <linux/iosys-map.h>
+#include <linux/mutex.h>
+#include <linux/types.h>
+
+/**
+ * struct xe_late_bind_component - Late Binding services component
+ * @mei_dev: device that provide Late Binding service.
+ * @ops: Ops implemented by Late Binding driver, used by Xe driver.
+ *
+ * Communication between Xe and MEI drivers for Late Binding services
+ */
+struct xe_late_bind_component {
+	/** @late_bind_component.mei_dev: mei device */
+	struct device *mei_dev;
+	/** @late_bind_component.ops: late binding ops */
+	const struct late_bind_component_ops *ops;
+};
+
+/**
+ * struct xe_late_bind
+ */
+struct xe_late_bind {
+	/** @late_bind.component: struct for communication with mei component */
+	struct xe_late_bind_component component;
+};
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 42aaef9fa2ea..b1fe5a323897 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -329,6 +329,7 @@ static const struct xe_device_desc bmg_desc = {
 	.has_gsc_nvm = 1,
 	.has_heci_cscfi = 1,
 	.max_gt_per_tile = 2,
+	.has_late_bind = true,
 	.needs_scratch = true,
 };
 
@@ -575,6 +576,7 @@ static int xe_info_init_early(struct xe_device *xe,
 	xe->info.has_gsc_nvm = desc->has_gsc_nvm;
 	xe->info.has_heci_gscfi = desc->has_heci_gscfi;
 	xe->info.has_heci_cscfi = desc->has_heci_cscfi;
+	xe->info.has_late_bind = desc->has_late_bind;
 	xe->info.has_llc = desc->has_llc;
 	xe->info.has_pxp = desc->has_pxp;
 	xe->info.has_sriov = desc->has_sriov;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index 4de6f69ed975..51a607d323fb 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -39,6 +39,7 @@ struct xe_device_desc {
 	u8 has_gsc_nvm:1;
 	u8 has_heci_gscfi:1;
 	u8 has_heci_cscfi:1;
+	u8 has_late_bind:1;
 	u8 has_llc:1;
 	u8 has_mbx_power_limits:1;
 	u8 has_pxp:1;
-- 
2.34.1

[PATCH v6 04/10] drm/xe/xe_late_bind_fw: Initialize late binding firmware

[Badal Nilawar]

Search for late binding firmware binaries and populate the meta data of
firmware structures.

v2 (Daniele):
 - drm_err if firmware size is more than max pay load size
 - s/request_firmware/firmware_request_nowarn/ as firmware will
   not be available for all possible cards
v3 (Daniele):
 - init firmware from within xe_late_bind_init, propagate error
 - switch late_bind_fw to array to handle multiple firmware types
v4 (Daniele):
 - Alloc payload dynamically, fix nits
v6 (Daniele)
 - %s/MAX_PAYLOAD_SIZE/XE_LB_MAX_PAYLOAD_SIZE/

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/xe/xe_late_bind_fw.c       | 100 ++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h |  30 +++++++
 2 files changed, 129 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
index 22e79f0dbbdf..ab83ab06aee7 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -5,6 +5,7 @@
 
 #include <linux/component.h>
 #include <linux/delay.h>
+#include <linux/firmware.h>
 
 #include <drm/drm_managed.h>
 #include <drm/intel/i915_component.h>
@@ -13,6 +14,16 @@
 
 #include "xe_device.h"
 #include "xe_late_bind_fw.h"
+#include "xe_pcode.h"
+#include "xe_pcode_api.h"
+
+static const u32 fw_id_to_type[] = {
+		[XE_LB_FW_FAN_CONTROL] = CSC_LATE_BINDING_TYPE_FAN_CONTROL,
+	};
+
+static const char * const fw_id_to_name[] = {
+		[XE_LB_FW_FAN_CONTROL] = "fan_control",
+	};
 
 static struct xe_device *
 late_bind_to_xe(struct xe_late_bind *late_bind)
@@ -20,6 +31,89 @@ late_bind_to_xe(struct xe_late_bind *late_bind)
 	return container_of(late_bind, struct xe_device, late_bind);
 }
 
+static int xe_late_bind_fw_num_fans(struct xe_late_bind *late_bind)
+{
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	struct xe_tile *root_tile = xe_device_get_root_tile(xe);
+	u32 uval;
+
+	if (!xe_pcode_read(root_tile,
+			   PCODE_MBOX(FAN_SPEED_CONTROL, FSC_READ_NUM_FANS, 0), &uval, NULL))
+		return uval;
+	else
+		return 0;
+}
+
+static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
+{
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+	struct xe_late_bind_fw *lb_fw;
+	const struct firmware *fw;
+	u32 num_fans;
+	int ret;
+
+	if (fw_id >= XE_LB_FW_MAX_ID)
+		return -EINVAL;
+
+	lb_fw = &late_bind->late_bind_fw[fw_id];
+
+	lb_fw->id = fw_id;
+	lb_fw->type = fw_id_to_type[lb_fw->id];
+	lb_fw->flags &= ~CSC_LATE_BINDING_FLAGS_IS_PERSISTENT;
+
+	if (lb_fw->type == CSC_LATE_BINDING_TYPE_FAN_CONTROL) {
+		num_fans = xe_late_bind_fw_num_fans(late_bind);
+		drm_dbg(&xe->drm, "Number of Fans: %d\n", num_fans);
+		if (!num_fans)
+			return 0;
+	}
+
+	snprintf(lb_fw->blob_path, sizeof(lb_fw->blob_path), "xe/%s_8086_%04x_%04x_%04x.bin",
+		 fw_id_to_name[lb_fw->id], pdev->device,
+		 pdev->subsystem_vendor, pdev->subsystem_device);
+
+	drm_dbg(&xe->drm, "Request late binding firmware %s\n", lb_fw->blob_path);
+	ret = firmware_request_nowarn(&fw, lb_fw->blob_path, xe->drm.dev);
+	if (ret) {
+		drm_dbg(&xe->drm, "%s late binding fw not available for current device",
+			fw_id_to_name[lb_fw->id]);
+		return 0;
+	}
+
+	if (fw->size > XE_LB_MAX_PAYLOAD_SIZE) {
+		drm_err(&xe->drm, "Firmware %s size %zu is larger than max pay load size %u\n",
+			lb_fw->blob_path, fw->size, XE_LB_MAX_PAYLOAD_SIZE);
+		release_firmware(fw);
+		return -ENODATA;
+	}
+
+	lb_fw->payload_size = fw->size;
+	lb_fw->payload = drmm_kzalloc(&xe->drm, lb_fw->payload_size, GFP_KERNEL);
+	if (!lb_fw->payload) {
+		release_firmware(fw);
+		return -ENOMEM;
+	}
+
+	memcpy((void *)lb_fw->payload, fw->data, lb_fw->payload_size);
+	release_firmware(fw);
+
+	return 0;
+}
+
+static int xe_late_bind_fw_init(struct xe_late_bind *late_bind)
+{
+	int ret;
+	int fw_id;
+
+	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
+		ret = __xe_late_bind_fw_init(late_bind, fw_id);
+		if (ret)
+			return ret;
+	}
+	return 0;
+}
+
 static int xe_late_bind_component_bind(struct device *xe_kdev,
 				       struct device *mei_kdev, void *data)
 {
@@ -79,5 +173,9 @@ int xe_late_bind_init(struct xe_late_bind *late_bind)
 		return err;
 	}
 
-	return devm_add_action_or_reset(xe->drm.dev, xe_late_bind_remove, late_bind);
+	err = devm_add_action_or_reset(xe->drm.dev, xe_late_bind_remove, late_bind);
+	if (err)
+		return err;
+
+	return xe_late_bind_fw_init(late_bind);
 }
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
index 9806d17291ad..cd3143256a7c 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
@@ -10,6 +10,34 @@
 #include <linux/mutex.h>
 #include <linux/types.h>
 
+#define XE_LB_MAX_PAYLOAD_SIZE SZ_4K
+
+/**
+ * xe_late_bind_fw_id - enum to determine late binding fw index
+ */
+enum xe_late_bind_fw_id {
+	XE_LB_FW_FAN_CONTROL = 0,
+	XE_LB_FW_MAX_ID
+};
+
+/**
+ * struct xe_late_bind_fw
+ */
+struct xe_late_bind_fw {
+	/** @late_bind_fw.id: firmware index */
+	u32 id;
+	/** @late_bind_fw.blob_path: firmware binary path */
+	char blob_path[PATH_MAX];
+	/** @late_bind_fw.type: firmware type */
+	u32  type;
+	/** @late_bind_fw.flags: firmware flags */
+	u32  flags;
+	/** @late_bind_fw.payload: to store the late binding blob */
+	const u8  *payload;
+	/** @late_bind_fw.payload_size: late binding blob payload_size */
+	size_t payload_size;
+};
+
 /**
  * struct xe_late_bind_component - Late Binding services component
  * @mei_dev: device that provide Late Binding service.
@@ -30,6 +58,8 @@ struct xe_late_bind_component {
 struct xe_late_bind {
 	/** @late_bind.component: struct for communication with mei component */
 	struct xe_late_bind_component component;
+	/** @late_bind.late_bind_fw: late binding firmware array */
+	struct xe_late_bind_fw late_bind_fw[XE_LB_FW_MAX_ID];
 };
 
 #endif
-- 
2.34.1

[PATCH v6 05/10] drm/xe/xe_late_bind_fw: Load late binding firmware

[Badal Nilawar]

Load late binding firmware

v2:
 - s/EAGAIN/EBUSY/
 - Flush worker in suspend and driver unload (Daniele)
v3:
 - Use retry interval of 6s, in steps of 200ms, to allow
   other OS components release MEI CL handle (Sasha)
v4:
 - return -ENODEV if component not added (Daniele)
 - parse and print status returned by csc
v5:
 - Use payload to check firmware valid (Daniele)
 - Obtain the RPM reference before scheduling the worker to
   ensure the device remains awake until the worker completes
   firmware loading (Rodrigo)
v6:
 - In case of error donot re-attempt fw download (Daniele)

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
 drivers/gpu/drm/xe/xe_late_bind_fw.c       | 155 ++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_late_bind_fw.h       |   1 +
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h |   7 +
 3 files changed, 162 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
index ab83ab06aee7..4e8a2256802d 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -16,6 +16,20 @@
 #include "xe_late_bind_fw.h"
 #include "xe_pcode.h"
 #include "xe_pcode_api.h"
+#include "xe_pm.h"
+
+/*
+ * The component should load quite quickly in most cases, but it could take
+ * a bit. Using a very big timeout just to cover the worst case scenario
+ */
+#define LB_INIT_TIMEOUT_MS 20000
+
+/*
+ * Retry interval set to 6 seconds, in steps of 200 ms, to allow time for
+ * other OS components to release the MEI CL handle
+ */
+#define LB_FW_LOAD_RETRY_MAXCOUNT 30
+#define LB_FW_LOAD_RETRY_PAUSE_MS 200
 
 static const u32 fw_id_to_type[] = {
 		[XE_LB_FW_FAN_CONTROL] = CSC_LATE_BINDING_TYPE_FAN_CONTROL,
@@ -31,6 +45,30 @@ late_bind_to_xe(struct xe_late_bind *late_bind)
 	return container_of(late_bind, struct xe_device, late_bind);
 }
 
+static const char *xe_late_bind_parse_status(uint32_t status)
+{
+	switch (status) {
+	case CSC_LATE_BINDING_STATUS_SUCCESS:
+		return "success";
+	case CSC_LATE_BINDING_STATUS_4ID_MISMATCH:
+		return "4Id Mismatch";
+	case CSC_LATE_BINDING_STATUS_ARB_FAILURE:
+		return "ARB Failure";
+	case CSC_LATE_BINDING_STATUS_GENERAL_ERROR:
+		return "General Error";
+	case CSC_LATE_BINDING_STATUS_INVALID_PARAMS:
+		return "Invalid Params";
+	case CSC_LATE_BINDING_STATUS_INVALID_SIGNATURE:
+		return "Invalid Signature";
+	case CSC_LATE_BINDING_STATUS_INVALID_PAYLOAD:
+		return "Invalid Payload";
+	case CSC_LATE_BINDING_STATUS_TIMEOUT:
+		return "Timeout";
+	default:
+		return "Unknown error";
+	}
+}
+
 static int xe_late_bind_fw_num_fans(struct xe_late_bind *late_bind)
 {
 	struct xe_device *xe = late_bind_to_xe(late_bind);
@@ -44,6 +82,99 @@ static int xe_late_bind_fw_num_fans(struct xe_late_bind *late_bind)
 		return 0;
 }
 
+static void xe_late_bind_wait_for_worker_completion(struct xe_late_bind *late_bind)
+{
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	struct xe_late_bind_fw *lbfw;
+	int fw_id;
+
+	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
+		lbfw = &late_bind->late_bind_fw[fw_id];
+		if (lbfw->payload && late_bind->wq) {
+			drm_dbg(&xe->drm, "Flush work: load %s firmware\n",
+				fw_id_to_name[lbfw->id]);
+			flush_work(&lbfw->work);
+		}
+	}
+}
+
+static void xe_late_bind_work(struct work_struct *work)
+{
+	struct xe_late_bind_fw *lbfw = container_of(work, struct xe_late_bind_fw, work);
+	struct xe_late_bind *late_bind = container_of(lbfw, struct xe_late_bind,
+						      late_bind_fw[lbfw->id]);
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	int retry = LB_FW_LOAD_RETRY_MAXCOUNT;
+	int ret;
+	int slept;
+
+	xe_device_assert_mem_access(xe);
+
+	/* we can queue this before the component is bound */
+	for (slept = 0; slept < LB_INIT_TIMEOUT_MS; slept += 100) {
+		if (late_bind->component.ops)
+			break;
+		msleep(100);
+	}
+
+	if (!late_bind->component.ops) {
+		drm_err(&xe->drm, "Late bind component not bound\n");
+		/* Do not re-attempt fw load */
+		drmm_kfree(&xe->drm, (void *)lbfw->payload);
+		lbfw->payload = NULL;
+		goto out;
+	}
+
+	drm_dbg(&xe->drm, "Load %s firmware\n", fw_id_to_name[lbfw->id]);
+
+	do {
+		ret = late_bind->component.ops->push_config(late_bind->component.mei_dev,
+							    lbfw->type, lbfw->flags,
+							    lbfw->payload, lbfw->payload_size);
+		if (!ret)
+			break;
+		msleep(LB_FW_LOAD_RETRY_PAUSE_MS);
+	} while (--retry && ret == -EBUSY);
+
+	if (!ret) {
+		drm_dbg(&xe->drm, "Load %s firmware successful\n",
+			fw_id_to_name[lbfw->id]);
+		goto out;
+	}
+
+	if (ret > 0)
+		drm_err(&xe->drm, "Load %s firmware failed with err %d, %s\n",
+			fw_id_to_name[lbfw->id], ret, xe_late_bind_parse_status(ret));
+	else
+		drm_err(&xe->drm, "Load %s firmware failed with err %d",
+			fw_id_to_name[lbfw->id], ret);
+	/* Do not re-attempt fw load */
+	drmm_kfree(&xe->drm, (void *)lbfw->payload);
+	lbfw->payload = NULL;
+
+out:
+	xe_pm_runtime_put(xe);
+}
+
+int xe_late_bind_fw_load(struct xe_late_bind *late_bind)
+{
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	struct xe_late_bind_fw *lbfw;
+	int fw_id;
+
+	if (!late_bind->component_added)
+		return -ENODEV;
+
+	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
+		lbfw = &late_bind->late_bind_fw[fw_id];
+		if (lbfw->payload) {
+			xe_pm_runtime_get_noresume(xe);
+			queue_work(late_bind->wq, &lbfw->work);
+		}
+	}
+	return 0;
+}
+
 static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
 {
 	struct xe_device *xe = late_bind_to_xe(late_bind);
@@ -97,6 +228,7 @@ static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
 
 	memcpy((void *)lb_fw->payload, fw->data, lb_fw->payload_size);
 	release_firmware(fw);
+	INIT_WORK(&lb_fw->work, xe_late_bind_work);
 
 	return 0;
 }
@@ -106,11 +238,16 @@ static int xe_late_bind_fw_init(struct xe_late_bind *late_bind)
 	int ret;
 	int fw_id;
 
+	late_bind->wq = alloc_ordered_workqueue("late-bind-ordered-wq", 0);
+	if (!late_bind->wq)
+		return -ENOMEM;
+
 	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
 		ret = __xe_late_bind_fw_init(late_bind, fw_id);
 		if (ret)
 			return ret;
 	}
+
 	return 0;
 }
 
@@ -132,6 +269,8 @@ static void xe_late_bind_component_unbind(struct device *xe_kdev,
 	struct xe_device *xe = kdev_to_xe_device(xe_kdev);
 	struct xe_late_bind *late_bind = &xe->late_bind;
 
+	xe_late_bind_wait_for_worker_completion(late_bind);
+
 	late_bind->component.ops = NULL;
 }
 
@@ -145,7 +284,15 @@ static void xe_late_bind_remove(void *arg)
 	struct xe_late_bind *late_bind = arg;
 	struct xe_device *xe = late_bind_to_xe(late_bind);
 
+	xe_late_bind_wait_for_worker_completion(late_bind);
+
+	late_bind->component_added = false;
+
 	component_del(xe->drm.dev, &xe_late_bind_component_ops);
+	if (late_bind->wq) {
+		destroy_workqueue(late_bind->wq);
+		late_bind->wq = NULL;
+	}
 }
 
 /**
@@ -173,9 +320,15 @@ int xe_late_bind_init(struct xe_late_bind *late_bind)
 		return err;
 	}
 
+	late_bind->component_added = true;
+
 	err = devm_add_action_or_reset(xe->drm.dev, xe_late_bind_remove, late_bind);
 	if (err)
 		return err;
 
-	return xe_late_bind_fw_init(late_bind);
+	err = xe_late_bind_fw_init(late_bind);
+	if (err)
+		return err;
+
+	return xe_late_bind_fw_load(late_bind);
 }
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.h b/drivers/gpu/drm/xe/xe_late_bind_fw.h
index 4c73571c3e62..28d56ed2bfdc 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.h
@@ -11,5 +11,6 @@
 struct xe_late_bind;
 
 int xe_late_bind_init(struct xe_late_bind *late_bind);
+int xe_late_bind_fw_load(struct xe_late_bind *late_bind);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
index cd3143256a7c..f650cb8641b3 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
@@ -9,6 +9,7 @@
 #include <linux/iosys-map.h>
 #include <linux/mutex.h>
 #include <linux/types.h>
+#include <linux/workqueue.h>
 
 #define XE_LB_MAX_PAYLOAD_SIZE SZ_4K
 
@@ -36,6 +37,8 @@ struct xe_late_bind_fw {
 	const u8  *payload;
 	/** @late_bind_fw.payload_size: late binding blob payload_size */
 	size_t payload_size;
+	/** @late_bind_fw.work: worker to upload latebind blob */
+	struct work_struct work;
 };
 
 /**
@@ -60,6 +63,10 @@ struct xe_late_bind {
 	struct xe_late_bind_component component;
 	/** @late_bind.late_bind_fw: late binding firmware array */
 	struct xe_late_bind_fw late_bind_fw[XE_LB_FW_MAX_ID];
+	/** @late_bind.wq: workqueue to submit request to download late bind blob */
+	struct workqueue_struct *wq;
+	/** @late_bind.component_added: whether the component has been added */
+	bool component_added;
 };
 
 #endif
-- 
2.34.1

[PATCH v6 06/10] drm/xe/xe_late_bind_fw: Reload late binding fw in rpm resume

[Badal Nilawar]

Reload late binding fw during runtime resume.

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_late_bind_fw.c | 2 +-
 drivers/gpu/drm/xe/xe_late_bind_fw.h | 1 +
 drivers/gpu/drm/xe/xe_pm.c           | 4 ++++
 3 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
index 4e8a2256802d..1361271beaa6 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -82,7 +82,7 @@ static int xe_late_bind_fw_num_fans(struct xe_late_bind *late_bind)
 		return 0;
 }
 
-static void xe_late_bind_wait_for_worker_completion(struct xe_late_bind *late_bind)
+void xe_late_bind_wait_for_worker_completion(struct xe_late_bind *late_bind)
 {
 	struct xe_device *xe = late_bind_to_xe(late_bind);
 	struct xe_late_bind_fw *lbfw;
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.h b/drivers/gpu/drm/xe/xe_late_bind_fw.h
index 28d56ed2bfdc..07e437390539 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.h
@@ -12,5 +12,6 @@ struct xe_late_bind;
 
 int xe_late_bind_init(struct xe_late_bind *late_bind);
 int xe_late_bind_fw_load(struct xe_late_bind *late_bind);
+void xe_late_bind_wait_for_worker_completion(struct xe_late_bind *late_bind);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index ff749edc005b..734fe259600e 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -20,6 +20,7 @@
 #include "xe_gt.h"
 #include "xe_guc.h"
 #include "xe_irq.h"
+#include "xe_late_bind_fw.h"
 #include "xe_pcode.h"
 #include "xe_pxp.h"
 #include "xe_trace.h"
@@ -550,6 +551,9 @@ int xe_pm_runtime_resume(struct xe_device *xe)
 
 	xe_pxp_pm_resume(xe->pxp);
 
+	if (xe->d3cold.allowed)
+		xe_late_bind_fw_load(&xe->late_bind);
+
 out:
 	xe_rpm_lockmap_release(xe);
 	xe_pm_write_callback_task(xe, NULL);
-- 
2.34.1

[PATCH v6 07/10] drm/xe/xe_late_bind_fw: Reload late binding fw during system resume

[Badal Nilawar]

Reload late binding fw during resume from system suspend

v2:
  - Unconditionally reload late binding fw (Rodrigo)
  - Flush worker during system suspend

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_pm.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index 734fe259600e..13afaf97d831 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -127,6 +127,8 @@ int xe_pm_suspend(struct xe_device *xe)
 	if (err)
 		goto err;
 
+	xe_late_bind_wait_for_worker_completion(&xe->late_bind);
+
 	for_each_gt(gt, xe, id)
 		xe_gt_suspend_prepare(gt);
 
@@ -205,6 +207,8 @@ int xe_pm_resume(struct xe_device *xe)
 
 	xe_pxp_pm_resume(xe->pxp);
 
+	xe_late_bind_fw_load(&xe->late_bind);
+
 	drm_dbg(&xe->drm, "Device resumed\n");
 	return 0;
 err:
-- 
2.34.1

[PATCH v6 08/10] drm/xe/xe_late_bind_fw: Introduce debug fs node to disable late binding

[Badal Nilawar]

Introduce a debug filesystem node to disable late binding fw reload
during the system or runtime resume. This is intended for situations
where the late binding fw needs to be loaded from user mode,
perticularly for validation purpose.
Note that xe kmd doesn't participate in late binding flow from user
space. Binary loaded from the userspace will be lost upon entering to
D3 cold hence user space app need to handle this situation.

v2:
  - s/(uval == 1) ? true : false/!!uval/ (Daniele)
v3:
  - Refine the commit message (Daniele)

Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/xe/xe_debugfs.c            | 41 ++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_late_bind_fw.c       |  3 ++
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h |  2 ++
 3 files changed, 46 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index d83cd6ed3fa8..d1f6f556efa2 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -226,6 +226,44 @@ static const struct file_operations atomic_svm_timeslice_ms_fops = {
 	.write = atomic_svm_timeslice_ms_set,
 };
 
+static ssize_t disable_late_binding_show(struct file *f, char __user *ubuf,
+					 size_t size, loff_t *pos)
+{
+	struct xe_device *xe = file_inode(f)->i_private;
+	struct xe_late_bind *late_bind = &xe->late_bind;
+	char buf[32];
+	int len;
+
+	len = scnprintf(buf, sizeof(buf), "%d\n", late_bind->disable);
+
+	return simple_read_from_buffer(ubuf, size, pos, buf, len);
+}
+
+static ssize_t disable_late_binding_set(struct file *f, const char __user *ubuf,
+					size_t size, loff_t *pos)
+{
+	struct xe_device *xe = file_inode(f)->i_private;
+	struct xe_late_bind *late_bind = &xe->late_bind;
+	u32 uval;
+	ssize_t ret;
+
+	ret = kstrtouint_from_user(ubuf, size, sizeof(uval), &uval);
+	if (ret)
+		return ret;
+
+	if (uval > 1)
+		return -EINVAL;
+
+	late_bind->disable = !!uval;
+	return size;
+}
+
+static const struct file_operations disable_late_binding_fops = {
+	.owner = THIS_MODULE,
+	.read = disable_late_binding_show,
+	.write = disable_late_binding_set,
+};
+
 void xe_debugfs_register(struct xe_device *xe)
 {
 	struct ttm_device *bdev = &xe->ttm;
@@ -249,6 +287,9 @@ void xe_debugfs_register(struct xe_device *xe)
 	debugfs_create_file("atomic_svm_timeslice_ms", 0600, root, xe,
 			    &atomic_svm_timeslice_ms_fops);
 
+	debugfs_create_file("disable_late_binding", 0600, root, xe,
+			    &disable_late_binding_fops);
+
 	for (mem_type = XE_PL_VRAM0; mem_type <= XE_PL_VRAM1; ++mem_type) {
 		man = ttm_manager_type(bdev, mem_type);
 
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
index 1361271beaa6..663cf8fe9b14 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -165,6 +165,9 @@ int xe_late_bind_fw_load(struct xe_late_bind *late_bind)
 	if (!late_bind->component_added)
 		return -ENODEV;
 
+	if (late_bind->disable)
+		return 0;
+
 	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
 		lbfw = &late_bind->late_bind_fw[fw_id];
 		if (lbfw->payload) {
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
index f650cb8641b3..2ff9bab4e7d9 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
@@ -67,6 +67,8 @@ struct xe_late_bind {
 	struct workqueue_struct *wq;
 	/** @late_bind.component_added: whether the component has been added */
 	bool component_added;
+	/** @late_bind.disable to block late binding reload during pm resume flow*/
+	bool disable;
 };
 
 #endif
-- 
2.34.1

[PATCH v6 09/10] drm/xe/xe_late_bind_fw: Extract and print version info

[Badal Nilawar]

Extract and print version info of the late binding binary.

v2: Some refinements (Daniele)

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/xe/xe_late_bind_fw.c       | 124 +++++++++++++++++++++
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h |   3 +
 drivers/gpu/drm/xe/xe_uc_fw_abi.h          |  66 +++++++++++
 3 files changed, 193 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
index 663cf8fe9b14..e479898ea224 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -45,6 +45,121 @@ late_bind_to_xe(struct xe_late_bind *late_bind)
 	return container_of(late_bind, struct xe_device, late_bind);
 }
 
+static struct xe_device *
+late_bind_fw_to_xe(struct xe_late_bind_fw *lb_fw)
+{
+	return container_of(lb_fw, struct xe_device, late_bind.late_bind_fw[lb_fw->id]);
+}
+
+/* Refer to the "Late Bind based Firmware Layout" documentation entry for details */
+static int parse_cpd_header(struct xe_late_bind_fw *lb_fw,
+			    const void *data, size_t size, const char *manifest_entry)
+{
+	struct xe_device *xe = late_bind_fw_to_xe(lb_fw);
+	const struct gsc_cpd_header_v2 *header = data;
+	const struct gsc_manifest_header *manifest;
+	const struct gsc_cpd_entry *entry;
+	size_t min_size = sizeof(*header);
+	u32 offset;
+	int i;
+
+	/* manifest_entry is mandatory */
+	xe_assert(xe, manifest_entry);
+
+	if (size < min_size || header->header_marker != GSC_CPD_HEADER_MARKER)
+		return -ENOENT;
+
+	if (header->header_length < sizeof(struct gsc_cpd_header_v2)) {
+		drm_err(&xe->drm, "%s late binding fw: Invalid CPD header length %u!\n",
+			fw_id_to_name[lb_fw->id], header->header_length);
+		return -EINVAL;
+	}
+
+	min_size = header->header_length + sizeof(struct gsc_cpd_entry) * header->num_of_entries;
+	if (size < min_size) {
+		drm_err(&xe->drm, "%s late binding fw: too small! %zu < %zu\n",
+			fw_id_to_name[lb_fw->id], size, min_size);
+		return -ENODATA;
+	}
+
+	/* Look for the manifest first */
+	entry = (void *)header + header->header_length;
+	for (i = 0; i < header->num_of_entries; i++, entry++)
+		if (strcmp(entry->name, manifest_entry) == 0)
+			offset = entry->offset & GSC_CPD_ENTRY_OFFSET_MASK;
+
+	if (!offset) {
+		drm_err(&xe->drm, "%s late binding fw: Failed to find manifest_entry\n",
+			fw_id_to_name[lb_fw->id]);
+		return -ENODATA;
+	}
+
+	min_size = offset + sizeof(struct gsc_manifest_header);
+	if (size < min_size) {
+		drm_err(&xe->drm, "%s late binding fw: too small! %zu < %zu\n",
+			fw_id_to_name[lb_fw->id], size, min_size);
+		return -ENODATA;
+	}
+
+	manifest = data + offset;
+
+	lb_fw->version = manifest->fw_version;
+
+	return 0;
+}
+
+/* Refer to the "Late Bind based Firmware Layout" documentation entry for details */
+static int parse_lb_layout(struct xe_late_bind_fw *lb_fw,
+			   const void *data, size_t size, const char *fpt_entry)
+{
+	struct xe_device *xe = late_bind_fw_to_xe(lb_fw);
+	const struct csc_fpt_header *header = data;
+	const struct csc_fpt_entry *entry;
+	size_t min_size = sizeof(*header);
+	u32 offset;
+	int i;
+
+	/* fpt_entry is mandatory */
+	xe_assert(xe, fpt_entry);
+
+	if (size < min_size || header->header_marker != CSC_FPT_HEADER_MARKER)
+		return -ENOENT;
+
+	if (header->header_length < sizeof(struct csc_fpt_header)) {
+		drm_err(&xe->drm, "%s late binding fw: Invalid FPT header length %u!\n",
+			fw_id_to_name[lb_fw->id], header->header_length);
+		return -EINVAL;
+	}
+
+	min_size = header->header_length + sizeof(struct csc_fpt_entry) * header->num_of_entries;
+	if (size < min_size) {
+		drm_err(&xe->drm, "%s late binding fw: too small! %zu < %zu\n",
+			fw_id_to_name[lb_fw->id], size, min_size);
+		return -ENODATA;
+	}
+
+	/* Look for the cpd header first */
+	entry = (void *)header + header->header_length;
+	for (i = 0; i < header->num_of_entries; i++, entry++)
+		if (strcmp(entry->name, fpt_entry) == 0)
+			offset = entry->offset;
+
+	if (!offset) {
+		drm_err(&xe->drm, "%s late binding fw: Failed to find fpt_entry\n",
+			fw_id_to_name[lb_fw->id]);
+		return -ENODATA;
+	}
+
+	min_size = offset + sizeof(struct gsc_cpd_header_v2);
+	if (size < min_size) {
+		drm_err(&xe->drm, "%s late binding fw: too small! %zu < %zu\n",
+			fw_id_to_name[lb_fw->id], size, min_size);
+		return -ENODATA;
+	}
+
+	return parse_cpd_header(lb_fw, data + offset, size - offset, "LTES.man");
+}
+
 static const char *xe_late_bind_parse_status(uint32_t status)
 {
 	switch (status) {
@@ -222,6 +337,10 @@ static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
 		return -ENODATA;
 	}
 
+	ret = parse_lb_layout(lb_fw, fw->data, fw->size, "LTES");
+	if (ret)
+		return ret;
+
 	lb_fw->payload_size = fw->size;
 	lb_fw->payload = drmm_kzalloc(&xe->drm, lb_fw->payload_size, GFP_KERNEL);
 	if (!lb_fw->payload) {
@@ -229,6 +348,11 @@ static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
 		return -ENOMEM;
 	}
 
+	drm_info(&xe->drm, "Using %s firmware from %s version %u.%u.%u.%u\n",
+		 fw_id_to_name[lb_fw->id], lb_fw->blob_path,
+		 lb_fw->version.major, lb_fw->version.minor,
+		 lb_fw->version.hotfix, lb_fw->version.build);
+
 	memcpy((void *)lb_fw->payload, fw->data, lb_fw->payload_size);
 	release_firmware(fw);
 	INIT_WORK(&lb_fw->work, xe_late_bind_work);
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
index 2ff9bab4e7d9..491aa7e4c9f8 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
@@ -10,6 +10,7 @@
 #include <linux/mutex.h>
 #include <linux/types.h>
 #include <linux/workqueue.h>
+#include "xe_uc_fw_abi.h"
 
 #define XE_LB_MAX_PAYLOAD_SIZE SZ_4K
 
@@ -39,6 +40,8 @@ struct xe_late_bind_fw {
 	size_t payload_size;
 	/** @late_bind_fw.work: worker to upload latebind blob */
 	struct work_struct work;
+	/** @late_bind_fw.version: late binding blob manifest version */
+	struct gsc_version version;
 };
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_uc_fw_abi.h b/drivers/gpu/drm/xe/xe_uc_fw_abi.h
index 87ade41209d0..78782d105fa9 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw_abi.h
+++ b/drivers/gpu/drm/xe/xe_uc_fw_abi.h
@@ -318,4 +318,70 @@ struct gsc_manifest_header {
 	u32 exponent_size; /* in dwords */
 } __packed;
 
+/**
+ * DOC: Late binding Firmware Layout
+ *
+ * The Late binding binary starts with FPT header, which contains locations
+ * of various partitions of the binary. Here we're interested in finding out
+ * manifest version. To the manifest version, we need to locate CPD header
+ * one of the entry in CPD header points to manifest header. Manifest header
+ * contains the version.
+ *
+ *      +================================================+
+ *      |  FPT Header                                    |
+ *      +================================================+
+ *      |  FPT entries[]                                 |
+ *      |      entry1                                    |
+ *      |      ...                                       |
+ *      |      entryX                                    |
+ *      |          "LTES"                                |
+ *      |          ...                                   |
+ *      |          offset  >-----------------------------|------o
+ *      +================================================+      |
+ *                                                              |
+ *      +================================================+      |
+ *      |  CPD Header                                    |<-----o
+ *      +================================================+
+ *      |  CPD entries[]                                 |
+ *      |      entry1                                    |
+ *      |      ...                                       |
+ *      |      entryX                                    |
+ *      |          "LTES.man"                            |
+ *      |           ...                                  |
+ *      |           offset  >----------------------------|------o
+ *      +================================================+      |
+ *                                                              |
+ *      +================================================+      |
+ *      |  Manifest Header                               |<-----o
+ *      |      ...                                       |
+ *      |      FW version                                |
+ *      |      ...                                       |
+ *      +================================================+
+ */
+
+/* FPT Headers */
+struct csc_fpt_header {
+	u32 header_marker;
+#define CSC_FPT_HEADER_MARKER 0x54504624
+	u32 num_of_entries;
+	u8 header_version;
+	u8 entry_version;
+	u8 header_length; /* in bytes */
+	u8 flags;
+	u16 ticks_to_add;
+	u16 tokens_to_add;
+	u32 uma_size;
+	u32 crc32;
+	struct gsc_version fitc_version;
+} __packed;
+
+struct csc_fpt_entry {
+	u8 name[4]; /* partition name */
+	u32 reserved1;
+	u32 offset; /* offset from beginning of CSE region */
+	u32 length; /* partition length in bytes */
+	u32 reserved2[3];
+	u32 partition_flags;
+} __packed;
+
 #endif
-- 
2.34.1

[PATCH v6 10/10] drm/xe/xe_late_bind_fw: Select INTEL_MEI_LATE_BIND for CI

[Badal Nilawar]

Do not review

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
 drivers/gpu/drm/xe/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/xe/Kconfig b/drivers/gpu/drm/xe/Kconfig
index f66e6d39e319..ef3f4807b0b3 100644
--- a/drivers/gpu/drm/xe/Kconfig
+++ b/drivers/gpu/drm/xe/Kconfig
@@ -45,6 +45,7 @@ config DRM_XE
 	select WANT_DEV_COREDUMP
 	select AUXILIARY_BUS
 	select HMM_MIRROR
+	select INTEL_MEI_LATE_BIND
 	help
 	  Driver for Intel Xe2 series GPUs and later. Experimental support
 	  for Xe series is also available.
-- 
2.34.1

✗ CI.checkpatch: warning for Introducing firmware late binding

[Patchwork]

== Series Details ==

Series: Introducing firmware late binding
URL   : https://patchwork.freedesktop.org/series/151140/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
f8ff75ae1d2127635239b134695774ed4045d05b
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 46e6244390bf192cdbea259c0711f8d44416c9d7
Author: Badal Nilawar <badal.nilawar@intel.com>
Date:   Fri Jul 4 01:01:06 2025 +0530

    drm/xe/xe_late_bind_fw: Select INTEL_MEI_LATE_BIND for CI
    
    Do not review
    
    Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
+ /mt/dim checkpatch 05fd9cf9ba87dcf4428adbca5237845f2c04d8ac drm-intel
1e10957c0abc mei: bus: add mei_cldev_mtu interface
9af9c09d9a58 mei: late_bind: add late binding component driver
-:38: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#38: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 378 lines checked
83fb69e59f91 drm/xe/xe_late_bind_fw: Introducing xe_late_bind_fw
-:93: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#93: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 202 lines checked
ea0e93d5d663 drm/xe/xe_late_bind_fw: Initialize late binding firmware
c458cb478796 drm/xe/xe_late_bind_fw: Load late binding firmware
f80a06155bf8 drm/xe/xe_late_bind_fw: Reload late binding fw in rpm resume
9ffaabeb7407 drm/xe/xe_late_bind_fw: Reload late binding fw during system resume
b08fa1552ec4 drm/xe/xe_late_bind_fw: Introduce debug fs node to disable late binding
aa7874bb6d35 drm/xe/xe_late_bind_fw: Extract and print version info
46e6244390bf drm/xe/xe_late_bind_fw: Select INTEL_MEI_LATE_BIND for CI

✓ CI.KUnit: success for Introducing firmware late binding

[Patchwork]

== Series Details ==

Series: Introducing firmware late binding
URL   : https://patchwork.freedesktop.org/series/151140/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[20:01:04] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:01:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[20:01:41] Starting KUnit Kernel (1/1)...
[20:01:41] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:01:41] ================== guc_buf (11 subtests) ===================
[20:01:41] [PASSED] test_smallest
[20:01:41] [PASSED] test_largest
[20:01:41] [PASSED] test_granular
[20:01:41] [PASSED] test_unique
[20:01:41] [PASSED] test_overlap
[20:01:41] [PASSED] test_reusable
[20:01:41] [PASSED] test_too_big
[20:01:41] [PASSED] test_flush
[20:01:41] [PASSED] test_lookup
[20:01:41] [PASSED] test_data
[20:01:41] [PASSED] test_class
[20:01:41] ===================== [PASSED] guc_buf =====================
[20:01:41] =================== guc_dbm (7 subtests) ===================
[20:01:41] [PASSED] test_empty
[20:01:41] [PASSED] test_default
[20:01:41] ======================== test_size  ========================
[20:01:41] [PASSED] 4
[20:01:41] [PASSED] 8
[20:01:41] [PASSED] 32
[20:01:41] [PASSED] 256
[20:01:41] ==================== [PASSED] test_size ====================
[20:01:41] ======================= test_reuse  ========================
[20:01:41] [PASSED] 4
[20:01:41] [PASSED] 8
[20:01:41] [PASSED] 32
[20:01:41] [PASSED] 256
[20:01:41] =================== [PASSED] test_reuse ====================
[20:01:41] =================== test_range_overlap  ====================
[20:01:41] [PASSED] 4
[20:01:41] [PASSED] 8
[20:01:41] [PASSED] 32
[20:01:41] [PASSED] 256
[20:01:41] =============== [PASSED] test_range_overlap ================
[20:01:41] =================== test_range_compact  ====================
[20:01:41] [PASSED] 4
[20:01:41] [PASSED] 8
[20:01:41] [PASSED] 32
[20:01:41] [PASSED] 256
[20:01:41] =============== [PASSED] test_range_compact ================
[20:01:41] ==================== test_range_spare  =====================
[20:01:41] [PASSED] 4
[20:01:41] [PASSED] 8
[20:01:41] [PASSED] 32
[20:01:41] [PASSED] 256
[20:01:41] ================ [PASSED] test_range_spare =================
[20:01:41] ===================== [PASSED] guc_dbm =====================
[20:01:41] =================== guc_idm (6 subtests) ===================
[20:01:41] [PASSED] bad_init
[20:01:41] [PASSED] no_init
[20:01:41] [PASSED] init_fini
[20:01:41] [PASSED] check_used
[20:01:41] [PASSED] check_quota
[20:01:41] [PASSED] check_all
[20:01:41] ===================== [PASSED] guc_idm =====================
[20:01:41] ================== no_relay (3 subtests) ===================
[20:01:41] [PASSED] xe_drops_guc2pf_if_not_ready
[20:01:41] [PASSED] xe_drops_guc2vf_if_not_ready
[20:01:41] [PASSED] xe_rejects_send_if_not_ready
[20:01:41] ==================== [PASSED] no_relay =====================
[20:01:41] ================== pf_relay (14 subtests) ==================
[20:01:41] [PASSED] pf_rejects_guc2pf_too_short
[20:01:41] [PASSED] pf_rejects_guc2pf_too_long
[20:01:41] [PASSED] pf_rejects_guc2pf_no_payload
[20:01:41] [PASSED] pf_fails_no_payload
[20:01:41] [PASSED] pf_fails_bad_origin
[20:01:41] [PASSED] pf_fails_bad_type
[20:01:41] [PASSED] pf_txn_reports_error
[20:01:41] [PASSED] pf_txn_sends_pf2guc
[20:01:41] [PASSED] pf_sends_pf2guc
[20:01:41] [SKIPPED] pf_loopback_nop
[20:01:41] [SKIPPED] pf_loopback_echo
[20:01:41] [SKIPPED] pf_loopback_fail
[20:01:41] [SKIPPED] pf_loopback_busy
[20:01:41] [SKIPPED] pf_loopback_retry
[20:01:41] ==================== [PASSED] pf_relay =====================
[20:01:41] ================== vf_relay (3 subtests) ===================
[20:01:41] [PASSED] vf_rejects_guc2vf_too_short
[20:01:41] [PASSED] vf_rejects_guc2vf_too_long
[20:01:41] [PASSED] vf_rejects_guc2vf_no_payload
[20:01:41] ==================== [PASSED] vf_relay =====================
[20:01:41] ================= pf_service (11 subtests) =================
[20:01:41] [PASSED] pf_negotiate_any
[20:01:41] [PASSED] pf_negotiate_base_match
[20:01:41] [PASSED] pf_negotiate_base_newer
[20:01:41] [PASSED] pf_negotiate_base_next
[20:01:41] [SKIPPED] pf_negotiate_base_older
[20:01:41] [PASSED] pf_negotiate_base_prev
[20:01:41] [PASSED] pf_negotiate_latest_match
[20:01:41] [PASSED] pf_negotiate_latest_newer
[20:01:41] [PASSED] pf_negotiate_latest_next
[20:01:41] [SKIPPED] pf_negotiate_latest_older
[20:01:41] [SKIPPED] pf_negotiate_latest_prev
[20:01:41] =================== [PASSED] pf_service ====================
[20:01:41] ===================== lmtt (1 subtest) =====================
[20:01:41] ======================== test_ops  =========================
[20:01:41] [PASSED] 2-level
[20:01:41] [PASSED] multi-level
[20:01:41] ==================== [PASSED] test_ops =====================
[20:01:41] ====================== [PASSED] lmtt =======================
[20:01:41] =================== xe_mocs (2 subtests) ===================
[20:01:41] ================ xe_live_mocs_kernel_kunit  ================
[20:01:41] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[20:01:41] ================ xe_live_mocs_reset_kunit  =================
[20:01:41] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[20:01:41] ==================== [SKIPPED] xe_mocs =====================
[20:01:41] ================= xe_migrate (2 subtests) ==================
[20:01:41] ================= xe_migrate_sanity_kunit  =================
[20:01:41] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[20:01:41] ================== xe_validate_ccs_kunit  ==================
[20:01:41] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[20:01:41] =================== [SKIPPED] xe_migrate ===================
[20:01:41] ================== xe_dma_buf (1 subtest) ==================
[20:01:41] ==================== xe_dma_buf_kunit  =====================
[20:01:41] ================ [SKIPPED] xe_dma_buf_kunit ================
[20:01:41] =================== [SKIPPED] xe_dma_buf ===================
[20:01:41] ================= xe_bo_shrink (1 subtest) =================
[20:01:41] =================== xe_bo_shrink_kunit  ====================
[20:01:41] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[20:01:41] ================== [SKIPPED] xe_bo_shrink ==================
[20:01:41] ==================== xe_bo (2 subtests) ====================
[20:01:41] ================== xe_ccs_migrate_kunit  ===================
[20:01:41] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[20:01:41] ==================== xe_bo_evict_kunit  ====================
[20:01:41] =============== [SKIPPED] xe_bo_evict_kunit ================
[20:01:41] ===================== [SKIPPED] xe_bo ======================
[20:01:41] ==================== args (11 subtests) ====================
[20:01:41] [PASSED] count_args_test
[20:01:41] [PASSED] call_args_example
[20:01:41] [PASSED] call_args_test
[20:01:41] [PASSED] drop_first_arg_example
[20:01:41] [PASSED] drop_first_arg_test
[20:01:41] [PASSED] first_arg_example
[20:01:41] [PASSED] first_arg_test
[20:01:41] [PASSED] last_arg_example
[20:01:41] [PASSED] last_arg_test
[20:01:41] [PASSED] pick_arg_example
[20:01:41] [PASSED] sep_comma_example
[20:01:41] ====================== [PASSED] args =======================
[20:01:41] =================== xe_pci (3 subtests) ====================
[20:01:41] ==================== check_graphics_ip  ====================
[20:01:41] [PASSED] 12.70 Xe_LPG
[20:01:41] [PASSED] 12.71 Xe_LPG
[20:01:41] [PASSED] 12.74 Xe_LPG+
[20:01:41] [PASSED] 20.01 Xe2_HPG
[20:01:41] [PASSED] 20.02 Xe2_HPG
[20:01:41] [PASSED] 20.04 Xe2_LPG
[20:01:41] [PASSED] 30.00 Xe3_LPG
[20:01:41] [PASSED] 30.01 Xe3_LPG
[20:01:41] [PASSED] 30.03 Xe3_LPG
[20:01:41] ================ [PASSED] check_graphics_ip ================
[20:01:41] ===================== check_media_ip  ======================
[20:01:41] [PASSED] 13.00 Xe_LPM+
[20:01:41] [PASSED] 13.01 Xe2_HPM
[20:01:41] [PASSED] 20.00 Xe2_LPM
[20:01:41] [PASSED] 30.00 Xe3_LPM
[20:01:41] [PASSED] 30.02 Xe3_LPM
[20:01:41] ================= [PASSED] check_media_ip ==================
[20:01:41] ================= check_platform_gt_count  =================
[20:01:41] [PASSED] 0x9A60 (TIGERLAKE)
[20:01:41] [PASSED] 0x9A68 (TIGERLAKE)
[20:01:41] [PASSED] 0x9A70 (TIGERLAKE)
[20:01:41] [PASSED] 0x9A40 (TIGERLAKE)
[20:01:41] [PASSED] 0x9A49 (TIGERLAKE)
[20:01:41] [PASSED] 0x9A59 (TIGERLAKE)
[20:01:41] [PASSED] 0x9A78 (TIGERLAKE)
[20:01:41] [PASSED] 0x9AC0 (TIGERLAKE)
[20:01:41] [PASSED] 0x9AC9 (TIGERLAKE)
[20:01:41] [PASSED] 0x9AD9 (TIGERLAKE)
[20:01:41] [PASSED] 0x9AF8 (TIGERLAKE)
[20:01:41] [PASSED] 0x4C80 (ROCKETLAKE)
[20:01:41] [PASSED] 0x4C8A (ROCKETLAKE)
[20:01:41] [PASSED] 0x4C8B (ROCKETLAKE)
[20:01:41] [PASSED] 0x4C8C (ROCKETLAKE)
[20:01:41] [PASSED] 0x4C90 (ROCKETLAKE)
[20:01:41] [PASSED] 0x4C9A (ROCKETLAKE)
[20:01:41] [PASSED] 0x4680 (ALDERLAKE_S)
[20:01:41] [PASSED] 0x4682 (ALDERLAKE_S)
[20:01:41] [PASSED] 0x4688 (ALDERLAKE_S)
[20:01:41] [PASSED] 0x468A (ALDERLAKE_S)
[20:01:41] [PASSED] 0x468B (ALDERLAKE_S)
[20:01:41] [PASSED] 0x4690 (ALDERLAKE_S)
[20:01:41] [PASSED] 0x4692 (ALDERLAKE_S)
[20:01:41] [PASSED] 0x4693 (ALDERLAKE_S)
[20:01:41] [PASSED] 0x46A0 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x46A1 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x46A2 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x46A3 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x46A6 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x46A8 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x46AA (ALDERLAKE_P)
[20:01:41] [PASSED] 0x462A (ALDERLAKE_P)
[20:01:41] [PASSED] 0x4626 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x4628 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x46B0 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x46B1 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x46B2 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x46B3 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x46C0 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x46C1 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x46C2 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x46C3 (ALDERLAKE_P)
[20:01:41] [PASSED] 0x46D0 (ALDERLAKE_N)
[20:01:41] [PASSED] 0x46D1 (ALDERLAKE_N)
[20:01:41] [PASSED] 0x46D2 (ALDERLAKE_N)
[20:01:41] [PASSED] 0x46D3 (ALDERLAKE_N)
[20:01:41] [PASSED] 0x46D4 (ALDERLAKE_N)
[20:01:41] [PASSED] 0xA721 (ALDERLAKE_P)
[20:01:41] [PASSED] 0xA7A1 (ALDERLAKE_P)
[20:01:41] [PASSED] 0xA7A9 (ALDERLAKE_P)
[20:01:41] [PASSED] 0xA7AC (ALDERLAKE_P)
[20:01:41] [PASSED] 0xA7AD (ALDERLAKE_P)
[20:01:41] [PASSED] 0xA720 (ALDERLAKE_P)
[20:01:41] [PASSED] 0xA7A0 (ALDERLAKE_P)
[20:01:41] [PASSED] 0xA7A8 (ALDERLAKE_P)
[20:01:41] [PASSED] 0xA7AA (ALDERLAKE_P)
[20:01:41] [PASSED] 0xA7AB (ALDERLAKE_P)
[20:01:41] [PASSED] 0xA780 (ALDERLAKE_S)
[20:01:41] [PASSED] 0xA781 (ALDERLAKE_S)
[20:01:41] [PASSED] 0xA782 (ALDERLAKE_S)
[20:01:41] [PASSED] 0xA783 (ALDERLAKE_S)
[20:01:41] [PASSED] 0xA788 (ALDERLAKE_S)
[20:01:41] [PASSED] 0xA789 (ALDERLAKE_S)
[20:01:41] [PASSED] 0xA78A (ALDERLAKE_S)
[20:01:41] [PASSED] 0xA78B (ALDERLAKE_S)
[20:01:41] [PASSED] 0x4905 (DG1)
[20:01:41] [PASSED] 0x4906 (DG1)
[20:01:41] [PASSED] 0x4907 (DG1)
[20:01:41] [PASSED] 0x4908 (DG1)
[20:01:41] [PASSED] 0x4909 (DG1)
[20:01:41] [PASSED] 0x56C0 (DG2)
[20:01:41] [PASSED] 0x56C2 (DG2)
[20:01:41] [PASSED] 0x56C1 (DG2)
[20:01:41] [PASSED] 0x7D51 (METEORLAKE)
[20:01:41] [PASSED] 0x7DD1 (METEORLAKE)
[20:01:41] [PASSED] 0x7D41 (METEORLAKE)
[20:01:41] [PASSED] 0x7D67 (METEORLAKE)
[20:01:41] [PASSED] 0xB640 (METEORLAKE)
[20:01:41] [PASSED] 0x56A0 (DG2)
[20:01:41] [PASSED] 0x56A1 (DG2)
[20:01:41] [PASSED] 0x56A2 (DG2)
[20:01:41] [PASSED] 0x56BE (DG2)
[20:01:41] [PASSED] 0x56BF (DG2)
[20:01:41] [PASSED] 0x5690 (DG2)
[20:01:41] [PASSED] 0x5691 (DG2)
[20:01:41] [PASSED] 0x5692 (DG2)
[20:01:41] [PASSED] 0x56A5 (DG2)
[20:01:41] [PASSED] 0x56A6 (DG2)
[20:01:41] [PASSED] 0x56B0 (DG2)
[20:01:41] [PASSED] 0x56B1 (DG2)
[20:01:41] [PASSED] 0x56BA (DG2)
[20:01:41] [PASSED] 0x56BB (DG2)
[20:01:41] [PASSED] 0x56BC (DG2)
[20:01:41] [PASSED] 0x56BD (DG2)
[20:01:41] [PASSED] 0x5693 (DG2)
[20:01:41] [PASSED] 0x5694 (DG2)
[20:01:41] [PASSED] 0x5695 (DG2)
[20:01:41] [PASSED] 0x56A3 (DG2)
[20:01:41] [PASSED] 0x56A4 (DG2)
[20:01:41] [PASSED] 0x56B2 (DG2)
[20:01:41] [PASSED] 0x56B3 (DG2)
[20:01:41] [PASSED] 0x5696 (DG2)
[20:01:41] [PASSED] 0x5697 (DG2)
[20:01:41] [PASSED] 0xB69 (PVC)
[20:01:41] [PASSED] 0xB6E (PVC)
[20:01:41] [PASSED] 0xBD4 (PVC)
[20:01:41] [PASSED] 0xBD5 (PVC)
[20:01:41] [PASSED] 0xBD6 (PVC)
[20:01:41] [PASSED] 0xBD7 (PVC)
[20:01:41] [PASSED] 0xBD8 (PVC)
[20:01:41] [PASSED] 0xBD9 (PVC)
[20:01:41] [PASSED] 0xBDA (PVC)
[20:01:41] [PASSED] 0xBDB (PVC)
[20:01:41] [PASSED] 0xBE0 (PVC)
[20:01:41] [PASSED] 0xBE1 (PVC)
[20:01:41] [PASSED] 0xBE5 (PVC)
[20:01:41] [PASSED] 0x7D40 (METEORLAKE)
[20:01:41] [PASSED] 0x7D45 (METEORLAKE)
[20:01:41] [PASSED] 0x7D55 (METEORLAKE)
[20:01:41] [PASSED] 0x7D60 (METEORLAKE)
[20:01:41] [PASSED] 0x7DD5 (METEORLAKE)
[20:01:41] [PASSED] 0x6420 (LUNARLAKE)
[20:01:41] [PASSED] 0x64A0 (LUNARLAKE)
[20:01:41] [PASSED] 0x64B0 (LUNARLAKE)
[20:01:41] [PASSED] 0xE202 (BATTLEMAGE)
[20:01:41] [PASSED] 0xE20B (BATTLEMAGE)
[20:01:41] [PASSED] 0xE20C (BATTLEMAGE)
[20:01:41] [PASSED] 0xE20D (BATTLEMAGE)
[20:01:41] [PASSED] 0xE210 (BATTLEMAGE)
[20:01:41] [PASSED] 0xE211 (BATTLEMAGE)
[20:01:41] [PASSED] 0xE212 (BATTLEMAGE)
[20:01:41] [PASSED] 0xE216 (BATTLEMAGE)
[20:01:41] [PASSED] 0xE220 (BATTLEMAGE)
[20:01:41] [PASSED] 0xE221 (BATTLEMAGE)
[20:01:41] [PASSED] 0xE222 (BATTLEMAGE)
[20:01:41] [PASSED] 0xE223 (BATTLEMAGE)
[20:01:41] [PASSED] 0xB080 (PANTHERLAKE)
[20:01:41] [PASSED] 0xB081 (PANTHERLAKE)
[20:01:41] [PASSED] 0xB082 (PANTHERLAKE)
[20:01:41] [PASSED] 0xB083 (PANTHERLAKE)
[20:01:41] [PASSED] 0xB084 (PANTHERLAKE)
[20:01:41] [PASSED] 0xB085 (PANTHERLAKE)
[20:01:41] [PASSED] 0xB086 (PANTHERLAKE)
[20:01:41] [PASSED] 0xB087 (PANTHERLAKE)
[20:01:41] [PASSED] 0xB08F (PANTHERLAKE)
[20:01:41] [PASSED] 0xB090 (PANTHERLAKE)
[20:01:41] [PASSED] 0xB0A0 (PANTHERLAKE)
[20:01:41] [PASSED] 0xB0B0 (PANTHERLAKE)
[20:01:41] [PASSED] 0xFD80 (PANTHERLAKE)
[20:01:41] [PASSED] 0xFD81 (PANTHERLAKE)
[20:01:41] ============= [PASSED] check_platform_gt_count =============
[20:01:41] ===================== [PASSED] xe_pci ======================
[20:01:41] =================== xe_rtp (2 subtests) ====================
[20:01:41] =============== xe_rtp_process_to_sr_tests  ================
[20:01:41] [PASSED] coalesce-same-reg
[20:01:41] [PASSED] no-match-no-add
[20:01:41] [PASSED] match-or
[20:01:41] [PASSED] match-or-xfail
[20:01:41] [PASSED] no-match-no-add-multiple-rules
[20:01:41] [PASSED] two-regs-two-entries
[20:01:41] [PASSED] clr-one-set-other
[20:01:41] [PASSED] set-field
[20:01:41] [PASSED] conflict-duplicate
[20:01:41] [PASSED] conflict-not-disjoint
[20:01:41] [PASSED] conflict-reg-type
[20:01:41] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[20:01:41] ================== xe_rtp_process_tests  ===================
[20:01:41] [PASSED] active1
[20:01:41] [PASSED] active2
[20:01:41] [PASSED] active-inactive
[20:01:41] [PASSED] inactive-active
[20:01:41] [PASSED] inactive-1st_or_active-inactive
[20:01:41] [PASSED] inactive-2nd_or_active-inactive
[20:01:41] [PASSED] inactive-last_or_active-inactive
[20:01:41] [PASSED] inactive-no_or_active-inactive
[20:01:41] ============== [PASSED] xe_rtp_process_tests ===============
[20:01:41] ===================== [PASSED] xe_rtp ======================
[20:01:41] ==================== xe_wa (1 subtest) =====================
[20:01:41] ======================== xe_wa_gt  =========================
[20:01:41] [PASSED] TIGERLAKE (B0)
[20:01:41] [PASSED] DG1 (A0)
[20:01:41] [PASSED] DG1 (B0)
[20:01:41] [PASSED] ALDERLAKE_S (A0)
[20:01:41] [PASSED] ALDERLAKE_S (B0)
[20:01:41] [PASSED] ALDERLAKE_S (C0)
[20:01:41] [PASSED] ALDERLAKE_S (D0)
[20:01:41] [PASSED] ALDERLAKE_P (A0)
[20:01:41] [PASSED] ALDERLAKE_P (B0)
[20:01:41] [PASSED] ALDERLAKE_P (C0)
[20:01:41] [PASSED] ALDERLAKE_S_RPLS (D0)
[20:01:41] [PASSED] ALDERLAKE_P_RPLU (E0)
[20:01:41] [PASSED] DG2_G10 (C0)
[20:01:41] [PASSED] DG2_G11 (B1)
[20:01:41] [PASSED] DG2_G12 (A1)
[20:01:41] [PASSED] METEORLAKE (g:A0, m:A0)
[20:01:41] [PASSED] METEORLAKE (g:A0, m:A0)
[20:01:41] [PASSED] METEORLAKE (g:A0, m:A0)
[20:01:41] [PASSED] LUNARLAKE (g:A0, m:A0)
[20:01:41] [PASSED] LUNARLAKE (g:B0, m:A0)
[20:01:41] [PASSED] BATTLEMAGE (g:A0, m:A1)
stty: 'standard input': Inappropriate ioctl for device
[20:01:41] ==================== [PASSED] xe_wa_gt =====================
[20:01:41] ====================== [PASSED] xe_wa ======================
[20:01:41] ============================================================
[20:01:41] Testing complete. Ran 296 tests: passed: 280, skipped: 16
[20:01:41] Elapsed time: 37.481s total, 4.256s configuring, 32.858s building, 0.315s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[20:01:41] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:01:43] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[20:02:09] Starting KUnit Kernel (1/1)...
[20:02:09] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:02:09] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[20:02:09] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[20:02:09] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[20:02:09] =========== drm_validate_clone_mode (2 subtests) ===========
[20:02:09] ============== drm_test_check_in_clone_mode  ===============
[20:02:09] [PASSED] in_clone_mode
[20:02:09] [PASSED] not_in_clone_mode
[20:02:09] ========== [PASSED] drm_test_check_in_clone_mode ===========
[20:02:09] =============== drm_test_check_valid_clones  ===============
[20:02:09] [PASSED] not_in_clone_mode
[20:02:09] [PASSED] valid_clone
[20:02:09] [PASSED] invalid_clone
[20:02:09] =========== [PASSED] drm_test_check_valid_clones ===========
[20:02:09] ============= [PASSED] drm_validate_clone_mode =============
[20:02:09] ============= drm_validate_modeset (1 subtest) =============
[20:02:09] [PASSED] drm_test_check_connector_changed_modeset
[20:02:09] ============== [PASSED] drm_validate_modeset ===============
[20:02:09] ====== drm_test_bridge_get_current_state (2 subtests) ======
[20:02:09] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[20:02:09] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[20:02:09] ======== [PASSED] drm_test_bridge_get_current_state ========
[20:02:09] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[20:02:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[20:02:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[20:02:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[20:02:09] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[20:02:09] ============== drm_bridge_alloc (2 subtests) ===============
[20:02:09] [PASSED] drm_test_drm_bridge_alloc_basic
[20:02:09] [PASSED] drm_test_drm_bridge_alloc_get_put
[20:02:09] ================ [PASSED] drm_bridge_alloc =================
[20:02:09] ================== drm_buddy (7 subtests) ==================
[20:02:09] [PASSED] drm_test_buddy_alloc_limit
[20:02:09] [PASSED] drm_test_buddy_alloc_optimistic
[20:02:09] [PASSED] drm_test_buddy_alloc_pessimistic
[20:02:09] [PASSED] drm_test_buddy_alloc_pathological
[20:02:09] [PASSED] drm_test_buddy_alloc_contiguous
[20:02:09] [PASSED] drm_test_buddy_alloc_clear
[20:02:09] [PASSED] drm_test_buddy_alloc_range_bias
[20:02:09] ==================== [PASSED] drm_buddy ====================
[20:02:09] ============= drm_cmdline_parser (40 subtests) =============
[20:02:09] [PASSED] drm_test_cmdline_force_d_only
[20:02:09] [PASSED] drm_test_cmdline_force_D_only_dvi
[20:02:09] [PASSED] drm_test_cmdline_force_D_only_hdmi
[20:02:09] [PASSED] drm_test_cmdline_force_D_only_not_digital
[20:02:09] [PASSED] drm_test_cmdline_force_e_only
[20:02:09] [PASSED] drm_test_cmdline_res
[20:02:09] [PASSED] drm_test_cmdline_res_vesa
[20:02:09] [PASSED] drm_test_cmdline_res_vesa_rblank
[20:02:09] [PASSED] drm_test_cmdline_res_rblank
[20:02:09] [PASSED] drm_test_cmdline_res_bpp
[20:02:09] [PASSED] drm_test_cmdline_res_refresh
[20:02:09] [PASSED] drm_test_cmdline_res_bpp_refresh
[20:02:09] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[20:02:09] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[20:02:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[20:02:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[20:02:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[20:02:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[20:02:09] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[20:02:09] [PASSED] drm_test_cmdline_res_margins_force_on
[20:02:09] [PASSED] drm_test_cmdline_res_vesa_margins
[20:02:09] [PASSED] drm_test_cmdline_name
[20:02:09] [PASSED] drm_test_cmdline_name_bpp
[20:02:09] [PASSED] drm_test_cmdline_name_option
[20:02:09] [PASSED] drm_test_cmdline_name_bpp_option
[20:02:09] [PASSED] drm_test_cmdline_rotate_0
[20:02:09] [PASSED] drm_test_cmdline_rotate_90
[20:02:09] [PASSED] drm_test_cmdline_rotate_180
[20:02:09] [PASSED] drm_test_cmdline_rotate_270
[20:02:09] [PASSED] drm_test_cmdline_hmirror
[20:02:09] [PASSED] drm_test_cmdline_vmirror
[20:02:09] [PASSED] drm_test_cmdline_margin_options
[20:02:09] [PASSED] drm_test_cmdline_multiple_options
[20:02:09] [PASSED] drm_test_cmdline_bpp_extra_and_option
[20:02:09] [PASSED] drm_test_cmdline_extra_and_option
[20:02:09] [PASSED] drm_test_cmdline_freestanding_options
[20:02:09] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[20:02:09] [PASSED] drm_test_cmdline_panel_orientation
[20:02:09] ================ drm_test_cmdline_invalid  =================
[20:02:09] [PASSED] margin_only
[20:02:09] [PASSED] interlace_only
[20:02:09] [PASSED] res_missing_x
[20:02:09] [PASSED] res_missing_y
[20:02:09] [PASSED] res_bad_y
[20:02:09] [PASSED] res_missing_y_bpp
[20:02:09] [PASSED] res_bad_bpp
[20:02:09] [PASSED] res_bad_refresh
[20:02:09] [PASSED] res_bpp_refresh_force_on_off
[20:02:09] [PASSED] res_invalid_mode
[20:02:09] [PASSED] res_bpp_wrong_place_mode
[20:02:09] [PASSED] name_bpp_refresh
[20:02:09] [PASSED] name_refresh
[20:02:09] [PASSED] name_refresh_wrong_mode
[20:02:09] [PASSED] name_refresh_invalid_mode
[20:02:09] [PASSED] rotate_multiple
[20:02:09] [PASSED] rotate_invalid_val
[20:02:09] [PASSED] rotate_truncated
[20:02:09] [PASSED] invalid_option
[20:02:09] [PASSED] invalid_tv_option
[20:02:09] [PASSED] truncated_tv_option
[20:02:09] ============ [PASSED] drm_test_cmdline_invalid =============
[20:02:09] =============== drm_test_cmdline_tv_options  ===============
[20:02:09] [PASSED] NTSC
[20:02:09] [PASSED] NTSC_443
[20:02:09] [PASSED] NTSC_J
[20:02:09] [PASSED] PAL
[20:02:09] [PASSED] PAL_M
[20:02:09] [PASSED] PAL_N
[20:02:09] [PASSED] SECAM
[20:02:09] [PASSED] MONO_525
[20:02:09] [PASSED] MONO_625
[20:02:09] =========== [PASSED] drm_test_cmdline_tv_options ===========
[20:02:09] =============== [PASSED] drm_cmdline_parser ================
[20:02:09] ========== drmm_connector_hdmi_init (20 subtests) ==========
[20:02:09] [PASSED] drm_test_connector_hdmi_init_valid
[20:02:09] [PASSED] drm_test_connector_hdmi_init_bpc_8
[20:02:09] [PASSED] drm_test_connector_hdmi_init_bpc_10
[20:02:09] [PASSED] drm_test_connector_hdmi_init_bpc_12
[20:02:09] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[20:02:09] [PASSED] drm_test_connector_hdmi_init_bpc_null
[20:02:09] [PASSED] drm_test_connector_hdmi_init_formats_empty
[20:02:09] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[20:02:09] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[20:02:09] [PASSED] supported_formats=0x9 yuv420_allowed=1
[20:02:09] [PASSED] supported_formats=0x9 yuv420_allowed=0
[20:02:09] [PASSED] supported_formats=0x3 yuv420_allowed=1
[20:02:09] [PASSED] supported_formats=0x3 yuv420_allowed=0
[20:02:09] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:02:09] [PASSED] drm_test_connector_hdmi_init_null_ddc
[20:02:09] [PASSED] drm_test_connector_hdmi_init_null_product
[20:02:09] [PASSED] drm_test_connector_hdmi_init_null_vendor
[20:02:09] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[20:02:09] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[20:02:09] [PASSED] drm_test_connector_hdmi_init_product_valid
[20:02:09] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[20:02:09] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[20:02:09] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[20:02:09] ========= drm_test_connector_hdmi_init_type_valid  =========
[20:02:09] [PASSED] HDMI-A
[20:02:09] [PASSED] HDMI-B
[20:02:09] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[20:02:09] ======== drm_test_connector_hdmi_init_type_invalid  ========
[20:02:09] [PASSED] Unknown
[20:02:09] [PASSED] VGA
[20:02:09] [PASSED] DVI-I
[20:02:09] [PASSED] DVI-D
[20:02:09] [PASSED] DVI-A
[20:02:09] [PASSED] Composite
[20:02:09] [PASSED] SVIDEO
[20:02:09] [PASSED] LVDS
[20:02:09] [PASSED] Component
[20:02:09] [PASSED] DIN
[20:02:09] [PASSED] DP
[20:02:09] [PASSED] TV
[20:02:09] [PASSED] eDP
[20:02:09] [PASSED] Virtual
[20:02:09] [PASSED] DSI
[20:02:09] [PASSED] DPI
[20:02:09] [PASSED] Writeback
[20:02:09] [PASSED] SPI
[20:02:09] [PASSED] USB
[20:02:09] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[20:02:09] ============ [PASSED] drmm_connector_hdmi_init =============
[20:02:09] ============= drmm_connector_init (3 subtests) =============
[20:02:09] [PASSED] drm_test_drmm_connector_init
[20:02:09] [PASSED] drm_test_drmm_connector_init_null_ddc
[20:02:09] ========= drm_test_drmm_connector_init_type_valid  =========
[20:02:09] [PASSED] Unknown
[20:02:09] [PASSED] VGA
[20:02:09] [PASSED] DVI-I
[20:02:09] [PASSED] DVI-D
[20:02:09] [PASSED] DVI-A
[20:02:09] [PASSED] Composite
[20:02:09] [PASSED] SVIDEO
[20:02:09] [PASSED] LVDS
[20:02:09] [PASSED] Component
[20:02:09] [PASSED] DIN
[20:02:09] [PASSED] DP
[20:02:09] [PASSED] HDMI-A
[20:02:09] [PASSED] HDMI-B
[20:02:09] [PASSED] TV
[20:02:09] [PASSED] eDP
[20:02:09] [PASSED] Virtual
[20:02:09] [PASSED] DSI
[20:02:09] [PASSED] DPI
[20:02:09] [PASSED] Writeback
[20:02:09] [PASSED] SPI
[20:02:09] [PASSED] USB
[20:02:09] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[20:02:09] =============== [PASSED] drmm_connector_init ===============
[20:02:09] ========= drm_connector_dynamic_init (6 subtests) ==========
[20:02:09] [PASSED] drm_test_drm_connector_dynamic_init
[20:02:09] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[20:02:09] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[20:02:09] [PASSED] drm_test_drm_connector_dynamic_init_properties
[20:02:09] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[20:02:09] [PASSED] Unknown
[20:02:09] [PASSED] VGA
[20:02:09] [PASSED] DVI-I
[20:02:09] [PASSED] DVI-D
[20:02:09] [PASSED] DVI-A
[20:02:09] [PASSED] Composite
[20:02:09] [PASSED] SVIDEO
[20:02:09] [PASSED] LVDS
[20:02:09] [PASSED] Component
[20:02:09] [PASSED] DIN
[20:02:09] [PASSED] DP
[20:02:09] [PASSED] HDMI-A
[20:02:09] [PASSED] HDMI-B
[20:02:09] [PASSED] TV
[20:02:09] [PASSED] eDP
[20:02:09] [PASSED] Virtual
[20:02:09] [PASSED] DSI
[20:02:09] [PASSED] DPI
[20:02:09] [PASSED] Writeback
[20:02:09] [PASSED] SPI
[20:02:09] [PASSED] USB
[20:02:09] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[20:02:09] ======== drm_test_drm_connector_dynamic_init_name  =========
[20:02:09] [PASSED] Unknown
[20:02:09] [PASSED] VGA
[20:02:09] [PASSED] DVI-I
[20:02:09] [PASSED] DVI-D
[20:02:09] [PASSED] DVI-A
[20:02:09] [PASSED] Composite
[20:02:09] [PASSED] SVIDEO
[20:02:09] [PASSED] LVDS
[20:02:09] [PASSED] Component
[20:02:09] [PASSED] DIN
[20:02:09] [PASSED] DP
[20:02:09] [PASSED] HDMI-A
[20:02:09] [PASSED] HDMI-B
[20:02:09] [PASSED] TV
[20:02:09] [PASSED] eDP
[20:02:09] [PASSED] Virtual
[20:02:09] [PASSED] DSI
[20:02:09] [PASSED] DPI
[20:02:09] [PASSED] Writeback
[20:02:09] [PASSED] SPI
[20:02:09] [PASSED] USB
[20:02:09] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[20:02:09] =========== [PASSED] drm_connector_dynamic_init ============
[20:02:09] ==== drm_connector_dynamic_register_early (4 subtests) =====
[20:02:09] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[20:02:09] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[20:02:09] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[20:02:09] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[20:02:09] ====== [PASSED] drm_connector_dynamic_register_early =======
[20:02:09] ======= drm_connector_dynamic_register (7 subtests) ========
[20:02:09] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[20:02:09] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[20:02:09] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[20:02:09] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[20:02:09] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[20:02:09] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[20:02:09] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[20:02:09] ========= [PASSED] drm_connector_dynamic_register ==========
[20:02:09] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[20:02:09] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[20:02:09] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[20:02:09] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[20:02:09] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[20:02:09] ========== drm_test_get_tv_mode_from_name_valid  ===========
[20:02:09] [PASSED] NTSC
[20:02:09] [PASSED] NTSC-443
[20:02:09] [PASSED] NTSC-J
[20:02:09] [PASSED] PAL
[20:02:09] [PASSED] PAL-M
[20:02:09] [PASSED] PAL-N
[20:02:09] [PASSED] SECAM
[20:02:09] [PASSED] Mono
[20:02:09] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[20:02:09] [PASSED] drm_test_get_tv_mode_from_name_truncated
[20:02:09] ============ [PASSED] drm_get_tv_mode_from_name ============
[20:02:09] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[20:02:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[20:02:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[20:02:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[20:02:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[20:02:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[20:02:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[20:02:09] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[20:02:09] [PASSED] VIC 96
[20:02:09] [PASSED] VIC 97
[20:02:09] [PASSED] VIC 101
[20:02:09] [PASSED] VIC 102
[20:02:09] [PASSED] VIC 106
[20:02:09] [PASSED] VIC 107
[20:02:09] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[20:02:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[20:02:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[20:02:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[20:02:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[20:02:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[20:02:09] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[20:02:09] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[20:02:09] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[20:02:09] [PASSED] Automatic
[20:02:09] [PASSED] Full
[20:02:09] [PASSED] Limited 16:235
[20:02:09] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[20:02:09] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[20:02:09] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[20:02:09] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[20:02:09] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[20:02:09] [PASSED] RGB
[20:02:09] [PASSED] YUV 4:2:0
[20:02:09] [PASSED] YUV 4:2:2
[20:02:09] [PASSED] YUV 4:4:4
[20:02:09] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[20:02:09] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[20:02:09] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[20:02:09] ============= drm_damage_helper (21 subtests) ==============
[20:02:09] [PASSED] drm_test_damage_iter_no_damage
[20:02:09] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[20:02:09] [PASSED] drm_test_damage_iter_no_damage_src_moved
[20:02:09] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[20:02:09] [PASSED] drm_test_damage_iter_no_damage_not_visible
[20:02:09] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[20:02:09] [PASSED] drm_test_damage_iter_no_damage_no_fb
[20:02:09] [PASSED] drm_test_damage_iter_simple_damage
[20:02:09] [PASSED] drm_test_damage_iter_single_damage
[20:02:09] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[20:02:09] [PASSED] drm_test_damage_iter_single_damage_outside_src
[20:02:09] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[20:02:09] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[20:02:09] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[20:02:09] [PASSED] drm_test_damage_iter_single_damage_src_moved
[20:02:09] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[20:02:09] [PASSED] drm_test_damage_iter_damage
[20:02:09] [PASSED] drm_test_damage_iter_damage_one_intersect
[20:02:09] [PASSED] drm_test_damage_iter_damage_one_outside
[20:02:09] [PASSED] drm_test_damage_iter_damage_src_moved
[20:02:09] [PASSED] drm_test_damage_iter_damage_not_visible
[20:02:09] ================ [PASSED] drm_damage_helper ================
[20:02:09] ============== drm_dp_mst_helper (3 subtests) ==============
[20:02:09] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[20:02:09] [PASSED] Clock 154000 BPP 30 DSC disabled
[20:02:09] [PASSED] Clock 234000 BPP 30 DSC disabled
[20:02:09] [PASSED] Clock 297000 BPP 24 DSC disabled
[20:02:09] [PASSED] Clock 332880 BPP 24 DSC enabled
[20:02:09] [PASSED] Clock 324540 BPP 24 DSC enabled
[20:02:09] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[20:02:09] ============== drm_test_dp_mst_calc_pbn_div  ===============
[20:02:09] [PASSED] Link rate 2000000 lane count 4
[20:02:09] [PASSED] Link rate 2000000 lane count 2
[20:02:09] [PASSED] Link rate 2000000 lane count 1
[20:02:09] [PASSED] Link rate 1350000 lane count 4
[20:02:09] [PASSED] Link rate 1350000 lane count 2
[20:02:09] [PASSED] Link rate 1350000 lane count 1
[20:02:09] [PASSED] Link rate 1000000 lane count 4
[20:02:09] [PASSED] Link rate 1000000 lane count 2
[20:02:09] [PASSED] Link rate 1000000 lane count 1
[20:02:09] [PASSED] Link rate 810000 lane count 4
[20:02:09] [PASSED] Link rate 810000 lane count 2
[20:02:09] [PASSED] Link rate 810000 lane count 1
[20:02:09] [PASSED] Link rate 540000 lane count 4
[20:02:09] [PASSED] Link rate 540000 lane count 2
[20:02:09] [PASSED] Link rate 540000 lane count 1
[20:02:09] [PASSED] Link rate 270000 lane count 4
[20:02:09] [PASSED] Link rate 270000 lane count 2
[20:02:09] [PASSED] Link rate 270000 lane count 1
[20:02:09] [PASSED] Link rate 162000 lane count 4
[20:02:09] [PASSED] Link rate 162000 lane count 2
[20:02:09] [PASSED] Link rate 162000 lane count 1
[20:02:09] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[20:02:09] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[20:02:09] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[20:02:09] [PASSED] DP_POWER_UP_PHY with port number
[20:02:09] [PASSED] DP_POWER_DOWN_PHY with port number
[20:02:09] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[20:02:09] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[20:02:09] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[20:02:09] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[20:02:09] [PASSED] DP_QUERY_PAYLOAD with port number
[20:02:09] [PASSED] DP_QUERY_PAYLOAD with VCPI
[20:02:09] [PASSED] DP_REMOTE_DPCD_READ with port number
[20:02:09] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[20:02:09] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[20:02:09] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[20:02:09] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[20:02:09] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[20:02:09] [PASSED] DP_REMOTE_I2C_READ with port number
[20:02:09] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[20:02:09] [PASSED] DP_REMOTE_I2C_READ with transactions array
[20:02:09] [PASSED] DP_REMOTE_I2C_WRITE with port number
[20:02:09] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[20:02:09] [PASSED] DP_REMOTE_I2C_WRITE with data array
[20:02:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[20:02:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[20:02:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[20:02:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[20:02:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[20:02:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[20:02:09] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[20:02:09] ================ [PASSED] drm_dp_mst_helper ================
[20:02:09] ================== drm_exec (7 subtests) ===================
[20:02:09] [PASSED] sanitycheck
[20:02:09] [PASSED] test_lock
[20:02:09] [PASSED] test_lock_unlock
[20:02:09] [PASSED] test_duplicates
[20:02:09] [PASSED] test_prepare
[20:02:09] [PASSED] test_prepare_array
[20:02:09] [PASSED] test_multiple_loops
[20:02:09] ==================== [PASSED] drm_exec =====================
[20:02:09] =========== drm_format_helper_test (17 subtests) ===========
[20:02:09] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[20:02:09] [PASSED] single_pixel_source_buffer
[20:02:09] [PASSED] single_pixel_clip_rectangle
[20:02:09] [PASSED] well_known_colors
[20:02:09] [PASSED] destination_pitch
[20:02:09] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[20:02:09] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[20:02:09] [PASSED] single_pixel_source_buffer
[20:02:09] [PASSED] single_pixel_clip_rectangle
[20:02:09] [PASSED] well_known_colors
[20:02:09] [PASSED] destination_pitch
[20:02:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[20:02:09] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[20:02:09] [PASSED] single_pixel_source_buffer
[20:02:09] [PASSED] single_pixel_clip_rectangle
[20:02:09] [PASSED] well_known_colors
[20:02:09] [PASSED] destination_pitch
[20:02:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[20:02:09] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[20:02:09] [PASSED] single_pixel_source_buffer
[20:02:09] [PASSED] single_pixel_clip_rectangle
[20:02:09] [PASSED] well_known_colors
[20:02:09] [PASSED] destination_pitch
[20:02:09] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[20:02:09] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[20:02:09] [PASSED] single_pixel_source_buffer
[20:02:09] [PASSED] single_pixel_clip_rectangle
[20:02:09] [PASSED] well_known_colors
[20:02:09] [PASSED] destination_pitch
[20:02:09] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[20:02:09] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[20:02:09] [PASSED] single_pixel_source_buffer
[20:02:09] [PASSED] single_pixel_clip_rectangle
[20:02:09] [PASSED] well_known_colors
[20:02:09] [PASSED] destination_pitch
[20:02:09] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[20:02:09] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[20:02:09] [PASSED] single_pixel_source_buffer
[20:02:09] [PASSED] single_pixel_clip_rectangle
[20:02:09] [PASSED] well_known_colors
[20:02:09] [PASSED] destination_pitch
[20:02:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[20:02:09] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[20:02:09] [PASSED] single_pixel_source_buffer
[20:02:09] [PASSED] single_pixel_clip_rectangle
[20:02:09] [PASSED] well_known_colors
[20:02:09] [PASSED] destination_pitch
[20:02:09] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[20:02:09] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[20:02:09] [PASSED] single_pixel_source_buffer
[20:02:09] [PASSED] single_pixel_clip_rectangle
[20:02:09] [PASSED] well_known_colors
[20:02:09] [PASSED] destination_pitch
[20:02:09] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[20:02:09] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[20:02:09] [PASSED] single_pixel_source_buffer
[20:02:09] [PASSED] single_pixel_clip_rectangle
[20:02:09] [PASSED] well_known_colors
[20:02:09] [PASSED] destination_pitch
[20:02:09] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[20:02:09] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[20:02:09] [PASSED] single_pixel_source_buffer
[20:02:09] [PASSED] single_pixel_clip_rectangle
[20:02:09] [PASSED] well_known_colors
[20:02:09] [PASSED] destination_pitch
[20:02:09] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[20:02:09] ============== drm_test_fb_xrgb8888_to_mono  ===============
[20:02:09] [PASSED] single_pixel_source_buffer
[20:02:09] [PASSED] single_pixel_clip_rectangle
[20:02:09] [PASSED] well_known_colors
[20:02:09] [PASSED] destination_pitch
[20:02:09] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[20:02:09] ==================== drm_test_fb_swab  =====================
[20:02:09] [PASSED] single_pixel_source_buffer
[20:02:09] [PASSED] single_pixel_clip_rectangle
[20:02:09] [PASSED] well_known_colors
[20:02:09] [PASSED] destination_pitch
[20:02:09] ================ [PASSED] drm_test_fb_swab =================
[20:02:09] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[20:02:09] [PASSED] single_pixel_source_buffer
[20:02:09] [PASSED] single_pixel_clip_rectangle
[20:02:09] [PASSED] well_known_colors
[20:02:09] [PASSED] destination_pitch
[20:02:09] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[20:02:09] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[20:02:09] [PASSED] single_pixel_source_buffer
[20:02:09] [PASSED] single_pixel_clip_rectangle
[20:02:09] [PASSED] well_known_colors
[20:02:09] [PASSED] destination_pitch
[20:02:09] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[20:02:09] ================= drm_test_fb_clip_offset  =================
[20:02:09] [PASSED] pass through
[20:02:09] [PASSED] horizontal offset
[20:02:09] [PASSED] vertical offset
[20:02:09] [PASSED] horizontal and vertical offset
[20:02:09] [PASSED] horizontal offset (custom pitch)
[20:02:09] [PASSED] vertical offset (custom pitch)
[20:02:09] [PASSED] horizontal and vertical offset (custom pitch)
[20:02:09] ============= [PASSED] drm_test_fb_clip_offset =============
[20:02:09] =================== drm_test_fb_memcpy  ====================
[20:02:09] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[20:02:09] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[20:02:09] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[20:02:09] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[20:02:09] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[20:02:09] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[20:02:09] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[20:02:09] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[20:02:09] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[20:02:09] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[20:02:09] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[20:02:09] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[20:02:09] =============== [PASSED] drm_test_fb_memcpy ================
[20:02:09] ============= [PASSED] drm_format_helper_test ==============
[20:02:09] ================= drm_format (18 subtests) =================
[20:02:09] [PASSED] drm_test_format_block_width_invalid
[20:02:09] [PASSED] drm_test_format_block_width_one_plane
[20:02:09] [PASSED] drm_test_format_block_width_two_plane
[20:02:09] [PASSED] drm_test_format_block_width_three_plane
[20:02:09] [PASSED] drm_test_format_block_width_tiled
[20:02:09] [PASSED] drm_test_format_block_height_invalid
[20:02:09] [PASSED] drm_test_format_block_height_one_plane
[20:02:09] [PASSED] drm_test_format_block_height_two_plane
[20:02:09] [PASSED] drm_test_format_block_height_three_plane
[20:02:09] [PASSED] drm_test_format_block_height_tiled
[20:02:09] [PASSED] drm_test_format_min_pitch_invalid
[20:02:09] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[20:02:09] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[20:02:09] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[20:02:09] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[20:02:09] [PASSED] drm_test_format_min_pitch_two_plane
[20:02:09] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[20:02:09] [PASSED] drm_test_format_min_pitch_tiled
[20:02:09] =================== [PASSED] drm_format ====================
[20:02:09] ============== drm_framebuffer (10 subtests) ===============
[20:02:09] ========== drm_test_framebuffer_check_src_coords  ==========
[20:02:09] [PASSED] Success: source fits into fb
[20:02:09] [PASSED] Fail: overflowing fb with x-axis coordinate
[20:02:09] [PASSED] Fail: overflowing fb with y-axis coordinate
[20:02:09] [PASSED] Fail: overflowing fb with source width
[20:02:09] [PASSED] Fail: overflowing fb with source height
[20:02:09] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[20:02:09] [PASSED] drm_test_framebuffer_cleanup
[20:02:09] =============== drm_test_framebuffer_create  ===============
[20:02:09] [PASSED] ABGR8888 normal sizes
[20:02:09] [PASSED] ABGR8888 max sizes
[20:02:09] [PASSED] ABGR8888 pitch greater than min required
[20:02:09] [PASSED] ABGR8888 pitch less than min required
[20:02:09] [PASSED] ABGR8888 Invalid width
[20:02:09] [PASSED] ABGR8888 Invalid buffer handle
[20:02:09] [PASSED] No pixel format
[20:02:09] [PASSED] ABGR8888 Width 0
[20:02:09] [PASSED] ABGR8888 Height 0
[20:02:09] [PASSED] ABGR8888 Out of bound height * pitch combination
[20:02:09] [PASSED] ABGR8888 Large buffer offset
[20:02:09] [PASSED] ABGR8888 Buffer offset for inexistent plane
[20:02:09] [PASSED] ABGR8888 Invalid flag
[20:02:09] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[20:02:09] [PASSED] ABGR8888 Valid buffer modifier
[20:02:09] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[20:02:09] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[20:02:09] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[20:02:09] [PASSED] NV12 Normal sizes
[20:02:09] [PASSED] NV12 Max sizes
[20:02:09] [PASSED] NV12 Invalid pitch
[20:02:09] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[20:02:09] [PASSED] NV12 different  modifier per-plane
[20:02:09] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[20:02:09] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[20:02:09] [PASSED] NV12 Modifier for inexistent plane
[20:02:09] [PASSED] NV12 Handle for inexistent plane
[20:02:09] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[20:02:09] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[20:02:09] [PASSED] YVU420 Normal sizes
[20:02:09] [PASSED] YVU420 Max sizes
[20:02:09] [PASSED] YVU420 Invalid pitch
[20:02:09] [PASSED] YVU420 Different pitches
[20:02:09] [PASSED] YVU420 Different buffer offsets/pitches
[20:02:09] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[20:02:09] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[20:02:09] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[20:02:09] [PASSED] YVU420 Valid modifier
[20:02:09] [PASSED] YVU420 Different modifiers per plane
[20:02:09] [PASSED] YVU420 Modifier for inexistent plane
[20:02:09] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[20:02:09] [PASSED] X0L2 Normal sizes
[20:02:09] [PASSED] X0L2 Max sizes
[20:02:09] [PASSED] X0L2 Invalid pitch
[20:02:09] [PASSED] X0L2 Pitch greater than minimum required
[20:02:09] [PASSED] X0L2 Handle for inexistent plane
[20:02:09] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[20:02:09] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[20:02:09] [PASSED] X0L2 Valid modifier
[20:02:09] [PASSED] X0L2 Modifier for inexistent plane
[20:02:09] =========== [PASSED] drm_test_framebuffer_create ===========
[20:02:09] [PASSED] drm_test_framebuffer_free
[20:02:09] [PASSED] drm_test_framebuffer_init
[20:02:09] [PASSED] drm_test_framebuffer_init_bad_format
[20:02:09] [PASSED] drm_test_framebuffer_init_dev_mismatch
[20:02:09] [PASSED] drm_test_framebuffer_lookup
[20:02:09] [PASSED] drm_test_framebuffer_lookup_inexistent
[20:02:09] [PASSED] drm_test_framebuffer_modifiers_not_supported
[20:02:09] ================= [PASSED] drm_framebuffer =================
[20:02:09] ================ drm_gem_shmem (8 subtests) ================
[20:02:09] [PASSED] drm_gem_shmem_test_obj_create
[20:02:09] [PASSED] drm_gem_shmem_test_obj_create_private
[20:02:09] [PASSED] drm_gem_shmem_test_pin_pages
[20:02:09] [PASSED] drm_gem_shmem_test_vmap
[20:02:09] [PASSED] drm_gem_shmem_test_get_pages_sgt
[20:02:09] [PASSED] drm_gem_shmem_test_get_sg_table
[20:02:09] [PASSED] drm_gem_shmem_test_madvise
[20:02:09] [PASSED] drm_gem_shmem_test_purge
[20:02:09] ================== [PASSED] drm_gem_shmem ==================
[20:02:09] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[20:02:09] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[20:02:09] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[20:02:09] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[20:02:09] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[20:02:09] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[20:02:09] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[20:02:09] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[20:02:09] [PASSED] Automatic
[20:02:09] [PASSED] Full
[20:02:09] [PASSED] Limited 16:235
[20:02:09] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[20:02:09] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[20:02:09] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[20:02:09] [PASSED] drm_test_check_disable_connector
[20:02:09] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[20:02:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[20:02:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[20:02:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[20:02:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[20:02:09] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[20:02:09] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[20:02:09] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[20:02:09] [PASSED] drm_test_check_output_bpc_dvi
[20:02:09] [PASSED] drm_test_check_output_bpc_format_vic_1
[20:02:09] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[20:02:09] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[20:02:09] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[20:02:09] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[20:02:09] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[20:02:09] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[20:02:09] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[20:02:09] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[20:02:09] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[20:02:09] [PASSED] drm_test_check_broadcast_rgb_value
[20:02:09] [PASSED] drm_test_check_bpc_8_value
[20:02:09] [PASSED] drm_test_check_bpc_10_value
[20:02:09] [PASSED] drm_test_check_bpc_12_value
[20:02:09] [PASSED] drm_test_check_format_value
[20:02:09] [PASSED] drm_test_check_tmds_char_value
[20:02:09] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[20:02:09] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[20:02:09] [PASSED] drm_test_check_mode_valid
[20:02:09] [PASSED] drm_test_check_mode_valid_reject
[20:02:09] [PASSED] drm_test_check_mode_valid_reject_rate
[20:02:09] [PASSED] drm_test_check_mode_valid_reject_max_clock
[20:02:09] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[20:02:09] ================= drm_managed (2 subtests) =================
[20:02:09] [PASSED] drm_test_managed_release_action
[20:02:09] [PASSED] drm_test_managed_run_action
[20:02:09] =================== [PASSED] drm_managed ===================
[20:02:09] =================== drm_mm (6 subtests) ====================
[20:02:09] [PASSED] drm_test_mm_init
[20:02:09] [PASSED] drm_test_mm_debug
[20:02:09] [PASSED] drm_test_mm_align32
[20:02:09] [PASSED] drm_test_mm_align64
[20:02:09] [PASSED] drm_test_mm_lowest
[20:02:09] [PASSED] drm_test_mm_highest
[20:02:09] ===================== [PASSED] drm_mm ======================
[20:02:09] ============= drm_modes_analog_tv (5 subtests) =============
[20:02:09] [PASSED] drm_test_modes_analog_tv_mono_576i
[20:02:09] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[20:02:09] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[20:02:09] [PASSED] drm_test_modes_analog_tv_pal_576i
[20:02:09] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[20:02:09] =============== [PASSED] drm_modes_analog_tv ===============
[20:02:09] ============== drm_plane_helper (2 subtests) ===============
[20:02:09] =============== drm_test_check_plane_state  ================
[20:02:09] [PASSED] clipping_simple
[20:02:09] [PASSED] clipping_rotate_reflect
[20:02:09] [PASSED] positioning_simple
[20:02:09] [PASSED] upscaling
[20:02:09] [PASSED] downscaling
[20:02:09] [PASSED] rounding1
[20:02:09] [PASSED] rounding2
[20:02:09] [PASSED] rounding3
[20:02:09] [PASSED] rounding4
[20:02:09] =========== [PASSED] drm_test_check_plane_state ============
[20:02:09] =========== drm_test_check_invalid_plane_state  ============
[20:02:09] [PASSED] positioning_invalid
[20:02:09] [PASSED] upscaling_invalid
[20:02:09] [PASSED] downscaling_invalid
[20:02:09] ======= [PASSED] drm_test_check_invalid_plane_state ========
[20:02:09] ================ [PASSED] drm_plane_helper =================
[20:02:09] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[20:02:09] ====== drm_test_connector_helper_tv_get_modes_check  =======
[20:02:09] [PASSED] None
[20:02:09] [PASSED] PAL
[20:02:09] [PASSED] NTSC
[20:02:09] [PASSED] Both, NTSC Default
[20:02:09] [PASSED] Both, PAL Default
[20:02:09] [PASSED] Both, NTSC Default, with PAL on command-line
[20:02:09] [PASSED] Both, PAL Default, with NTSC on command-line
[20:02:09] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[20:02:09] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[20:02:09] ================== drm_rect (9 subtests) ===================
[20:02:09] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[20:02:09] [PASSED] drm_test_rect_clip_scaled_not_clipped
[20:02:09] [PASSED] drm_test_rect_clip_scaled_clipped
[20:02:09] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[20:02:09] ================= drm_test_rect_intersect  =================
[20:02:09] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[20:02:09] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[20:02:09] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[20:02:09] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[20:02:09] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[20:02:09] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[20:02:09] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[20:02:09] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[20:02:09] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[20:02:09] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[20:02:09] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[20:02:09] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[20:02:09] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[20:02:09] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[20:02:09] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[20:02:09] ============= [PASSED] drm_test_rect_intersect =============
[20:02:09] ================ drm_test_rect_calc_hscale  ================
[20:02:09] [PASSED] normal use
[20:02:09] [PASSED] out of max range
[20:02:09] [PASSED] out of min range
[20:02:09] [PASSED] zero dst
[20:02:09] [PASSED] negative src
[20:02:09] [PASSED] negative dst
[20:02:09] ============ [PASSED] drm_test_rect_calc_hscale ============
[20:02:09] ================ drm_test_rect_calc_vscale  ================
[20:02:09] [PASSED] normal use
[20:02:09] [PASSED] out of max range
[20:02:09] [PASSED] out of min range
[20:02:09] [PASSED] zero dst
[20:02:09] [PASSED] negative src
[20:02:09] [PASSED] negative dst
[20:02:09] ============ [PASSED] drm_test_rect_calc_vscale ============
[20:02:09] ================== drm_test_rect_rotate  ===================
[20:02:09] [PASSED] reflect-x
[20:02:09] [PASSED] reflect-y
[20:02:09] [PASSED] rotate-0
[20:02:09] [PASSED] rotate-90
[20:02:09] [PASSED] rotate-180
[20:02:09] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[20:02:09] ============== [PASSED] drm_test_rect_rotate ===============
[20:02:09] ================ drm_test_rect_rotate_inv  =================
[20:02:09] [PASSED] reflect-x
[20:02:09] [PASSED] reflect-y
[20:02:09] [PASSED] rotate-0
[20:02:09] [PASSED] rotate-90
[20:02:09] [PASSED] rotate-180
[20:02:09] [PASSED] rotate-270
[20:02:09] ============ [PASSED] drm_test_rect_rotate_inv =============
[20:02:09] ==================== [PASSED] drm_rect =====================
[20:02:09] ============ drm_sysfb_modeset_test (1 subtest) ============
[20:02:09] ============ drm_test_sysfb_build_fourcc_list  =============
[20:02:09] [PASSED] no native formats
[20:02:09] [PASSED] XRGB8888 as native format
[20:02:09] [PASSED] remove duplicates
[20:02:09] [PASSED] convert alpha formats
[20:02:09] [PASSED] random formats
[20:02:09] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[20:02:09] ============= [PASSED] drm_sysfb_modeset_test ==============
[20:02:09] ============================================================
[20:02:09] Testing complete. Ran 616 tests: passed: 616
[20:02:09] Elapsed time: 27.590s total, 1.590s configuring, 25.833s building, 0.142s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[20:02:09] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:02:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[20:02:18] Starting KUnit Kernel (1/1)...
[20:02:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:02:18] ================= ttm_device (5 subtests) ==================
[20:02:18] [PASSED] ttm_device_init_basic
[20:02:18] [PASSED] ttm_device_init_multiple
[20:02:18] [PASSED] ttm_device_fini_basic
[20:02:18] [PASSED] ttm_device_init_no_vma_man
[20:02:18] ================== ttm_device_init_pools  ==================
[20:02:18] [PASSED] No DMA allocations, no DMA32 required
[20:02:18] [PASSED] DMA allocations, DMA32 required
[20:02:18] [PASSED] No DMA allocations, DMA32 required
[20:02:18] [PASSED] DMA allocations, no DMA32 required
[20:02:18] ============== [PASSED] ttm_device_init_pools ==============
[20:02:18] =================== [PASSED] ttm_device ====================
[20:02:18] ================== ttm_pool (8 subtests) ===================
[20:02:18] ================== ttm_pool_alloc_basic  ===================
[20:02:18] [PASSED] One page
[20:02:18] [PASSED] More than one page
[20:02:18] [PASSED] Above the allocation limit
[20:02:18] [PASSED] One page, with coherent DMA mappings enabled
[20:02:18] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:02:18] ============== [PASSED] ttm_pool_alloc_basic ===============
[20:02:18] ============== ttm_pool_alloc_basic_dma_addr  ==============
[20:02:18] [PASSED] One page
[20:02:18] [PASSED] More than one page
[20:02:18] [PASSED] Above the allocation limit
[20:02:18] [PASSED] One page, with coherent DMA mappings enabled
[20:02:18] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:02:18] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[20:02:18] [PASSED] ttm_pool_alloc_order_caching_match
[20:02:18] [PASSED] ttm_pool_alloc_caching_mismatch
[20:02:18] [PASSED] ttm_pool_alloc_order_mismatch
[20:02:18] [PASSED] ttm_pool_free_dma_alloc
[20:02:18] [PASSED] ttm_pool_free_no_dma_alloc
[20:02:18] [PASSED] ttm_pool_fini_basic
[20:02:18] ==================== [PASSED] ttm_pool =====================
[20:02:18] ================ ttm_resource (8 subtests) =================
[20:02:18] ================= ttm_resource_init_basic  =================
[20:02:18] [PASSED] Init resource in TTM_PL_SYSTEM
[20:02:18] [PASSED] Init resource in TTM_PL_VRAM
[20:02:18] [PASSED] Init resource in a private placement
[20:02:18] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[20:02:18] ============= [PASSED] ttm_resource_init_basic =============
[20:02:18] [PASSED] ttm_resource_init_pinned
[20:02:18] [PASSED] ttm_resource_fini_basic
[20:02:18] [PASSED] ttm_resource_manager_init_basic
[20:02:18] [PASSED] ttm_resource_manager_usage_basic
[20:02:18] [PASSED] ttm_resource_manager_set_used_basic
[20:02:18] [PASSED] ttm_sys_man_alloc_basic
[20:02:18] [PASSED] ttm_sys_man_free_basic
[20:02:18] ================== [PASSED] ttm_resource ===================
[20:02:18] =================== ttm_tt (15 subtests) ===================
[20:02:18] ==================== ttm_tt_init_basic  ====================
[20:02:18] [PASSED] Page-aligned size
[20:02:18] [PASSED] Extra pages requested
[20:02:18] ================ [PASSED] ttm_tt_init_basic ================
[20:02:18] [PASSED] ttm_tt_init_misaligned
[20:02:18] [PASSED] ttm_tt_fini_basic
[20:02:18] [PASSED] ttm_tt_fini_sg
[20:02:18] [PASSED] ttm_tt_fini_shmem
[20:02:18] [PASSED] ttm_tt_create_basic
[20:02:18] [PASSED] ttm_tt_create_invalid_bo_type
[20:02:18] [PASSED] ttm_tt_create_ttm_exists
[20:02:18] [PASSED] ttm_tt_create_failed
[20:02:18] [PASSED] ttm_tt_destroy_basic
[20:02:18] [PASSED] ttm_tt_populate_null_ttm
[20:02:18] [PASSED] ttm_tt_populate_populated_ttm
[20:02:18] [PASSED] ttm_tt_unpopulate_basic
[20:02:18] [PASSED] ttm_tt_unpopulate_empty_ttm
[20:02:18] [PASSED] ttm_tt_swapin_basic
[20:02:18] ===================== [PASSED] ttm_tt ======================
[20:02:18] =================== ttm_bo (14 subtests) ===================
[20:02:18] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[20:02:18] [PASSED] Cannot be interrupted and sleeps
[20:02:18] [PASSED] Cannot be interrupted, locks straight away
[20:02:18] [PASSED] Can be interrupted, sleeps
[20:02:18] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[20:02:18] [PASSED] ttm_bo_reserve_locked_no_sleep
[20:02:18] [PASSED] ttm_bo_reserve_no_wait_ticket
[20:02:18] [PASSED] ttm_bo_reserve_double_resv
[20:02:18] [PASSED] ttm_bo_reserve_interrupted
[20:02:18] [PASSED] ttm_bo_reserve_deadlock
[20:02:18] [PASSED] ttm_bo_unreserve_basic
[20:02:18] [PASSED] ttm_bo_unreserve_pinned
[20:02:18] [PASSED] ttm_bo_unreserve_bulk
[20:02:18] [PASSED] ttm_bo_put_basic
[20:02:18] [PASSED] ttm_bo_put_shared_resv
[20:02:18] [PASSED] ttm_bo_pin_basic
[20:02:18] [PASSED] ttm_bo_pin_unpin_resource
[20:02:18] [PASSED] ttm_bo_multiple_pin_one_unpin
[20:02:18] ===================== [PASSED] ttm_bo ======================
[20:02:18] ============== ttm_bo_validate (22 subtests) ===============
[20:02:18] ============== ttm_bo_init_reserved_sys_man  ===============
[20:02:18] [PASSED] Buffer object for userspace
[20:02:18] [PASSED] Kernel buffer object
[20:02:18] [PASSED] Shared buffer object
[20:02:18] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[20:02:18] ============== ttm_bo_init_reserved_mock_man  ==============
[20:02:18] [PASSED] Buffer object for userspace
[20:02:18] [PASSED] Kernel buffer object
[20:02:18] [PASSED] Shared buffer object
[20:02:18] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[20:02:18] [PASSED] ttm_bo_init_reserved_resv
[20:02:18] ================== ttm_bo_validate_basic  ==================
[20:02:18] [PASSED] Buffer object for userspace
[20:02:18] [PASSED] Kernel buffer object
[20:02:18] [PASSED] Shared buffer object
[20:02:18] ============== [PASSED] ttm_bo_validate_basic ==============
[20:02:18] [PASSED] ttm_bo_validate_invalid_placement
[20:02:18] ============= ttm_bo_validate_same_placement  ==============
[20:02:18] [PASSED] System manager
[20:02:18] [PASSED] VRAM manager
[20:02:18] ========= [PASSED] ttm_bo_validate_same_placement ==========
[20:02:18] [PASSED] ttm_bo_validate_failed_alloc
[20:02:18] [PASSED] ttm_bo_validate_pinned
[20:02:18] [PASSED] ttm_bo_validate_busy_placement
[20:02:18] ================ ttm_bo_validate_multihop  =================
[20:02:18] [PASSED] Buffer object for userspace
[20:02:18] [PASSED] Kernel buffer object
[20:02:18] [PASSED] Shared buffer object
[20:02:18] ============ [PASSED] ttm_bo_validate_multihop =============
[20:02:18] ========== ttm_bo_validate_no_placement_signaled  ==========
[20:02:18] [PASSED] Buffer object in system domain, no page vector
[20:02:18] [PASSED] Buffer object in system domain with an existing page vector
[20:02:18] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[20:02:18] ======== ttm_bo_validate_no_placement_not_signaled  ========
[20:02:18] [PASSED] Buffer object for userspace
[20:02:18] [PASSED] Kernel buffer object
[20:02:18] [PASSED] Shared buffer object
[20:02:18] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[20:02:18] [PASSED] ttm_bo_validate_move_fence_signaled
[20:02:19] ========= ttm_bo_validate_move_fence_not_signaled  =========
[20:02:19] [PASSED] Waits for GPU
[20:02:19] [PASSED] Tries to lock straight away
[20:02:19] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[20:02:19] [PASSED] ttm_bo_validate_swapout
[20:02:19] [PASSED] ttm_bo_validate_happy_evict
[20:02:19] [PASSED] ttm_bo_validate_all_pinned_evict
[20:02:19] [PASSED] ttm_bo_validate_allowed_only_evict
[20:02:19] [PASSED] ttm_bo_validate_deleted_evict
[20:02:19] [PASSED] ttm_bo_validate_busy_domain_evict
[20:02:19] [PASSED] ttm_bo_validate_evict_gutting
[20:02:19] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[20:02:19] ================= [PASSED] ttm_bo_validate =================
[20:02:19] ============================================================
[20:02:19] Testing complete. Ran 102 tests: passed: 102
[20:02:19] Elapsed time: 10.057s total, 1.607s configuring, 7.732s building, 0.593s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ CI.checksparse: warning for Introducing firmware late binding

[Patchwork]

== Series Details ==

Series: Introducing firmware late binding
URL   : https://patchwork.freedesktop.org/series/151140/
State : warning

== Summary ==

+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 05fd9cf9ba87dcf4428adbca5237845f2c04d8ac
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_display_types.h:2019:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2032:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file:

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Introducing firmware late binding

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 987 bytes --]

== Series Details ==

Series: Introducing firmware late binding
URL   : https://patchwork.freedesktop.org/series/151140/
State : success

== Summary ==

CI Bug Log - changes from xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43_BAT -> xe-pw-151140v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (9 -> 8)
------------------------------

  Missing    (1): bat-adlp-vm 


Changes
-------

  No changes found


Build changes
-------------

  * IGT: IGT_8437 -> IGT_8438
  * Linux: xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43 -> xe-pw-151140v1

  IGT_8437: edd059dcd65215c4deda2a59e47357148e856d51 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8438: 8438
  xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43: 310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43
  xe-pw-151140v1: 151140v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/index.html

[-- Attachment #2: Type: text/html, Size: 1549 bytes --]

Re: [PATCH v6 05/10] drm/xe/xe_late_bind_fw: Load late binding firmware

[Daniele Ceraolo Spurio]

On 7/3/2025 12:31 PM, Badal Nilawar wrote:
> Load late binding firmware
>
> v2:
>   - s/EAGAIN/EBUSY/
>   - Flush worker in suspend and driver unload (Daniele)
> v3:
>   - Use retry interval of 6s, in steps of 200ms, to allow
>     other OS components release MEI CL handle (Sasha)
> v4:
>   - return -ENODEV if component not added (Daniele)
>   - parse and print status returned by csc
> v5:
>   - Use payload to check firmware valid (Daniele)
>   - Obtain the RPM reference before scheduling the worker to
>     ensure the device remains awake until the worker completes
>     firmware loading (Rodrigo)
> v6:
>   - In case of error donot re-attempt fw download (Daniele)
>
> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> ---
>   drivers/gpu/drm/xe/xe_late_bind_fw.c       | 155 ++++++++++++++++++++-
>   drivers/gpu/drm/xe/xe_late_bind_fw.h       |   1 +
>   drivers/gpu/drm/xe/xe_late_bind_fw_types.h |   7 +
>   3 files changed, 162 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
> index ab83ab06aee7..4e8a2256802d 100644
> --- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
> +++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
> @@ -16,6 +16,20 @@
>   #include "xe_late_bind_fw.h"
>   #include "xe_pcode.h"
>   #include "xe_pcode_api.h"
> +#include "xe_pm.h"
> +
> +/*
> + * The component should load quite quickly in most cases, but it could take
> + * a bit. Using a very big timeout just to cover the worst case scenario
> + */
> +#define LB_INIT_TIMEOUT_MS 20000
> +
> +/*
> + * Retry interval set to 6 seconds, in steps of 200 ms, to allow time for
> + * other OS components to release the MEI CL handle
> + */
> +#define LB_FW_LOAD_RETRY_MAXCOUNT 30
> +#define LB_FW_LOAD_RETRY_PAUSE_MS 200
>   
>   static const u32 fw_id_to_type[] = {
>   		[XE_LB_FW_FAN_CONTROL] = CSC_LATE_BINDING_TYPE_FAN_CONTROL,
> @@ -31,6 +45,30 @@ late_bind_to_xe(struct xe_late_bind *late_bind)
>   	return container_of(late_bind, struct xe_device, late_bind);
>   }
>   
> +static const char *xe_late_bind_parse_status(uint32_t status)
> +{
> +	switch (status) {
> +	case CSC_LATE_BINDING_STATUS_SUCCESS:
> +		return "success";
> +	case CSC_LATE_BINDING_STATUS_4ID_MISMATCH:
> +		return "4Id Mismatch";
> +	case CSC_LATE_BINDING_STATUS_ARB_FAILURE:
> +		return "ARB Failure";
> +	case CSC_LATE_BINDING_STATUS_GENERAL_ERROR:
> +		return "General Error";
> +	case CSC_LATE_BINDING_STATUS_INVALID_PARAMS:
> +		return "Invalid Params";
> +	case CSC_LATE_BINDING_STATUS_INVALID_SIGNATURE:
> +		return "Invalid Signature";
> +	case CSC_LATE_BINDING_STATUS_INVALID_PAYLOAD:
> +		return "Invalid Payload";
> +	case CSC_LATE_BINDING_STATUS_TIMEOUT:
> +		return "Timeout";
> +	default:
> +		return "Unknown error";
> +	}
> +}
> +
>   static int xe_late_bind_fw_num_fans(struct xe_late_bind *late_bind)
>   {
>   	struct xe_device *xe = late_bind_to_xe(late_bind);
> @@ -44,6 +82,99 @@ static int xe_late_bind_fw_num_fans(struct xe_late_bind *late_bind)
>   		return 0;
>   }
>   
> +static void xe_late_bind_wait_for_worker_completion(struct xe_late_bind *late_bind)
> +{
> +	struct xe_device *xe = late_bind_to_xe(late_bind);
> +	struct xe_late_bind_fw *lbfw;
> +	int fw_id;
> +
> +	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
> +		lbfw = &late_bind->late_bind_fw[fw_id];
> +		if (lbfw->payload && late_bind->wq) {
> +			drm_dbg(&xe->drm, "Flush work: load %s firmware\n",
> +				fw_id_to_name[lbfw->id]);
> +			flush_work(&lbfw->work);
> +		}
> +	}
> +}
> +
> +static void xe_late_bind_work(struct work_struct *work)
> +{
> +	struct xe_late_bind_fw *lbfw = container_of(work, struct xe_late_bind_fw, work);
> +	struct xe_late_bind *late_bind = container_of(lbfw, struct xe_late_bind,
> +						      late_bind_fw[lbfw->id]);
> +	struct xe_device *xe = late_bind_to_xe(late_bind);
> +	int retry = LB_FW_LOAD_RETRY_MAXCOUNT;
> +	int ret;
> +	int slept;
> +
> +	xe_device_assert_mem_access(xe);
> +
> +	/* we can queue this before the component is bound */
> +	for (slept = 0; slept < LB_INIT_TIMEOUT_MS; slept += 100) {
> +		if (late_bind->component.ops)
> +			break;
> +		msleep(100);
> +	}
> +
> +	if (!late_bind->component.ops) {
> +		drm_err(&xe->drm, "Late bind component not bound\n");
> +		/* Do not re-attempt fw load */
> +		drmm_kfree(&xe->drm, (void *)lbfw->payload);
> +		lbfw->payload = NULL;
> +		goto out;
> +	}
> +
> +	drm_dbg(&xe->drm, "Load %s firmware\n", fw_id_to_name[lbfw->id]);
> +
> +	do {
> +		ret = late_bind->component.ops->push_config(late_bind->component.mei_dev,
> +							    lbfw->type, lbfw->flags,
> +							    lbfw->payload, lbfw->payload_size);
> +		if (!ret)
> +			break;
> +		msleep(LB_FW_LOAD_RETRY_PAUSE_MS);
> +	} while (--retry && ret == -EBUSY);
> +
> +	if (!ret) {
> +		drm_dbg(&xe->drm, "Load %s firmware successful\n",
> +			fw_id_to_name[lbfw->id]);
> +		goto out;
> +	}
> +
> +	if (ret > 0)
> +		drm_err(&xe->drm, "Load %s firmware failed with err %d, %s\n",
> +			fw_id_to_name[lbfw->id], ret, xe_late_bind_parse_status(ret));
> +	else
> +		drm_err(&xe->drm, "Load %s firmware failed with err %d",
> +			fw_id_to_name[lbfw->id], ret);
> +	/* Do not re-attempt fw load */
> +	drmm_kfree(&xe->drm, (void *)lbfw->payload);
> +	lbfw->payload = NULL;
> +
> +out:
> +	xe_pm_runtime_put(xe);
> +}
> +
> +int xe_late_bind_fw_load(struct xe_late_bind *late_bind)
> +{
> +	struct xe_device *xe = late_bind_to_xe(late_bind);
> +	struct xe_late_bind_fw *lbfw;
> +	int fw_id;
> +
> +	if (!late_bind->component_added)
> +		return -ENODEV;
> +
> +	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
> +		lbfw = &late_bind->late_bind_fw[fw_id];
> +		if (lbfw->payload) {
> +			xe_pm_runtime_get_noresume(xe);
> +			queue_work(late_bind->wq, &lbfw->work);
> +		}
> +	}
> +	return 0;
> +}
> +
>   static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
>   {
>   	struct xe_device *xe = late_bind_to_xe(late_bind);
> @@ -97,6 +228,7 @@ static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
>   
>   	memcpy((void *)lb_fw->payload, fw->data, lb_fw->payload_size);
>   	release_firmware(fw);
> +	INIT_WORK(&lb_fw->work, xe_late_bind_work);
>   
>   	return 0;
>   }
> @@ -106,11 +238,16 @@ static int xe_late_bind_fw_init(struct xe_late_bind *late_bind)
>   	int ret;
>   	int fw_id;
>   
> +	late_bind->wq = alloc_ordered_workqueue("late-bind-ordered-wq", 0);
> +	if (!late_bind->wq)
> +		return -ENOMEM;
> +
>   	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
>   		ret = __xe_late_bind_fw_init(late_bind, fw_id);
>   		if (ret)
>   			return ret;
>   	}
> +
>   	return 0;
>   }
>   
> @@ -132,6 +269,8 @@ static void xe_late_bind_component_unbind(struct device *xe_kdev,
>   	struct xe_device *xe = kdev_to_xe_device(xe_kdev);
>   	struct xe_late_bind *late_bind = &xe->late_bind;
>   
> +	xe_late_bind_wait_for_worker_completion(late_bind);
> +
>   	late_bind->component.ops = NULL;
>   }
>   
> @@ -145,7 +284,15 @@ static void xe_late_bind_remove(void *arg)
>   	struct xe_late_bind *late_bind = arg;
>   	struct xe_device *xe = late_bind_to_xe(late_bind);
>   
> +	xe_late_bind_wait_for_worker_completion(late_bind);
> +
> +	late_bind->component_added = false;
> +
>   	component_del(xe->drm.dev, &xe_late_bind_component_ops);
> +	if (late_bind->wq) {
> +		destroy_workqueue(late_bind->wq);
> +		late_bind->wq = NULL;
> +	}
>   }
>   
>   /**
> @@ -173,9 +320,15 @@ int xe_late_bind_init(struct xe_late_bind *late_bind)
>   		return err;
>   	}
>   
> +	late_bind->component_added = true;
> +
>   	err = devm_add_action_or_reset(xe->drm.dev, xe_late_bind_remove, late_bind);
>   	if (err)
>   		return err;
>   
> -	return xe_late_bind_fw_init(late_bind);
> +	err = xe_late_bind_fw_init(late_bind);
> +	if (err)
> +		return err;
> +
> +	return xe_late_bind_fw_load(late_bind);
>   }
> diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.h b/drivers/gpu/drm/xe/xe_late_bind_fw.h
> index 4c73571c3e62..28d56ed2bfdc 100644
> --- a/drivers/gpu/drm/xe/xe_late_bind_fw.h
> +++ b/drivers/gpu/drm/xe/xe_late_bind_fw.h
> @@ -11,5 +11,6 @@
>   struct xe_late_bind;
>   
>   int xe_late_bind_init(struct xe_late_bind *late_bind);
> +int xe_late_bind_fw_load(struct xe_late_bind *late_bind);
>   
>   #endif
> diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
> index cd3143256a7c..f650cb8641b3 100644
> --- a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
> +++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
> @@ -9,6 +9,7 @@
>   #include <linux/iosys-map.h>
>   #include <linux/mutex.h>
>   #include <linux/types.h>
> +#include <linux/workqueue.h>
>   
>   #define XE_LB_MAX_PAYLOAD_SIZE SZ_4K
>   
> @@ -36,6 +37,8 @@ struct xe_late_bind_fw {
>   	const u8  *payload;
>   	/** @late_bind_fw.payload_size: late binding blob payload_size */
>   	size_t payload_size;
> +	/** @late_bind_fw.work: worker to upload latebind blob */
> +	struct work_struct work;
>   };
>   
>   /**
> @@ -60,6 +63,10 @@ struct xe_late_bind {
>   	struct xe_late_bind_component component;
>   	/** @late_bind.late_bind_fw: late binding firmware array */
>   	struct xe_late_bind_fw late_bind_fw[XE_LB_FW_MAX_ID];
> +	/** @late_bind.wq: workqueue to submit request to download late bind blob */
> +	struct workqueue_struct *wq;
> +	/** @late_bind.component_added: whether the component has been added */
> +	bool component_added;

The hooks run by CI spotted issues with the docs here. With those addressed:

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Daniele

>   };
>   
>   #endif

Re: [PATCH v6 02/10] mei: late_bind: add late binding component driver

[Greg KH]

On Fri, Jul 04, 2025 at 01:00:58AM +0530, Badal Nilawar wrote:
> From: Alexander Usyskin <alexander.usyskin@intel.com>
> 
> Add late binding component driver.
> It allows pushing the late binding configuration from, for example,
> the Xe graphics driver to the Intel discrete graphics card's CSE device.
> 
> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/misc/mei/Kconfig                    |   1 +
>  drivers/misc/mei/Makefile                   |   1 +
>  drivers/misc/mei/late_bind/Kconfig          |  13 +
>  drivers/misc/mei/late_bind/Makefile         |   9 +
>  drivers/misc/mei/late_bind/mei_late_bind.c  | 272 ++++++++++++++++++++

Why do you have a whole subdir for a single .c file?  What's wrong with
just keepign it in drivers/misc/mei/ ?

> +/**
> + * struct csc_heci_late_bind_req - late binding request
> + * @header: @ref mkhi_msg_hdr
> + * @type: type of the late binding payload
> + * @flags: flags to be passed to the firmware
> + * @reserved: reserved field

Reserved for what?  Set to what?

> + * @payload_size: size of the payload data in bytes
> + * @payload: data to be sent to the firmware
> + */
> +struct csc_heci_late_bind_req {
> +	struct mkhi_msg_hdr header;
> +	u32 type;
> +	u32 flags;
> +	u32 reserved[2];
> +	u32 payload_size;

As these cross the kernel boundry, they should be the correct type
(__u32), but really, please define the endiness of them (__le32) and use
the proper macros for that.

> +	u8  payload[] __counted_by(payload_size);
> +} __packed;
> +
> +/**
> + * struct csc_heci_late_bind_rsp - late binding response
> + * @header: @ref mkhi_msg_hdr
> + * @type: type of the late binding payload
> + * @reserved: reserved field

Same here.

> + * @status: status of the late binding command execution by firmware
> + */
> +struct csc_heci_late_bind_rsp {
> +	struct mkhi_msg_hdr header;
> +	u32 type;
> +	u32 reserved[2];
> +	u32 status;

Same on the types.

> +} __packed;
> +
> +static int mei_late_bind_check_response(const struct device *dev, const struct mkhi_msg_hdr *hdr)
> +{
> +	if (hdr->group_id != MKHI_GROUP_ID_GFX) {
> +		dev_err(dev, "Mismatch group id: 0x%x instead of 0x%x\n",
> +			hdr->group_id, MKHI_GROUP_ID_GFX);
> +		return -EINVAL;
> +	}
> +
> +	if (hdr->command != GFX_SRV_MKHI_LATE_BINDING_RSP) {
> +		dev_err(dev, "Mismatch command: 0x%x instead of 0x%x\n",
> +			hdr->command, GFX_SRV_MKHI_LATE_BINDING_RSP);
> +		return -EINVAL;
> +	}
> +
> +	if (hdr->result) {
> +		dev_err(dev, "Error in result: 0x%x\n", hdr->result);
> +		return -EINVAL;
> +	}
> +
> +	return 0;
> +}
> +
> +static int mei_late_bind_push_config(struct device *dev, enum late_bind_type type, u32 flags,
> +				     const void *payload, size_t payload_size)
> +{
> +	struct mei_cl_device *cldev;
> +	struct csc_heci_late_bind_req *req = NULL;
> +	struct csc_heci_late_bind_rsp rsp;
> +	size_t req_size;
> +	ssize_t bytes;
> +	int ret;
> +
> +	cldev = to_mei_cl_device(dev);
> +
> +	ret = mei_cldev_enable(cldev);
> +	if (ret) {
> +		dev_dbg(dev, "mei_cldev_enable failed. %d\n", ret);
> +		return ret;
> +	}
> +
> +	req_size = struct_size(req, payload, payload_size);
> +	if (req_size > mei_cldev_mtu(cldev)) {
> +		dev_err(dev, "Payload is too big %zu\n", payload_size);
> +		ret = -EMSGSIZE;
> +		goto end;
> +	}
> +
> +	req = kmalloc(req_size, GFP_KERNEL);
> +	if (!req) {
> +		ret = -ENOMEM;
> +		goto end;
> +	}
> +
> +	req->header.group_id = MKHI_GROUP_ID_GFX;
> +	req->header.command = GFX_SRV_MKHI_LATE_BINDING_CMD;
> +	req->type = type;
> +	req->flags = flags;
> +	req->reserved[0] = 0;
> +	req->reserved[1] = 0;
> +	req->payload_size = payload_size;
> +	memcpy(req->payload, payload, payload_size);
> +
> +	bytes = mei_cldev_send_timeout(cldev,
> +				       (void *)req, req_size, LATE_BIND_SEND_TIMEOUT_MSEC);
> +	if (bytes < 0) {
> +		dev_err(dev, "mei_cldev_send failed. %zd\n", bytes);
> +		ret = bytes;
> +		goto end;
> +	}
> +
> +	bytes = mei_cldev_recv_timeout(cldev,
> +				       (void *)&rsp, sizeof(rsp), LATE_BIND_RECV_TIMEOUT_MSEC);
> +	if (bytes < 0) {
> +		dev_err(dev, "mei_cldev_recv failed. %zd\n", bytes);
> +		ret = bytes;
> +		goto end;
> +	}
> +	if (bytes < sizeof(rsp.header)) {
> +		dev_err(dev, "bad response header from the firmware: size %zd < %zu\n",
> +			bytes, sizeof(rsp.header));
> +		ret = -EPROTO;
> +		goto end;
> +	}
> +	if (mei_late_bind_check_response(dev, &rsp.header)) {
> +		dev_err(dev, "bad result response from the firmware: 0x%x\n",
> +			*(uint32_t *)&rsp.header);
> +		ret = -EPROTO;
> +		goto end;
> +	}
> +	if (bytes < sizeof(rsp)) {
> +		dev_err(dev, "bad response from the firmware: size %zd < %zu\n",
> +			bytes, sizeof(rsp));
> +		ret = -EPROTO;
> +		goto end;
> +	}
> +
> +	dev_dbg(dev, "%s status = %u\n", __func__, rsp.status);

dev_dbg() already contains __func__, you never need to add it again as
you now have duplicate strings.  Please remove it.


> +	ret = (int)rsp.status;
> +end:
> +	mei_cldev_disable(cldev);
> +	kfree(req);
> +	return ret;
> +}
> +
> +static const struct late_bind_component_ops mei_late_bind_ops = {
> +	.owner = THIS_MODULE,

I thought you were going to drop the .owner stuff?

Or if not, please implement it properly (i.e. by NOT forcing people to
manually set it here.)

thanks,

greg k-h

Re: [PATCH v6 02/10] mei: late_bind: add late binding component driver

[Nilawar, Badal]

On 04-07-2025 10:44, Greg KH wrote:
> On Fri, Jul 04, 2025 at 01:00:58AM +0530, Badal Nilawar wrote:
>> From: Alexander Usyskin <alexander.usyskin@intel.com>
>>
>> Add late binding component driver.
>> It allows pushing the late binding configuration from, for example,
>> the Xe graphics driver to the Intel discrete graphics card's CSE device.
>>
>> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
>> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
>> Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
>> ---
>>   drivers/misc/mei/Kconfig                    |   1 +
>>   drivers/misc/mei/Makefile                   |   1 +
>>   drivers/misc/mei/late_bind/Kconfig          |  13 +
>>   drivers/misc/mei/late_bind/Makefile         |   9 +
>>   drivers/misc/mei/late_bind/mei_late_bind.c  | 272 ++++++++++++++++++++
> Why do you have a whole subdir for a single .c file?  What's wrong with
> just keepign it in drivers/misc/mei/ ?

There is separate subdir for each component used by i915/xe, so one was 
created for late_bind as well. Should we still drop late_bind subdir?

cd drivers/misc/mei/
       gsc_proxy/ hdcp/      late_bind/ pxp/

>
>> +/**
>> + * struct csc_heci_late_bind_req - late binding request
>> + * @header: @ref mkhi_msg_hdr
>> + * @type: type of the late binding payload
>> + * @flags: flags to be passed to the firmware
>> + * @reserved: reserved field
> Reserved for what?  Set to what?

Reserved by firmware for future use, default value set to 0, I will 
update above doc.

>
>> + * @payload_size: size of the payload data in bytes
>> + * @payload: data to be sent to the firmware
>> + */
>> +struct csc_heci_late_bind_req {
>> +	struct mkhi_msg_hdr header;
>> +	u32 type;
>> +	u32 flags;
>> +	u32 reserved[2];
>> +	u32 payload_size;
> As these cross the kernel boundry, they should be the correct type
> (__u32), but really, please define the endiness of them (__le32) and use
> the proper macros for that.
If we go with __le32 then while populating elements of structure 
csc_heci_late_bind_req  I will be using cpu_to_le32().

When mapping the response buffer from the firmware with struct 
csc_heci_late_bind_rsp, there's no need to use le32_to_cpu() since the 
response will already be in little-endian format.

Are you fine with this?

>
>> +	u8  payload[] __counted_by(payload_size);
>> +} __packed;
>> +
>> +/**
>> + * struct csc_heci_late_bind_rsp - late binding response
>> + * @header: @ref mkhi_msg_hdr
>> + * @type: type of the late binding payload
>> + * @reserved: reserved field
> Same here.
Will fix this.
>
>> + * @status: status of the late binding command execution by firmware
>> + */
>> +struct csc_heci_late_bind_rsp {
>> +	struct mkhi_msg_hdr header;
>> +	u32 type;
>> +	u32 reserved[2];
>> +	u32 status;
> Same on the types.
>
>> +} __packed;
>> +
>> +static int mei_late_bind_check_response(const struct device *dev, const struct mkhi_msg_hdr *hdr)
>> +{
>> +	if (hdr->group_id != MKHI_GROUP_ID_GFX) {
>> +		dev_err(dev, "Mismatch group id: 0x%x instead of 0x%x\n",
>> +			hdr->group_id, MKHI_GROUP_ID_GFX);
>> +		return -EINVAL;
>> +	}
>> +
>> +	if (hdr->command != GFX_SRV_MKHI_LATE_BINDING_RSP) {
>> +		dev_err(dev, "Mismatch command: 0x%x instead of 0x%x\n",
>> +			hdr->command, GFX_SRV_MKHI_LATE_BINDING_RSP);
>> +		return -EINVAL;
>> +	}
>> +
>> +	if (hdr->result) {
>> +		dev_err(dev, "Error in result: 0x%x\n", hdr->result);
>> +		return -EINVAL;
>> +	}
>> +
>> +	return 0;
>> +}
>> +
>> +static int mei_late_bind_push_config(struct device *dev, enum late_bind_type type, u32 flags,
>> +				     const void *payload, size_t payload_size)
>> +{
>> +	struct mei_cl_device *cldev;
>> +	struct csc_heci_late_bind_req *req = NULL;
>> +	struct csc_heci_late_bind_rsp rsp;
>> +	size_t req_size;
>> +	ssize_t bytes;
>> +	int ret;
>> +
>> +	cldev = to_mei_cl_device(dev);
>> +
>> +	ret = mei_cldev_enable(cldev);
>> +	if (ret) {
>> +		dev_dbg(dev, "mei_cldev_enable failed. %d\n", ret);
>> +		return ret;
>> +	}
>> +
>> +	req_size = struct_size(req, payload, payload_size);
>> +	if (req_size > mei_cldev_mtu(cldev)) {
>> +		dev_err(dev, "Payload is too big %zu\n", payload_size);
>> +		ret = -EMSGSIZE;
>> +		goto end;
>> +	}
>> +
>> +	req = kmalloc(req_size, GFP_KERNEL);
>> +	if (!req) {
>> +		ret = -ENOMEM;
>> +		goto end;
>> +	}
>> +
>> +	req->header.group_id = MKHI_GROUP_ID_GFX;
>> +	req->header.command = GFX_SRV_MKHI_LATE_BINDING_CMD;
>> +	req->type = type;
>> +	req->flags = flags;
>> +	req->reserved[0] = 0;
>> +	req->reserved[1] = 0;
>> +	req->payload_size = payload_size;
>> +	memcpy(req->payload, payload, payload_size);
>> +
>> +	bytes = mei_cldev_send_timeout(cldev,
>> +				       (void *)req, req_size, LATE_BIND_SEND_TIMEOUT_MSEC);
>> +	if (bytes < 0) {
>> +		dev_err(dev, "mei_cldev_send failed. %zd\n", bytes);
>> +		ret = bytes;
>> +		goto end;
>> +	}
>> +
>> +	bytes = mei_cldev_recv_timeout(cldev,
>> +				       (void *)&rsp, sizeof(rsp), LATE_BIND_RECV_TIMEOUT_MSEC);
>> +	if (bytes < 0) {
>> +		dev_err(dev, "mei_cldev_recv failed. %zd\n", bytes);
>> +		ret = bytes;
>> +		goto end;
>> +	}
>> +	if (bytes < sizeof(rsp.header)) {
>> +		dev_err(dev, "bad response header from the firmware: size %zd < %zu\n",
>> +			bytes, sizeof(rsp.header));
>> +		ret = -EPROTO;
>> +		goto end;
>> +	}
>> +	if (mei_late_bind_check_response(dev, &rsp.header)) {
>> +		dev_err(dev, "bad result response from the firmware: 0x%x\n",
>> +			*(uint32_t *)&rsp.header);
>> +		ret = -EPROTO;
>> +		goto end;
>> +	}
>> +	if (bytes < sizeof(rsp)) {
>> +		dev_err(dev, "bad response from the firmware: size %zd < %zu\n",
>> +			bytes, sizeof(rsp));
>> +		ret = -EPROTO;
>> +		goto end;
>> +	}
>> +
>> +	dev_dbg(dev, "%s status = %u\n", __func__, rsp.status);
> dev_dbg() already contains __func__, you never need to add it again as
> you now have duplicate strings.  Please remove it.
Sure.
>
>
>> +	ret = (int)rsp.status;
>> +end:
>> +	mei_cldev_disable(cldev);
>> +	kfree(req);
>> +	return ret;
>> +}
>> +
>> +static const struct late_bind_component_ops mei_late_bind_ops = {
>> +	.owner = THIS_MODULE,
> I thought you were going to drop the .owner stuff?
>
> Or if not, please implement it properly (i.e. by NOT forcing people to
> manually set it here.)

Somehow I missed this. I will drop it.

Thanks,
Badal

>
> thanks,
>
> greg k-h

Re: [PATCH v6 02/10] mei: late_bind: add late binding component driver

[Greg KH]

On Fri, Jul 04, 2025 at 03:59:40PM +0530, Nilawar, Badal wrote:
> 
> On 04-07-2025 10:44, Greg KH wrote:
> > On Fri, Jul 04, 2025 at 01:00:58AM +0530, Badal Nilawar wrote:
> > > From: Alexander Usyskin <alexander.usyskin@intel.com>
> > > 
> > > Add late binding component driver.
> > > It allows pushing the late binding configuration from, for example,
> > > the Xe graphics driver to the Intel discrete graphics card's CSE device.
> > > 
> > > Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
> > > Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> > > Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > > ---
> > >   drivers/misc/mei/Kconfig                    |   1 +
> > >   drivers/misc/mei/Makefile                   |   1 +
> > >   drivers/misc/mei/late_bind/Kconfig          |  13 +
> > >   drivers/misc/mei/late_bind/Makefile         |   9 +
> > >   drivers/misc/mei/late_bind/mei_late_bind.c  | 272 ++++++++++++++++++++
> > Why do you have a whole subdir for a single .c file?  What's wrong with
> > just keepign it in drivers/misc/mei/ ?
> 
> There is separate subdir for each component used by i915/xe, so one was
> created for late_bind as well. Should we still drop late_bind subdir?
> 
> cd drivers/misc/mei/
>       gsc_proxy/ hdcp/      late_bind/ pxp/

For "modules" that are just a single file, yeah, that's silly, don't do
that.

> > > +/**
> > > + * struct csc_heci_late_bind_req - late binding request
> > > + * @header: @ref mkhi_msg_hdr
> > > + * @type: type of the late binding payload
> > > + * @flags: flags to be passed to the firmware
> > > + * @reserved: reserved field
> > Reserved for what?  Set to what?
> 
> Reserved by firmware for future use, default value set to 0, I will update
> above doc.
> 
> > 
> > > + * @payload_size: size of the payload data in bytes
> > > + * @payload: data to be sent to the firmware
> > > + */
> > > +struct csc_heci_late_bind_req {
> > > +	struct mkhi_msg_hdr header;
> > > +	u32 type;
> > > +	u32 flags;
> > > +	u32 reserved[2];
> > > +	u32 payload_size;
> > As these cross the kernel boundry, they should be the correct type
> > (__u32), but really, please define the endiness of them (__le32) and use
> > the proper macros for that.
> If we go with __le32 then while populating elements of structure
> csc_heci_late_bind_req  I will be using cpu_to_le32().
> 
> When mapping the response buffer from the firmware with struct
> csc_heci_late_bind_rsp, there's no need to use le32_to_cpu() since the
> response will already be in little-endian format.

How do you know?  Where is that defined?  Where did the conversion
happen?

> Are you fine with this?

Please be explicit.

> > > +	ret = (int)rsp.status;
> > > +end:
> > > +	mei_cldev_disable(cldev);
> > > +	kfree(req);
> > > +	return ret;
> > > +}
> > > +
> > > +static const struct late_bind_component_ops mei_late_bind_ops = {
> > > +	.owner = THIS_MODULE,
> > I thought you were going to drop the .owner stuff?
> > 
> > Or if not, please implement it properly (i.e. by NOT forcing people to
> > manually set it here.)
> 
> Somehow I missed this. I will drop it.

And from the structure definition please.

thanks,

greg k-h

Re: [PATCH v6 02/10] mei: late_bind: add late binding component driver

[Nilawar, Badal]

On 04-07-2025 16:04, Greg KH wrote:
> On Fri, Jul 04, 2025 at 03:59:40PM +0530, Nilawar, Badal wrote:
>> On 04-07-2025 10:44, Greg KH wrote:
>>> On Fri, Jul 04, 2025 at 01:00:58AM +0530, Badal Nilawar wrote:
>>>> From: Alexander Usyskin <alexander.usyskin@intel.com>
>>>>
>>>> Add late binding component driver.
>>>> It allows pushing the late binding configuration from, for example,
>>>> the Xe graphics driver to the Intel discrete graphics card's CSE device.
>>>>
>>>> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
>>>> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
>>>> Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
>>>> ---
>>>>    drivers/misc/mei/Kconfig                    |   1 +
>>>>    drivers/misc/mei/Makefile                   |   1 +
>>>>    drivers/misc/mei/late_bind/Kconfig          |  13 +
>>>>    drivers/misc/mei/late_bind/Makefile         |   9 +
>>>>    drivers/misc/mei/late_bind/mei_late_bind.c  | 272 ++++++++++++++++++++
>>> Why do you have a whole subdir for a single .c file?  What's wrong with
>>> just keepign it in drivers/misc/mei/ ?
>> There is separate subdir for each component used by i915/xe, so one was
>> created for late_bind as well. Should we still drop late_bind subdir?
>>
>> cd drivers/misc/mei/
>>        gsc_proxy/ hdcp/      late_bind/ pxp/
> For "modules" that are just a single file, yeah, that's silly, don't do
> that.
Another reason to maintain the sub_dir is to accommodate additional 
files for future platforms. If you still insist, I'll remove the sub_dir.
>
>>>> +/**
>>>> + * struct csc_heci_late_bind_req - late binding request
>>>> + * @header: @ref mkhi_msg_hdr
>>>> + * @type: type of the late binding payload
>>>> + * @flags: flags to be passed to the firmware
>>>> + * @reserved: reserved field
>>> Reserved for what?  Set to what?
>> Reserved by firmware for future use, default value set to 0, I will update
>> above doc.
>>
>>>> + * @payload_size: size of the payload data in bytes
>>>> + * @payload: data to be sent to the firmware
>>>> + */
>>>> +struct csc_heci_late_bind_req {
>>>> +	struct mkhi_msg_hdr header;
>>>> +	u32 type;
>>>> +	u32 flags;
>>>> +	u32 reserved[2];
>>>> +	u32 payload_size;
>>> As these cross the kernel boundry, they should be the correct type
>>> (__u32), but really, please define the endiness of them (__le32) and use
>>> the proper macros for that.
>> If we go with __le32 then while populating elements of structure
>> csc_heci_late_bind_req  I will be using cpu_to_le32().
>>
>> When mapping the response buffer from the firmware with struct
>> csc_heci_late_bind_rsp, there's no need to use le32_to_cpu() since the
>> response will already be in little-endian format.
> How do you know?  Where is that defined?  Where did the conversion
> happen?

Sorry, I got confused. Conversion is needed when assigning the response 
structure elements.

e.g ret = (int)(le32_to_cpu)rsp.status;

>
>> Are you fine with this?
> Please be explicit.
>
>>>> +	ret = (int)rsp.status;
>>>> +end:
>>>> +	mei_cldev_disable(cldev);
>>>> +	kfree(req);
>>>> +	return ret;
>>>> +}
>>>> +
>>>> +static const struct late_bind_component_ops mei_late_bind_ops = {
>>>> +	.owner = THIS_MODULE,
>>> I thought you were going to drop the .owner stuff?
>>>
>>> Or if not, please implement it properly (i.e. by NOT forcing people to
>>> manually set it here.)
>> Somehow I missed this. I will drop it.
> And from the structure definition please.

Sure.

Thanks,
Badal

>
> thanks,
>
> greg k-h

Re: [PATCH v6 02/10] mei: late_bind: add late binding component driver

[Greg KH]

On Fri, Jul 04, 2025 at 05:18:46PM +0530, Nilawar, Badal wrote:
> 
> On 04-07-2025 16:04, Greg KH wrote:
> > On Fri, Jul 04, 2025 at 03:59:40PM +0530, Nilawar, Badal wrote:
> > > On 04-07-2025 10:44, Greg KH wrote:
> > > > On Fri, Jul 04, 2025 at 01:00:58AM +0530, Badal Nilawar wrote:
> > > > > From: Alexander Usyskin <alexander.usyskin@intel.com>
> > > > > 
> > > > > Add late binding component driver.
> > > > > It allows pushing the late binding configuration from, for example,
> > > > > the Xe graphics driver to the Intel discrete graphics card's CSE device.
> > > > > 
> > > > > Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
> > > > > Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> > > > > Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > > > > ---
> > > > >    drivers/misc/mei/Kconfig                    |   1 +
> > > > >    drivers/misc/mei/Makefile                   |   1 +
> > > > >    drivers/misc/mei/late_bind/Kconfig          |  13 +
> > > > >    drivers/misc/mei/late_bind/Makefile         |   9 +
> > > > >    drivers/misc/mei/late_bind/mei_late_bind.c  | 272 ++++++++++++++++++++
> > > > Why do you have a whole subdir for a single .c file?  What's wrong with
> > > > just keepign it in drivers/misc/mei/ ?
> > > There is separate subdir for each component used by i915/xe, so one was
> > > created for late_bind as well. Should we still drop late_bind subdir?
> > > 
> > > cd drivers/misc/mei/
> > >        gsc_proxy/ hdcp/      late_bind/ pxp/
> > For "modules" that are just a single file, yeah, that's silly, don't do
> > that.
> Another reason to maintain the sub_dir is to accommodate additional files
> for future platforms. If you still insist, I'll remove the sub_dir.

Move files around when it happens, for now, it's silly and not needed.

> > > > > + * @payload_size: size of the payload data in bytes
> > > > > + * @payload: data to be sent to the firmware
> > > > > + */
> > > > > +struct csc_heci_late_bind_req {
> > > > > +	struct mkhi_msg_hdr header;
> > > > > +	u32 type;
> > > > > +	u32 flags;
> > > > > +	u32 reserved[2];
> > > > > +	u32 payload_size;
> > > > As these cross the kernel boundry, they should be the correct type
> > > > (__u32), but really, please define the endiness of them (__le32) and use
> > > > the proper macros for that.
> > > If we go with __le32 then while populating elements of structure
> > > csc_heci_late_bind_req  I will be using cpu_to_le32().
> > > 
> > > When mapping the response buffer from the firmware with struct
> > > csc_heci_late_bind_rsp, there's no need to use le32_to_cpu() since the
> > > response will already be in little-endian format.
> > How do you know?  Where is that defined?  Where did the conversion
> > happen?
> 
> Sorry, I got confused. Conversion is needed when assigning the response
> structure elements.
> 
> e.g ret = (int)(le32_to_cpu)rsp.status;

But these are read directly from the hardware?  If not, why are they
marked as packed?

thanks,

greg k-h

RE: [PATCH v6 02/10] mei: late_bind: add late binding component driver

[Gupta, Anshuman]

> -----Original Message-----
> From: Greg KH <gregkh@linuxfoundation.org>
> Sent: Friday, July 4, 2025 5:31 PM
> To: Nilawar, Badal <badal.nilawar@intel.com>
> Cc: intel-xe@lists.freedesktop.org; dri-devel@lists.freedesktop.org; linux-
> kernel@vger.kernel.org; Gupta, Anshuman <anshuman.gupta@intel.com>;
> Vivi, Rodrigo <rodrigo.vivi@intel.com>; Usyskin, Alexander
> <alexander.usyskin@intel.com>; Ceraolo Spurio, Daniele
> <daniele.ceraolospurio@intel.com>
> Subject: Re: [PATCH v6 02/10] mei: late_bind: add late binding component
> driver
> 
> On Fri, Jul 04, 2025 at 05:18:46PM +0530, Nilawar, Badal wrote:
> >
> > On 04-07-2025 16:04, Greg KH wrote:
> > > On Fri, Jul 04, 2025 at 03:59:40PM +0530, Nilawar, Badal wrote:
> > > > On 04-07-2025 10:44, Greg KH wrote:
> > > > > On Fri, Jul 04, 2025 at 01:00:58AM +0530, Badal Nilawar wrote:
> > > > > > From: Alexander Usyskin <alexander.usyskin@intel.com>
> > > > > >
> > > > > > Add late binding component driver.
> > > > > > It allows pushing the late binding configuration from, for
> > > > > > example, the Xe graphics driver to the Intel discrete graphics card's
> CSE device.
> > > > > >
> > > > > > Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
> > > > > > Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> > > > > > Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > > > > > ---
> > > > > >    drivers/misc/mei/Kconfig                    |   1 +
> > > > > >    drivers/misc/mei/Makefile                   |   1 +
> > > > > >    drivers/misc/mei/late_bind/Kconfig          |  13 +
> > > > > >    drivers/misc/mei/late_bind/Makefile         |   9 +
> > > > > >    drivers/misc/mei/late_bind/mei_late_bind.c  | 272
> > > > > > ++++++++++++++++++++
> > > > > Why do you have a whole subdir for a single .c file?  What's
> > > > > wrong with just keepign it in drivers/misc/mei/ ?
> > > > There is separate subdir for each component used by i915/xe, so
> > > > one was created for late_bind as well. Should we still drop late_bind
> subdir?
> > > >
> > > > cd drivers/misc/mei/
> > > >        gsc_proxy/ hdcp/      late_bind/ pxp/
> > > For "modules" that are just a single file, yeah, that's silly, don't
> > > do that.
> > Another reason to maintain the sub_dir is to accommodate additional
> > files for future platforms. If you still insist, I'll remove the sub_dir.
> 
> Move files around when it happens, for now, it's silly and not needed.
> 
> > > > > > + * @payload_size: size of the payload data in bytes
> > > > > > + * @payload: data to be sent to the firmware  */ struct
> > > > > > +csc_heci_late_bind_req {
> > > > > > +	struct mkhi_msg_hdr header;
> > > > > > +	u32 type;
> > > > > > +	u32 flags;
> > > > > > +	u32 reserved[2];
> > > > > > +	u32 payload_size;
> > > > > As these cross the kernel boundry, they should be the correct
> > > > > type (__u32), but really, please define the endiness of them
> > > > > (__le32) and use the proper macros for that.
> > > > If we go with __le32 then while populating elements of structure
> > > > csc_heci_late_bind_req  I will be using cpu_to_le32().
> > > >
> > > > When mapping the response buffer from the firmware with struct
> > > > csc_heci_late_bind_rsp, there's no need to use le32_to_cpu() since
> > > > the response will already be in little-endian format.
> > > How do you know?  Where is that defined?  Where did the conversion
> > > happen?
> >
> > Sorry, I got confused. Conversion is needed when assigning the
> > response structure elements.
> >
> > e.g ret = (int)(le32_to_cpu)rsp.status;
> 
> But these are read directly from the hardware?  If not, why are they marked as
> packed?
Yes, these are read from firmware, that is the reason they marked as __packed.
IMHO, don't we need change the explicit endianness of response status to address your comment.
Are we missing something here?

Thanks,
Anshuman
> 
> thanks,
> 
> greg k-h

Re: [PATCH v6 02/10] mei: late_bind: add late binding component driver

[Greg KH]

On Fri, Jul 04, 2025 at 12:21:42PM +0000, Gupta, Anshuman wrote:
> 
> 
> > -----Original Message-----
> > From: Greg KH <gregkh@linuxfoundation.org>
> > Sent: Friday, July 4, 2025 5:31 PM
> > To: Nilawar, Badal <badal.nilawar@intel.com>
> > Cc: intel-xe@lists.freedesktop.org; dri-devel@lists.freedesktop.org; linux-
> > kernel@vger.kernel.org; Gupta, Anshuman <anshuman.gupta@intel.com>;
> > Vivi, Rodrigo <rodrigo.vivi@intel.com>; Usyskin, Alexander
> > <alexander.usyskin@intel.com>; Ceraolo Spurio, Daniele
> > <daniele.ceraolospurio@intel.com>
> > Subject: Re: [PATCH v6 02/10] mei: late_bind: add late binding component
> > driver
> > 
> > On Fri, Jul 04, 2025 at 05:18:46PM +0530, Nilawar, Badal wrote:
> > >
> > > On 04-07-2025 16:04, Greg KH wrote:
> > > > On Fri, Jul 04, 2025 at 03:59:40PM +0530, Nilawar, Badal wrote:
> > > > > On 04-07-2025 10:44, Greg KH wrote:
> > > > > > On Fri, Jul 04, 2025 at 01:00:58AM +0530, Badal Nilawar wrote:
> > > > > > > From: Alexander Usyskin <alexander.usyskin@intel.com>
> > > > > > >
> > > > > > > Add late binding component driver.
> > > > > > > It allows pushing the late binding configuration from, for
> > > > > > > example, the Xe graphics driver to the Intel discrete graphics card's
> > CSE device.
> > > > > > >
> > > > > > > Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
> > > > > > > Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> > > > > > > Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > > > > > > ---
> > > > > > >    drivers/misc/mei/Kconfig                    |   1 +
> > > > > > >    drivers/misc/mei/Makefile                   |   1 +
> > > > > > >    drivers/misc/mei/late_bind/Kconfig          |  13 +
> > > > > > >    drivers/misc/mei/late_bind/Makefile         |   9 +
> > > > > > >    drivers/misc/mei/late_bind/mei_late_bind.c  | 272
> > > > > > > ++++++++++++++++++++
> > > > > > Why do you have a whole subdir for a single .c file?  What's
> > > > > > wrong with just keepign it in drivers/misc/mei/ ?
> > > > > There is separate subdir for each component used by i915/xe, so
> > > > > one was created for late_bind as well. Should we still drop late_bind
> > subdir?
> > > > >
> > > > > cd drivers/misc/mei/
> > > > >        gsc_proxy/ hdcp/      late_bind/ pxp/
> > > > For "modules" that are just a single file, yeah, that's silly, don't
> > > > do that.
> > > Another reason to maintain the sub_dir is to accommodate additional
> > > files for future platforms. If you still insist, I'll remove the sub_dir.
> > 
> > Move files around when it happens, for now, it's silly and not needed.
> > 
> > > > > > > + * @payload_size: size of the payload data in bytes
> > > > > > > + * @payload: data to be sent to the firmware  */ struct
> > > > > > > +csc_heci_late_bind_req {
> > > > > > > +	struct mkhi_msg_hdr header;
> > > > > > > +	u32 type;
> > > > > > > +	u32 flags;
> > > > > > > +	u32 reserved[2];
> > > > > > > +	u32 payload_size;
> > > > > > As these cross the kernel boundry, they should be the correct
> > > > > > type (__u32), but really, please define the endiness of them
> > > > > > (__le32) and use the proper macros for that.
> > > > > If we go with __le32 then while populating elements of structure
> > > > > csc_heci_late_bind_req  I will be using cpu_to_le32().
> > > > >
> > > > > When mapping the response buffer from the firmware with struct
> > > > > csc_heci_late_bind_rsp, there's no need to use le32_to_cpu() since
> > > > > the response will already be in little-endian format.
> > > > How do you know?  Where is that defined?  Where did the conversion
> > > > happen?
> > >
> > > Sorry, I got confused. Conversion is needed when assigning the
> > > response structure elements.
> > >
> > > e.g ret = (int)(le32_to_cpu)rsp.status;
> > 
> > But these are read directly from the hardware?  If not, why are they marked as
> > packed?
> Yes, these are read from firmware, that is the reason they marked as __packed.
> IMHO, don't we need change the explicit endianness of response status to address your comment.
> Are we missing something here?

Yes.  The firmware defines these values as __le32, right?  And if you
read a chunk of memory and cast it into this structure, those fields
are now also __le32, right?  So to read them in the driver you need to
then call le32_to_cpu() on those values.

Just like data on the USB bus, or any other hardware type.  You must
define what endian the data is in and then convert it to "native" before
accessing it properly.

thanks,

greg k-h

Re: [PATCH v6 02/10] mei: late_bind: add late binding component driver

[Nilawar, Badal]

On 04-07-2025 17:59, Greg KH wrote:
> On Fri, Jul 04, 2025 at 12:21:42PM +0000, Gupta, Anshuman wrote:
>>
>>> -----Original Message-----
>>> From: Greg KH <gregkh@linuxfoundation.org>
>>> Sent: Friday, July 4, 2025 5:31 PM
>>> To: Nilawar, Badal <badal.nilawar@intel.com>
>>> Cc: intel-xe@lists.freedesktop.org; dri-devel@lists.freedesktop.org; linux-
>>> kernel@vger.kernel.org; Gupta, Anshuman <anshuman.gupta@intel.com>;
>>> Vivi, Rodrigo <rodrigo.vivi@intel.com>; Usyskin, Alexander
>>> <alexander.usyskin@intel.com>; Ceraolo Spurio, Daniele
>>> <daniele.ceraolospurio@intel.com>
>>> Subject: Re: [PATCH v6 02/10] mei: late_bind: add late binding component
>>> driver
>>>
>>> On Fri, Jul 04, 2025 at 05:18:46PM +0530, Nilawar, Badal wrote:
>>>> On 04-07-2025 16:04, Greg KH wrote:
>>>>> On Fri, Jul 04, 2025 at 03:59:40PM +0530, Nilawar, Badal wrote:
>>>>>> On 04-07-2025 10:44, Greg KH wrote:
>>>>>>> On Fri, Jul 04, 2025 at 01:00:58AM +0530, Badal Nilawar wrote:
>>>>>>>> From: Alexander Usyskin <alexander.usyskin@intel.com>
>>>>>>>>
>>>>>>>> Add late binding component driver.
>>>>>>>> It allows pushing the late binding configuration from, for
>>>>>>>> example, the Xe graphics driver to the Intel discrete graphics card's
>>> CSE device.
>>>>>>>> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
>>>>>>>> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
>>>>>>>> Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
>>>>>>>> ---
>>>>>>>>     drivers/misc/mei/Kconfig                    |   1 +
>>>>>>>>     drivers/misc/mei/Makefile                   |   1 +
>>>>>>>>     drivers/misc/mei/late_bind/Kconfig          |  13 +
>>>>>>>>     drivers/misc/mei/late_bind/Makefile         |   9 +
>>>>>>>>     drivers/misc/mei/late_bind/mei_late_bind.c  | 272
>>>>>>>> ++++++++++++++++++++
>>>>>>> Why do you have a whole subdir for a single .c file?  What's
>>>>>>> wrong with just keepign it in drivers/misc/mei/ ?
>>>>>> There is separate subdir for each component used by i915/xe, so
>>>>>> one was created for late_bind as well. Should we still drop late_bind
>>> subdir?
>>>>>> cd drivers/misc/mei/
>>>>>>         gsc_proxy/ hdcp/      late_bind/ pxp/
>>>>> For "modules" that are just a single file, yeah, that's silly, don't
>>>>> do that.
>>>> Another reason to maintain the sub_dir is to accommodate additional
>>>> files for future platforms. If you still insist, I'll remove the sub_dir.
>>> Move files around when it happens, for now, it's silly and not needed.
>>>
>>>>>>>> + * @payload_size: size of the payload data in bytes
>>>>>>>> + * @payload: data to be sent to the firmware  */ struct
>>>>>>>> +csc_heci_late_bind_req {
>>>>>>>> +	struct mkhi_msg_hdr header;
>>>>>>>> +	u32 type;
>>>>>>>> +	u32 flags;
>>>>>>>> +	u32 reserved[2];
>>>>>>>> +	u32 payload_size;
>>>>>>> As these cross the kernel boundry, they should be the correct
>>>>>>> type (__u32), but really, please define the endiness of them
>>>>>>> (__le32) and use the proper macros for that.
>>>>>> If we go with __le32 then while populating elements of structure
>>>>>> csc_heci_late_bind_req  I will be using cpu_to_le32().
>>>>>>
>>>>>> When mapping the response buffer from the firmware with struct
>>>>>> csc_heci_late_bind_rsp, there's no need to use le32_to_cpu() since
>>>>>> the response will already be in little-endian format.
>>>>> How do you know?  Where is that defined?  Where did the conversion
>>>>> happen?
>>>> Sorry, I got confused. Conversion is needed when assigning the
>>>> response structure elements.
>>>>
>>>> e.g ret = (int)(le32_to_cpu)rsp.status;
>>> But these are read directly from the hardware?  If not, why are they marked as
>>> packed?
>> Yes, these are read from firmware, that is the reason they marked as __packed.
>> IMHO, don't we need change the explicit endianness of response status to address your comment.
>> Are we missing something here?
> Yes.  The firmware defines these values as __le32, right?  And if you
> read a chunk of memory and cast it into this structure, those fields
> are now also __le32, right?  So to read them in the driver you need to
> then call le32_to_cpu() on those values.
Agreed. Therefore, the following assignment is valid and needed as ret 
can be BE if CPU is BE.

e.g. ret = (int)le32_to_cpu(rsp.status);

>
> Just like data on the USB bus, or any other hardware type.  You must
> define what endian the data is in and then convert it to "native" before
> accessing it properly.
Ok
>
> thanks,
>
> greg k-h

✗ Xe.CI.Full: failure for Introducing firmware late binding

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 91889 bytes --]

== Series Details ==

Series: Introducing firmware late binding
URL   : https://patchwork.freedesktop.org/series/151140/
State : failure

== Summary ==

CI Bug Log - changes from xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43_FULL -> xe-pw-151140v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-151140v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-151140v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-151140v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-bmg:          [PASS][1] -> [DMESG-WARN][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@xe_eu_stall@invalid-event-report-count:
    - shard-dg2-set2:     NOTRUN -> [SKIP][3]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@xe_eu_stall@invalid-event-report-count.html
    - shard-adlp:         NOTRUN -> [SKIP][4]
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-6/igt@xe_eu_stall@invalid-event-report-count.html

  
Known issues
------------

  Here are the changes found in xe-pw-151140v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@4-tiled-64bpp-rotate-180:
    - shard-adlp:         NOTRUN -> [SKIP][5] ([Intel XE#1124]) +2 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-9/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][6] ([Intel XE#316]) +2 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-466/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-addfb:
    - shard-dg2-set2:     [PASS][7] -> [SKIP][8] ([Intel XE#2231] / [Intel XE#4208]) +6 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-432/igt@kms_big_fb@x-tiled-addfb.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_big_fb@x-tiled-addfb.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
    - shard-adlp:         [PASS][9] -> [DMESG-WARN][10] ([Intel XE#2953] / [Intel XE#4173]) +6 other tests dmesg-warn
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-8/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-4/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#1124]) +3 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-7/igt@kms_big_fb@y-tiled-8bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-adlp:         [PASS][12] -> [DMESG-FAIL][13] ([Intel XE#4543]) +7 other tests dmesg-fail
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180:
    - shard-adlp:         [PASS][14] -> [FAIL][15] ([Intel XE#1874])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180.html
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#607])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-1/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
    - shard-lnl:          NOTRUN -> [SKIP][17] ([Intel XE#1477])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-5/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-dg2-set2:     NOTRUN -> [SKIP][18] ([Intel XE#1124]) +9 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-466/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
    - shard-lnl:          NOTRUN -> [SKIP][19] ([Intel XE#1124]) +2 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
    - shard-bmg:          [PASS][20] -> [SKIP][21] ([Intel XE#2314] / [Intel XE#2894]) +1 other test skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-2/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
    - shard-dg2-set2:     NOTRUN -> [SKIP][22] ([Intel XE#2191])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-466/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html

  * igt@kms_bw@linear-tiling-2-displays-1920x1080p:
    - shard-adlp:         NOTRUN -> [SKIP][23] ([Intel XE#367])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-4/igt@kms_bw@linear-tiling-2-displays-1920x1080p.html
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#367]) +1 other test skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-6/igt@kms_bw@linear-tiling-2-displays-1920x1080p.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][25] ([Intel XE#367]) +1 other test skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-436/igt@kms_bw@linear-tiling-2-displays-1920x1080p.html
    - shard-lnl:          NOTRUN -> [SKIP][26] ([Intel XE#367])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-5/igt@kms_bw@linear-tiling-2-displays-1920x1080p.html

  * igt@kms_bw@linear-tiling-4-displays-1920x1080p:
    - shard-lnl:          NOTRUN -> [SKIP][27] ([Intel XE#1512])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-7/igt@kms_bw@linear-tiling-4-displays-1920x1080p.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs@pipe-a-dp-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][28] ([Intel XE#787]) +195 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs@pipe-a-dp-2.html

  * igt@kms_ccs@bad-pixel-format-yf-tiled-ccs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][29] ([Intel XE#2231] / [Intel XE#4208]) +6 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#2652] / [Intel XE#787]) +13 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-7/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][31] ([Intel XE#2887]) +2 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-6/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][32] ([Intel XE#2907])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-466/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#2887]) +4 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-7/igt@kms_ccs@crc-primary-basic-y-tiled-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs@pipe-c-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][34] ([Intel XE#787]) +14 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-3/igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs@pipe-c-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][35] ([Intel XE#3442])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-4/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][36] ([Intel XE#3442])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-436/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-dp-2:
    - shard-bmg:          [PASS][37] -> [FAIL][38] ([Intel XE#5376]) +1 other test fail
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-dp-2.html
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-8/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-dp-2.html

  * igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][39] ([Intel XE#455] / [Intel XE#787]) +36 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-434/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][40] ([Intel XE#455] / [Intel XE#787]) +8 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-1/igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4:
    - shard-dg2-set2:     [PASS][41] -> [INCOMPLETE][42] ([Intel XE#1727] / [Intel XE#3124])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     [PASS][43] -> [DMESG-WARN][44] ([Intel XE#1727] / [Intel XE#3113])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][45] ([Intel XE#1727] / [Intel XE#3124])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [DMESG-WARN][46] ([Intel XE#1727] / [Intel XE#3113])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][47] ([Intel XE#4418])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-464/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_chamelium_color@ctm-green-to-red:
    - shard-dg2-set2:     NOTRUN -> [SKIP][48] ([Intel XE#306])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-463/igt@kms_chamelium_color@ctm-green-to-red.html

  * igt@kms_chamelium_edid@dp-edid-resolution-list:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#2252]) +2 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-5/igt@kms_chamelium_edid@dp-edid-resolution-list.html
    - shard-lnl:          NOTRUN -> [SKIP][50] ([Intel XE#373]) +3 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-1/igt@kms_chamelium_edid@dp-edid-resolution-list.html

  * igt@kms_chamelium_frames@hdmi-crc-fast:
    - shard-adlp:         NOTRUN -> [SKIP][51] ([Intel XE#373])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-2/igt@kms_chamelium_frames@hdmi-crc-fast.html

  * igt@kms_chamelium_hpd@dp-hpd-storm-disable:
    - shard-dg2-set2:     NOTRUN -> [SKIP][52] ([Intel XE#373]) +4 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-464/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html

  * igt@kms_content_protection@legacy:
    - shard-dg2-set2:     NOTRUN -> [FAIL][53] ([Intel XE#1178]) +1 other test fail
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-433/igt@kms_content_protection@legacy.html

  * igt@kms_cursor_crc@cursor-onscreen-64x64:
    - shard-dg2-set2:     [PASS][54] -> [SKIP][55] ([Intel XE#4208] / [i915#2575]) +12 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-464/igt@kms_cursor_crc@cursor-onscreen-64x64.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_cursor_crc@cursor-onscreen-64x64.html

  * igt@kms_cursor_crc@cursor-onscreen-max-size:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#2320])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-1/igt@kms_cursor_crc@cursor-onscreen-max-size.html
    - shard-lnl:          NOTRUN -> [SKIP][57] ([Intel XE#1424])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-6/igt@kms_cursor_crc@cursor-onscreen-max-size.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x512:
    - shard-dg2-set2:     NOTRUN -> [SKIP][58] ([Intel XE#308])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-433/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#2321])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-1/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
    - shard-adlp:         NOTRUN -> [SKIP][60] ([Intel XE#308])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-1/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2321])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-6/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-bmg:          [PASS][62] -> [SKIP][63] ([Intel XE#2291]) +2 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-dg2-set2:     NOTRUN -> [SKIP][64] ([Intel XE#4331])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-433/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
    - shard-adlp:         NOTRUN -> [SKIP][65] ([Intel XE#4422])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-3/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#4422])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-1/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][67] ([Intel XE#4422])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html
    - shard-lnl:          NOTRUN -> [SKIP][68] ([Intel XE#4422])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-6/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html

  * igt@kms_flip@2x-plain-flip-ts-check-interruptible:
    - shard-bmg:          [PASS][69] -> [SKIP][70] ([Intel XE#2316]) +2 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-1/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-5/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html

  * igt@kms_flip@2x-wf_vblank-ts-check-interruptible:
    - shard-adlp:         NOTRUN -> [SKIP][71] ([Intel XE#310])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-4/igt@kms_flip@2x-wf_vblank-ts-check-interruptible.html
    - shard-lnl:          NOTRUN -> [SKIP][72] ([Intel XE#1421])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-2/igt@kms_flip@2x-wf_vblank-ts-check-interruptible.html

  * igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1:
    - shard-adlp:         [PASS][73] -> [DMESG-WARN][74] ([Intel XE#4543]) +20 other tests dmesg-warn
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-6/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-3/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [PASS][75] -> [FAIL][76] ([Intel XE#301])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-bmg:          [PASS][77] -> [INCOMPLETE][78] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-1/igt@kms_flip@flip-vs-suspend.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-8/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend@c-dp4:
    - shard-dg2-set2:     [PASS][79] -> [INCOMPLETE][80] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-463/igt@kms_flip@flip-vs-suspend@c-dp4.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-435/igt@kms_flip@flip-vs-suspend@c-dp4.html

  * igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling:
    - shard-lnl:          NOTRUN -> [FAIL][81] ([Intel XE#4683]) +1 other test fail
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-6/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling:
    - shard-adlp:         [PASS][82] -> [DMESG-FAIL][83] ([Intel XE#4543] / [Intel XE#4921]) +1 other test dmesg-fail
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-3/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][84] ([Intel XE#1397] / [Intel XE#1745]) +1 other test skip
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-6/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][85] ([Intel XE#1397]) +1 other test skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-6/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode:
    - shard-adlp:         NOTRUN -> [DMESG-FAIL][86] ([Intel XE#4543] / [Intel XE#4921]) +1 other test dmesg-fail
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-3/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode.html

  * igt@kms_force_connector_basic@force-edid:
    - shard-lnl:          NOTRUN -> [SKIP][87] ([Intel XE#352])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-6/igt@kms_force_connector_basic@force-edid.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-draw-render:
    - shard-adlp:         NOTRUN -> [SKIP][88] ([Intel XE#651]) +1 other test skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-3/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][89] ([Intel XE#2311]) +5 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][90] ([Intel XE#656]) +12 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#4141]) +6 other tests skip
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte:
    - shard-dg2-set2:     NOTRUN -> [SKIP][92] ([Intel XE#651]) +21 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-move:
    - shard-adlp:         NOTRUN -> [SKIP][93] ([Intel XE#656]) +7 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-1/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-slowdraw:
    - shard-lnl:          NOTRUN -> [SKIP][94] ([Intel XE#651]) +2 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-1/igt@kms_frontbuffer_tracking@fbcdrrs-slowdraw.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][95] ([Intel XE#2313]) +8 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html
    - shard-adlp:         NOTRUN -> [SKIP][96] ([Intel XE#653]) +2 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-render:
    - shard-dg2-set2:     NOTRUN -> [SKIP][97] ([Intel XE#653]) +15 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-433/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][98] ([Intel XE#2312]) +2 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-bmg:          [PASS][99] -> [SKIP][100] ([Intel XE#1503])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-5/igt@kms_hdr@invalid-metadata-sizes.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-6/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-bmg:          [PASS][101] -> [SKIP][102] ([Intel XE#3012])
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-1/igt@kms_joiner@basic-force-big-joiner.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-6/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-bmg:          NOTRUN -> [SKIP][103] ([Intel XE#2486])
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-3/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_pipe_stress@stress-xrgb8888-ytiled:
    - shard-bmg:          NOTRUN -> [SKIP][104] ([Intel XE#4329])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-4/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][105] ([Intel XE#4359])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-463/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
    - shard-lnl:          NOTRUN -> [SKIP][106] ([Intel XE#4329])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-2/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html

  * igt@kms_plane_multiple@2x-tiling-none:
    - shard-bmg:          [PASS][107] -> [SKIP][108] ([Intel XE#4596])
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-1/igt@kms_plane_multiple@2x-tiling-none.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-none.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format@pipe-c:
    - shard-lnl:          NOTRUN -> [SKIP][109] ([Intel XE#2763]) +3 other tests skip
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-1/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format@pipe-c.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-lnl:          [PASS][110] -> [FAIL][111] ([Intel XE#718])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-lnl-1/igt@kms_pm_dc@dc6-psr.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-5/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][112] ([Intel XE#2499])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-6/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-adlp:         NOTRUN -> [SKIP][113] ([Intel XE#836])
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-4/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
    - shard-lnl:          NOTRUN -> [SKIP][114] ([Intel XE#1439] / [Intel XE#3141])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-2/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf:
    - shard-adlp:         NOTRUN -> [SKIP][115] ([Intel XE#1489]) +1 other test skip
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-8/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf.html
    - shard-lnl:          NOTRUN -> [SKIP][116] ([Intel XE#2893])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-3/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
    - shard-dg2-set2:     NOTRUN -> [SKIP][117] ([Intel XE#1489]) +7 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][118] ([Intel XE#4608])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-3/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area@pipe-a-edp-1.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          NOTRUN -> [SKIP][119] ([Intel XE#1489]) +2 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-2/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-lnl:          NOTRUN -> [SKIP][120] ([Intel XE#1128]) +1 other test skip
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-1/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-bmg:          NOTRUN -> [SKIP][121] ([Intel XE#2387]) +1 other test skip
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-1/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-dg2-set2:     NOTRUN -> [SKIP][122] ([Intel XE#1122]) +1 other test skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-433/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-psr2-primary-blt@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][123] ([Intel XE#4609]) +1 other test skip
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-3/igt@kms_psr@fbc-psr2-primary-blt@edp-1.html

  * igt@kms_psr@fbc-psr2-primary-render:
    - shard-lnl:          NOTRUN -> [SKIP][124] ([Intel XE#1406]) +2 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-2/igt@kms_psr@fbc-psr2-primary-render.html

  * igt@kms_psr@fbc-psr2-sprite-plane-move:
    - shard-dg2-set2:     NOTRUN -> [SKIP][125] ([Intel XE#2850] / [Intel XE#929]) +9 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-433/igt@kms_psr@fbc-psr2-sprite-plane-move.html

  * igt@kms_psr@psr-cursor-plane-onoff:
    - shard-adlp:         NOTRUN -> [SKIP][126] ([Intel XE#2850] / [Intel XE#929]) +3 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-3/igt@kms_psr@psr-cursor-plane-onoff.html
    - shard-bmg:          NOTRUN -> [SKIP][127] ([Intel XE#2234] / [Intel XE#2850]) +5 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-3/igt@kms_psr@psr-cursor-plane-onoff.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
    - shard-bmg:          NOTRUN -> [SKIP][128] ([Intel XE#3414] / [Intel XE#3904])
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-6/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
    - shard-adlp:         NOTRUN -> [SKIP][129] ([Intel XE#3414])
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-1/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
    - shard-lnl:          NOTRUN -> [SKIP][130] ([Intel XE#3414] / [Intel XE#3904])
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
    - shard-dg2-set2:     NOTRUN -> [SKIP][131] ([Intel XE#3414]) +3 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-466/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html

  * igt@kms_vblank@query-busy:
    - shard-dg2-set2:     NOTRUN -> [SKIP][132] ([Intel XE#4208] / [i915#2575]) +1 other test skip
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_vblank@query-busy.html

  * igt@kms_vrr@cmrr:
    - shard-dg2-set2:     NOTRUN -> [SKIP][133] ([Intel XE#2168])
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-463/igt@kms_vrr@cmrr.html

  * igt@kms_vrr@cmrr@pipe-a-edp-1:
    - shard-lnl:          [PASS][134] -> [FAIL][135] ([Intel XE#4459]) +1 other test fail
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-lnl-5/igt@kms_vrr@cmrr@pipe-a-edp-1.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-3/igt@kms_vrr@cmrr@pipe-a-edp-1.html

  * igt@kms_vrr@flipline:
    - shard-dg2-set2:     NOTRUN -> [SKIP][136] ([Intel XE#455]) +16 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-463/igt@kms_vrr@flipline.html

  * igt@xe_ccs@block-copy-compressed:
    - shard-adlp:         NOTRUN -> [SKIP][137] ([Intel XE#455] / [Intel XE#488])
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-9/igt@xe_ccs@block-copy-compressed.html

  * igt@xe_compute_preempt@compute-preempt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][138] ([Intel XE#1280] / [Intel XE#455]) +3 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-434/igt@xe_compute_preempt@compute-preempt.html

  * igt@xe_compute_preempt@compute-preempt-many-all-ram:
    - shard-adlp:         NOTRUN -> [SKIP][139] ([Intel XE#455]) +2 other tests skip
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-4/igt@xe_compute_preempt@compute-preempt-many-all-ram.html

  * igt@xe_eudebug_online@set-breakpoint-sigint-debugger:
    - shard-adlp:         NOTRUN -> [SKIP][140] ([Intel XE#4837]) +1 other test skip
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-4/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html
    - shard-bmg:          NOTRUN -> [SKIP][141] ([Intel XE#4837]) +3 other tests skip
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-4/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html

  * igt@xe_eudebug_online@writes-caching-sram-bb-sram-target-sram:
    - shard-lnl:          NOTRUN -> [SKIP][142] ([Intel XE#4837]) +3 other tests skip
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-1/igt@xe_eudebug_online@writes-caching-sram-bb-sram-target-sram.html

  * igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram:
    - shard-dg2-set2:     NOTRUN -> [SKIP][143] ([Intel XE#4837]) +8 other tests skip
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-463/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram.html

  * igt@xe_evict@evict-small-external-cm:
    - shard-adlp:         NOTRUN -> [SKIP][144] ([Intel XE#261] / [Intel XE#688])
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-1/igt@xe_evict@evict-small-external-cm.html

  * igt@xe_evict_ccs@evict-overcommit-parallel-nofree-reopen:
    - shard-lnl:          NOTRUN -> [SKIP][145] ([Intel XE#688]) +2 other tests skip
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-3/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-reopen.html
    - shard-adlp:         NOTRUN -> [SKIP][146] ([Intel XE#688])
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-1/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-reopen.html

  * igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen:
    - shard-dg2-set2:     [PASS][147] -> [SKIP][148] ([Intel XE#4208]) +28 other tests skip
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-435/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][149] ([Intel XE#1392]) +3 other tests skip
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-no-exec-basic-defer-bind:
    - shard-bmg:          NOTRUN -> [SKIP][150] ([Intel XE#2322]) +3 other tests skip
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-3/igt@xe_exec_basic@multigpu-no-exec-basic-defer-bind.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr:
    - shard-adlp:         NOTRUN -> [SKIP][151] ([Intel XE#1392]) +1 other test skip
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-2/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind:
    - shard-dg2-set2:     [PASS][152] -> [SKIP][153] ([Intel XE#1392]) +3 other tests skip
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-433/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html

  * igt@xe_exec_fault_mode@invalid-va-scratch-nopagefault:
    - shard-adlp:         NOTRUN -> [SKIP][154] ([Intel XE#288]) +5 other tests skip
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-2/igt@xe_exec_fault_mode@invalid-va-scratch-nopagefault.html

  * igt@xe_exec_fault_mode@once-bindexecqueue-imm:
    - shard-dg2-set2:     NOTRUN -> [SKIP][155] ([Intel XE#288]) +18 other tests skip
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@xe_exec_fault_mode@once-bindexecqueue-imm.html

  * igt@xe_exec_mix_modes@exec-spinner-interrupted-dma-fence:
    - shard-dg2-set2:     NOTRUN -> [SKIP][156] ([Intel XE#2360])
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-434/igt@xe_exec_mix_modes@exec-spinner-interrupted-dma-fence.html

  * igt@xe_exec_system_allocator@process-many-mmap-huge:
    - shard-lnl:          NOTRUN -> [SKIP][157] ([Intel XE#4943]) +6 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-1/igt@xe_exec_system_allocator@process-many-mmap-huge.html

  * igt@xe_exec_system_allocator@threads-many-large-execqueues-malloc-mlock-nomemset:
    - shard-dg2-set2:     NOTRUN -> [SKIP][158] ([Intel XE#4915]) +173 other tests skip
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-466/igt@xe_exec_system_allocator@threads-many-large-execqueues-malloc-mlock-nomemset.html

  * igt@xe_exec_system_allocator@threads-many-mmap-free-huge:
    - shard-bmg:          NOTRUN -> [SKIP][159] ([Intel XE#4943]) +10 other tests skip
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-2/igt@xe_exec_system_allocator@threads-many-mmap-free-huge.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-new-race-nomemset:
    - shard-adlp:         NOTRUN -> [SKIP][160] ([Intel XE#4915]) +51 other tests skip
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-1/igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-new-race-nomemset.html

  * igt@xe_huc_copy@huc_copy:
    - shard-dg2-set2:     NOTRUN -> [SKIP][161] ([Intel XE#255])
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-434/igt@xe_huc_copy@huc_copy.html

  * igt@xe_module_load@force-load:
    - shard-bmg:          NOTRUN -> [SKIP][162] ([Intel XE#2457])
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-8/igt@xe_module_load@force-load.html
    - shard-adlp:         NOTRUN -> [SKIP][163] ([Intel XE#378])
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-8/igt@xe_module_load@force-load.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][164] ([Intel XE#378])
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-433/igt@xe_module_load@force-load.html
    - shard-lnl:          NOTRUN -> [SKIP][165] ([Intel XE#378])
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-3/igt@xe_module_load@force-load.html

  * igt@xe_oa@closed-fd-and-unmapped-access:
    - shard-dg2-set2:     NOTRUN -> [SKIP][166] ([Intel XE#2541] / [Intel XE#3573]) +4 other tests skip
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-464/igt@xe_oa@closed-fd-and-unmapped-access.html

  * igt@xe_oa@syncs-syncobj-cfg:
    - shard-dg2-set2:     NOTRUN -> [SKIP][167] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501])
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@xe_oa@syncs-syncobj-cfg.html

  * igt@xe_pm@d3cold-mmap-vram:
    - shard-dg2-set2:     NOTRUN -> [SKIP][168] ([Intel XE#2284] / [Intel XE#366]) +2 other tests skip
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-463/igt@xe_pm@d3cold-mmap-vram.html
    - shard-lnl:          NOTRUN -> [SKIP][169] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-3/igt@xe_pm@d3cold-mmap-vram.html

  * igt@xe_pm@s3-d3cold-basic-exec:
    - shard-adlp:         NOTRUN -> [SKIP][170] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-3/igt@xe_pm@s3-d3cold-basic-exec.html
    - shard-bmg:          NOTRUN -> [SKIP][171] ([Intel XE#2284]) +1 other test skip
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-3/igt@xe_pm@s3-d3cold-basic-exec.html

  * igt@xe_pm@s3-d3hot-basic-exec:
    - shard-lnl:          NOTRUN -> [SKIP][172] ([Intel XE#584]) +1 other test skip
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-4/igt@xe_pm@s3-d3hot-basic-exec.html

  * igt@xe_pxp@display-pxp-fb:
    - shard-dg2-set2:     NOTRUN -> [SKIP][173] ([Intel XE#4733]) +2 other tests skip
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-433/igt@xe_pxp@display-pxp-fb.html

  * igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][174] ([Intel XE#4733]) +1 other test skip
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-1/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
    - shard-adlp:         NOTRUN -> [SKIP][175] ([Intel XE#4733])
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-3/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html

  * igt@xe_query@multigpu-query-engines:
    - shard-dg2-set2:     NOTRUN -> [SKIP][176] ([Intel XE#944]) +4 other tests skip
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-463/igt@xe_query@multigpu-query-engines.html

  * igt@xe_query@multigpu-query-hwconfig:
    - shard-bmg:          NOTRUN -> [SKIP][177] ([Intel XE#944]) +1 other test skip
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-8/igt@xe_query@multigpu-query-hwconfig.html
    - shard-adlp:         NOTRUN -> [SKIP][178] ([Intel XE#944])
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-8/igt@xe_query@multigpu-query-hwconfig.html

  * igt@xe_query@multigpu-query-topology:
    - shard-lnl:          NOTRUN -> [SKIP][179] ([Intel XE#944]) +1 other test skip
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-7/igt@xe_query@multigpu-query-topology.html

  * igt@xe_render_copy@render-stress-2-copies:
    - shard-adlp:         NOTRUN -> [SKIP][180] ([Intel XE#4814])
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-2/igt@xe_render_copy@render-stress-2-copies.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][181] ([Intel XE#4814])
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-433/igt@xe_render_copy@render-stress-2-copies.html

  * igt@xe_sriov_flr@flr-vf1-clear:
    - shard-dg2-set2:     NOTRUN -> [SKIP][182] ([Intel XE#4208]) +23 other tests skip
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@xe_sriov_flr@flr-vf1-clear.html

  
#### Possible fixes ####

  * igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1:
    - shard-lnl:          [FAIL][183] ([Intel XE#911]) -> [PASS][184] +3 other tests pass
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-lnl-3/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-3/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-adlp:         [DMESG-FAIL][185] ([Intel XE#4543]) -> [PASS][186] +7 other tests pass
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-3/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-1/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-0:
    - shard-adlp:         [SKIP][187] ([Intel XE#2351] / [Intel XE#4947]) -> [PASS][188]
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_big_fb@y-tiled-8bpp-rotate-0.html
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-8/igt@kms_big_fb@y-tiled-8bpp-rotate-0.html

  * igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p:
    - shard-bmg:          [SKIP][189] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][190]
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-4/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [INCOMPLETE][191] ([Intel XE#4345]) -> [PASS][192]
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-466/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs.html
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4:
    - shard-dg2-set2:     [INCOMPLETE][193] ([Intel XE#1727] / [Intel XE#3124]) -> [PASS][194]
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     [DMESG-WARN][195] ([Intel XE#1727] / [Intel XE#3113]) -> [PASS][196]
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
    - shard-bmg:          [DMESG-WARN][197] ([Intel XE#5354]) -> [PASS][198]
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-7/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-2/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-bmg:          [SKIP][199] ([Intel XE#2291]) -> [PASS][200] +3 other tests pass
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-3/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
    - shard-bmg:          [SKIP][201] ([Intel XE#2316]) -> [PASS][202] +6 other tests pass
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-5/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-1/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip@2x-plain-flip-ts-check:
    - shard-bmg:          [FAIL][203] ([Intel XE#2882]) -> [PASS][204] +1 other test pass
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-7/igt@kms_flip@2x-plain-flip-ts-check.html
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-4/igt@kms_flip@2x-plain-flip-ts-check.html

  * igt@kms_flip@blocking-wf_vblank:
    - shard-lnl:          [FAIL][205] ([Intel XE#886]) -> [PASS][206] +1 other test pass
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-lnl-3/igt@kms_flip@blocking-wf_vblank.html
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-2/igt@kms_flip@blocking-wf_vblank.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-lnl:          [FAIL][207] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][208]
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-bmg:          [INCOMPLETE][209] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][210] +1 other test pass
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-3/igt@kms_flip@flip-vs-suspend-interruptible.html
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-5/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@plain-flip-interruptible@b-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][211] ([Intel XE#4543]) -> [PASS][212] +10 other tests pass
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-4/igt@kms_flip@plain-flip-interruptible@b-hdmi-a1.html
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-6/igt@kms_flip@plain-flip-interruptible@b-hdmi-a1.html

  * igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-x:
    - shard-adlp:         [FAIL][213] ([Intel XE#1874]) -> [PASS][214] +1 other test pass
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-2/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-x.html
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-1/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-x.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt:
    - shard-adlp:         [SKIP][215] ([Intel XE#4947]) -> [PASS][216] +1 other test pass
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_lease@setcrtc-implicit-plane:
    - shard-adlp:         [SKIP][217] ([Intel XE#4950]) -> [PASS][218] +8 other tests pass
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_lease@setcrtc-implicit-plane.html
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-3/igt@kms_lease@setcrtc-implicit-plane.html

  * igt@kms_plane_cursor@viewport:
    - shard-dg2-set2:     [FAIL][219] ([Intel XE#616]) -> [PASS][220]
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-432/igt@kms_plane_cursor@viewport.html
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-436/igt@kms_plane_cursor@viewport.html

  * igt@kms_plane_lowres@tiling-none@pipe-c-dp-4:
    - shard-dg2-set2:     [DMESG-WARN][221] -> [PASS][222] +1 other test pass
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-434/igt@kms_plane_lowres@tiling-none@pipe-c-dp-4.html
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-464/igt@kms_plane_lowres@tiling-none@pipe-c-dp-4.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-lnl:          [FAIL][223] ([Intel XE#718]) -> [PASS][224]
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-lnl-6/igt@kms_pm_dc@dc5-psr.html
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-1/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_setmode@invalid-clone-single-crtc-stealing:
    - shard-bmg:          [SKIP][225] ([Intel XE#1435]) -> [PASS][226]
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-2/igt@kms_setmode@invalid-clone-single-crtc-stealing.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
    - shard-dg2-set2:     [SKIP][227] ([Intel XE#1392]) -> [PASS][228] +5 other tests pass
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-463/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html

  * igt@xe_exec_basic@no-exec-bindexecqueue-userptr-rebind:
    - shard-adlp:         [SKIP][229] ([Intel XE#4945]) -> [PASS][230] +9 other tests pass
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@xe_exec_basic@no-exec-bindexecqueue-userptr-rebind.html
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-6/igt@xe_exec_basic@no-exec-bindexecqueue-userptr-rebind.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-new-bo-map-nomemset:
    - shard-lnl:          [FAIL][231] -> [PASS][232]
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-lnl-1/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-new-bo-map-nomemset.html
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-4/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-new-bo-map-nomemset.html

  
#### Warnings ####

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
    - shard-adlp:         [SKIP][233] ([Intel XE#4947]) -> [SKIP][234] ([Intel XE#1124])
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-3/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-90:
    - shard-dg2-set2:     [SKIP][235] ([Intel XE#316]) -> [SKIP][236] ([Intel XE#2231] / [Intel XE#4208])
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-435/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-dg2-set2:     [SKIP][237] ([Intel XE#1124]) -> [SKIP][238] ([Intel XE#2231] / [Intel XE#4208]) +1 other test skip
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-432/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-adlp:         [SKIP][239] ([Intel XE#4947]) -> [SKIP][240] ([Intel XE#607])
   [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
   [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-3/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_bw@linear-tiling-2-displays-2560x1440p:
    - shard-dg2-set2:     [SKIP][241] ([Intel XE#367]) -> [SKIP][242] ([Intel XE#4208] / [i915#2575])
   [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-433/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
   [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html

  * igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs:
    - shard-adlp:         [SKIP][243] ([Intel XE#4947]) -> [SKIP][244] ([Intel XE#455] / [Intel XE#787])
   [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs.html
   [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-3/igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
    - shard-adlp:         [SKIP][245] ([Intel XE#4947]) -> [SKIP][246] ([Intel XE#2907])
   [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
   [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs:
    - shard-dg2-set2:     [SKIP][247] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][248] ([Intel XE#2231] / [Intel XE#4208]) +1 other test skip
   [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-434/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs.html
   [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [INCOMPLETE][249] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124] / [Intel XE#4345]) -> [INCOMPLETE][250] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124])
   [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
   [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
    - shard-dg2-set2:     [INCOMPLETE][251] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [INCOMPLETE][252] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124])
   [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
   [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_chamelium_color@ctm-0-50:
    - shard-dg2-set2:     [SKIP][253] ([Intel XE#306]) -> [SKIP][254] ([Intel XE#4208] / [i915#2575])
   [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-432/igt@kms_chamelium_color@ctm-0-50.html
   [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_chamelium_color@ctm-0-50.html

  * igt@kms_chamelium_edid@dp-edid-resolution-list:
    - shard-adlp:         [SKIP][255] ([Intel XE#4950]) -> [SKIP][256] ([Intel XE#373]) +1 other test skip
   [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_chamelium_edid@dp-edid-resolution-list.html
   [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-1/igt@kms_chamelium_edid@dp-edid-resolution-list.html

  * igt@kms_chamelium_edid@hdmi-edid-change-during-suspend:
    - shard-dg2-set2:     [SKIP][257] ([Intel XE#373]) -> [SKIP][258] ([Intel XE#4208] / [i915#2575]) +2 other tests skip
   [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-436/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html
   [258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html

  * igt@kms_content_protection@atomic:
    - shard-dg2-set2:     [FAIL][259] ([Intel XE#1178]) -> [SKIP][260] ([Intel XE#4208] / [i915#2575])
   [259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-436/igt@kms_content_protection@atomic.html
   [260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@srm:
    - shard-bmg:          [FAIL][261] ([Intel XE#1178]) -> [SKIP][262] ([Intel XE#2341])
   [261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-4/igt@kms_content_protection@srm.html
   [262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-6/igt@kms_content_protection@srm.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-lnl:          [FAIL][263] ([Intel XE#301] / [Intel XE#3149]) -> [FAIL][264] ([Intel XE#301])
   [263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank.html
   [264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-adlp:         [DMESG-WARN][265] ([Intel XE#4543]) -> [DMESG-WARN][266] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4543])
   [265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-8/igt@kms_flip@flip-vs-suspend.html
   [266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-4/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend@b-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][267] ([Intel XE#4543]) -> [DMESG-WARN][268] ([Intel XE#2953] / [Intel XE#4173])
   [267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-8/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
   [268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-4/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
    - shard-dg2-set2:     [SKIP][269] ([Intel XE#455]) -> [SKIP][270] ([Intel XE#2231] / [Intel XE#4208])
   [269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-433/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
   [270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw:
    - shard-bmg:          [SKIP][271] ([Intel XE#2311]) -> [SKIP][272] ([Intel XE#2312]) +11 other tests skip
   [271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
   [272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen:
    - shard-dg2-set2:     [SKIP][273] ([Intel XE#651]) -> [SKIP][274] ([Intel XE#2231] / [Intel XE#4208]) +4 other tests skip
   [273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html
   [274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@drrs-rgb565-draw-mmap-wc:
    - shard-adlp:         [SKIP][275] ([Intel XE#4947]) -> [SKIP][276] ([Intel XE#651]) +1 other test skip
   [275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-mmap-wc.html
   [276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-8/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
    - shard-adlp:         [SKIP][277] ([Intel XE#2351] / [Intel XE#4947]) -> [SKIP][278] ([Intel XE#656])
   [277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
   [278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
    - shard-bmg:          [SKIP][279] ([Intel XE#4141]) -> [SKIP][280] ([Intel XE#2312]) +8 other tests skip
   [279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
   [280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          [SKIP][281] ([Intel XE#2312]) -> [SKIP][282] ([Intel XE#4141]) +5 other tests skip
   [281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
   [282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][283] ([Intel XE#2312]) -> [SKIP][284] ([Intel XE#2311]) +13 other tests skip
   [283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
   [284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
    - shard-adlp:         [SKIP][285] ([Intel XE#4947]) -> [SKIP][286] ([Intel XE#656]) +4 other tests skip
   [285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
   [286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - shard-dg2-set2:     [SKIP][287] ([Intel XE#658]) -> [SKIP][288] ([Intel XE#2231] / [Intel XE#4208])
   [287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-463/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
   [288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
    - shard-dg2-set2:     [SKIP][289] ([Intel XE#653]) -> [SKIP][290] ([Intel XE#2231] / [Intel XE#4208]) +6 other tests skip
   [289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html
   [290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt:
    - shard-bmg:          [SKIP][291] ([Intel XE#2313]) -> [SKIP][292] ([Intel XE#2312]) +10 other tests skip
   [291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt.html
   [292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen:
    - shard-bmg:          [SKIP][293] ([Intel XE#2312]) -> [SKIP][294] ([Intel XE#2313]) +13 other tests skip
   [293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html
   [294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-blt:
    - shard-adlp:         [SKIP][295] ([Intel XE#4947]) -> [SKIP][296] ([Intel XE#653])
   [295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_frontbuffer_tracking@psr-rgb565-draw-blt.html
   [296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-2/igt@kms_frontbuffer_tracking@psr-rgb565-draw-blt.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-lnl:          [SKIP][297] ([Intel XE#1909]) -> [SKIP][298] ([Intel XE#736])
   [297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-lnl-2/igt@kms_pm_dc@dc3co-vpb-simulation.html
   [298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-4/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-dg2-set2:     [SKIP][299] ([Intel XE#3309]) -> [SKIP][300] ([Intel XE#2231] / [Intel XE#4208])
   [299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-435/igt@kms_pm_dc@dc5-retention-flops.html
   [300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-dg2-set2:     [SKIP][301] ([Intel XE#1489]) -> [SKIP][302] ([Intel XE#2231] / [Intel XE#4208]) +1 other test skip
   [301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-434/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html
   [302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-lnl:          [SKIP][303] ([Intel XE#2893]) -> [SKIP][304] ([Intel XE#1489])
   [303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-lnl-3/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf.html
   [304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-lnl-4/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-adlp:         [SKIP][305] ([Intel XE#4947]) -> [SKIP][306] ([Intel XE#1122])
   [305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_psr2_su@page_flip-p010.html
   [306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-3/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@fbc-pr-dpms:
    - shard-dg2-set2:     [SKIP][307] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][308] ([Intel XE#2231] / [Intel XE#4208]) +2 other tests skip
   [307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-433/igt@kms_psr@fbc-pr-dpms.html
   [308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_psr@fbc-pr-dpms.html

  * igt@kms_psr@psr2-cursor-plane-move:
    - shard-adlp:         [SKIP][309] ([Intel XE#4947]) -> [SKIP][310] ([Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@kms_psr@psr2-cursor-plane-move.html
   [310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-9/igt@kms_psr@psr2-cursor-plane-move.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-dg2-set2:     [SKIP][311] ([Intel XE#1127]) -> [SKIP][312] ([Intel XE#4208] / [i915#2575])
   [311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-433/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
   [312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_setmode@invalid-clone-exclusive-crtc:
    - shard-dg2-set2:     [SKIP][313] ([Intel XE#455]) -> [SKIP][314] ([Intel XE#4208] / [i915#2575])
   [313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-435/igt@kms_setmode@invalid-clone-exclusive-crtc.html
   [314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@kms_setmode@invalid-clone-exclusive-crtc.html

  * igt@xe_eu_stall@invalid-gt-id:
    - shard-dg2-set2:     [SKIP][315] -> [SKIP][316] ([Intel XE#4208])
   [315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-433/igt@xe_eu_stall@invalid-gt-id.html
   [316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@xe_eu_stall@invalid-gt-id.html

  * igt@xe_eudebug@basic-vm-access-userptr:
    - shard-adlp:         [SKIP][317] ([Intel XE#4945]) -> [SKIP][318] ([Intel XE#4837]) +1 other test skip
   [317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@xe_eudebug@basic-vm-access-userptr.html
   [318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-8/igt@xe_eudebug@basic-vm-access-userptr.html

  * igt@xe_eudebug@basic-vm-access-userptr-faultable:
    - shard-dg2-set2:     [SKIP][319] ([Intel XE#4837]) -> [SKIP][320] ([Intel XE#4208]) +1 other test skip
   [319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-432/igt@xe_eudebug@basic-vm-access-userptr-faultable.html
   [320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@xe_eudebug@basic-vm-access-userptr-faultable.html

  * igt@xe_exec_basic@multigpu-no-exec-null-rebind:
    - shard-adlp:         [SKIP][321] ([Intel XE#4945]) -> [SKIP][322] ([Intel XE#1392])
   [321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@xe_exec_basic@multigpu-no-exec-null-rebind.html
   [322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-6/igt@xe_exec_basic@multigpu-no-exec-null-rebind.html

  * igt@xe_exec_fault_mode@many-basic-imm:
    - shard-adlp:         [SKIP][323] ([Intel XE#4945]) -> [SKIP][324] ([Intel XE#288]) +2 other tests skip
   [323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@xe_exec_fault_mode@many-basic-imm.html
   [324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-6/igt@xe_exec_fault_mode@many-basic-imm.html

  * igt@xe_exec_fault_mode@twice-userptr-rebind-imm:
    - shard-dg2-set2:     [SKIP][325] ([Intel XE#288]) -> [SKIP][326] ([Intel XE#4208]) +3 other tests skip
   [325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-434/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html
   [326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html

  * igt@xe_exec_system_allocator@threads-many-large-mmap:
    - shard-dg2-set2:     [SKIP][327] ([Intel XE#4915]) -> [SKIP][328] ([Intel XE#4208]) +44 other tests skip
   [327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-432/igt@xe_exec_system_allocator@threads-many-large-mmap.html
   [328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@xe_exec_system_allocator@threads-many-large-mmap.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-file-nomemset:
    - shard-adlp:         [SKIP][329] ([Intel XE#4945]) -> [SKIP][330] ([Intel XE#4915]) +24 other tests skip
   [329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-adlp-9/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-file-nomemset.html
   [330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-adlp-4/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-file-nomemset.html

  * igt@xe_mmap@small-bar:
    - shard-dg2-set2:     [SKIP][331] ([Intel XE#512]) -> [SKIP][332] ([Intel XE#4208])
   [331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-434/igt@xe_mmap@small-bar.html
   [332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@xe_mmap@small-bar.html

  * igt@xe_oa@invalid-oa-format-id:
    - shard-dg2-set2:     [SKIP][333] ([Intel XE#2541] / [Intel XE#3573]) -> [SKIP][334] ([Intel XE#4208])
   [333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-436/igt@xe_oa@invalid-oa-format-id.html
   [334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@xe_oa@invalid-oa-format-id.html

  * igt@xe_oa@syncs-ufence-wait:
    - shard-dg2-set2:     [SKIP][335] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501]) -> [SKIP][336] ([Intel XE#4208])
   [335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43/shard-dg2-433/igt@xe_oa@syncs-ufence-wait.html
   [336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/shard-dg2-432/igt@xe_oa@syncs-ufence-wait.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1477]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1477
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
  [Intel XE#1909]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1909
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
  [Intel XE#2231]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2231
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
  [Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
  [Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
  [Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
  [Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
  [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
  [Intel XE#352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/352
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4208
  [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
  [Intel XE#4329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4329
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4359]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4359
  [Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
  [Intel XE#4501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4501
  [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4683]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4683
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4921]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4921
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#4945]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4945
  [Intel XE#4947]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4947
  [Intel XE#4950]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4950
  [Intel XE#512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/512
  [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
  [Intel XE#5376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5376
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
  [Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
  [Intel XE#736]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/736
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
  [Intel XE#911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/911
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575


Build changes
-------------

  * IGT: IGT_8437 -> IGT_8438
  * Linux: xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43 -> xe-pw-151140v1

  IGT_8437: edd059dcd65215c4deda2a59e47357148e856d51 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8438: 8438
  xe-3343-310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43: 310881baa8e5c97ebd7cc0c6eb01ab6672d8cf43
  xe-pw-151140v1: 151140v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151140v1/index.html

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