* [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL from mode vtotal
@ 2026-06-17 4:58 Mitul Golani
2026-06-17 5:57 ` ✓ CI.KUnit: success for drm/i915/display: Program TRANS_VTOTAL from mode vtotal (rev4) Patchwork
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Mitul Golani @ 2026-06-17 4:58 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, ankit.k.nautiyal, ville.syrjala, suraj.kandpal
There are monitors being sensitive to MSA and end up
blanking out when we override Vtotal, DP transcoder
uses TRANS_VTOTAL to derive MSA VTotal. Avoid overriding
crtc_vtotal to 1 on platform which supports VRR Timing
generator and always program VTOTAL from mode timing in
transcoder timing paths.
--v2:
- Remove write to crtc_state->hw.adjusted_mode.crtc_vtotal
during intel_vrr_get_config. (Ankit)
- Fix merge conflicts.
Bspec: 70001
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 17 -----------------
drivers/gpu/drm/i915/display/intel_vrr.c | 10 ----------
2 files changed, 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e76aa6c8dab6..42eb4c5bc9b6 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2737,15 +2737,6 @@ void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_state,
HSYNC_START(adjusted_mode->crtc_hsync_start - 1) |
HSYNC_END(adjusted_mode->crtc_hsync_end - 1));
- /*
- * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
- * bits are not required. Since the support for these bits is going to
- * be deprecated in upcoming platforms, avoid writing these bits for the
- * platforms that do not use legacy Timing Generator.
- */
- if (intel_vrr_always_use_vrr_tg(display))
- crtc_vtotal = 1;
-
intel_de_write(display, TRANS_VTOTAL(display, transcoder),
VACTIVE(crtc_vdisplay - 1) |
VTOTAL(crtc_vtotal - 1));
@@ -2834,14 +2825,6 @@ void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc_state,
intel_de_write(display, TRANS_VSYNC(display, transcoder),
VSYNC_START(adjusted_mode->crtc_vsync_start - 1) |
VSYNC_END(adjusted_mode->crtc_vsync_end - 1));
- /*
- * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
- * bits are not required. Since the support for these bits is going to
- * be deprecated in upcoming platforms, avoid writing these bits for the
- * platforms that do not use legacy Timing Generator.
- */
- if (intel_vrr_always_use_vrr_tg(display))
- crtc_vtotal = 1;
/*
* The double buffer latch point for TRANS_VTOTAL
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index cd380fe8fd01..5d9b11185296 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -1102,16 +1102,6 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
crtc_state->vrr.vmin += intel_vrr_vmin_flipline_offset(display);
}
- /*
- * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
- * bits are not filled. Since for these platforms TRAN_VMIN is always
- * filled with crtc_vtotal, use TRAN_VRR_VMIN to get the vtotal for
- * adjusted_mode.
- */
- if (intel_vrr_always_use_vrr_tg(display))
- crtc_state->hw.adjusted_mode.crtc_vtotal =
- intel_vrr_vmin_vtotal(crtc_state);
-
if (HAS_AS_SDP(display)) {
trans_vrr_vsync =
intel_de_read(display,
--
2.48.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* ✓ CI.KUnit: success for drm/i915/display: Program TRANS_VTOTAL from mode vtotal (rev4)
2026-06-17 4:58 [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL from mode vtotal Mitul Golani
@ 2026-06-17 5:57 ` Patchwork
2026-06-17 6:35 ` ✓ Xe.CI.BAT: " Patchwork
` (2 subsequent siblings)
3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2026-06-17 5:57 UTC (permalink / raw)
To: Golani, Mitulkumar Ajitkumar; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: Program TRANS_VTOTAL from mode vtotal (rev4)
URL : https://patchwork.freedesktop.org/series/168577/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[05:56:41] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:56:45] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:57:16] Starting KUnit Kernel (1/1)...
[05:57:16] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:57:17] ================== guc_buf (11 subtests) ===================
[05:57:17] [PASSED] test_smallest
[05:57:17] [PASSED] test_largest
[05:57:17] [PASSED] test_granular
[05:57:17] [PASSED] test_unique
[05:57:17] [PASSED] test_overlap
[05:57:17] [PASSED] test_reusable
[05:57:17] [PASSED] test_too_big
[05:57:17] [PASSED] test_flush
[05:57:17] [PASSED] test_lookup
[05:57:17] [PASSED] test_data
[05:57:17] [PASSED] test_class
[05:57:17] ===================== [PASSED] guc_buf =====================
[05:57:17] =================== guc_dbm (7 subtests) ===================
[05:57:17] [PASSED] test_empty
[05:57:17] [PASSED] test_default
[05:57:17] ======================== test_size ========================
[05:57:17] [PASSED] 4
[05:57:17] [PASSED] 8
[05:57:17] [PASSED] 32
[05:57:17] [PASSED] 256
[05:57:17] ==================== [PASSED] test_size ====================
[05:57:17] ======================= test_reuse ========================
[05:57:17] [PASSED] 4
[05:57:17] [PASSED] 8
[05:57:17] [PASSED] 32
[05:57:17] [PASSED] 256
[05:57:17] =================== [PASSED] test_reuse ====================
[05:57:17] =================== test_range_overlap ====================
[05:57:17] [PASSED] 4
[05:57:17] [PASSED] 8
[05:57:17] [PASSED] 32
[05:57:17] [PASSED] 256
[05:57:17] =============== [PASSED] test_range_overlap ================
[05:57:17] =================== test_range_compact ====================
[05:57:17] [PASSED] 4
[05:57:17] [PASSED] 8
[05:57:17] [PASSED] 32
[05:57:17] [PASSED] 256
[05:57:17] =============== [PASSED] test_range_compact ================
[05:57:17] ==================== test_range_spare =====================
[05:57:17] [PASSED] 4
[05:57:17] [PASSED] 8
[05:57:17] [PASSED] 32
[05:57:17] [PASSED] 256
[05:57:17] ================ [PASSED] test_range_spare =================
[05:57:17] ===================== [PASSED] guc_dbm =====================
[05:57:17] =================== guc_idm (6 subtests) ===================
[05:57:17] [PASSED] bad_init
[05:57:17] [PASSED] no_init
[05:57:17] [PASSED] init_fini
[05:57:17] [PASSED] check_used
[05:57:17] [PASSED] check_quota
[05:57:17] [PASSED] check_all
[05:57:17] ===================== [PASSED] guc_idm =====================
[05:57:17] ================== no_relay (3 subtests) ===================
[05:57:17] [PASSED] xe_drops_guc2pf_if_not_ready
[05:57:17] [PASSED] xe_drops_guc2vf_if_not_ready
[05:57:17] [PASSED] xe_rejects_send_if_not_ready
[05:57:17] ==================== [PASSED] no_relay =====================
[05:57:17] ================== pf_relay (14 subtests) ==================
[05:57:17] [PASSED] pf_rejects_guc2pf_too_short
[05:57:17] [PASSED] pf_rejects_guc2pf_too_long
[05:57:17] [PASSED] pf_rejects_guc2pf_no_payload
[05:57:17] [PASSED] pf_fails_no_payload
[05:57:17] [PASSED] pf_fails_bad_origin
[05:57:17] [PASSED] pf_fails_bad_type
[05:57:17] [PASSED] pf_txn_reports_error
[05:57:17] [PASSED] pf_txn_sends_pf2guc
[05:57:17] [PASSED] pf_sends_pf2guc
[05:57:17] [SKIPPED] pf_loopback_nop
[05:57:17] [SKIPPED] pf_loopback_echo
[05:57:17] [SKIPPED] pf_loopback_fail
[05:57:17] [SKIPPED] pf_loopback_busy
[05:57:17] [SKIPPED] pf_loopback_retry
[05:57:17] ==================== [PASSED] pf_relay =====================
[05:57:17] ================== vf_relay (3 subtests) ===================
[05:57:17] [PASSED] vf_rejects_guc2vf_too_short
[05:57:17] [PASSED] vf_rejects_guc2vf_too_long
[05:57:17] [PASSED] vf_rejects_guc2vf_no_payload
[05:57:17] ==================== [PASSED] vf_relay =====================
[05:57:17] ================ pf_gt_config (9 subtests) =================
[05:57:17] [PASSED] fair_contexts_1vf
[05:57:17] [PASSED] fair_doorbells_1vf
[05:57:17] [PASSED] fair_ggtt_1vf
[05:57:17] ====================== fair_vram_1vf ======================
[05:57:17] [PASSED] 3.50 GiB
[05:57:17] [PASSED] 11.5 GiB
[05:57:17] [PASSED] 15.5 GiB
[05:57:17] [PASSED] 31.5 GiB
[05:57:17] [PASSED] 63.5 GiB
[05:57:17] [PASSED] 1.91 GiB
[05:57:17] ================== [PASSED] fair_vram_1vf ==================
[05:57:17] ================ fair_vram_1vf_admin_only =================
[05:57:17] [PASSED] 3.50 GiB
[05:57:17] [PASSED] 11.5 GiB
[05:57:17] [PASSED] 15.5 GiB
[05:57:17] [PASSED] 31.5 GiB
[05:57:17] [PASSED] 63.5 GiB
[05:57:17] [PASSED] 1.91 GiB
[05:57:17] ============ [PASSED] fair_vram_1vf_admin_only =============
[05:57:17] ====================== fair_contexts ======================
[05:57:17] [PASSED] 1 VF
[05:57:17] [PASSED] 2 VFs
[05:57:17] [PASSED] 3 VFs
[05:57:17] [PASSED] 4 VFs
[05:57:17] [PASSED] 5 VFs
[05:57:17] [PASSED] 6 VFs
[05:57:17] [PASSED] 7 VFs
[05:57:17] [PASSED] 8 VFs
[05:57:17] [PASSED] 9 VFs
[05:57:17] [PASSED] 10 VFs
[05:57:17] [PASSED] 11 VFs
[05:57:17] [PASSED] 12 VFs
[05:57:17] [PASSED] 13 VFs
[05:57:17] [PASSED] 14 VFs
[05:57:17] [PASSED] 15 VFs
[05:57:17] [PASSED] 16 VFs
[05:57:17] [PASSED] 17 VFs
[05:57:17] [PASSED] 18 VFs
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[05:57:17] [PASSED] 29 VFs
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[05:57:17] [PASSED] 33 VFs
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[05:57:17] [PASSED] 35 VFs
[05:57:17] [PASSED] 36 VFs
[05:57:17] [PASSED] 37 VFs
[05:57:17] [PASSED] 38 VFs
[05:57:17] [PASSED] 39 VFs
[05:57:17] [PASSED] 40 VFs
[05:57:17] [PASSED] 41 VFs
[05:57:17] [PASSED] 42 VFs
[05:57:17] [PASSED] 43 VFs
[05:57:17] [PASSED] 44 VFs
[05:57:17] [PASSED] 45 VFs
[05:57:17] [PASSED] 46 VFs
[05:57:17] [PASSED] 47 VFs
[05:57:17] [PASSED] 48 VFs
[05:57:17] [PASSED] 49 VFs
[05:57:17] [PASSED] 50 VFs
[05:57:17] [PASSED] 51 VFs
[05:57:17] [PASSED] 52 VFs
[05:57:17] [PASSED] 53 VFs
[05:57:17] [PASSED] 54 VFs
[05:57:17] [PASSED] 55 VFs
[05:57:17] [PASSED] 56 VFs
[05:57:17] [PASSED] 57 VFs
[05:57:17] [PASSED] 58 VFs
[05:57:17] [PASSED] 59 VFs
[05:57:17] [PASSED] 60 VFs
[05:57:17] [PASSED] 61 VFs
[05:57:17] [PASSED] 62 VFs
[05:57:17] [PASSED] 63 VFs
[05:57:17] ================== [PASSED] fair_contexts ==================
[05:57:17] ===================== fair_doorbells ======================
[05:57:17] [PASSED] 1 VF
[05:57:17] [PASSED] 2 VFs
[05:57:17] [PASSED] 3 VFs
[05:57:17] [PASSED] 4 VFs
[05:57:17] [PASSED] 5 VFs
[05:57:17] [PASSED] 6 VFs
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[05:57:17] [PASSED] 8 VFs
[05:57:17] [PASSED] 9 VFs
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[05:57:17] [PASSED] 11 VFs
[05:57:17] [PASSED] 12 VFs
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[05:57:17] [PASSED] 18 VFs
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[05:57:17] [PASSED] 27 VFs
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[05:57:17] [PASSED] 29 VFs
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[05:57:17] [PASSED] 33 VFs
[05:57:17] [PASSED] 34 VFs
[05:57:17] [PASSED] 35 VFs
[05:57:17] [PASSED] 36 VFs
[05:57:17] [PASSED] 37 VFs
[05:57:17] [PASSED] 38 VFs
[05:57:17] [PASSED] 39 VFs
[05:57:17] [PASSED] 40 VFs
[05:57:17] [PASSED] 41 VFs
[05:57:17] [PASSED] 42 VFs
[05:57:17] [PASSED] 43 VFs
[05:57:17] [PASSED] 44 VFs
[05:57:17] [PASSED] 45 VFs
[05:57:17] [PASSED] 46 VFs
[05:57:17] [PASSED] 47 VFs
[05:57:17] [PASSED] 48 VFs
[05:57:17] [PASSED] 49 VFs
[05:57:17] [PASSED] 50 VFs
[05:57:17] [PASSED] 51 VFs
[05:57:17] [PASSED] 52 VFs
[05:57:17] [PASSED] 53 VFs
[05:57:17] [PASSED] 54 VFs
[05:57:17] [PASSED] 55 VFs
[05:57:17] [PASSED] 56 VFs
[05:57:17] [PASSED] 57 VFs
[05:57:17] [PASSED] 58 VFs
[05:57:17] [PASSED] 59 VFs
[05:57:17] [PASSED] 60 VFs
[05:57:17] [PASSED] 61 VFs
[05:57:17] [PASSED] 62 VFs
[05:57:17] [PASSED] 63 VFs
[05:57:17] ================= [PASSED] fair_doorbells ==================
[05:57:17] ======================== fair_ggtt ========================
[05:57:17] [PASSED] 1 VF
[05:57:17] [PASSED] 2 VFs
[05:57:17] [PASSED] 3 VFs
[05:57:17] [PASSED] 4 VFs
[05:57:17] [PASSED] 5 VFs
[05:57:17] [PASSED] 6 VFs
[05:57:17] [PASSED] 7 VFs
[05:57:17] [PASSED] 8 VFs
[05:57:17] [PASSED] 9 VFs
[05:57:17] [PASSED] 10 VFs
[05:57:17] [PASSED] 11 VFs
[05:57:17] [PASSED] 12 VFs
[05:57:17] [PASSED] 13 VFs
[05:57:17] [PASSED] 14 VFs
[05:57:17] [PASSED] 15 VFs
[05:57:17] [PASSED] 16 VFs
[05:57:17] [PASSED] 17 VFs
[05:57:17] [PASSED] 18 VFs
[05:57:17] [PASSED] 19 VFs
[05:57:17] [PASSED] 20 VFs
[05:57:17] [PASSED] 21 VFs
[05:57:17] [PASSED] 22 VFs
[05:57:17] [PASSED] 23 VFs
[05:57:17] [PASSED] 24 VFs
[05:57:17] [PASSED] 25 VFs
[05:57:17] [PASSED] 26 VFs
[05:57:17] [PASSED] 27 VFs
[05:57:17] [PASSED] 28 VFs
[05:57:17] [PASSED] 29 VFs
[05:57:17] [PASSED] 30 VFs
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[05:57:17] [PASSED] 32 VFs
[05:57:17] [PASSED] 33 VFs
[05:57:17] [PASSED] 34 VFs
[05:57:17] [PASSED] 35 VFs
[05:57:17] [PASSED] 36 VFs
[05:57:17] [PASSED] 37 VFs
[05:57:17] [PASSED] 38 VFs
[05:57:17] [PASSED] 39 VFs
[05:57:17] [PASSED] 40 VFs
[05:57:17] [PASSED] 41 VFs
[05:57:17] [PASSED] 42 VFs
[05:57:17] [PASSED] 43 VFs
[05:57:17] [PASSED] 44 VFs
[05:57:17] [PASSED] 45 VFs
[05:57:17] [PASSED] 46 VFs
[05:57:17] [PASSED] 47 VFs
[05:57:17] [PASSED] 48 VFs
[05:57:17] [PASSED] 49 VFs
[05:57:17] [PASSED] 50 VFs
[05:57:17] [PASSED] 51 VFs
[05:57:17] [PASSED] 52 VFs
[05:57:17] [PASSED] 53 VFs
[05:57:17] [PASSED] 54 VFs
[05:57:17] [PASSED] 55 VFs
[05:57:17] [PASSED] 56 VFs
[05:57:17] [PASSED] 57 VFs
[05:57:17] [PASSED] 58 VFs
[05:57:17] [PASSED] 59 VFs
[05:57:17] [PASSED] 60 VFs
[05:57:17] [PASSED] 61 VFs
[05:57:17] [PASSED] 62 VFs
[05:57:17] [PASSED] 63 VFs
[05:57:17] ==================== [PASSED] fair_ggtt ====================
[05:57:17] ======================== fair_vram ========================
[05:57:17] [PASSED] 1 VF
[05:57:17] [PASSED] 2 VFs
[05:57:17] [PASSED] 3 VFs
[05:57:17] [PASSED] 4 VFs
[05:57:17] [PASSED] 5 VFs
[05:57:17] [PASSED] 6 VFs
[05:57:17] [PASSED] 7 VFs
[05:57:17] [PASSED] 8 VFs
[05:57:17] [PASSED] 9 VFs
[05:57:17] [PASSED] 10 VFs
[05:57:17] [PASSED] 11 VFs
[05:57:17] [PASSED] 12 VFs
[05:57:17] [PASSED] 13 VFs
[05:57:17] [PASSED] 14 VFs
[05:57:17] [PASSED] 15 VFs
[05:57:17] [PASSED] 16 VFs
[05:57:17] [PASSED] 17 VFs
[05:57:17] [PASSED] 18 VFs
[05:57:17] [PASSED] 19 VFs
[05:57:17] [PASSED] 20 VFs
[05:57:17] [PASSED] 21 VFs
[05:57:17] [PASSED] 22 VFs
[05:57:17] [PASSED] 23 VFs
[05:57:17] [PASSED] 24 VFs
[05:57:17] [PASSED] 25 VFs
[05:57:17] [PASSED] 26 VFs
[05:57:17] [PASSED] 27 VFs
[05:57:17] [PASSED] 28 VFs
[05:57:17] [PASSED] 29 VFs
[05:57:17] [PASSED] 30 VFs
[05:57:17] [PASSED] 31 VFs
[05:57:17] [PASSED] 32 VFs
[05:57:17] [PASSED] 33 VFs
[05:57:17] [PASSED] 34 VFs
[05:57:17] [PASSED] 35 VFs
[05:57:17] [PASSED] 36 VFs
[05:57:17] [PASSED] 37 VFs
[05:57:17] [PASSED] 38 VFs
[05:57:17] [PASSED] 39 VFs
[05:57:17] [PASSED] 40 VFs
[05:57:17] [PASSED] 41 VFs
[05:57:17] [PASSED] 42 VFs
[05:57:17] [PASSED] 43 VFs
[05:57:17] [PASSED] 44 VFs
[05:57:17] [PASSED] 45 VFs
[05:57:17] [PASSED] 46 VFs
[05:57:17] [PASSED] 47 VFs
[05:57:17] [PASSED] 48 VFs
[05:57:17] [PASSED] 49 VFs
[05:57:17] [PASSED] 50 VFs
[05:57:17] [PASSED] 51 VFs
[05:57:17] [PASSED] 52 VFs
[05:57:17] [PASSED] 53 VFs
[05:57:17] [PASSED] 54 VFs
[05:57:17] [PASSED] 55 VFs
[05:57:17] [PASSED] 56 VFs
[05:57:17] [PASSED] 57 VFs
[05:57:17] [PASSED] 58 VFs
[05:57:17] [PASSED] 59 VFs
[05:57:17] [PASSED] 60 VFs
[05:57:17] [PASSED] 61 VFs
[05:57:17] [PASSED] 62 VFs
[05:57:17] [PASSED] 63 VFs
[05:57:17] ==================== [PASSED] fair_vram ====================
[05:57:17] ================== [PASSED] pf_gt_config ===================
[05:57:17] ===================== lmtt (1 subtest) =====================
[05:57:17] ======================== test_ops =========================
[05:57:17] [PASSED] 2-level
[05:57:17] [PASSED] multi-level
[05:57:17] ==================== [PASSED] test_ops =====================
[05:57:17] ====================== [PASSED] lmtt =======================
[05:57:17] ================= pf_service (11 subtests) =================
[05:57:17] [PASSED] pf_negotiate_any
[05:57:17] [PASSED] pf_negotiate_base_match
[05:57:17] [PASSED] pf_negotiate_base_newer
[05:57:17] [PASSED] pf_negotiate_base_next
[05:57:17] [SKIPPED] pf_negotiate_base_older
[05:57:17] [PASSED] pf_negotiate_base_prev
[05:57:17] [PASSED] pf_negotiate_latest_match
[05:57:17] [PASSED] pf_negotiate_latest_newer
[05:57:17] [PASSED] pf_negotiate_latest_next
[05:57:17] [SKIPPED] pf_negotiate_latest_older
[05:57:17] [SKIPPED] pf_negotiate_latest_prev
[05:57:17] =================== [PASSED] pf_service ====================
[05:57:17] ================= xe_guc_g2g (2 subtests) ==================
[05:57:17] ============== xe_live_guc_g2g_kunit_default ==============
[05:57:17] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[05:57:17] ============== xe_live_guc_g2g_kunit_allmem ===============
[05:57:17] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[05:57:17] =================== [SKIPPED] xe_guc_g2g ===================
[05:57:17] =================== xe_mocs (2 subtests) ===================
[05:57:17] ================ xe_live_mocs_kernel_kunit ================
[05:57:17] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[05:57:17] ================ xe_live_mocs_reset_kunit =================
[05:57:17] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[05:57:17] ==================== [SKIPPED] xe_mocs =====================
[05:57:17] ================= xe_migrate (2 subtests) ==================
[05:57:17] ================= xe_migrate_sanity_kunit =================
[05:57:17] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[05:57:17] ================== xe_validate_ccs_kunit ==================
[05:57:17] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[05:57:17] =================== [SKIPPED] xe_migrate ===================
[05:57:17] ================== xe_dma_buf (1 subtest) ==================
[05:57:17] ==================== xe_dma_buf_kunit =====================
[05:57:17] ================ [SKIPPED] xe_dma_buf_kunit ================
[05:57:17] =================== [SKIPPED] xe_dma_buf ===================
[05:57:17] ================= xe_bo_shrink (1 subtest) =================
[05:57:17] =================== xe_bo_shrink_kunit ====================
[05:57:17] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[05:57:17] ================== [SKIPPED] xe_bo_shrink ==================
[05:57:17] ==================== xe_bo (2 subtests) ====================
[05:57:17] ================== xe_ccs_migrate_kunit ===================
[05:57:17] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[05:57:17] ==================== xe_bo_evict_kunit ====================
[05:57:17] =============== [SKIPPED] xe_bo_evict_kunit ================
[05:57:17] ===================== [SKIPPED] xe_bo ======================
[05:57:17] ==================== args (13 subtests) ====================
[05:57:17] [PASSED] count_args_test
[05:57:17] [PASSED] call_args_example
[05:57:17] [PASSED] call_args_test
[05:57:17] [PASSED] drop_first_arg_example
[05:57:17] [PASSED] drop_first_arg_test
[05:57:17] [PASSED] first_arg_example
[05:57:17] [PASSED] first_arg_test
[05:57:17] [PASSED] last_arg_example
[05:57:17] [PASSED] last_arg_test
[05:57:17] [PASSED] pick_arg_example
[05:57:17] [PASSED] if_args_example
[05:57:17] [PASSED] if_args_test
[05:57:17] [PASSED] sep_comma_example
[05:57:17] ====================== [PASSED] args =======================
[05:57:17] =================== xe_pci (3 subtests) ====================
[05:57:17] ==================== check_graphics_ip ====================
[05:57:17] [PASSED] 12.00 Xe_LP
[05:57:17] [PASSED] 12.10 Xe_LP+
[05:57:17] [PASSED] 12.55 Xe_HPG
[05:57:17] [PASSED] 12.60 Xe_HPC
[05:57:17] [PASSED] 12.70 Xe_LPG
[05:57:17] [PASSED] 12.71 Xe_LPG
[05:57:17] [PASSED] 12.74 Xe_LPG+
[05:57:17] [PASSED] 20.01 Xe2_HPG
[05:57:17] [PASSED] 20.02 Xe2_HPG
[05:57:17] [PASSED] 20.04 Xe2_LPG
[05:57:17] [PASSED] 30.00 Xe3_LPG
[05:57:17] [PASSED] 30.01 Xe3_LPG
[05:57:17] [PASSED] 30.03 Xe3_LPG
[05:57:17] [PASSED] 30.04 Xe3_LPG
[05:57:17] [PASSED] 30.05 Xe3_LPG
[05:57:17] [PASSED] 35.10 Xe3p_LPG
[05:57:17] [PASSED] 35.11 Xe3p_XPC
[05:57:17] ================ [PASSED] check_graphics_ip ================
[05:57:17] ===================== check_media_ip ======================
[05:57:17] [PASSED] 12.00 Xe_M
[05:57:17] [PASSED] 12.55 Xe_HPM
[05:57:17] [PASSED] 13.00 Xe_LPM+
[05:57:17] [PASSED] 13.01 Xe2_HPM
[05:57:17] [PASSED] 20.00 Xe2_LPM
[05:57:17] [PASSED] 30.00 Xe3_LPM
[05:57:17] [PASSED] 30.02 Xe3_LPM
[05:57:17] [PASSED] 35.00 Xe3p_LPM
[05:57:17] [PASSED] 35.03 Xe3p_HPM
[05:57:17] ================= [PASSED] check_media_ip ==================
[05:57:17] =================== check_platform_desc ===================
[05:57:17] [PASSED] 0x9A60 (TIGERLAKE)
[05:57:17] [PASSED] 0x9A68 (TIGERLAKE)
[05:57:17] [PASSED] 0x9A70 (TIGERLAKE)
[05:57:17] [PASSED] 0x9A40 (TIGERLAKE)
[05:57:17] [PASSED] 0x9A49 (TIGERLAKE)
[05:57:17] [PASSED] 0x9A59 (TIGERLAKE)
[05:57:17] [PASSED] 0x9A78 (TIGERLAKE)
[05:57:17] [PASSED] 0x9AC0 (TIGERLAKE)
[05:57:17] [PASSED] 0x9AC9 (TIGERLAKE)
[05:57:17] [PASSED] 0x9AD9 (TIGERLAKE)
[05:57:17] [PASSED] 0x9AF8 (TIGERLAKE)
[05:57:17] [PASSED] 0x4C80 (ROCKETLAKE)
[05:57:17] [PASSED] 0x4C8A (ROCKETLAKE)
[05:57:17] [PASSED] 0x4C8B (ROCKETLAKE)
[05:57:17] [PASSED] 0x4C8C (ROCKETLAKE)
[05:57:17] [PASSED] 0x4C90 (ROCKETLAKE)
[05:57:17] [PASSED] 0x4C9A (ROCKETLAKE)
[05:57:17] [PASSED] 0x4680 (ALDERLAKE_S)
[05:57:17] [PASSED] 0x4682 (ALDERLAKE_S)
[05:57:17] [PASSED] 0x4688 (ALDERLAKE_S)
[05:57:17] [PASSED] 0x468A (ALDERLAKE_S)
[05:57:17] [PASSED] 0x468B (ALDERLAKE_S)
[05:57:17] [PASSED] 0x4690 (ALDERLAKE_S)
[05:57:17] [PASSED] 0x4692 (ALDERLAKE_S)
[05:57:17] [PASSED] 0x4693 (ALDERLAKE_S)
[05:57:17] [PASSED] 0x46A0 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x46A1 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x46A2 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x46A3 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x46A6 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x46A8 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x46AA (ALDERLAKE_P)
[05:57:17] [PASSED] 0x462A (ALDERLAKE_P)
[05:57:17] [PASSED] 0x4626 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x4628 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x46B0 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x46B1 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x46B2 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x46B3 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x46C0 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x46C1 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x46C2 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x46C3 (ALDERLAKE_P)
[05:57:17] [PASSED] 0x46D0 (ALDERLAKE_N)
[05:57:17] [PASSED] 0x46D1 (ALDERLAKE_N)
[05:57:17] [PASSED] 0x46D2 (ALDERLAKE_N)
[05:57:17] [PASSED] 0x46D3 (ALDERLAKE_N)
[05:57:17] [PASSED] 0x46D4 (ALDERLAKE_N)
[05:57:17] [PASSED] 0xA721 (ALDERLAKE_P)
[05:57:17] [PASSED] 0xA7A1 (ALDERLAKE_P)
[05:57:17] [PASSED] 0xA7A9 (ALDERLAKE_P)
[05:57:17] [PASSED] 0xA7AC (ALDERLAKE_P)
[05:57:17] [PASSED] 0xA7AD (ALDERLAKE_P)
[05:57:17] [PASSED] 0xA720 (ALDERLAKE_P)
[05:57:17] [PASSED] 0xA7A0 (ALDERLAKE_P)
[05:57:17] [PASSED] 0xA7A8 (ALDERLAKE_P)
[05:57:17] [PASSED] 0xA7AA (ALDERLAKE_P)
[05:57:17] [PASSED] 0xA7AB (ALDERLAKE_P)
[05:57:17] [PASSED] 0xA780 (ALDERLAKE_S)
[05:57:17] [PASSED] 0xA781 (ALDERLAKE_S)
[05:57:17] [PASSED] 0xA782 (ALDERLAKE_S)
[05:57:17] [PASSED] 0xA783 (ALDERLAKE_S)
[05:57:17] [PASSED] 0xA788 (ALDERLAKE_S)
[05:57:17] [PASSED] 0xA789 (ALDERLAKE_S)
[05:57:17] [PASSED] 0xA78A (ALDERLAKE_S)
[05:57:17] [PASSED] 0xA78B (ALDERLAKE_S)
[05:57:17] [PASSED] 0x4905 (DG1)
[05:57:17] [PASSED] 0x4906 (DG1)
[05:57:17] [PASSED] 0x4907 (DG1)
[05:57:17] [PASSED] 0x4908 (DG1)
[05:57:17] [PASSED] 0x4909 (DG1)
[05:57:17] [PASSED] 0x56C0 (DG2)
[05:57:17] [PASSED] 0x56C2 (DG2)
[05:57:17] [PASSED] 0x56C1 (DG2)
[05:57:17] [PASSED] 0x7D51 (METEORLAKE)
[05:57:17] [PASSED] 0x7DD1 (METEORLAKE)
[05:57:17] [PASSED] 0x7D41 (METEORLAKE)
[05:57:17] [PASSED] 0x7D67 (METEORLAKE)
[05:57:17] [PASSED] 0xB640 (METEORLAKE)
[05:57:17] [PASSED] 0x56A0 (DG2)
[05:57:17] [PASSED] 0x56A1 (DG2)
[05:57:17] [PASSED] 0x56A2 (DG2)
[05:57:17] [PASSED] 0x56BE (DG2)
[05:57:17] [PASSED] 0x56BF (DG2)
[05:57:17] [PASSED] 0x5690 (DG2)
[05:57:17] [PASSED] 0x5691 (DG2)
[05:57:17] [PASSED] 0x5692 (DG2)
[05:57:17] [PASSED] 0x56A5 (DG2)
[05:57:17] [PASSED] 0x56A6 (DG2)
[05:57:17] [PASSED] 0x56B0 (DG2)
[05:57:17] [PASSED] 0x56B1 (DG2)
[05:57:17] [PASSED] 0x56BA (DG2)
[05:57:17] [PASSED] 0x56BB (DG2)
[05:57:17] [PASSED] 0x56BC (DG2)
[05:57:17] [PASSED] 0x56BD (DG2)
[05:57:17] [PASSED] 0x5693 (DG2)
[05:57:17] [PASSED] 0x5694 (DG2)
[05:57:17] [PASSED] 0x5695 (DG2)
[05:57:17] [PASSED] 0x56A3 (DG2)
[05:57:17] [PASSED] 0x56A4 (DG2)
[05:57:17] [PASSED] 0x56B2 (DG2)
[05:57:17] [PASSED] 0x56B3 (DG2)
[05:57:17] [PASSED] 0x5696 (DG2)
[05:57:17] [PASSED] 0x5697 (DG2)
[05:57:17] [PASSED] 0xB69 (PVC)
[05:57:17] [PASSED] 0xB6E (PVC)
[05:57:17] [PASSED] 0xBD4 (PVC)
[05:57:17] [PASSED] 0xBD5 (PVC)
[05:57:17] [PASSED] 0xBD6 (PVC)
[05:57:17] [PASSED] 0xBD7 (PVC)
[05:57:17] [PASSED] 0xBD8 (PVC)
[05:57:17] [PASSED] 0xBD9 (PVC)
[05:57:17] [PASSED] 0xBDA (PVC)
[05:57:17] [PASSED] 0xBDB (PVC)
[05:57:17] [PASSED] 0xBE0 (PVC)
[05:57:17] [PASSED] 0xBE1 (PVC)
[05:57:17] [PASSED] 0xBE5 (PVC)
[05:57:17] [PASSED] 0x7D40 (METEORLAKE)
[05:57:17] [PASSED] 0x7D45 (METEORLAKE)
[05:57:17] [PASSED] 0x7D55 (METEORLAKE)
[05:57:17] [PASSED] 0x7D60 (METEORLAKE)
[05:57:17] [PASSED] 0x7DD5 (METEORLAKE)
[05:57:17] [PASSED] 0x6420 (LUNARLAKE)
[05:57:17] [PASSED] 0x64A0 (LUNARLAKE)
[05:57:17] [PASSED] 0x64B0 (LUNARLAKE)
[05:57:17] [PASSED] 0xE202 (BATTLEMAGE)
[05:57:17] [PASSED] 0xE209 (BATTLEMAGE)
[05:57:17] [PASSED] 0xE20B (BATTLEMAGE)
[05:57:17] [PASSED] 0xE20C (BATTLEMAGE)
[05:57:17] [PASSED] 0xE20D (BATTLEMAGE)
[05:57:17] [PASSED] 0xE210 (BATTLEMAGE)
[05:57:17] [PASSED] 0xE211 (BATTLEMAGE)
[05:57:17] [PASSED] 0xE212 (BATTLEMAGE)
[05:57:17] [PASSED] 0xE216 (BATTLEMAGE)
[05:57:17] [PASSED] 0xE220 (BATTLEMAGE)
[05:57:17] [PASSED] 0xE221 (BATTLEMAGE)
[05:57:17] [PASSED] 0xE222 (BATTLEMAGE)
[05:57:17] [PASSED] 0xE223 (BATTLEMAGE)
[05:57:17] [PASSED] 0xB080 (PANTHERLAKE)
[05:57:17] [PASSED] 0xB081 (PANTHERLAKE)
[05:57:17] [PASSED] 0xB082 (PANTHERLAKE)
[05:57:17] [PASSED] 0xB083 (PANTHERLAKE)
[05:57:17] [PASSED] 0xB084 (PANTHERLAKE)
[05:57:17] [PASSED] 0xB085 (PANTHERLAKE)
[05:57:17] [PASSED] 0xB086 (PANTHERLAKE)
[05:57:17] [PASSED] 0xB087 (PANTHERLAKE)
[05:57:17] [PASSED] 0xB08F (PANTHERLAKE)
[05:57:17] [PASSED] 0xB090 (PANTHERLAKE)
[05:57:17] [PASSED] 0xB0A0 (PANTHERLAKE)
[05:57:17] [PASSED] 0xB0B0 (PANTHERLAKE)
[05:57:17] [PASSED] 0xFD80 (PANTHERLAKE)
[05:57:17] [PASSED] 0xFD81 (PANTHERLAKE)
[05:57:17] [PASSED] 0xD740 (NOVALAKE_S)
[05:57:17] [PASSED] 0xD741 (NOVALAKE_S)
[05:57:17] [PASSED] 0xD742 (NOVALAKE_S)
[05:57:17] [PASSED] 0xD743 (NOVALAKE_S)
[05:57:17] [PASSED] 0xD745 (NOVALAKE_S)
[05:57:17] [PASSED] 0xD74A (NOVALAKE_S)
[05:57:17] [PASSED] 0xD74B (NOVALAKE_S)
[05:57:17] [PASSED] 0x674C (CRESCENTISLAND)
[05:57:17] [PASSED] 0x674D (CRESCENTISLAND)
[05:57:17] [PASSED] 0x674E (CRESCENTISLAND)
[05:57:17] [PASSED] 0x674F (CRESCENTISLAND)
[05:57:17] [PASSED] 0x6750 (CRESCENTISLAND)
[05:57:17] [PASSED] 0xD750 (NOVALAKE_P)
[05:57:17] [PASSED] 0xD751 (NOVALAKE_P)
[05:57:17] [PASSED] 0xD752 (NOVALAKE_P)
[05:57:17] [PASSED] 0xD753 (NOVALAKE_P)
[05:57:17] [PASSED] 0xD754 (NOVALAKE_P)
[05:57:17] [PASSED] 0xD755 (NOVALAKE_P)
[05:57:17] [PASSED] 0xD756 (NOVALAKE_P)
[05:57:17] [PASSED] 0xD757 (NOVALAKE_P)
[05:57:17] [PASSED] 0xD75F (NOVALAKE_P)
[05:57:17] =============== [PASSED] check_platform_desc ===============
[05:57:17] ===================== [PASSED] xe_pci ======================
[05:57:17] ============= xe_rtp_tables_test (4 subtests) ==============
[05:57:17] ================== xe_rtp_table_gt_test ===================
[05:57:17] [PASSED] gt_was/14011060649
[05:57:17] [PASSED] gt_was/14011059788
[05:57:17] [PASSED] gt_was/14015795083
[05:57:17] [PASSED] gt_was/16021867713
[05:57:17] [PASSED] gt_was/14019449301
[05:57:17] [PASSED] gt_was/16028005424
[05:57:17] [PASSED] gt_was/14026578760
[05:57:17] [PASSED] gt_was/1409420604
[05:57:17] [PASSED] gt_was/1408615072
[05:57:17] [PASSED] gt_was/22010523718
[05:57:17] [PASSED] gt_was/14011006942
[05:57:17] [PASSED] gt_was/14014830051
[05:57:17] [PASSED] gt_was/18018781329
[05:57:17] [PASSED] gt_was/1509235366
[05:57:17] [PASSED] gt_was/18018781329
[05:57:17] [PASSED] gt_was/16016694945
[05:57:17] [PASSED] gt_was/14018575942
[05:57:17] [PASSED] gt_was/22016670082
[05:57:17] [PASSED] gt_was/22016670082
[05:57:17] [PASSED] gt_was/14017421178
[05:57:17] [PASSED] gt_was/16025250150
[05:57:17] [PASSED] gt_was/14021871409
[05:57:17] [PASSED] gt_was/16021865536
[05:57:17] [PASSED] gt_was/14021486841
[05:57:17] [PASSED] gt_was/14025160223
[05:57:17] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[05:57:17] [PASSED] gt_was/14025635424
[05:57:17] [PASSED] gt_was/16028005424
[05:57:17] ============== [PASSED] xe_rtp_table_gt_test ===============
[05:57:17] ================== xe_rtp_table_gt_test ===================
[05:57:17] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[05:57:17] [PASSED] gt_tunings/Tuning: 32B Access Enable
[05:57:17] [PASSED] gt_tunings/Tuning: L3 cache
[05:57:17] [PASSED] gt_tunings/Tuning: L3 cache - media
[05:57:17] [PASSED] gt_tunings/Tuning: Compression Overfetch
[05:57:17] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[05:57:17] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[05:57:17] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[05:57:17] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[05:57:17] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[05:57:17] [PASSED] gt_tunings/Tuning: Stateless compression control
[05:57:17] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[05:57:17] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[05:57:17] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[05:57:17] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[05:57:17] ============== [PASSED] xe_rtp_table_gt_test ===============
[05:57:17] ================== xe_rtp_table_oob_test ==================
[05:57:17] [PASSED] oob_was/1607983814
[05:57:17] [PASSED] oob_was/16010904313
[05:57:17] [PASSED] oob_was/18022495364
[05:57:17] [PASSED] oob_was/22012773006
[05:57:17] [PASSED] oob_was/14014475959
[05:57:17] [PASSED] oob_was/22011391025
[05:57:17] [PASSED] oob_was/22012727170
[05:57:17] [PASSED] oob_was/22012727685
[05:57:17] [PASSED] oob_was/22016596838
[05:57:17] [PASSED] oob_was/18020744125
[05:57:17] [PASSED] oob_was/1409600907
[05:57:17] [PASSED] oob_was/22014953428
[05:57:17] [PASSED] oob_was/16017236439
[05:57:17] [PASSED] oob_was/14019821291
[05:57:17] [PASSED] oob_was/14015076503
[05:57:17] [PASSED] oob_was/14018913170
[05:57:17] [PASSED] oob_was/14018094691
[05:57:17] [PASSED] oob_was/18024947630
[05:57:17] [PASSED] oob_was/16022287689
[05:57:17] [PASSED] oob_was/13011645652
[05:57:17] [PASSED] oob_was/14022293748
[05:57:17] [PASSED] oob_was/22019794406
[05:57:17] [PASSED] oob_was/22019338487
[05:57:17] [PASSED] oob_was/16023588340
[05:57:17] [PASSED] oob_was/14019789679
[05:57:17] [PASSED] oob_was/14022866841
[05:57:17] [PASSED] oob_was/16021333562
[05:57:17] [PASSED] oob_was/14016712196
[05:57:17] [PASSED] oob_was/14015568240
[05:57:17] [PASSED] oob_was/18013179988
[05:57:17] [PASSED] oob_was/1508761755
[05:57:17] [PASSED] oob_was/16023105232
[05:57:17] [PASSED] oob_was/16026508708
[05:57:17] [PASSED] oob_was/14020001231
[05:57:17] [PASSED] oob_was/16023683509
[05:57:17] [PASSED] oob_was/14025515070
[05:57:17] [PASSED] oob_was/15015404425_disable
[05:57:17] [PASSED] oob_was/16026007364
[05:57:17] [PASSED] oob_was/14020316580
[05:57:17] [PASSED] oob_was/14025883347
[05:57:17] [PASSED] oob_was/16029380221
[05:57:17] ============== [PASSED] xe_rtp_table_oob_test ==============
[05:57:17] ================ xe_rtp_table_dev_oob_test ================
[05:57:17] [PASSED] device_oob_was/22010954014
[05:57:17] [PASSED] device_oob_was/15015404425
[05:57:17] [PASSED] device_oob_was/22019338487_display
[05:57:17] [PASSED] device_oob_was/14022085890
[05:57:17] [PASSED] device_oob_was/14026539277
[05:57:17] [PASSED] device_oob_was/14026633728
[05:57:17] [PASSED] device_oob_was/14026746987
[05:57:17] [PASSED] device_oob_was/14026779378
[05:57:17] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[05:57:17] =============== [PASSED] xe_rtp_tables_test ================
[05:57:17] =================== xe_rtp (3 subtests) ====================
[05:57:17] =================== xe_rtp_rules_tests ====================
[05:57:17] [PASSED] no
[05:57:17] [PASSED] yes
[05:57:17] [PASSED] no-and-no
[05:57:17] [PASSED] no-and-yes
[05:57:17] [PASSED] yes-and-no
[05:57:17] [PASSED] yes-and-yes
[05:57:17] [PASSED] no-or-no
[05:57:17] [PASSED] no-or-yes
[05:57:17] [PASSED] yes-or-no
[05:57:17] [PASSED] yes-or-yes
[05:57:17] [PASSED] no-yes-or-yes-no
[05:57:17] [PASSED] no-yes-or-yes-yes
[05:57:17] [PASSED] yes-yes-or-no-yes
[05:57:17] [PASSED] yes-yes-or-yes-yes
[05:57:17] [PASSED] no-no-or-yes-or-no
[05:57:17] [PASSED] or
[05:57:17] [PASSED] or-yes
[05:57:17] [PASSED] or-no
[05:57:17] [PASSED] yes-or
[05:57:17] [PASSED] no-or
[05:57:17] [PASSED] no-or-or-yes
[05:57:17] [PASSED] yes-or-or-no
[05:57:17] [PASSED] no-or-or-no
[05:57:17] [PASSED] missing-context-engine-class
[05:57:17] [PASSED] missing-context-engine-class-or-yes
[05:57:17] [PASSED] missing-context-engine-class-or-or-yes
[05:57:17] =============== [PASSED] xe_rtp_rules_tests ================
[05:57:17] =============== xe_rtp_process_to_sr_tests ================
[05:57:17] [PASSED] coalesce-same-reg
[05:57:17] [PASSED] no-match-no-add
[05:57:17] [PASSED] two-regs-two-entries
[05:57:17] [PASSED] clr-one-set-other
[05:57:17] [PASSED] set-field
[05:57:17] [PASSED] conflict-duplicate
[05:57:17] [PASSED] conflict-not-disjoint
[05:57:17] [PASSED] conflict-reg-type
[05:57:17] [PASSED] bad-mcr-reg-forced-to-regular
[05:57:17] [PASSED] bad-regular-reg-forced-to-mcr
[05:57:17] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[05:57:17] ================== xe_rtp_process_tests ===================
[05:57:17] [PASSED] active1
[05:57:17] [PASSED] active2
[05:57:17] [PASSED] active-inactive
[05:57:17] [PASSED] inactive-active
[05:57:17] [PASSED] inactive-active-inactive
[05:57:17] [PASSED] inactive-inactive-inactive
[05:57:17] ============== [PASSED] xe_rtp_process_tests ===============
[05:57:17] ===================== [PASSED] xe_rtp ======================
[05:57:17] ==================== xe_wa (1 subtest) =====================
[05:57:17] ======================== xe_wa_gt =========================
[05:57:17] [PASSED] TIGERLAKE B0
[05:57:17] [PASSED] DG1 A0
[05:57:17] [PASSED] DG1 B0
[05:57:17] [PASSED] ALDERLAKE_S A0
[05:57:17] [PASSED] ALDERLAKE_S B0
[05:57:17] [PASSED] ALDERLAKE_S C0
[05:57:17] [PASSED] ALDERLAKE_S D0
[05:57:17] [PASSED] ALDERLAKE_P A0
[05:57:17] [PASSED] ALDERLAKE_P B0
[05:57:17] [PASSED] ALDERLAKE_P C0
[05:57:17] [PASSED] ALDERLAKE_S RPLS D0
[05:57:17] [PASSED] ALDERLAKE_P RPLU E0
[05:57:17] [PASSED] DG2 G10 C0
[05:57:17] [PASSED] DG2 G11 B1
[05:57:17] [PASSED] DG2 G12 A1
[05:57:17] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:57:17] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:57:17] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[05:57:17] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[05:57:17] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[05:57:17] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[05:57:17] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[05:57:17] ==================== [PASSED] xe_wa_gt =====================
[05:57:17] ====================== [PASSED] xe_wa ======================
[05:57:17] ============================================================
[05:57:17] Testing complete. Ran 717 tests: passed: 699, skipped: 18
[05:57:17] Elapsed time: 36.286s total, 4.317s configuring, 31.303s building, 0.643s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[05:57:17] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:57:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:57:43] Starting KUnit Kernel (1/1)...
[05:57:43] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:57:43] ============ drm_test_pick_cmdline (2 subtests) ============
[05:57:43] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[05:57:43] =============== drm_test_pick_cmdline_named ===============
[05:57:43] [PASSED] NTSC
[05:57:43] [PASSED] NTSC-J
[05:57:43] [PASSED] PAL
[05:57:43] [PASSED] PAL-M
[05:57:43] =========== [PASSED] drm_test_pick_cmdline_named ===========
[05:57:43] ============== [PASSED] drm_test_pick_cmdline ==============
[05:57:43] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[05:57:43] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[05:57:43] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[05:57:43] =========== drm_validate_clone_mode (2 subtests) ===========
[05:57:43] ============== drm_test_check_in_clone_mode ===============
[05:57:43] [PASSED] in_clone_mode
[05:57:43] [PASSED] not_in_clone_mode
[05:57:43] ========== [PASSED] drm_test_check_in_clone_mode ===========
[05:57:43] =============== drm_test_check_valid_clones ===============
[05:57:43] [PASSED] not_in_clone_mode
[05:57:43] [PASSED] valid_clone
[05:57:43] [PASSED] invalid_clone
[05:57:43] =========== [PASSED] drm_test_check_valid_clones ===========
[05:57:43] ============= [PASSED] drm_validate_clone_mode =============
[05:57:43] ============= drm_validate_modeset (1 subtest) =============
[05:57:43] [PASSED] drm_test_check_connector_changed_modeset
[05:57:43] ============== [PASSED] drm_validate_modeset ===============
[05:57:43] ====== drm_test_bridge_get_current_state (2 subtests) ======
[05:57:43] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[05:57:43] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[05:57:43] ======== [PASSED] drm_test_bridge_get_current_state ========
[05:57:43] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[05:57:43] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[05:57:43] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[05:57:43] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[05:57:43] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[05:57:43] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[05:57:43] ============== drm_bridge_alloc (2 subtests) ===============
[05:57:43] [PASSED] drm_test_drm_bridge_alloc_basic
[05:57:43] [PASSED] drm_test_drm_bridge_alloc_get_put
[05:57:43] ================ [PASSED] drm_bridge_alloc =================
[05:57:43] ============= drm_bridge_bus_fmt (5 subtests) ==============
[05:57:43] [PASSED] drm_test_bridge_rgb_yuv_rgb
[05:57:43] [PASSED] drm_test_bridge_must_convert_to_yuv444
[05:57:43] [PASSED] drm_test_bridge_hdmi_auto_rgb
[05:57:43] [PASSED] drm_test_bridge_auto_first
[05:57:43] [PASSED] drm_test_bridge_rgb_yuv_no_path
[05:57:43] =============== [PASSED] drm_bridge_bus_fmt ================
[05:57:43] ============= drm_cmdline_parser (40 subtests) =============
[05:57:43] [PASSED] drm_test_cmdline_force_d_only
[05:57:43] [PASSED] drm_test_cmdline_force_D_only_dvi
[05:57:43] [PASSED] drm_test_cmdline_force_D_only_hdmi
[05:57:43] [PASSED] drm_test_cmdline_force_D_only_not_digital
[05:57:43] [PASSED] drm_test_cmdline_force_e_only
[05:57:43] [PASSED] drm_test_cmdline_res
[05:57:43] [PASSED] drm_test_cmdline_res_vesa
[05:57:43] [PASSED] drm_test_cmdline_res_vesa_rblank
[05:57:43] [PASSED] drm_test_cmdline_res_rblank
[05:57:43] [PASSED] drm_test_cmdline_res_bpp
[05:57:43] [PASSED] drm_test_cmdline_res_refresh
[05:57:43] [PASSED] drm_test_cmdline_res_bpp_refresh
[05:57:43] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[05:57:43] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[05:57:43] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[05:57:43] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[05:57:43] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[05:57:43] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[05:57:43] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[05:57:43] [PASSED] drm_test_cmdline_res_margins_force_on
[05:57:43] [PASSED] drm_test_cmdline_res_vesa_margins
[05:57:43] [PASSED] drm_test_cmdline_name
[05:57:43] [PASSED] drm_test_cmdline_name_bpp
[05:57:43] [PASSED] drm_test_cmdline_name_option
[05:57:43] [PASSED] drm_test_cmdline_name_bpp_option
[05:57:43] [PASSED] drm_test_cmdline_rotate_0
[05:57:43] [PASSED] drm_test_cmdline_rotate_90
[05:57:43] [PASSED] drm_test_cmdline_rotate_180
[05:57:43] [PASSED] drm_test_cmdline_rotate_270
[05:57:43] [PASSED] drm_test_cmdline_hmirror
[05:57:43] [PASSED] drm_test_cmdline_vmirror
[05:57:43] [PASSED] drm_test_cmdline_margin_options
[05:57:43] [PASSED] drm_test_cmdline_multiple_options
[05:57:43] [PASSED] drm_test_cmdline_bpp_extra_and_option
[05:57:43] [PASSED] drm_test_cmdline_extra_and_option
[05:57:43] [PASSED] drm_test_cmdline_freestanding_options
[05:57:43] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[05:57:43] [PASSED] drm_test_cmdline_panel_orientation
[05:57:43] ================ drm_test_cmdline_invalid =================
[05:57:43] [PASSED] margin_only
[05:57:43] [PASSED] interlace_only
[05:57:43] [PASSED] res_missing_x
[05:57:43] [PASSED] res_missing_y
[05:57:43] [PASSED] res_bad_y
[05:57:43] [PASSED] res_missing_y_bpp
[05:57:43] [PASSED] res_bad_bpp
[05:57:43] [PASSED] res_bad_refresh
[05:57:43] [PASSED] res_bpp_refresh_force_on_off
[05:57:43] [PASSED] res_invalid_mode
[05:57:43] [PASSED] res_bpp_wrong_place_mode
[05:57:43] [PASSED] name_bpp_refresh
[05:57:43] [PASSED] name_refresh
[05:57:43] [PASSED] name_refresh_wrong_mode
[05:57:43] [PASSED] name_refresh_invalid_mode
[05:57:43] [PASSED] rotate_multiple
[05:57:43] [PASSED] rotate_invalid_val
[05:57:43] [PASSED] rotate_truncated
[05:57:43] [PASSED] invalid_option
[05:57:43] [PASSED] invalid_tv_option
[05:57:43] [PASSED] truncated_tv_option
[05:57:43] ============ [PASSED] drm_test_cmdline_invalid =============
[05:57:43] =============== drm_test_cmdline_tv_options ===============
[05:57:43] [PASSED] NTSC
[05:57:43] [PASSED] NTSC_443
[05:57:43] [PASSED] NTSC_J
[05:57:43] [PASSED] PAL
[05:57:43] [PASSED] PAL_M
[05:57:43] [PASSED] PAL_N
[05:57:43] [PASSED] SECAM
[05:57:43] [PASSED] MONO_525
[05:57:43] [PASSED] MONO_625
[05:57:43] =========== [PASSED] drm_test_cmdline_tv_options ===========
[05:57:43] =============== [PASSED] drm_cmdline_parser ================
[05:57:43] ========== drmm_connector_hdmi_init (20 subtests) ==========
[05:57:43] [PASSED] drm_test_connector_hdmi_init_valid
[05:57:43] [PASSED] drm_test_connector_hdmi_init_bpc_8
[05:57:43] [PASSED] drm_test_connector_hdmi_init_bpc_10
[05:57:43] [PASSED] drm_test_connector_hdmi_init_bpc_12
[05:57:43] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[05:57:43] [PASSED] drm_test_connector_hdmi_init_bpc_null
[05:57:43] [PASSED] drm_test_connector_hdmi_init_formats_empty
[05:57:43] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[05:57:43] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:57:43] [PASSED] supported_formats=0x9 yuv420_allowed=1
[05:57:43] [PASSED] supported_formats=0x9 yuv420_allowed=0
[05:57:43] [PASSED] supported_formats=0x5 yuv420_allowed=1
[05:57:43] [PASSED] supported_formats=0x5 yuv420_allowed=0
[05:57:43] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:57:43] [PASSED] drm_test_connector_hdmi_init_null_ddc
[05:57:43] [PASSED] drm_test_connector_hdmi_init_null_product
[05:57:43] [PASSED] drm_test_connector_hdmi_init_null_vendor
[05:57:43] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[05:57:43] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[05:57:43] [PASSED] drm_test_connector_hdmi_init_product_valid
[05:57:43] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[05:57:43] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[05:57:43] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[05:57:43] ========= drm_test_connector_hdmi_init_type_valid =========
[05:57:43] [PASSED] HDMI-A
[05:57:43] [PASSED] HDMI-B
[05:57:43] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[05:57:43] ======== drm_test_connector_hdmi_init_type_invalid ========
[05:57:43] [PASSED] Unknown
[05:57:43] [PASSED] VGA
[05:57:43] [PASSED] DVI-I
[05:57:43] [PASSED] DVI-D
[05:57:43] [PASSED] DVI-A
[05:57:43] [PASSED] Composite
[05:57:43] [PASSED] SVIDEO
[05:57:43] [PASSED] LVDS
[05:57:43] [PASSED] Component
[05:57:43] [PASSED] DIN
[05:57:43] [PASSED] DP
[05:57:43] [PASSED] TV
[05:57:43] [PASSED] eDP
[05:57:43] [PASSED] Virtual
[05:57:43] [PASSED] DSI
[05:57:43] [PASSED] DPI
[05:57:43] [PASSED] Writeback
[05:57:43] [PASSED] SPI
[05:57:43] [PASSED] USB
[05:57:43] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[05:57:43] ============ [PASSED] drmm_connector_hdmi_init =============
[05:57:43] ============= drmm_connector_init (3 subtests) =============
[05:57:43] [PASSED] drm_test_drmm_connector_init
[05:57:43] [PASSED] drm_test_drmm_connector_init_null_ddc
[05:57:43] ========= drm_test_drmm_connector_init_type_valid =========
[05:57:43] [PASSED] Unknown
[05:57:43] [PASSED] VGA
[05:57:43] [PASSED] DVI-I
[05:57:43] [PASSED] DVI-D
[05:57:43] [PASSED] DVI-A
[05:57:43] [PASSED] Composite
[05:57:43] [PASSED] SVIDEO
[05:57:43] [PASSED] LVDS
[05:57:43] [PASSED] Component
[05:57:43] [PASSED] DIN
[05:57:43] [PASSED] DP
[05:57:43] [PASSED] HDMI-A
[05:57:43] [PASSED] HDMI-B
[05:57:43] [PASSED] TV
[05:57:43] [PASSED] eDP
[05:57:43] [PASSED] Virtual
[05:57:43] [PASSED] DSI
[05:57:43] [PASSED] DPI
[05:57:43] [PASSED] Writeback
[05:57:43] [PASSED] SPI
[05:57:43] [PASSED] USB
[05:57:43] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[05:57:43] =============== [PASSED] drmm_connector_init ===============
[05:57:43] ========= drm_connector_dynamic_init (6 subtests) ==========
[05:57:43] [PASSED] drm_test_drm_connector_dynamic_init
[05:57:43] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[05:57:43] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[05:57:43] [PASSED] drm_test_drm_connector_dynamic_init_properties
[05:57:43] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[05:57:43] [PASSED] Unknown
[05:57:43] [PASSED] VGA
[05:57:43] [PASSED] DVI-I
[05:57:43] [PASSED] DVI-D
[05:57:43] [PASSED] DVI-A
[05:57:43] [PASSED] Composite
[05:57:43] [PASSED] SVIDEO
[05:57:43] [PASSED] LVDS
[05:57:43] [PASSED] Component
[05:57:43] [PASSED] DIN
[05:57:43] [PASSED] DP
[05:57:43] [PASSED] HDMI-A
[05:57:43] [PASSED] HDMI-B
[05:57:43] [PASSED] TV
[05:57:43] [PASSED] eDP
[05:57:43] [PASSED] Virtual
[05:57:43] [PASSED] DSI
[05:57:43] [PASSED] DPI
[05:57:43] [PASSED] Writeback
[05:57:43] [PASSED] SPI
[05:57:43] [PASSED] USB
[05:57:43] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[05:57:43] ======== drm_test_drm_connector_dynamic_init_name =========
[05:57:43] [PASSED] Unknown
[05:57:43] [PASSED] VGA
[05:57:43] [PASSED] DVI-I
[05:57:43] [PASSED] DVI-D
[05:57:43] [PASSED] DVI-A
[05:57:43] [PASSED] Composite
[05:57:43] [PASSED] SVIDEO
[05:57:43] [PASSED] LVDS
[05:57:43] [PASSED] Component
[05:57:43] [PASSED] DIN
[05:57:43] [PASSED] DP
[05:57:43] [PASSED] HDMI-A
[05:57:43] [PASSED] HDMI-B
[05:57:43] [PASSED] TV
[05:57:43] [PASSED] eDP
[05:57:43] [PASSED] Virtual
[05:57:43] [PASSED] DSI
[05:57:43] [PASSED] DPI
[05:57:43] [PASSED] Writeback
[05:57:43] [PASSED] SPI
[05:57:43] [PASSED] USB
[05:57:43] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[05:57:43] =========== [PASSED] drm_connector_dynamic_init ============
[05:57:43] ==== drm_connector_dynamic_register_early (4 subtests) =====
[05:57:43] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[05:57:43] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[05:57:43] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[05:57:43] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[05:57:43] ====== [PASSED] drm_connector_dynamic_register_early =======
[05:57:43] ======= drm_connector_dynamic_register (7 subtests) ========
[05:57:43] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[05:57:43] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[05:57:43] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[05:57:43] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[05:57:43] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[05:57:43] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[05:57:43] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[05:57:43] ========= [PASSED] drm_connector_dynamic_register ==========
[05:57:43] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[05:57:43] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[05:57:43] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[05:57:43] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[05:57:43] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[05:57:43] ========== drm_test_get_tv_mode_from_name_valid ===========
[05:57:43] [PASSED] NTSC
[05:57:43] [PASSED] NTSC-443
[05:57:43] [PASSED] NTSC-J
[05:57:43] [PASSED] PAL
[05:57:43] [PASSED] PAL-M
[05:57:43] [PASSED] PAL-N
[05:57:43] [PASSED] SECAM
[05:57:43] [PASSED] Mono
[05:57:43] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[05:57:43] [PASSED] drm_test_get_tv_mode_from_name_truncated
[05:57:43] ============ [PASSED] drm_get_tv_mode_from_name ============
[05:57:43] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[05:57:43] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[05:57:43] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[05:57:43] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[05:57:43] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[05:57:43] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[05:57:43] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[05:57:43] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[05:57:43] [PASSED] VIC 96
[05:57:43] [PASSED] VIC 97
[05:57:43] [PASSED] VIC 101
[05:57:43] [PASSED] VIC 102
[05:57:43] [PASSED] VIC 106
[05:57:43] [PASSED] VIC 107
[05:57:43] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[05:57:43] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[05:57:43] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[05:57:43] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[05:57:43] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[05:57:43] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[05:57:43] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[05:57:43] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[05:57:43] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[05:57:43] [PASSED] Automatic
[05:57:43] [PASSED] Full
[05:57:43] [PASSED] Limited 16:235
[05:57:43] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[05:57:43] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[05:57:43] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[05:57:43] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[05:57:43] === drm_test_drm_hdmi_connector_get_output_format_name ====
[05:57:43] [PASSED] RGB
[05:57:43] [PASSED] YUV 4:2:0
[05:57:43] [PASSED] YUV 4:2:2
[05:57:43] [PASSED] YUV 4:4:4
[05:57:43] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[05:57:43] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[05:57:43] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[05:57:43] ============= drm_damage_helper (21 subtests) ==============
[05:57:43] [PASSED] drm_test_damage_iter_no_damage
[05:57:43] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[05:57:43] [PASSED] drm_test_damage_iter_no_damage_src_moved
[05:57:43] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[05:57:43] [PASSED] drm_test_damage_iter_no_damage_not_visible
[05:57:43] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[05:57:43] [PASSED] drm_test_damage_iter_no_damage_no_fb
[05:57:43] [PASSED] drm_test_damage_iter_simple_damage
[05:57:43] [PASSED] drm_test_damage_iter_single_damage
[05:57:43] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[05:57:43] [PASSED] drm_test_damage_iter_single_damage_outside_src
[05:57:43] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[05:57:43] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[05:57:43] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[05:57:43] [PASSED] drm_test_damage_iter_single_damage_src_moved
[05:57:43] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[05:57:43] [PASSED] drm_test_damage_iter_damage
[05:57:43] [PASSED] drm_test_damage_iter_damage_one_intersect
[05:57:43] [PASSED] drm_test_damage_iter_damage_one_outside
[05:57:43] [PASSED] drm_test_damage_iter_damage_src_moved
[05:57:43] [PASSED] drm_test_damage_iter_damage_not_visible
[05:57:43] ================ [PASSED] drm_damage_helper ================
[05:57:43] ============== drm_dp_mst_helper (3 subtests) ==============
[05:57:43] ============== drm_test_dp_mst_calc_pbn_mode ==============
[05:57:43] [PASSED] Clock 154000 BPP 30 DSC disabled
[05:57:43] [PASSED] Clock 234000 BPP 30 DSC disabled
[05:57:43] [PASSED] Clock 297000 BPP 24 DSC disabled
[05:57:43] [PASSED] Clock 332880 BPP 24 DSC enabled
[05:57:43] [PASSED] Clock 324540 BPP 24 DSC enabled
[05:57:43] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[05:57:43] ============== drm_test_dp_mst_calc_pbn_div ===============
[05:57:43] [PASSED] Link rate 2000000 lane count 4
[05:57:43] [PASSED] Link rate 2000000 lane count 2
[05:57:43] [PASSED] Link rate 2000000 lane count 1
[05:57:43] [PASSED] Link rate 1350000 lane count 4
[05:57:43] [PASSED] Link rate 1350000 lane count 2
[05:57:43] [PASSED] Link rate 1350000 lane count 1
[05:57:43] [PASSED] Link rate 1000000 lane count 4
[05:57:43] [PASSED] Link rate 1000000 lane count 2
[05:57:43] [PASSED] Link rate 1000000 lane count 1
[05:57:43] [PASSED] Link rate 810000 lane count 4
[05:57:43] [PASSED] Link rate 810000 lane count 2
[05:57:43] [PASSED] Link rate 810000 lane count 1
[05:57:43] [PASSED] Link rate 540000 lane count 4
[05:57:43] [PASSED] Link rate 540000 lane count 2
[05:57:43] [PASSED] Link rate 540000 lane count 1
[05:57:43] [PASSED] Link rate 270000 lane count 4
[05:57:43] [PASSED] Link rate 270000 lane count 2
[05:57:43] [PASSED] Link rate 270000 lane count 1
[05:57:43] [PASSED] Link rate 162000 lane count 4
[05:57:43] [PASSED] Link rate 162000 lane count 2
[05:57:43] [PASSED] Link rate 162000 lane count 1
[05:57:43] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[05:57:43] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[05:57:43] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[05:57:43] [PASSED] DP_POWER_UP_PHY with port number
[05:57:43] [PASSED] DP_POWER_DOWN_PHY with port number
[05:57:43] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[05:57:43] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[05:57:43] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[05:57:43] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[05:57:43] [PASSED] DP_QUERY_PAYLOAD with port number
[05:57:43] [PASSED] DP_QUERY_PAYLOAD with VCPI
[05:57:43] [PASSED] DP_REMOTE_DPCD_READ with port number
[05:57:43] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[05:57:43] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[05:57:43] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[05:57:43] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[05:57:43] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[05:57:43] [PASSED] DP_REMOTE_I2C_READ with port number
[05:57:43] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[05:57:43] [PASSED] DP_REMOTE_I2C_READ with transactions array
[05:57:43] [PASSED] DP_REMOTE_I2C_WRITE with port number
[05:57:43] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[05:57:43] [PASSED] DP_REMOTE_I2C_WRITE with data array
[05:57:43] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[05:57:43] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[05:57:43] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[05:57:43] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[05:57:43] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[05:57:43] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[05:57:43] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[05:57:43] ================ [PASSED] drm_dp_mst_helper ================
[05:57:43] ================== drm_exec (7 subtests) ===================
[05:57:43] [PASSED] sanitycheck
[05:57:43] [PASSED] test_lock
[05:57:43] [PASSED] test_lock_unlock
[05:57:43] [PASSED] test_duplicates
[05:57:43] [PASSED] test_prepare
[05:57:43] [PASSED] test_prepare_array
[05:57:43] [PASSED] test_multiple_loops
[05:57:43] ==================== [PASSED] drm_exec =====================
[05:57:43] =========== drm_format_helper_test (17 subtests) ===========
[05:57:43] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[05:57:43] [PASSED] single_pixel_source_buffer
[05:57:43] [PASSED] single_pixel_clip_rectangle
[05:57:43] [PASSED] well_known_colors
[05:57:43] [PASSED] destination_pitch
[05:57:43] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[05:57:43] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[05:57:43] [PASSED] single_pixel_source_buffer
[05:57:43] [PASSED] single_pixel_clip_rectangle
[05:57:43] [PASSED] well_known_colors
[05:57:43] [PASSED] destination_pitch
[05:57:43] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[05:57:43] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[05:57:43] [PASSED] single_pixel_source_buffer
[05:57:43] [PASSED] single_pixel_clip_rectangle
[05:57:43] [PASSED] well_known_colors
[05:57:43] [PASSED] destination_pitch
[05:57:43] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[05:57:43] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[05:57:43] [PASSED] single_pixel_source_buffer
[05:57:43] [PASSED] single_pixel_clip_rectangle
[05:57:43] [PASSED] well_known_colors
[05:57:43] [PASSED] destination_pitch
[05:57:43] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[05:57:43] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[05:57:43] [PASSED] single_pixel_source_buffer
[05:57:43] [PASSED] single_pixel_clip_rectangle
[05:57:43] [PASSED] well_known_colors
[05:57:43] [PASSED] destination_pitch
[05:57:43] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[05:57:43] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[05:57:43] [PASSED] single_pixel_source_buffer
[05:57:43] [PASSED] single_pixel_clip_rectangle
[05:57:43] [PASSED] well_known_colors
[05:57:43] [PASSED] destination_pitch
[05:57:43] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[05:57:43] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[05:57:43] [PASSED] single_pixel_source_buffer
[05:57:43] [PASSED] single_pixel_clip_rectangle
[05:57:43] [PASSED] well_known_colors
[05:57:43] [PASSED] destination_pitch
[05:57:43] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[05:57:43] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[05:57:43] [PASSED] single_pixel_source_buffer
[05:57:43] [PASSED] single_pixel_clip_rectangle
[05:57:43] [PASSED] well_known_colors
[05:57:43] [PASSED] destination_pitch
[05:57:43] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[05:57:43] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[05:57:43] [PASSED] single_pixel_source_buffer
[05:57:43] [PASSED] single_pixel_clip_rectangle
[05:57:43] [PASSED] well_known_colors
[05:57:43] [PASSED] destination_pitch
[05:57:43] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[05:57:43] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[05:57:43] [PASSED] single_pixel_source_buffer
[05:57:43] [PASSED] single_pixel_clip_rectangle
[05:57:43] [PASSED] well_known_colors
[05:57:43] [PASSED] destination_pitch
[05:57:43] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[05:57:43] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[05:57:43] [PASSED] single_pixel_source_buffer
[05:57:43] [PASSED] single_pixel_clip_rectangle
[05:57:43] [PASSED] well_known_colors
[05:57:43] [PASSED] destination_pitch
[05:57:43] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[05:57:43] ============== drm_test_fb_xrgb8888_to_mono ===============
[05:57:43] [PASSED] single_pixel_source_buffer
[05:57:43] [PASSED] single_pixel_clip_rectangle
[05:57:43] [PASSED] well_known_colors
[05:57:43] [PASSED] destination_pitch
[05:57:43] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[05:57:43] ==================== drm_test_fb_swab =====================
[05:57:43] [PASSED] single_pixel_source_buffer
[05:57:43] [PASSED] single_pixel_clip_rectangle
[05:57:43] [PASSED] well_known_colors
[05:57:43] [PASSED] destination_pitch
[05:57:43] ================ [PASSED] drm_test_fb_swab =================
[05:57:43] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[05:57:43] [PASSED] single_pixel_source_buffer
[05:57:43] [PASSED] single_pixel_clip_rectangle
[05:57:43] [PASSED] well_known_colors
[05:57:43] [PASSED] destination_pitch
[05:57:43] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[05:57:43] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[05:57:43] [PASSED] single_pixel_source_buffer
[05:57:43] [PASSED] single_pixel_clip_rectangle
[05:57:43] [PASSED] well_known_colors
[05:57:43] [PASSED] destination_pitch
[05:57:43] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[05:57:43] ================= drm_test_fb_clip_offset =================
[05:57:43] [PASSED] pass through
[05:57:43] [PASSED] horizontal offset
[05:57:43] [PASSED] vertical offset
[05:57:43] [PASSED] horizontal and vertical offset
[05:57:43] [PASSED] horizontal offset (custom pitch)
[05:57:43] [PASSED] vertical offset (custom pitch)
[05:57:43] [PASSED] horizontal and vertical offset (custom pitch)
[05:57:43] ============= [PASSED] drm_test_fb_clip_offset =============
[05:57:43] =================== drm_test_fb_memcpy ====================
[05:57:43] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[05:57:43] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[05:57:43] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[05:57:43] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[05:57:43] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[05:57:43] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[05:57:43] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[05:57:43] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[05:57:43] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[05:57:43] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[05:57:43] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[05:57:43] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[05:57:43] =============== [PASSED] drm_test_fb_memcpy ================
[05:57:43] ============= [PASSED] drm_format_helper_test ==============
[05:57:43] ================= drm_format (18 subtests) =================
[05:57:43] [PASSED] drm_test_format_block_width_invalid
[05:57:43] [PASSED] drm_test_format_block_width_one_plane
[05:57:43] [PASSED] drm_test_format_block_width_two_plane
[05:57:43] [PASSED] drm_test_format_block_width_three_plane
[05:57:43] [PASSED] drm_test_format_block_width_tiled
[05:57:43] [PASSED] drm_test_format_block_height_invalid
[05:57:43] [PASSED] drm_test_format_block_height_one_plane
[05:57:43] [PASSED] drm_test_format_block_height_two_plane
[05:57:43] [PASSED] drm_test_format_block_height_three_plane
[05:57:43] [PASSED] drm_test_format_block_height_tiled
[05:57:43] [PASSED] drm_test_format_min_pitch_invalid
[05:57:43] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[05:57:43] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[05:57:43] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[05:57:43] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[05:57:43] [PASSED] drm_test_format_min_pitch_two_plane
[05:57:43] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[05:57:43] [PASSED] drm_test_format_min_pitch_tiled
[05:57:43] =================== [PASSED] drm_format ====================
[05:57:43] ============== drm_framebuffer (10 subtests) ===============
[05:57:43] ========== drm_test_framebuffer_check_src_coords ==========
[05:57:43] [PASSED] Success: source fits into fb
[05:57:43] [PASSED] Fail: overflowing fb with x-axis coordinate
[05:57:43] [PASSED] Fail: overflowing fb with y-axis coordinate
[05:57:43] [PASSED] Fail: overflowing fb with source width
[05:57:43] [PASSED] Fail: overflowing fb with source height
[05:57:43] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[05:57:43] [PASSED] drm_test_framebuffer_cleanup
[05:57:43] =============== drm_test_framebuffer_create ===============
[05:57:43] [PASSED] ABGR8888 normal sizes
[05:57:43] [PASSED] ABGR8888 max sizes
[05:57:43] [PASSED] ABGR8888 pitch greater than min required
[05:57:43] [PASSED] ABGR8888 pitch less than min required
[05:57:43] [PASSED] ABGR8888 Invalid width
[05:57:43] [PASSED] ABGR8888 Invalid buffer handle
[05:57:43] [PASSED] No pixel format
[05:57:43] [PASSED] ABGR8888 Width 0
[05:57:43] [PASSED] ABGR8888 Height 0
[05:57:43] [PASSED] ABGR8888 Out of bound height * pitch combination
[05:57:43] [PASSED] ABGR8888 Large buffer offset
[05:57:43] [PASSED] ABGR8888 Buffer offset for inexistent plane
[05:57:43] [PASSED] ABGR8888 Invalid flag
[05:57:43] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[05:57:43] [PASSED] ABGR8888 Valid buffer modifier
[05:57:43] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[05:57:43] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[05:57:43] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[05:57:43] [PASSED] NV12 Normal sizes
[05:57:43] [PASSED] NV12 Max sizes
[05:57:43] [PASSED] NV12 Invalid pitch
[05:57:43] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[05:57:43] [PASSED] NV12 different modifier per-plane
[05:57:43] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[05:57:43] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[05:57:43] [PASSED] NV12 Modifier for inexistent plane
[05:57:43] [PASSED] NV12 Handle for inexistent plane
[05:57:43] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[05:57:43] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[05:57:43] [PASSED] YVU420 Normal sizes
[05:57:43] [PASSED] YVU420 Max sizes
[05:57:43] [PASSED] YVU420 Invalid pitch
[05:57:43] [PASSED] YVU420 Different pitches
[05:57:43] [PASSED] YVU420 Different buffer offsets/pitches
[05:57:43] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[05:57:43] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[05:57:43] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[05:57:43] [PASSED] YVU420 Valid modifier
[05:57:43] [PASSED] YVU420 Different modifiers per plane
[05:57:43] [PASSED] YVU420 Modifier for inexistent plane
[05:57:43] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[05:57:43] [PASSED] X0L2 Normal sizes
[05:57:43] [PASSED] X0L2 Max sizes
[05:57:43] [PASSED] X0L2 Invalid pitch
[05:57:43] [PASSED] X0L2 Pitch greater than minimum required
[05:57:43] [PASSED] X0L2 Handle for inexistent plane
[05:57:43] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[05:57:43] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[05:57:43] [PASSED] X0L2 Valid modifier
[05:57:43] [PASSED] X0L2 Modifier for inexistent plane
[05:57:43] =========== [PASSED] drm_test_framebuffer_create ===========
[05:57:43] [PASSED] drm_test_framebuffer_free
[05:57:43] [PASSED] drm_test_framebuffer_init
[05:57:43] [PASSED] drm_test_framebuffer_init_bad_format
[05:57:43] [PASSED] drm_test_framebuffer_init_dev_mismatch
[05:57:43] [PASSED] drm_test_framebuffer_lookup
[05:57:43] [PASSED] drm_test_framebuffer_lookup_inexistent
[05:57:43] [PASSED] drm_test_framebuffer_modifiers_not_supported
[05:57:43] ================= [PASSED] drm_framebuffer =================
[05:57:43] ================ drm_gem_shmem (8 subtests) ================
[05:57:43] [PASSED] drm_gem_shmem_test_obj_create
[05:57:43] [PASSED] drm_gem_shmem_test_obj_create_private
[05:57:43] [PASSED] drm_gem_shmem_test_pin_pages
[05:57:43] [PASSED] drm_gem_shmem_test_vmap
[05:57:43] [PASSED] drm_gem_shmem_test_get_sg_table
[05:57:43] [PASSED] drm_gem_shmem_test_get_pages_sgt
[05:57:43] [PASSED] drm_gem_shmem_test_madvise
[05:57:43] [PASSED] drm_gem_shmem_test_purge
[05:57:43] ================== [PASSED] drm_gem_shmem ==================
[05:57:43] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[05:57:43] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[05:57:43] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[05:57:43] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[05:57:43] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[05:57:43] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[05:57:43] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[05:57:43] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[05:57:43] [PASSED] Automatic
[05:57:43] [PASSED] Full
[05:57:43] [PASSED] Limited 16:235
[05:57:43] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[05:57:43] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[05:57:43] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[05:57:43] [PASSED] drm_test_check_disable_connector
[05:57:43] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[05:57:43] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[05:57:43] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[05:57:43] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[05:57:43] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[05:57:43] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[05:57:43] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[05:57:43] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[05:57:43] [PASSED] drm_test_check_output_bpc_dvi
[05:57:43] [PASSED] drm_test_check_output_bpc_format_vic_1
[05:57:43] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[05:57:43] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[05:57:43] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[05:57:43] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[05:57:43] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[05:57:43] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[05:57:43] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[05:57:43] ============ drm_test_check_hdmi_color_format =============
[05:57:43] [PASSED] AUTO -> RGB
[05:57:43] [PASSED] YCBCR422 -> YUV422
[05:57:43] [PASSED] YCBCR420 -> YUV420
[05:57:43] [PASSED] YCBCR444 -> YUV444
[05:57:43] [PASSED] RGB -> RGB
[05:57:43] ======== [PASSED] drm_test_check_hdmi_color_format =========
[05:57:43] ======== drm_test_check_hdmi_color_format_420_only ========
[05:57:43] [PASSED] RGB should fail
[05:57:43] [PASSED] YUV444 should fail
[05:57:43] [PASSED] YUV422 should fail
[05:57:43] [PASSED] YUV420 should work
[05:57:43] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[05:57:43] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[05:57:43] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[05:57:43] [PASSED] drm_test_check_broadcast_rgb_value
[05:57:43] [PASSED] drm_test_check_bpc_8_value
[05:57:43] [PASSED] drm_test_check_bpc_10_value
[05:57:43] [PASSED] drm_test_check_bpc_12_value
[05:57:43] [PASSED] drm_test_check_format_value
[05:57:43] [PASSED] drm_test_check_tmds_char_value
[05:57:43] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[05:57:43] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[05:57:43] [PASSED] drm_test_check_mode_valid
[05:57:43] [PASSED] drm_test_check_mode_valid_reject
[05:57:43] [PASSED] drm_test_check_mode_valid_reject_rate
[05:57:43] [PASSED] drm_test_check_mode_valid_reject_max_clock
[05:57:43] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[05:57:43] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[05:57:43] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[05:57:43] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[05:57:43] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[05:57:43] [PASSED] drm_test_check_infoframes
[05:57:43] [PASSED] drm_test_check_reject_avi_infoframe
[05:57:43] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[05:57:43] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[05:57:43] [PASSED] drm_test_check_reject_audio_infoframe
[05:57:43] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[05:57:43] ================= drm_managed (2 subtests) =================
[05:57:43] [PASSED] drm_test_managed_release_action
[05:57:43] [PASSED] drm_test_managed_run_action
[05:57:43] =================== [PASSED] drm_managed ===================
[05:57:43] =================== drm_mm (6 subtests) ====================
[05:57:43] [PASSED] drm_test_mm_init
[05:57:43] [PASSED] drm_test_mm_debug
[05:57:43] [PASSED] drm_test_mm_align32
[05:57:43] [PASSED] drm_test_mm_align64
[05:57:43] [PASSED] drm_test_mm_lowest
[05:57:43] [PASSED] drm_test_mm_highest
[05:57:43] ===================== [PASSED] drm_mm ======================
[05:57:43] ============= drm_modes_analog_tv (5 subtests) =============
[05:57:43] [PASSED] drm_test_modes_analog_tv_mono_576i
[05:57:43] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[05:57:43] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[05:57:43] [PASSED] drm_test_modes_analog_tv_pal_576i
[05:57:43] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[05:57:43] =============== [PASSED] drm_modes_analog_tv ===============
[05:57:43] ============== drm_plane_helper (2 subtests) ===============
[05:57:43] =============== drm_test_check_plane_state ================
[05:57:43] [PASSED] clipping_simple
[05:57:43] [PASSED] clipping_rotate_reflect
[05:57:43] [PASSED] positioning_simple
[05:57:43] [PASSED] upscaling
[05:57:43] [PASSED] downscaling
[05:57:43] [PASSED] rounding1
[05:57:43] [PASSED] rounding2
[05:57:43] [PASSED] rounding3
[05:57:43] [PASSED] rounding4
[05:57:43] =========== [PASSED] drm_test_check_plane_state ============
[05:57:43] =========== drm_test_check_invalid_plane_state ============
[05:57:43] [PASSED] positioning_invalid
[05:57:43] [PASSED] upscaling_invalid
[05:57:43] [PASSED] downscaling_invalid
[05:57:43] ======= [PASSED] drm_test_check_invalid_plane_state ========
[05:57:43] ================ [PASSED] drm_plane_helper =================
[05:57:43] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[05:57:43] ====== drm_test_connector_helper_tv_get_modes_check =======
[05:57:43] [PASSED] None
[05:57:43] [PASSED] PAL
[05:57:43] [PASSED] NTSC
[05:57:43] [PASSED] Both, NTSC Default
[05:57:43] [PASSED] Both, PAL Default
[05:57:43] [PASSED] Both, NTSC Default, with PAL on command-line
[05:57:43] [PASSED] Both, PAL Default, with NTSC on command-line
[05:57:43] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[05:57:43] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[05:57:43] ================== drm_rect (9 subtests) ===================
[05:57:43] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[05:57:43] [PASSED] drm_test_rect_clip_scaled_not_clipped
[05:57:43] [PASSED] drm_test_rect_clip_scaled_clipped
[05:57:43] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[05:57:43] ================= drm_test_rect_intersect =================
[05:57:43] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[05:57:43] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[05:57:43] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[05:57:43] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[05:57:43] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[05:57:43] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[05:57:43] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[05:57:43] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[05:57:43] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[05:57:43] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[05:57:43] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[05:57:43] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[05:57:43] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[05:57:43] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[05:57:43] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[05:57:43] ============= [PASSED] drm_test_rect_intersect =============
[05:57:43] ================ drm_test_rect_calc_hscale ================
[05:57:43] [PASSED] normal use
[05:57:43] [PASSED] out of max range
[05:57:43] [PASSED] out of min range
[05:57:43] [PASSED] zero dst
[05:57:43] [PASSED] negative src
[05:57:43] [PASSED] negative dst
[05:57:43] ============ [PASSED] drm_test_rect_calc_hscale ============
[05:57:43] ================ drm_test_rect_calc_vscale ================
[05:57:43] [PASSED] normal use
[05:57:43] [PASSED] out of max range
[05:57:43] [PASSED] out of min range
[05:57:43] [PASSED] zero dst
[05:57:43] [PASSED] negative src
[05:57:43] [PASSED] negative dst
[05:57:43] ============ [PASSED] drm_test_rect_calc_vscale ============
[05:57:43] ================== drm_test_rect_rotate ===================
[05:57:43] [PASSED] reflect-x
[05:57:43] [PASSED] reflect-y
[05:57:43] [PASSED] rotate-0
[05:57:43] [PASSED] rotate-90
[05:57:43] [PASSED] rotate-180
[05:57:43] [PASSED] rotate-270
[05:57:43] ============== [PASSED] drm_test_rect_rotate ===============
[05:57:43] ================ drm_test_rect_rotate_inv =================
[05:57:43] [PASSED] reflect-x
[05:57:43] [PASSED] reflect-y
[05:57:43] [PASSED] rotate-0
[05:57:43] [PASSED] rotate-90
[05:57:43] [PASSED] rotate-180
[05:57:43] [PASSED] rotate-270
[05:57:43] ============ [PASSED] drm_test_rect_rotate_inv =============
[05:57:43] ==================== [PASSED] drm_rect =====================
[05:57:43] ============ drm_sysfb_modeset_test (1 subtest) ============
[05:57:43] ============ drm_test_sysfb_build_fourcc_list =============
[05:57:43] [PASSED] no native formats
[05:57:43] [PASSED] XRGB8888 as native format
[05:57:43] [PASSED] remove duplicates
[05:57:43] [PASSED] convert alpha formats
[05:57:43] [PASSED] random formats
[05:57:43] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[05:57:43] ============= [PASSED] drm_sysfb_modeset_test ==============
[05:57:43] ================== drm_fixp (2 subtests) ===================
[05:57:43] [PASSED] drm_test_int2fixp
[05:57:43] [PASSED] drm_test_sm2fixp
[05:57:43] ==================== [PASSED] drm_fixp =====================
[05:57:43] ============================================================
[05:57:43] Testing complete. Ran 639 tests: passed: 639
[05:57:43] Elapsed time: 26.173s total, 1.757s configuring, 24.250s building, 0.146s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[05:57:43] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:57:45] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:57:55] Starting KUnit Kernel (1/1)...
[05:57:55] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:57:55] ================= ttm_device (5 subtests) ==================
[05:57:55] [PASSED] ttm_device_init_basic
[05:57:55] [PASSED] ttm_device_init_multiple
[05:57:55] [PASSED] ttm_device_fini_basic
[05:57:55] [PASSED] ttm_device_init_no_vma_man
[05:57:55] ================== ttm_device_init_pools ==================
[05:57:55] [PASSED] No DMA allocations, no DMA32 required
[05:57:55] [PASSED] DMA allocations, DMA32 required
[05:57:55] [PASSED] No DMA allocations, DMA32 required
[05:57:55] [PASSED] DMA allocations, no DMA32 required
[05:57:55] ============== [PASSED] ttm_device_init_pools ==============
[05:57:55] =================== [PASSED] ttm_device ====================
[05:57:55] ================== ttm_pool (8 subtests) ===================
[05:57:55] ================== ttm_pool_alloc_basic ===================
[05:57:55] [PASSED] One page
[05:57:55] [PASSED] More than one page
[05:57:55] [PASSED] Above the allocation limit
[05:57:55] [PASSED] One page, with coherent DMA mappings enabled
[05:57:55] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:57:55] ============== [PASSED] ttm_pool_alloc_basic ===============
[05:57:55] ============== ttm_pool_alloc_basic_dma_addr ==============
[05:57:55] [PASSED] One page
[05:57:55] [PASSED] More than one page
[05:57:55] [PASSED] Above the allocation limit
[05:57:55] [PASSED] One page, with coherent DMA mappings enabled
[05:57:55] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:57:55] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[05:57:55] [PASSED] ttm_pool_alloc_order_caching_match
[05:57:55] [PASSED] ttm_pool_alloc_caching_mismatch
[05:57:55] [PASSED] ttm_pool_alloc_order_mismatch
[05:57:55] [PASSED] ttm_pool_free_dma_alloc
[05:57:55] [PASSED] ttm_pool_free_no_dma_alloc
[05:57:55] [PASSED] ttm_pool_fini_basic
[05:57:55] ==================== [PASSED] ttm_pool =====================
[05:57:55] ================ ttm_resource (8 subtests) =================
[05:57:55] ================= ttm_resource_init_basic =================
[05:57:55] [PASSED] Init resource in TTM_PL_SYSTEM
[05:57:55] [PASSED] Init resource in TTM_PL_VRAM
[05:57:55] [PASSED] Init resource in a private placement
[05:57:55] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[05:57:55] ============= [PASSED] ttm_resource_init_basic =============
[05:57:55] [PASSED] ttm_resource_init_pinned
[05:57:55] [PASSED] ttm_resource_fini_basic
[05:57:55] [PASSED] ttm_resource_manager_init_basic
[05:57:55] [PASSED] ttm_resource_manager_usage_basic
[05:57:55] [PASSED] ttm_resource_manager_set_used_basic
[05:57:55] [PASSED] ttm_sys_man_alloc_basic
[05:57:55] [PASSED] ttm_sys_man_free_basic
[05:57:55] ================== [PASSED] ttm_resource ===================
[05:57:55] =================== ttm_tt (15 subtests) ===================
[05:57:55] ==================== ttm_tt_init_basic ====================
[05:57:55] [PASSED] Page-aligned size
[05:57:55] [PASSED] Extra pages requested
[05:57:55] ================ [PASSED] ttm_tt_init_basic ================
[05:57:55] [PASSED] ttm_tt_init_misaligned
[05:57:55] [PASSED] ttm_tt_fini_basic
[05:57:55] [PASSED] ttm_tt_fini_sg
[05:57:55] [PASSED] ttm_tt_fini_shmem
[05:57:55] [PASSED] ttm_tt_create_basic
[05:57:55] [PASSED] ttm_tt_create_invalid_bo_type
[05:57:55] [PASSED] ttm_tt_create_ttm_exists
[05:57:55] [PASSED] ttm_tt_create_failed
[05:57:55] [PASSED] ttm_tt_destroy_basic
[05:57:55] [PASSED] ttm_tt_populate_null_ttm
[05:57:55] [PASSED] ttm_tt_populate_populated_ttm
[05:57:55] [PASSED] ttm_tt_unpopulate_basic
[05:57:55] [PASSED] ttm_tt_unpopulate_empty_ttm
[05:57:55] [PASSED] ttm_tt_swapin_basic
[05:57:55] ===================== [PASSED] ttm_tt ======================
[05:57:55] =================== ttm_bo (14 subtests) ===================
[05:57:55] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[05:57:55] [PASSED] Cannot be interrupted and sleeps
[05:57:55] [PASSED] Cannot be interrupted, locks straight away
[05:57:55] [PASSED] Can be interrupted, sleeps
[05:57:55] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[05:57:55] [PASSED] ttm_bo_reserve_locked_no_sleep
[05:57:55] [PASSED] ttm_bo_reserve_no_wait_ticket
[05:57:55] [PASSED] ttm_bo_reserve_double_resv
[05:57:55] [PASSED] ttm_bo_reserve_interrupted
[05:57:55] [PASSED] ttm_bo_reserve_deadlock
[05:57:55] [PASSED] ttm_bo_unreserve_basic
[05:57:55] [PASSED] ttm_bo_unreserve_pinned
[05:57:55] [PASSED] ttm_bo_unreserve_bulk
[05:57:55] [PASSED] ttm_bo_fini_basic
[05:57:55] [PASSED] ttm_bo_fini_shared_resv
[05:57:55] [PASSED] ttm_bo_pin_basic
[05:57:55] [PASSED] ttm_bo_pin_unpin_resource
[05:57:55] [PASSED] ttm_bo_multiple_pin_one_unpin
[05:57:55] ===================== [PASSED] ttm_bo ======================
[05:57:55] ============== ttm_bo_validate (22 subtests) ===============
[05:57:55] ============== ttm_bo_init_reserved_sys_man ===============
[05:57:55] [PASSED] Buffer object for userspace
[05:57:55] [PASSED] Kernel buffer object
[05:57:55] [PASSED] Shared buffer object
[05:57:55] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[05:57:55] ============== ttm_bo_init_reserved_mock_man ==============
[05:57:55] [PASSED] Buffer object for userspace
[05:57:55] [PASSED] Kernel buffer object
[05:57:55] [PASSED] Shared buffer object
[05:57:55] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[05:57:55] [PASSED] ttm_bo_init_reserved_resv
[05:57:55] ================== ttm_bo_validate_basic ==================
[05:57:55] [PASSED] Buffer object for userspace
[05:57:55] [PASSED] Kernel buffer object
[05:57:55] [PASSED] Shared buffer object
[05:57:55] ============== [PASSED] ttm_bo_validate_basic ==============
[05:57:55] [PASSED] ttm_bo_validate_invalid_placement
[05:57:55] ============= ttm_bo_validate_same_placement ==============
[05:57:55] [PASSED] System manager
[05:57:55] [PASSED] VRAM manager
[05:57:55] ========= [PASSED] ttm_bo_validate_same_placement ==========
[05:57:55] [PASSED] ttm_bo_validate_failed_alloc
[05:57:55] [PASSED] ttm_bo_validate_pinned
[05:57:55] [PASSED] ttm_bo_validate_busy_placement
[05:57:55] ================ ttm_bo_validate_multihop =================
[05:57:55] [PASSED] Buffer object for userspace
[05:57:55] [PASSED] Kernel buffer object
[05:57:55] [PASSED] Shared buffer object
[05:57:55] ============ [PASSED] ttm_bo_validate_multihop =============
[05:57:55] ========== ttm_bo_validate_no_placement_signaled ==========
[05:57:55] [PASSED] Buffer object in system domain, no page vector
[05:57:55] [PASSED] Buffer object in system domain with an existing page vector
[05:57:55] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[05:57:55] ======== ttm_bo_validate_no_placement_not_signaled ========
[05:57:55] [PASSED] Buffer object for userspace
[05:57:55] [PASSED] Kernel buffer object
[05:57:55] [PASSED] Shared buffer object
[05:57:55] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[05:57:55] [PASSED] ttm_bo_validate_move_fence_signaled
[05:57:55] ========= ttm_bo_validate_move_fence_not_signaled =========
[05:57:55] [PASSED] Waits for GPU
[05:57:55] [PASSED] Tries to lock straight away
[05:57:55] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[05:57:55] [PASSED] ttm_bo_validate_swapout
[05:57:55] [PASSED] ttm_bo_validate_happy_evict
[05:57:55] [PASSED] ttm_bo_validate_all_pinned_evict
[05:57:55] [PASSED] ttm_bo_validate_allowed_only_evict
[05:57:55] [PASSED] ttm_bo_validate_deleted_evict
[05:57:55] [PASSED] ttm_bo_validate_busy_domain_evict
[05:57:55] [PASSED] ttm_bo_validate_evict_gutting
[05:57:55] [PASSED] ttm_bo_validate_recrusive_evict
[05:57:55] ================= [PASSED] ttm_bo_validate =================
[05:57:55] ============================================================
[05:57:55] Testing complete. Ran 102 tests: passed: 102
[05:57:55] Elapsed time: 11.642s total, 1.786s configuring, 9.591s building, 0.214s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 8+ messages in thread* ✓ Xe.CI.BAT: success for drm/i915/display: Program TRANS_VTOTAL from mode vtotal (rev4)
2026-06-17 4:58 [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL from mode vtotal Mitul Golani
2026-06-17 5:57 ` ✓ CI.KUnit: success for drm/i915/display: Program TRANS_VTOTAL from mode vtotal (rev4) Patchwork
@ 2026-06-17 6:35 ` Patchwork
2026-06-17 12:13 ` ✓ Xe.CI.FULL: " Patchwork
2026-07-02 15:41 ` [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL from mode vtotal Jani Nikula
3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2026-06-17 6:35 UTC (permalink / raw)
To: Golani, Mitulkumar Ajitkumar; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1650 bytes --]
== Series Details ==
Series: drm/i915/display: Program TRANS_VTOTAL from mode vtotal (rev4)
URL : https://patchwork.freedesktop.org/series/168577/
State : success
== Summary ==
CI Bug Log - changes from xe-5269-29ea43790111df065ed84e6cb076c64322c306f1_BAT -> xe-pw-168577v4_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-168577v4_BAT that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@xe_waitfence@engine:
- bat-bmg-2: [FAIL][1] ([Intel XE#6519]) -> [PASS][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/bat-bmg-2/igt@xe_waitfence@engine.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/bat-bmg-2/igt@xe_waitfence@engine.html
[Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
Build changes
-------------
* IGT: IGT_8966 -> IGT_8967
* Linux: xe-5269-29ea43790111df065ed84e6cb076c64322c306f1 -> xe-pw-168577v4
IGT_8966: 9b33225c761bfe8c8c266bc56558d75c700029fb @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8967: 46e60a541c8ce6e4e0046bb68fc577c4b502e5f2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5269-29ea43790111df065ed84e6cb076c64322c306f1: 29ea43790111df065ed84e6cb076c64322c306f1
xe-pw-168577v4: 168577v4
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/index.html
[-- Attachment #2: Type: text/html, Size: 2229 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread* ✓ Xe.CI.FULL: success for drm/i915/display: Program TRANS_VTOTAL from mode vtotal (rev4)
2026-06-17 4:58 [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL from mode vtotal Mitul Golani
2026-06-17 5:57 ` ✓ CI.KUnit: success for drm/i915/display: Program TRANS_VTOTAL from mode vtotal (rev4) Patchwork
2026-06-17 6:35 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-06-17 12:13 ` Patchwork
2026-07-02 15:41 ` [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL from mode vtotal Jani Nikula
3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2026-06-17 12:13 UTC (permalink / raw)
To: Golani, Mitulkumar Ajitkumar; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 25304 bytes --]
== Series Details ==
Series: drm/i915/display: Program TRANS_VTOTAL from mode vtotal (rev4)
URL : https://patchwork.freedesktop.org/series/168577/
State : success
== Summary ==
CI Bug Log - changes from xe-5269-29ea43790111df065ed84e6cb076c64322c306f1_FULL -> xe-pw-168577v4_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-168577v4_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- shard-bmg: NOTRUN -> [SKIP][1] ([Intel XE#2233])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-6/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-bmg: [PASS][2] -> [FAIL][3] ([Intel XE#3718] / [Intel XE#6078])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-bmg-6/igt@kms_async_flips@alternate-sync-async-flip.html
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-7/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2:
- shard-bmg: [PASS][4] -> [FAIL][5] ([Intel XE#6078])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-bmg-6/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-7/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#2370])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-7/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#1124]) +2 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_bw@linear-tiling-2-displays-target-3840x2160p:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#367]) +1 other test skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-10/igt@kms_bw@linear-tiling-2-displays-target-3840x2160p.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#3432])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2887]) +3 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-5/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_chamelium_edid@dp-edid-stress-resolution-4k:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2252]) +1 other test skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-8/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html
* igt@kms_content_protection@lic-type-1:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#7642])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-2/igt@kms_content_protection@lic-type-1.html
* igt@kms_cursor_crc@cursor-offscreen-max-size:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2320])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-10/igt@kms_cursor_crc@cursor-offscreen-max-size.html
* igt@kms_cursor_crc@cursor-random-512x512:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#2321] / [Intel XE#7355])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-6/igt@kms_cursor_crc@cursor-random-512x512.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc-ultrajoiner:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#8265]) +1 other test skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-3/igt@kms_dsc@dsc-with-output-formats-with-bpc-ultrajoiner.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#6126] / [Intel XE#776])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-5/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#7178] / [Intel XE#7351])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2311]) +21 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#4141]) +4 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-tiling-y:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2352] / [Intel XE#7399])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-9/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#7061] / [Intel XE#7356])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@fbchdr-abgr161616f-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#7061]) +1 other test skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-10/igt@kms_frontbuffer_tracking@fbchdr-abgr161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#2313]) +15 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html
* igt@kms_hdmi_inject@inject-audio:
- shard-bmg: [PASS][24] -> [SKIP][25] ([Intel XE#7308])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-bmg-4/igt@kms_hdmi_inject@inject-audio.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-10/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [PASS][26] -> [SKIP][27] ([Intel XE#1503])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-bmg-6/igt@kms_hdr@invalid-hdr.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-9/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: [PASS][28] -> [SKIP][29] ([Intel XE#7922]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-bmg-6/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-9/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#4298] / [Intel XE#5873])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-8/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#7283]) +1 other test skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-2/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier.html
* igt@kms_pm_backlight@fade:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#7376] / [Intel XE#7760] / [Intel XE#870])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-4/igt@kms_pm_backlight@fade.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-3/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#1489]) +1 other test skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr@pr-sprite-plane-onoff:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-3/igt@kms_psr@pr-sprite-plane-onoff.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#3904] / [Intel XE#7342])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_sharpness_filter@invalid-filter-with-nearest-neighbor:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#6503])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-3/igt@kms_sharpness_filter@invalid-filter-with-nearest-neighbor.html
* igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-vram:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#7636]) +2 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-7/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-vram.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-4/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html
* igt@xe_exec_fault_mode@once-multi-queue-userptr-rebind-imm:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#7136]) +3 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-9/igt@xe_exec_fault_mode@once-multi-queue-userptr-rebind-imm.html
* igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#6874]) +9 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-3/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority.html
* igt@xe_exec_reset@cm-multi-queue-cat-error:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#7866]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-5/igt@xe_exec_reset@cm-multi-queue-cat-error.html
* igt@xe_exec_system_allocator@many-large-execqueues-free-madvise:
- shard-bmg: [PASS][43] -> [INCOMPLETE][44] ([Intel XE#8159])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-bmg-1/igt@xe_exec_system_allocator@many-large-execqueues-free-madvise.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-2/igt@xe_exec_system_allocator@many-large-execqueues-free-madvise.html
* igt@xe_exec_system_allocator@many-malloc-madvise:
- shard-bmg: [PASS][45] -> [ABORT][46] ([Intel XE#8007])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-bmg-5/igt@xe_exec_system_allocator@many-malloc-madvise.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-1/igt@xe_exec_system_allocator@many-malloc-madvise.html
- shard-lnl: [PASS][47] -> [ABORT][48] ([Intel XE#8007])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-lnl-3/igt@xe_exec_system_allocator@many-malloc-madvise.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-lnl-7/igt@xe_exec_system_allocator@many-malloc-madvise.html
* igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-invalidate:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#7138]) +1 other test skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-6/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-invalidate.html
* igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#6281] / [Intel XE#7426])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-6/igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add.html
* igt@xe_pat@pat-sw-hw-reset-compare:
- shard-bmg: NOTRUN -> [FAIL][51] ([Intel XE#7695])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-8/igt@xe_pat@pat-sw-hw-reset-compare.html
* igt@xe_pm@d3cold-multiple-execs:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#2284] / [Intel XE#7370])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-7/igt@xe_pm@d3cold-multiple-execs.html
* igt@xe_pxp@regular-src-to-pxp-dest-rendercopy:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#4733] / [Intel XE#7417])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-4/igt@xe_pxp@regular-src-to-pxp-dest-rendercopy.html
* igt@xe_query@multigpu-query-invalid-extension:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#944])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-7/igt@xe_query@multigpu-query-invalid-extension.html
#### Possible fixes ####
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [FAIL][55] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][56] +1 other test pass
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: [SKIP][57] ([Intel XE#7915]) -> [PASS][58] +3 other tests pass
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-bmg-2/igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-3/igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-lnl: [SKIP][59] ([Intel XE#8361]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-lnl-5/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-lnl-3/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@xe_exec_reset@long-spin-many-preempt-threads:
- shard-bmg: [FAIL][61] ([Intel XE#7956]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-bmg-10/igt@xe_exec_reset@long-spin-many-preempt-threads.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-8/igt@xe_exec_reset@long-spin-many-preempt-threads.html
* igt@xe_wedged@wedged-mode-toggle:
- shard-bmg: [ABORT][63] ([Intel XE#8007]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-bmg-4/igt@xe_wedged@wedged-mode-toggle.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-1/igt@xe_wedged@wedged-mode-toggle.html
#### Warnings ####
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][65] ([Intel XE#3544] / [Intel XE#7916]) -> [SKIP][66] ([Intel XE#3544] / [Intel XE#7915] / [Intel XE#7916])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-2/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [SKIP][67] ([Intel XE#7916]) -> [SKIP][68] ([Intel XE#7915]) +1 other test skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-bmg-5/igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-2/igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [SKIP][69] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][70] ([Intel XE#1729] / [Intel XE#7424])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][71] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][72] ([Intel XE#2426] / [Intel XE#5848])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [INCOMPLETE][73] ([Intel XE#6321]) -> [INCOMPLETE][74] ([Intel XE#6321] / [Intel XE#8355]) +1 other test incomplete
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5269-29ea43790111df065ed84e6cb076c64322c306f1/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
[Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#5873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5873
[Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
[Intel XE#6126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6126
[Intel XE#6281]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6281
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
[Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7308
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
[Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
[Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7426
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
[Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
[Intel XE#7695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7695
[Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
[Intel XE#7760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7760
[Intel XE#7866]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7866
[Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
[Intel XE#7916]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7916
[Intel XE#7922]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7922
[Intel XE#7956]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7956
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8159]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8159
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#8361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8361
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* IGT: IGT_8966 -> IGT_8967
* Linux: xe-5269-29ea43790111df065ed84e6cb076c64322c306f1 -> xe-pw-168577v4
IGT_8966: 9b33225c761bfe8c8c266bc56558d75c700029fb @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8967: 46e60a541c8ce6e4e0046bb68fc577c4b502e5f2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5269-29ea43790111df065ed84e6cb076c64322c306f1: 29ea43790111df065ed84e6cb076c64322c306f1
xe-pw-168577v4: 168577v4
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168577v4/index.html
[-- Attachment #2: Type: text/html, Size: 27781 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL from mode vtotal
2026-06-17 4:58 [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL from mode vtotal Mitul Golani
` (2 preceding siblings ...)
2026-06-17 12:13 ` ✓ Xe.CI.FULL: " Patchwork
@ 2026-07-02 15:41 ` Jani Nikula
2026-07-02 16:14 ` Golani, Mitulkumar Ajitkumar
3 siblings, 1 reply; 8+ messages in thread
From: Jani Nikula @ 2026-07-02 15:41 UTC (permalink / raw)
To: Mitul Golani, intel-gfx
Cc: intel-xe, ankit.k.nautiyal, ville.syrjala, suraj.kandpal
On Wed, 17 Jun 2026, Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> wrote:
> There are monitors being sensitive to MSA and end up
> blanking out when we override Vtotal, DP transcoder
> uses TRANS_VTOTAL to derive MSA VTotal. Avoid overriding
> crtc_vtotal to 1 on platform which supports VRR Timing
> generator and always program VTOTAL from mode timing in
> transcoder timing paths.
Should this have had Fixes: tag? Does it require a backport?
BR,
Jani.
>
> --v2:
> - Remove write to crtc_state->hw.adjusted_mode.crtc_vtotal
> during intel_vrr_get_config. (Ankit)
> - Fix merge conflicts.
>
> Bspec: 70001
> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Suraj Kandpal <suraj.kandpal@intel.com>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 17 -----------------
> drivers/gpu/drm/i915/display/intel_vrr.c | 10 ----------
> 2 files changed, 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index e76aa6c8dab6..42eb4c5bc9b6 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2737,15 +2737,6 @@ void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_state,
> HSYNC_START(adjusted_mode->crtc_hsync_start - 1) |
> HSYNC_END(adjusted_mode->crtc_hsync_end - 1));
>
> - /*
> - * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
> - * bits are not required. Since the support for these bits is going to
> - * be deprecated in upcoming platforms, avoid writing these bits for the
> - * platforms that do not use legacy Timing Generator.
> - */
> - if (intel_vrr_always_use_vrr_tg(display))
> - crtc_vtotal = 1;
> -
> intel_de_write(display, TRANS_VTOTAL(display, transcoder),
> VACTIVE(crtc_vdisplay - 1) |
> VTOTAL(crtc_vtotal - 1));
> @@ -2834,14 +2825,6 @@ void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc_state,
> intel_de_write(display, TRANS_VSYNC(display, transcoder),
> VSYNC_START(adjusted_mode->crtc_vsync_start - 1) |
> VSYNC_END(adjusted_mode->crtc_vsync_end - 1));
> - /*
> - * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
> - * bits are not required. Since the support for these bits is going to
> - * be deprecated in upcoming platforms, avoid writing these bits for the
> - * platforms that do not use legacy Timing Generator.
> - */
> - if (intel_vrr_always_use_vrr_tg(display))
> - crtc_vtotal = 1;
>
> /*
> * The double buffer latch point for TRANS_VTOTAL
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index cd380fe8fd01..5d9b11185296 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -1102,16 +1102,6 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
> crtc_state->vrr.vmin += intel_vrr_vmin_flipline_offset(display);
> }
>
> - /*
> - * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
> - * bits are not filled. Since for these platforms TRAN_VMIN is always
> - * filled with crtc_vtotal, use TRAN_VRR_VMIN to get the vtotal for
> - * adjusted_mode.
> - */
> - if (intel_vrr_always_use_vrr_tg(display))
> - crtc_state->hw.adjusted_mode.crtc_vtotal =
> - intel_vrr_vmin_vtotal(crtc_state);
> -
> if (HAS_AS_SDP(display)) {
> trans_vrr_vsync =
> intel_de_read(display,
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 8+ messages in thread* RE: [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL from mode vtotal
2026-07-02 15:41 ` [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL from mode vtotal Jani Nikula
@ 2026-07-02 16:14 ` Golani, Mitulkumar Ajitkumar
2026-07-02 17:26 ` Jani Nikula
0 siblings, 1 reply; 8+ messages in thread
From: Golani, Mitulkumar Ajitkumar @ 2026-07-02 16:14 UTC (permalink / raw)
To: Jani Nikula, intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org, Nautiyal, Ankit K,
ville.syrjala@linux.intel.com, Kandpal, Suraj
> -----Original Message-----
> From: Jani Nikula <jani.nikula@linux.intel.com>
> Sent: 02 July 2026 21:11
> To: Golani, Mitulkumar Ajitkumar <mitulkumar.ajitkumar.golani@intel.com>;
> intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org; Nautiyal, Ankit K
> <ankit.k.nautiyal@intel.com>; ville.syrjala@linux.intel.com; Kandpal, Suraj
> <suraj.kandpal@intel.com>
> Subject: Re: [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL
> from mode vtotal
>
> On Wed, 17 Jun 2026, Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> wrote:
> > There are monitors being sensitive to MSA and end up blanking out when
> > we override Vtotal, DP transcoder uses TRANS_VTOTAL to derive MSA
> > VTotal. Avoid overriding crtc_vtotal to 1 on platform which supports
> > VRR Timing generator and always program VTOTAL from mode timing in
> > transcoder timing paths.
>
> Should this have had Fixes: tag? Does it require a backport?
>
> BR,
> Jani.
Hi Jani,
No. This change was made to align the driver with the updated VTOTAL programming requirements rather than to fix a regression introduced by a specific upstream commit.
The regression we've recently observed during the GOP-to-driver handoff appears to be a separate issue introduced by this change and will need to be addressed with a follow-up fix.
Regards,
Mitul
>
> >
> > --v2:
> > - Remove write to crtc_state->hw.adjusted_mode.crtc_vtotal
> > during intel_vrr_get_config. (Ankit)
> > - Fix merge conflicts.
> >
> > Bspec: 70001
> > Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Suraj Kandpal <suraj.kandpal@intel.com>
> > Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> > Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 17 -----------------
> > drivers/gpu/drm/i915/display/intel_vrr.c | 10 ----------
> > 2 files changed, 27 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index e76aa6c8dab6..42eb4c5bc9b6 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -2737,15 +2737,6 @@ void intel_set_transcoder_timings(const struct
> intel_crtc_state *crtc_state,
> > HSYNC_START(adjusted_mode->crtc_hsync_start - 1) |
> > HSYNC_END(adjusted_mode->crtc_hsync_end - 1));
> >
> > - /*
> > - * For platforms that always use VRR Timing Generator, the
> VTOTAL.Vtotal
> > - * bits are not required. Since the support for these bits is going to
> > - * be deprecated in upcoming platforms, avoid writing these bits for
> the
> > - * platforms that do not use legacy Timing Generator.
> > - */
> > - if (intel_vrr_always_use_vrr_tg(display))
> > - crtc_vtotal = 1;
> > -
> > intel_de_write(display, TRANS_VTOTAL(display, transcoder),
> > VACTIVE(crtc_vdisplay - 1) |
> > VTOTAL(crtc_vtotal - 1));
> > @@ -2834,14 +2825,6 @@ void intel_set_transcoder_timings_lrr(const
> struct intel_crtc_state *crtc_state,
> > intel_de_write(display, TRANS_VSYNC(display, transcoder),
> > VSYNC_START(adjusted_mode->crtc_vsync_start - 1) |
> > VSYNC_END(adjusted_mode->crtc_vsync_end - 1));
> > - /*
> > - * For platforms that always use VRR Timing Generator, the
> VTOTAL.Vtotal
> > - * bits are not required. Since the support for these bits is going to
> > - * be deprecated in upcoming platforms, avoid writing these bits for
> the
> > - * platforms that do not use legacy Timing Generator.
> > - */
> > - if (intel_vrr_always_use_vrr_tg(display))
> > - crtc_vtotal = 1;
> >
> > /*
> > * The double buffer latch point for TRANS_VTOTAL diff --git
> > a/drivers/gpu/drm/i915/display/intel_vrr.c
> > b/drivers/gpu/drm/i915/display/intel_vrr.c
> > index cd380fe8fd01..5d9b11185296 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> > @@ -1102,16 +1102,6 @@ void intel_vrr_get_config(struct intel_crtc_state
> *crtc_state)
> > crtc_state->vrr.vmin +=
> intel_vrr_vmin_flipline_offset(display);
> > }
> >
> > - /*
> > - * For platforms that always use VRR Timing Generator, the
> VTOTAL.Vtotal
> > - * bits are not filled. Since for these platforms TRAN_VMIN is
> always
> > - * filled with crtc_vtotal, use TRAN_VRR_VMIN to get the
> vtotal for
> > - * adjusted_mode.
> > - */
> > - if (intel_vrr_always_use_vrr_tg(display))
> > - crtc_state->hw.adjusted_mode.crtc_vtotal =
> > - intel_vrr_vmin_vtotal(crtc_state);
> > -
> > if (HAS_AS_SDP(display)) {
> > trans_vrr_vsync =
> > intel_de_read(display,
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 8+ messages in thread* RE: [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL from mode vtotal
2026-07-02 16:14 ` Golani, Mitulkumar Ajitkumar
@ 2026-07-02 17:26 ` Jani Nikula
0 siblings, 0 replies; 8+ messages in thread
From: Jani Nikula @ 2026-07-02 17:26 UTC (permalink / raw)
To: Golani, Mitulkumar Ajitkumar, intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org, Nautiyal, Ankit K,
ville.syrjala@linux.intel.com, Kandpal, Suraj
On Thu, 02 Jul 2026, "Golani, Mitulkumar Ajitkumar" <mitulkumar.ajitkumar.golani@intel.com> wrote:
> No. This change was made to align the driver with the updated VTOTAL
> programming requirements rather than to fix a regression introduced by
> a specific upstream commit.
>
> The regression we've recently observed during the GOP-to-driver
> handoff appears to be a separate issue introduced by this change and
> will need to be addressed with a follow-up fix.
Okay, thanks, sorry for the noise. :)
BR,
Jani.
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL from mode vtotal
@ 2026-06-17 4:45 Mitul Golani
0 siblings, 0 replies; 8+ messages in thread
From: Mitul Golani @ 2026-06-17 4:45 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, ankit.k.nautiyal, ville.syrjala, suraj.kandpal
There are monitors being sensitive to MSA and end up
blanking out when we override Vtotal, DP transcoder
uses TRANS_VTOTAL to derive MSA VTotal. Avoid overriding
crtc_vtotal to 1 on platform which supports VRR Timing
generator and always program VTOTAL from mode timing in
transcoder timing paths.
--v2:
- Remove write to crtc_state->hw.adjusted_mode.crtc_vtotal
during intel_vrr_get_config. (Ankit)
Bspec: 70001
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 17 -----------------
drivers/gpu/drm/i915/display/intel_vrr.c | 10 ----------
2 files changed, 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e2e4b00a8fa9..eb54f20b1859 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2731,15 +2731,6 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta
HSYNC_START(adjusted_mode->crtc_hsync_start - 1) |
HSYNC_END(adjusted_mode->crtc_hsync_end - 1));
- /*
- * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
- * bits are not required. Since the support for these bits is going to
- * be deprecated in upcoming platforms, avoid writing these bits for the
- * platforms that do not use legacy Timing Generator.
- */
- if (intel_vrr_always_use_vrr_tg(display))
- crtc_vtotal = 1;
-
intel_de_write(display, TRANS_VTOTAL(display, cpu_transcoder),
VACTIVE(crtc_vdisplay - 1) |
VTOTAL(crtc_vtotal - 1));
@@ -2826,14 +2817,6 @@ static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc
intel_de_write(display, TRANS_VSYNC(display, cpu_transcoder),
VSYNC_START(adjusted_mode->crtc_vsync_start - 1) |
VSYNC_END(adjusted_mode->crtc_vsync_end - 1));
- /*
- * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
- * bits are not required. Since the support for these bits is going to
- * be deprecated in upcoming platforms, avoid writing these bits for the
- * platforms that do not use legacy Timing Generator.
- */
- if (intel_vrr_always_use_vrr_tg(display))
- crtc_vtotal = 1;
/*
* The double buffer latch point for TRANS_VTOTAL
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index e03b5daac5be..bd90282b2ad2 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -1097,16 +1097,6 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
crtc_state->vrr.vmin += intel_vrr_vmin_flipline_offset(display);
}
- /*
- * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
- * bits are not filled. Since for these platforms TRAN_VMIN is always
- * filled with crtc_vtotal, use TRAN_VRR_VMIN to get the vtotal for
- * adjusted_mode.
- */
- if (intel_vrr_always_use_vrr_tg(display))
- crtc_state->hw.adjusted_mode.crtc_vtotal =
- intel_vrr_vmin_vtotal(crtc_state);
-
if (HAS_AS_SDP(display)) {
trans_vrr_vsync =
intel_de_read(display,
--
2.48.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2026-07-02 17:26 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2026-06-17 4:58 [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL from mode vtotal Mitul Golani
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2026-07-02 15:41 ` [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL from mode vtotal Jani Nikula
2026-07-02 16:14 ` Golani, Mitulkumar Ajitkumar
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