From: "Iddamsetty, Aravind" <aravind.iddamsetty@intel.com>
To: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
Cc: Bommu Krishnaiah <krishnaiah.bommu@intel.com>,
intel-xe@lists.freedesktop.org,
Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Subject: Re: [Intel-xe] [PATCH v4 2/2] drm/xe/pmu: Enable PMU interface
Date: Wed, 16 Aug 2023 11:18:47 +0530 [thread overview]
Message-ID: <0d096901-3085-9b25-5d4a-d7c1adb44900@intel.com> (raw)
In-Reply-To: <875y5htupj.wl-ashutosh.dixit@intel.com>
On 14-08-2023 22:41, Dixit, Ashutosh wrote:
> On Mon, 14 Aug 2023 06:12:13 -0700, Aravind Iddamsetty wrote:
>>
>
> Hi Aravind,
>
> So I am not going to review this version of the patch. Let's do it as was
> discussed today, I am assuming something like: when the event is "opened"
> do a xe_device_mem_access_get and forcewake_get from some non-atomic
> context. And keep these references till the event is "closed". Also since
> we are keeping the device awake through PMU data collection, no need to
> cache register values during rpm_suspend?
Hi Ashutosh,
I was thinking of a two stage effort, first have this series merged in
the current form and extend it in the later, please let me know if you
think otherwise.
yes we still need to cache registers during suspend as that can happen
even when PMU is not opened and also PMU can be opened when in suspend
and we have to return the cached value.
We shall only take forcewake when any event is opened and when the
device is awake.
Thanks,
Aravind.
>
> Thanks.
> --
> Ashutosh
next prev parent reply other threads:[~2023-08-16 5:49 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-14 13:12 [Intel-xe] [PATCH v4 0/2] drm/xe/pmu: Enable PMU interface Aravind Iddamsetty
2023-08-14 13:10 ` [Intel-xe] ✓ CI.Patch_applied: success for drm/xe/pmu: Enable PMU interface (rev4) Patchwork
2023-08-14 13:10 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-08-14 13:11 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-08-14 13:12 ` [Intel-xe] [PATCH v3 1/2] drm/xe: Get GT clock to nanosecs Aravind Iddamsetty
2023-08-14 13:12 ` [Intel-xe] [PATCH v4 2/2] drm/xe/pmu: Enable PMU interface Aravind Iddamsetty
2023-08-14 17:11 ` Dixit, Ashutosh
2023-08-16 5:48 ` Iddamsetty, Aravind [this message]
2023-08-14 13:15 ` [Intel-xe] ✓ CI.Build: success for drm/xe/pmu: Enable PMU interface (rev4) Patchwork
2023-08-14 13:16 ` [Intel-xe] ✓ CI.Hooks: " Patchwork
2023-08-14 13:16 ` [Intel-xe] ✗ CI.checksparse: warning " Patchwork
2023-08-14 13:53 ` [Intel-xe] ○ CI.BAT: info " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=0d096901-3085-9b25-5d4a-d7c1adb44900@intel.com \
--to=aravind.iddamsetty@intel.com \
--cc=ashutosh.dixit@intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=krishnaiah.bommu@intel.com \
--cc=tvrtko.ursulin@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox