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From: Gustavo Sousa <gustavo.sousa@intel.com>
To: Michal Wajdeczko <michal.wajdeczko@intel.com>,
	<intel-xe@lists.freedesktop.org>
Cc: Matt Roper <matthew.d.roper@intel.com>,
	Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [PATCH 2/2] drm/xe/tests/pci: Check dma_mask_size, va_bits and vm_max_level
Date: Mon, 20 Oct 2025 20:16:08 -0300	[thread overview]
Message-ID: <176100216827.3231.12518242353810286320@intel.com> (raw)
In-Reply-To: <afea5ffb-9429-4e54-950a-0c7cae6f391e@intel.com>

Quoting Michal Wajdeczko (2025-10-16 16:02:54-03:00)
>
>
>On 10/16/2025 7:49 PM, Gustavo Sousa wrote:
>> Members dma_mask_size, va_bits and vm_max_level of struct xe_device_desc
>> are all expected to be non-zero.  Add checks for that in
>> check_platform_desc().
>> 
>> Suggested-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
>> ---
>> 
>> Michal, I added a "Suggested-by" on your name because of [1].  Please
>> let me know if you are okay with that.
>> 
>> [1] https://lore.kernel.org/all/43c824c1-dbfc-48b1-9c90-389e3bf24c9a@intel.com/
>> ---
>>  drivers/gpu/drm/xe/tests/xe_pci_test.c | 5 +++++
>>  1 file changed, 5 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/xe/tests/xe_pci_test.c b/drivers/gpu/drm/xe/tests/xe_pci_test.c
>> index f09efb523b7e..a4dbc8ddee43 100644
>> --- a/drivers/gpu/drm/xe/tests/xe_pci_test.c
>> +++ b/drivers/gpu/drm/xe/tests/xe_pci_test.c
>> @@ -50,8 +50,13 @@ static void check_platform_desc(struct kunit *test)
>>          const struct xe_device_desc *desc =
>>                  (const struct xe_device_desc *)pci->driver_data;
>>  
>> +        KUNIT_ASSERT_GT(test, desc->dma_mask_size, 0);
>
>nit: maybe check against 0/false using:
>
>        KUNIT_EXPECT_TRUE(test, desc->dma_mask_size);

I think I prefer to use KUNIT_EXPECT_GT() because the values are
unsigned integers as opposed to flags/booleans.

>
>> +
>>          KUNIT_ASSERT_GT(test, (int)desc->max_gt_per_tile, 0);
>>          KUNIT_ASSERT_LE(test, (int)desc->max_gt_per_tile, XE_MAX_GT_PER_TILE);
>> +
>> +        KUNIT_ASSERT_GT(test, desc->va_bits, 0);
>
>        KUNIT_EXPECT_TRUE(test, desc->va_bits);
>
>and try to test the upper limit too (where applicable)?
>
>        KUNIT_EXPECT_LE(test, desc->va_bits, 64);

Yep. Sounds good.

>
>> +        KUNIT_ASSERT_GT(test, desc->vm_max_level, 0);
>>  }
>>  
>>  static struct kunit_case xe_pci_tests[] = {
>> 
>
>but not a blocker, and still move in the right direction, so
>
>Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>

Thanks!

--
Gustavo Sousa

  reply	other threads:[~2025-10-20 23:16 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-16 17:49 [PATCH 0/2] drm/xe: Add kunit checks for dma_mask_size, va_bits and vm_max_level Gustavo Sousa
2025-10-16 17:49 ` [PATCH 1/2] drm/xe/tests/pci: Convert GT count check to general device check Gustavo Sousa
2025-10-16 18:55   ` Michal Wajdeczko
2025-10-20 23:11     ` Gustavo Sousa
2025-10-16 17:49 ` [PATCH 2/2] drm/xe/tests/pci: Check dma_mask_size, va_bits and vm_max_level Gustavo Sousa
2025-10-16 19:02   ` Michal Wajdeczko
2025-10-20 23:16     ` Gustavo Sousa [this message]
2025-10-16 17:57 ` ✓ CI.KUnit: success for drm/xe: Add kunit checks for " Patchwork
2025-10-16 18:38 ` ✓ Xe.CI.BAT: " Patchwork
2025-10-17 15:19 ` ✗ Xe.CI.Full: failure " Patchwork

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