From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: Matthew Brost <matthew.brost@intel.com>, intel-xe@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [PATCH] drm/xe: Prefer BIT/GENMASK macros over shifts
Date: Tue, 23 Jan 2024 21:14:06 +0100 [thread overview]
Message-ID: <194d5e8d-e462-474b-93ac-154f82ecb4b4@intel.com> (raw)
In-Reply-To: <20240123190201.1599333-1-matthew.brost@intel.com>
On 23.01.2024 20:02, Matthew Brost wrote:
> Using BIT/GENMASK macros is a better convention than using manual shift
> and will also fix build errors [1].
>
> [1] http://kisskb.ellerman.id.au/kisskb/buildresult/15112475/log/
commit message and diff doesn't match (missed patch ?)
and the actual problem was only due to missed "u" suffix in
GUC_CTB_MSG_0_FENCE and GUC_HXG_MSG_0_ORIGIN definitions (as using 0x
notation alone really doesn't make those integer definitions unsigned)
note that those were already fixed on i915 by commit 962bd34bb457f6353f
and discussed here in [1]
[1] https://patchwork.freedesktop.org/patch/573620/?series=128312&rev=1
>
> Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_guc_ct.c | 2 +-
> drivers/gpu/drm/xe/xe_guc_relay.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
> index ee5d99456aeb..fc5cc2b2bcc5 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ct.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ct.c
> @@ -866,7 +866,7 @@ static int parse_g2h_response(struct xe_guc_ct *ct, u32 *msg, u32 len)
> */
> if (fence & CT_SEQNO_UNTRACKED) {
> if (type == GUC_HXG_TYPE_RESPONSE_FAILURE)
> - xe_gt_err(gt, "FAST_REQ H2G fence 0x%x failed! e=0x%x, h=%u\n",
> + xe_gt_err(gt, "FAST_REQ H2G fence 0x%x failed! e=0x%lx, h=%lu\n",
> fence,
> FIELD_GET(GUC_HXG_FAILURE_MSG_0_ERROR, hxg[0]),
> FIELD_GET(GUC_HXG_FAILURE_MSG_0_HINT, hxg[0]));
> diff --git a/drivers/gpu/drm/xe/xe_guc_relay.c b/drivers/gpu/drm/xe/xe_guc_relay.c
> index c0a2d8d5d3b3..2d1f19270d9a 100644
> --- a/drivers/gpu/drm/xe/xe_guc_relay.c
> +++ b/drivers/gpu/drm/xe/xe_guc_relay.c
> @@ -300,7 +300,7 @@ static int relay_send_transaction(struct xe_guc_relay *relay, struct relay_trans
> ret = -EPROTO;
> }
> if (unlikely(ret < 0)) {
> - relay_notice(relay, "Failed to send %s.%x to GuC (%pe) %*ph ...\n",
> + relay_notice(relay, "Failed to send %s.%lx to GuC (%pe) %*ph ...\n",
> guc_hxg_type_to_string(FIELD_GET(GUC_HXG_MSG_0_TYPE, buf[0])),
> FIELD_GET(GUC_HXG_REQUEST_MSG_0_ACTION, buf[0]),
> ERR_PTR(ret), (int)sizeof(u32) * txn->offset, buf);
next prev parent reply other threads:[~2024-01-23 20:14 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-23 19:02 [PATCH] drm/xe: Prefer BIT/GENMASK macros over shifts Matthew Brost
2024-01-23 19:19 ` Jani Nikula
2024-01-23 21:04 ` Matthew Brost
2024-01-23 19:57 ` ✓ CI.Patch_applied: success for " Patchwork
2024-01-23 19:57 ` ✗ CI.checkpatch: warning " Patchwork
2024-01-23 19:58 ` ✓ CI.KUnit: success " Patchwork
2024-01-23 20:01 ` ✗ CI.Build: failure " Patchwork
2024-01-23 20:14 ` Michal Wajdeczko [this message]
2024-01-23 21:08 ` [PATCH] " Matthew Brost
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