[PATCH] drm/xe: Prefer BIT/GENMASK macros over shifts

[Matthew Brost <matthew.brost@intel.com>]

Using BIT/GENMASK macros is a better convention than using manual shift
and will also fix build errors [1].

[1] http://kisskb.ellerman.id.au/kisskb/buildresult/15112475/log/

Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_guc_ct.c    | 2 +-
 drivers/gpu/drm/xe/xe_guc_relay.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
index ee5d99456aeb..fc5cc2b2bcc5 100644
--- a/drivers/gpu/drm/xe/xe_guc_ct.c
+++ b/drivers/gpu/drm/xe/xe_guc_ct.c
@@ -866,7 +866,7 @@ static int parse_g2h_response(struct xe_guc_ct *ct, u32 *msg, u32 len)
 	 */
 	if (fence & CT_SEQNO_UNTRACKED) {
 		if (type == GUC_HXG_TYPE_RESPONSE_FAILURE)
-			xe_gt_err(gt, "FAST_REQ H2G fence 0x%x failed! e=0x%x, h=%u\n",
+			xe_gt_err(gt, "FAST_REQ H2G fence 0x%x failed! e=0x%lx, h=%lu\n",
 				  fence,
 				  FIELD_GET(GUC_HXG_FAILURE_MSG_0_ERROR, hxg[0]),
 				  FIELD_GET(GUC_HXG_FAILURE_MSG_0_HINT, hxg[0]));
diff --git a/drivers/gpu/drm/xe/xe_guc_relay.c b/drivers/gpu/drm/xe/xe_guc_relay.c
index c0a2d8d5d3b3..2d1f19270d9a 100644
--- a/drivers/gpu/drm/xe/xe_guc_relay.c
+++ b/drivers/gpu/drm/xe/xe_guc_relay.c
@@ -300,7 +300,7 @@ static int relay_send_transaction(struct xe_guc_relay *relay, struct relay_trans
 		ret = -EPROTO;
 	}
 	if (unlikely(ret < 0)) {
-		relay_notice(relay, "Failed to send %s.%x to GuC (%pe) %*ph ...\n",
+		relay_notice(relay, "Failed to send %s.%lx to GuC (%pe) %*ph ...\n",
 			     guc_hxg_type_to_string(FIELD_GET(GUC_HXG_MSG_0_TYPE, buf[0])),
 			     FIELD_GET(GUC_HXG_REQUEST_MSG_0_ACTION, buf[0]),
 			     ERR_PTR(ret), (int)sizeof(u32) * txn->offset, buf);
-- 
2.34.1