From: Matthew Auld <matthew.auld@intel.com>
To: intel-xe@lists.freedesktop.org
Subject: [Intel-xe] [PATCH v3 2/5] drm/xe/ct: serialise fast_lock during CT disable
Date: Tue, 4 Jul 2023 14:45:27 +0100 [thread overview]
Message-ID: <20230704134524.138377-9-matthew.auld@intel.com> (raw)
In-Reply-To: <20230704134524.138377-7-matthew.auld@intel.com>
The fast-path CT could be running as we enter a runtime-suspend or
potentially a GT reset, however here we only use the ct->fast_lock and
not the full ct->lock. Before disabling the CT, also serialise against
the fast_lock to ensure any in-progress work finishes before we start
nuking the CT related stuff. Once we disable ct->enabled and drop the
lock, any new work should fail gracefully, and anything that was in
progress should be finished.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/xe/xe_guc_ct.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
index b7aecc480098..ab51b54b882d 100644
--- a/drivers/gpu/drm/xe/xe_guc_ct.c
+++ b/drivers/gpu/drm/xe/xe_guc_ct.c
@@ -301,8 +301,10 @@ int xe_guc_ct_enable(struct xe_guc_ct *ct)
goto err_out;
mutex_lock(&ct->lock);
+ spin_lock_irq(&ct->fast_lock);
ct->g2h_outstanding = 0;
ct->enabled = true;
+ spin_unlock_irq(&ct->fast_lock);
mutex_unlock(&ct->lock);
smp_mb();
@@ -319,8 +321,10 @@ int xe_guc_ct_enable(struct xe_guc_ct *ct)
void xe_guc_ct_disable(struct xe_guc_ct *ct)
{
- mutex_lock(&ct->lock);
- ct->enabled = false;
+ mutex_lock(&ct->lock); /* Serialise dequeue_one_g2h() */
+ spin_lock_irq(&ct->fast_lock); /* Serialise CT fast-path */
+ ct->enabled = false; /* Finally disable CT communication */
+ spin_unlock_irq(&ct->fast_lock);
mutex_unlock(&ct->lock);
xa_destroy(&ct->fence_lookup);
--
2.41.0
next prev parent reply other threads:[~2023-07-04 13:46 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-04 13:45 [Intel-xe] [PATCH v3 0/5] Try to handle TLB invalidations from CT fast-path Matthew Auld
2023-07-04 13:45 ` [Intel-xe] [PATCH v3 1/5] drm/xe: hold mem_access.ref for " Matthew Auld
2023-07-04 13:45 ` Matthew Auld [this message]
2023-07-04 13:45 ` [Intel-xe] [PATCH v3 3/5] drm/xe/gt: tweak placement for signalling TLB fences after GT reset Matthew Auld
2023-07-04 13:45 ` [Intel-xe] [PATCH v3 4/5] drm/xe/tlb: also update seqno_recv during reset Matthew Auld
2023-07-04 13:45 ` [Intel-xe] [PATCH v3 5/5] drm/xe: handle TLB invalidations from CT fast-path Matthew Auld
2023-07-04 13:48 ` [Intel-xe] ✓ CI.Patch_applied: success for Try to " Patchwork
2023-07-04 13:49 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-07-04 13:50 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-07-04 13:54 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-07-04 13:54 ` [Intel-xe] ✓ CI.Hooks: " Patchwork
2023-07-04 13:55 ` [Intel-xe] ✓ CI.checksparse: " Patchwork
2023-07-04 14:42 ` [Intel-xe] ○ CI.BAT: info " Patchwork
2023-07-04 18:19 ` [Intel-xe] [PATCH v3 0/5] " Souza, Jose
2023-07-04 18:42 ` Souza, Jose
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