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From: Matthew Auld <matthew.auld@intel.com>
To: intel-xe@lists.freedesktop.org
Subject: [Intel-xe] [PATCH v5 06/10] drm/xe/ct: serialise fast_lock during CT disable
Date: Thu,  6 Jul 2023 17:20:10 +0100	[thread overview]
Message-ID: <20230706162003.427026-18-matthew.auld@intel.com> (raw)
In-Reply-To: <20230706162003.427026-12-matthew.auld@intel.com>

The fast-path CT could be running as we enter a runtime-suspend or
potentially a GT reset, however here we only use the ct->fast_lock and
not the full ct->lock. Before disabling the CT, also serialise against
the fast_lock to ensure any in-progress work finishes before we start
nuking the CT related stuff. Once we disable ct->enabled and drop the
lock, any new work should fail gracefully, and anything that was in
progress should be finished.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_guc_ct.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
index ba89db1dcfdb..acf488b00b66 100644
--- a/drivers/gpu/drm/xe/xe_guc_ct.c
+++ b/drivers/gpu/drm/xe/xe_guc_ct.c
@@ -301,8 +301,10 @@ int xe_guc_ct_enable(struct xe_guc_ct *ct)
 		goto err_out;
 
 	mutex_lock(&ct->lock);
+	spin_lock_irq(&ct->fast_lock);
 	ct->g2h_outstanding = 0;
 	ct->enabled = true;
+	spin_unlock_irq(&ct->fast_lock);
 	mutex_unlock(&ct->lock);
 
 	smp_mb();
@@ -319,8 +321,10 @@ int xe_guc_ct_enable(struct xe_guc_ct *ct)
 
 void xe_guc_ct_disable(struct xe_guc_ct *ct)
 {
-	mutex_lock(&ct->lock);
-	ct->enabled = false;
+	mutex_lock(&ct->lock); /* Serialise dequeue_one_g2h() */
+	spin_lock_irq(&ct->fast_lock); /* Serialise CT fast-path */
+	ct->enabled = false; /* Finally disable CT communication */
+	spin_unlock_irq(&ct->fast_lock);
 	mutex_unlock(&ct->lock);
 
 	xa_destroy(&ct->fence_lookup);
-- 
2.41.0


  parent reply	other threads:[~2023-07-06 16:21 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-06 16:20 [Intel-xe] [PATCH v5 00/10] Try to handle TLB invalidations from CT fast-path Matthew Auld
2023-07-06 16:20 ` [Intel-xe] [PATCH v5 01/10] drm/xe/tlb: drop unnecessary smp_wmb() Matthew Auld
2023-07-06 18:44   ` Matthew Brost
2023-07-06 16:20 ` [Intel-xe] [PATCH v5 02/10] drm/xe/tlb: ensure we access seqno_recv once Matthew Auld
2023-07-06 18:53   ` Matthew Brost
2023-07-06 16:20 ` [Intel-xe] [PATCH v5 03/10] drm/xe: hold mem_access.ref for CT fast-path Matthew Auld
2023-07-06 16:20 ` [Intel-xe] [PATCH v5 04/10] drm/xe/ct: hold fast_lock when reserving space for g2h Matthew Auld
2023-07-06 16:20 ` [Intel-xe] [PATCH v5 05/10] drm/xe/tlb: increment next seqno after successful CT send Matthew Auld
2023-07-06 16:20 ` Matthew Auld [this message]
2023-07-06 16:20 ` [Intel-xe] [PATCH v5 07/10] drm/xe/gt: tweak placement for signalling TLB fences after GT reset Matthew Auld
2023-07-06 16:20 ` [Intel-xe] [PATCH v5 08/10] drm/xe/tlb: also update seqno_recv during reset Matthew Auld
2023-07-06 16:20 ` [Intel-xe] [PATCH v5 09/10] drm/xe: handle TLB invalidations from CT fast-path Matthew Auld
2023-07-06 16:20 ` [Intel-xe] [PATCH v5 10/10] drm/xe/tlb: print seqno_recv on fence TLB timeout Matthew Auld
2023-07-06 18:54   ` Matthew Brost
2023-07-06 18:43 ` [Intel-xe] ✓ CI.Patch_applied: success for Try to handle TLB invalidations from CT fast-path (rev3) Patchwork
2023-07-06 18:43 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-07-07 13:47 ` [Intel-xe] [PATCH v5 00/10] Try to handle TLB invalidations from CT fast-path Souza, Jose

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