From: Matthew Auld <matthew.auld@intel.com>
To: intel-xe@lists.freedesktop.org
Subject: [Intel-xe] [PATCH v4 0/5] PAT and cache coherency support
Date: Wed, 27 Sep 2023 12:00:06 +0100 [thread overview]
Message-ID: <20230927110005.291917-7-matthew.auld@intel.com> (raw)
Branch available here:
https://gitlab.freedesktop.org/mwa/kernel/-/tree/xe-pat-index?ref_type=heads
Series directly depends on the patches here:
https://patchwork.freedesktop.org/series/124225/
Goal here is to allow userspace to directly control the pat_index when mapping
memory via the ppGTT, in addtion to the CPU caching mode. This is very much
needed on newer igpu platforms which allow incoherent GT access, where the
choice over the cache level and expected coherency is best left to userspace
depending on their usecase. In the future there may also be other stuff encoded
in the pat_index, so giving userspace direct control will also be needed there.
To support this we added new gem_create uAPI for selecting the CPU cache
mode to use for system memory, including the expected GPU coherency mode. There
are various restrictions here for the selected coherency mode and compatible CPU
cache modes. With that in place the actual pat_index can now be provided as
part of vm_bind. The only restriction is that the coherency mode of the
pat_index must be at least as coherent as the gem_create coherency mode. There
are also some special cases like with userptr and dma-buf.
v2:
- Loads of improvements/tweaks. Main changes are to now allow
gem_create.coh_mode <= coh_mode(pat_index), rather than it needing to match
exactly. This simplifies the dma-buf policy from userspace pov. Also we now
only consider COH_NONE and COH_AT_LEAST_1WAY.
v3:
- Rebase. Split the pte_encode() refactoring, plus various smaller tweaks and
fixes.
v4:
- Rebase on Lucas' new series.
- Drop UC cache mode.
- s/smem_cpu_caching/cpu_caching/. Idea is to make VRAM WC explicit in the
uapi, plus make it more future proof.
--
2.41.0
next reply other threads:[~2023-09-27 11:00 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-27 11:00 Matthew Auld [this message]
2023-09-27 11:00 ` [Intel-xe] [PATCH v4 1/5] drm/xe/pat: trim the xelp PAT table Matthew Auld
2023-09-27 11:00 ` [Intel-xe] [PATCH v4 2/5] drm/xe: directly use pat_index for pte_encode Matthew Auld
2023-09-28 4:41 ` Niranjana Vishwanathapura
2023-09-28 7:25 ` Matthew Auld
2023-09-27 11:00 ` [Intel-xe] [PATCH v4 3/5] drm/xe/uapi: Add support for cache and coherency mode Matthew Auld
2023-09-27 11:00 ` [Intel-xe] [PATCH v4 4/5] drm/xe/pat: annotate pat_index with " Matthew Auld
2023-09-27 11:00 ` [Intel-xe] [PATCH v4 5/5] drm/xe/uapi: support pat_index selection with vm_bind Matthew Auld
2023-09-27 11:31 ` [Intel-xe] ✗ CI.Patch_applied: failure for PAT and cache coherency support (rev5) Patchwork
2023-09-27 16:21 ` [Intel-xe] [PATCH v4 0/5] PAT and cache coherency support Souza, Jose
2023-09-28 7:53 ` Matthew Auld
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