From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: "Jouni Högander" <jouni.hogander@intel.com>
Subject: [Intel-xe] [PATCH v5 9/9] fixup! drm/xe/display: Implement display support
Date: Thu, 7 Dec 2023 07:22:52 +0200 [thread overview]
Message-ID: <20231207052252.2092191-10-jouni.hogander@intel.com> (raw)
In-Reply-To: <20231207052252.2092191-1-jouni.hogander@intel.com>
Add Xe specific code for intel_fb.c
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/display/intel_fb_bo.c | 74 ++++++++++++++++++++++++
drivers/gpu/drm/xe/display/intel_fb_bo.h | 24 ++++++++
3 files changed, 99 insertions(+)
create mode 100644 drivers/gpu/drm/xe/display/intel_fb_bo.c
create mode 100644 drivers/gpu/drm/xe/display/intel_fb_bo.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 87f3fca0c0ee..e6f98d807783 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -168,6 +168,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
display/xe_display_misc.o \
display/xe_dsb_buffer.o \
display/intel_fbdev_fb.o \
+ display/intel_fb_bo.o \
display/ext/i915_irq.o \
display/ext/i915_utils.o
diff --git a/drivers/gpu/drm/xe/display/intel_fb_bo.c b/drivers/gpu/drm/xe/display/intel_fb_bo.c
new file mode 100644
index 000000000000..b21da7b745a5
--- /dev/null
+++ b/drivers/gpu/drm/xe/display/intel_fb_bo.c
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#include <drm/drm_modeset_helper.h>
+
+#include "i915_drv.h"
+#include "intel_display_types.h"
+#include "intel_fb_bo.h"
+
+void intel_fb_bo_framebuffer_fini(struct xe_bo *bo)
+{
+ if (bo->flags & XE_BO_CREATE_PINNED_BIT) {
+ /* Unpin our kernel fb first */
+ xe_bo_lock(bo, false);
+ xe_bo_unpin(bo);
+ xe_bo_unlock(bo);
+ }
+ xe_bo_put(bo);
+}
+
+int intel_fb_bo_framebuffer_init(struct intel_framebuffer *intel_fb,
+ struct xe_bo *bo,
+ struct drm_mode_fb_cmd2 *mode_cmd)
+{
+ struct drm_i915_private *i915 = to_i915(bo->ttm.base.dev);
+ int ret;
+
+ xe_bo_get(bo);
+
+ ret = ttm_bo_reserve(&bo->ttm, true, false, NULL);
+ if (ret)
+ return ret;
+
+ if (!(bo->flags & XE_BO_SCANOUT_BIT)) {
+ /*
+ * XE_BO_SCANOUT_BIT should ideally be set at creation, or is
+ * automatically set when creating FB. We cannot change caching
+ * mode when the boect is VM_BINDed, so we can only set
+ * coherency with display when unbound.
+ */
+ if (XE_IOCTL_DBG(i915, !list_empty(&bo->ttm.base.gpuva.list))) {
+ ttm_bo_unreserve(&bo->ttm);
+ return -EINVAL;
+ }
+ bo->flags |= XE_BO_SCANOUT_BIT;
+ }
+ ttm_bo_unreserve(&bo->ttm);
+
+ return ret;
+}
+
+struct xe_bo *intel_fb_bo_lookup_valid_bo(struct drm_i915_private *i915,
+ struct drm_file *filp,
+ const struct drm_mode_fb_cmd2 *mode_cmd)
+{
+ struct drm_i915_gem_object *bo;
+ struct drm_gem_object *gem = drm_gem_object_lookup(filp, mode_cmd->handles[0]);
+
+ if (!gem)
+ return ERR_PTR(-ENOENT);
+
+ bo = gem_to_xe_bo(gem);
+ /* Require vram placement or dma-buf import */
+ if (IS_DGFX(i915) &&
+ !xe_bo_can_migrate(gem_to_xe_bo(gem), XE_PL_VRAM0) &&
+ bo->ttm.type != ttm_bo_type_sg) {
+ drm_gem_object_put(gem);
+ return ERR_PTR(-EREMOTE);
+ }
+
+ return bo;
+}
diff --git a/drivers/gpu/drm/xe/display/intel_fb_bo.h b/drivers/gpu/drm/xe/display/intel_fb_bo.h
new file mode 100644
index 000000000000..5d365b925b7a
--- /dev/null
+++ b/drivers/gpu/drm/xe/display/intel_fb_bo.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __INTEL_FB_BO_H__
+#define __INTEL_FB_BO_H__
+
+struct drm_file;
+struct drm_mode_fb_cmd2;
+struct drm_i915_private;
+struct intel_framebuffer;
+struct xe_bo;
+
+void intel_fb_bo_framebuffer_fini(struct xe_bo *bo);
+int intel_fb_bo_framebuffer_init(struct intel_framebuffer *intel_fb,
+ struct xe_bo *bo,
+ struct drm_mode_fb_cmd2 *mode_cmd);
+
+struct xe_bo *intel_fb_bo_lookup_valid_bo(struct drm_i915_private *i915,
+ struct drm_file *filp,
+ const struct drm_mode_fb_cmd2 *mode_cmd);
+
+#endif
--
2.34.1
next prev parent reply other threads:[~2023-12-07 5:23 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-07 5:22 [Intel-xe] [PATCH v5 0/9] Intel_fb.c refactoring Jouni Högander
2023-12-07 5:22 ` [Intel-xe] [PATCH v5 1/9] Revert "FIXME: drm/i915: xe intel_fb.c framebuffer init and destroy xe changes" Jouni Högander
2023-12-07 5:22 ` [Intel-xe] [PATCH v5 2/9] fixup! FIXME: drm/i915/display: Remaining changes to make xe compile Jouni Högander
2023-12-07 5:22 ` [Intel-xe] [PATCH v5 3/9] drm/i915/display: use intel_bo_to_drm_bo in intel_fb.c Jouni Högander
2023-12-07 5:22 ` [Intel-xe] [PATCH v5 4/9] drm/i915/display: Convert intel_fb_modifier_to_tiling as non-static Jouni Högander
2023-12-07 5:22 ` [Intel-xe] [PATCH v5 5/9] drm/i915/display: Handle invalid fb_modifier in intel_fb_modifier_to_tiling Jouni Högander
2023-12-07 5:22 ` [Intel-xe] [PATCH v5 6/9] drm/i915/display: Split i915 specific code away from intel_fb.c Jouni Högander
2023-12-07 5:22 ` [Intel-xe] [PATCH v5 7/9] drm/i915/display: Add intel_fb_bo_framebuffer_fini Jouni Högander
2023-12-07 5:22 ` [Intel-xe] [PATCH v5 8/9] fixup! drm/xe/display: Implement display support Jouni Högander
2023-12-07 5:22 ` Jouni Högander [this message]
2023-12-07 5:25 ` [Intel-xe] ✓ CI.Patch_applied: success for Intel_fb.c refactoring (rev7) Patchwork
2023-12-07 5:26 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-12-07 5:27 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-12-07 5:34 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-12-07 5:35 ` [Intel-xe] ✓ CI.Hooks: " Patchwork
2023-12-07 5:36 ` [Intel-xe] ✗ CI.checksparse: warning " Patchwork
2023-12-07 6:11 ` [Intel-xe] ✓ CI.BAT: success " Patchwork
2023-12-07 15:10 ` [PATCH v5 0/9] Intel_fb.c refactoring Maarten Lankhorst
2023-12-08 6:18 ` Hogander, Jouni
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