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* [PATCH] drm/xe: Replace RING_START_UDW by u64 RING_START
@ 2024-05-10 15:01 José Roberto de Souza
  2024-05-10 15:06 ` ✓ CI.Patch_applied: success for " Patchwork
                   ` (8 more replies)
  0 siblings, 9 replies; 10+ messages in thread
From: José Roberto de Souza @ 2024-05-10 15:01 UTC (permalink / raw)
  To: intel-xe
  Cc: Niranjana Vishwanathapura, Matt Roper, José Roberto de Souza

Other u64 registers are printed in a single line so RING_START
needs to follow that too.
As there is no upstream decoder tool parsing RING_START this will
not break any decoder application.

Cc: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/xe/xe_hw_engine.c       | 10 +++++-----
 drivers/gpu/drm/xe/xe_hw_engine_types.h |  4 +---
 2 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 45f582a7caaa5..e19af179af338 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -908,11 +908,13 @@ xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe)
 	snapshot->reg.ring_hwstam = hw_engine_mmio_read32(hwe, RING_HWSTAM(0));
 	snapshot->reg.ring_hws_pga = hw_engine_mmio_read32(hwe, RING_HWS_PGA(0));
 	snapshot->reg.ring_start = hw_engine_mmio_read32(hwe, RING_START(0));
+	if (GRAPHICS_VERx100(hwe->gt->tile->xe) >= 2000) {
+		val = hw_engine_mmio_read32(hwe, RING_START_UDW(0));
+		snapshot->reg.ring_start |= val << 32;
+	}
 	if (xe_gt_has_indirect_ring_state(hwe->gt)) {
 		snapshot->reg.indirect_ring_state =
 			hw_engine_mmio_read32(hwe, INDIRECT_RING_STATE(0));
-		snapshot->reg.ring_start_udw =
-			hw_engine_mmio_read32(hwe, RING_START_UDW(0));
 	}
 
 	snapshot->reg.ring_head =
@@ -1003,9 +1005,7 @@ void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot,
 		   snapshot->reg.ring_execlist_status);
 	drm_printf(p, "\tRING_EXECLIST_SQ_CONTENTS: 0x%016llx\n",
 		   snapshot->reg.ring_execlist_sq_contents);
-	drm_printf(p, "\tRING_START: 0x%08x\n", snapshot->reg.ring_start);
-	drm_printf(p, "\tRING_START_UDW: 0x%08x\n",
-		   snapshot->reg.ring_start_udw);
+	drm_printf(p, "\tRING_START: 0x%016llx\n", snapshot->reg.ring_start);
 	drm_printf(p, "\tRING_HEAD: 0x%08x\n", snapshot->reg.ring_head);
 	drm_printf(p, "\tRING_TAIL: 0x%08x\n", snapshot->reg.ring_tail);
 	drm_printf(p, "\tRING_CTL: 0x%08x\n", snapshot->reg.ring_ctl);
diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h
index 5f4b67acba991..b2f64b92a6362 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine_types.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h
@@ -188,9 +188,7 @@ struct xe_hw_engine_snapshot {
 		/** @reg.ring_hws_pga: RING_HWS_PGA */
 		u32 ring_hws_pga;
 		/** @reg.ring_start: RING_START */
-		u32 ring_start;
-		/** @reg.ring_start_udw: RING_START_UDW */
-		u32 ring_start_udw;
+		u64 ring_start;
 		/** @reg.ring_head: RING_HEAD */
 		u32 ring_head;
 		/** @reg.ring_tail: RING_TAIL */
-- 
2.45.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2024-05-17 16:54 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-05-10 15:01 [PATCH] drm/xe: Replace RING_START_UDW by u64 RING_START José Roberto de Souza
2024-05-10 15:06 ` ✓ CI.Patch_applied: success for " Patchwork
2024-05-10 15:06 ` ✓ CI.checkpatch: " Patchwork
2024-05-10 15:07 ` ✓ CI.KUnit: " Patchwork
2024-05-10 15:19 ` ✓ CI.Build: " Patchwork
2024-05-10 15:21 ` ✓ CI.Hooks: " Patchwork
2024-05-10 15:23 ` ✓ CI.checksparse: " Patchwork
2024-05-10 15:48 ` ✓ CI.BAT: " Patchwork
2024-05-10 17:11 ` ✓ CI.FULL: " Patchwork
2024-05-17 16:54 ` [PATCH] " Niranjana Vishwanathapura

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