From: Matt Roper <matthew.d.roper@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: matthew.d.roper@intel.com
Subject: [PATCH 26/43] drm/xe/mocs: Convert register access to use xe_mmio
Date: Tue, 3 Sep 2024 17:21:27 -0700 [thread overview]
Message-ID: <20240904002100.2023834-71-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20240904002100.2023834-45-matthew.d.roper@intel.com>
Stop using GT pointers for register access.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/xe/tests/xe_mocs.c | 4 ++--
drivers/gpu/drm/xe/xe_mocs.c | 16 ++++++++--------
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/xe/tests/xe_mocs.c b/drivers/gpu/drm/xe/tests/xe_mocs.c
index 79be73b4a02b..ea932c051cc7 100644
--- a/drivers/gpu/drm/xe/tests/xe_mocs.c
+++ b/drivers/gpu/drm/xe/tests/xe_mocs.c
@@ -55,7 +55,7 @@ static void read_l3cc_table(struct xe_gt *gt,
if (regs_are_mcr(gt))
reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_LNCFCMOCS(i >> 1));
else
- reg_val = xe_mmio_read32(gt, XELP_LNCFCMOCS(i >> 1));
+ reg_val = xe_mmio_read32(>->mmio, XELP_LNCFCMOCS(i >> 1));
mocs_dbg(gt, "reg_val=0x%x\n", reg_val);
} else {
@@ -94,7 +94,7 @@ static void read_mocs_table(struct xe_gt *gt,
if (regs_are_mcr(gt))
reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_GLOBAL_MOCS(i));
else
- reg_val = xe_mmio_read32(gt, XELP_GLOBAL_MOCS(i));
+ reg_val = xe_mmio_read32(>->mmio, XELP_GLOBAL_MOCS(i));
mocs_expected = get_entry_control(info, i);
mocs = reg_val;
diff --git a/drivers/gpu/drm/xe/xe_mocs.c b/drivers/gpu/drm/xe/xe_mocs.c
index 7ff0ac5b799a..8df41cd12d51 100644
--- a/drivers/gpu/drm/xe/xe_mocs.c
+++ b/drivers/gpu/drm/xe/xe_mocs.c
@@ -278,7 +278,7 @@ static void xelp_lncf_dump(struct xe_mocs_info *info, struct xe_gt *gt, struct d
if (regs_are_mcr(gt))
reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_LNCFCMOCS(i));
else
- reg_val = xe_mmio_read32(gt, XELP_LNCFCMOCS(i));
+ reg_val = xe_mmio_read32(>->mmio, XELP_LNCFCMOCS(i));
drm_printf(p, "LNCFCMOCS[%2d] = [%u, %u, %u] (%#8x)\n",
j++,
@@ -310,7 +310,7 @@ static void xelp_mocs_dump(struct xe_mocs_info *info, unsigned int flags,
if (regs_are_mcr(gt))
reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_GLOBAL_MOCS(i));
else
- reg_val = xe_mmio_read32(gt, XELP_GLOBAL_MOCS(i));
+ reg_val = xe_mmio_read32(>->mmio, XELP_GLOBAL_MOCS(i));
drm_printf(p, "GLOB_MOCS[%2d] = [%u, %u, %u, %u, %u, %u, %u, %u, %u, %u ] (%#8x)\n",
i,
@@ -383,7 +383,7 @@ static void xehp_lncf_dump(struct xe_mocs_info *info, unsigned int flags,
if (regs_are_mcr(gt))
reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_LNCFCMOCS(i));
else
- reg_val = xe_mmio_read32(gt, XELP_LNCFCMOCS(i));
+ reg_val = xe_mmio_read32(>->mmio, XELP_LNCFCMOCS(i));
drm_printf(p, "LNCFCMOCS[%2d] = [%u, %u, %u] (%#8x)\n",
j++,
@@ -428,7 +428,7 @@ static void pvc_mocs_dump(struct xe_mocs_info *info, unsigned int flags, struct
if (regs_are_mcr(gt))
reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_LNCFCMOCS(i));
else
- reg_val = xe_mmio_read32(gt, XELP_LNCFCMOCS(i));
+ reg_val = xe_mmio_read32(>->mmio, XELP_LNCFCMOCS(i));
drm_printf(p, "LNCFCMOCS[%2d] = [ %u ] (%#8x)\n",
j++,
@@ -510,7 +510,7 @@ static void mtl_mocs_dump(struct xe_mocs_info *info, unsigned int flags,
if (regs_are_mcr(gt))
reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_GLOBAL_MOCS(i));
else
- reg_val = xe_mmio_read32(gt, XELP_GLOBAL_MOCS(i));
+ reg_val = xe_mmio_read32(>->mmio, XELP_GLOBAL_MOCS(i));
drm_printf(p, "GLOB_MOCS[%2d] = [%u, %u] (%#8x)\n",
i,
@@ -553,7 +553,7 @@ static void xe2_mocs_dump(struct xe_mocs_info *info, unsigned int flags,
if (regs_are_mcr(gt))
reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_GLOBAL_MOCS(i));
else
- reg_val = xe_mmio_read32(gt, XELP_GLOBAL_MOCS(i));
+ reg_val = xe_mmio_read32(>->mmio, XELP_GLOBAL_MOCS(i));
drm_printf(p, "GLOB_MOCS[%2d] = [%u, %u, %u] (%#8x)\n",
i,
@@ -690,7 +690,7 @@ static void __init_mocs_table(struct xe_gt *gt,
if (regs_are_mcr(gt))
xe_gt_mcr_multicast_write(gt, XEHP_GLOBAL_MOCS(i), mocs);
else
- xe_mmio_write32(gt, XELP_GLOBAL_MOCS(i), mocs);
+ xe_mmio_write32(>->mmio, XELP_GLOBAL_MOCS(i), mocs);
}
}
@@ -730,7 +730,7 @@ static void init_l3cc_table(struct xe_gt *gt,
if (regs_are_mcr(gt))
xe_gt_mcr_multicast_write(gt, XEHP_LNCFCMOCS(i), l3cc);
else
- xe_mmio_write32(gt, XELP_LNCFCMOCS(i), l3cc);
+ xe_mmio_write32(>->mmio, XELP_LNCFCMOCS(i), l3cc);
}
}
--
2.45.2
next prev parent reply other threads:[~2024-09-04 0:21 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-04 0:21 [PATCH 00/43] Stop using xe_gt as a register MMIO target Matt Roper
2024-09-04 0:21 ` [PATCH 01/43] drm/xe: Move forcewake to 'gt.pm' substructure Matt Roper
2024-09-05 20:03 ` Lucas De Marchi
2024-09-04 0:21 ` [PATCH 02/43] drm/xe: Create dedicated xe_mmio structure Matt Roper
2024-09-05 20:08 ` Lucas De Marchi
2024-09-06 13:49 ` Michal Wajdeczko
2024-09-04 0:21 ` [PATCH 03/43] drm/xe: Clarify size of MMIO region Matt Roper
2024-09-05 21:19 ` Lucas De Marchi
2024-09-04 0:21 ` [PATCH 04/43] drm/xe: Move GSI offset adjustment fields into 'struct xe_mmio' Matt Roper
2024-09-05 21:53 ` Lucas De Marchi
2024-09-04 0:21 ` [PATCH 05/43] drm/xe: Populate GT's mmio iomap from tile during init Matt Roper
2024-09-05 21:58 ` Lucas De Marchi
2024-09-04 0:21 ` [PATCH 06/43] drm/xe: Switch mmio_ext to use 'struct xe_mmio' Matt Roper
2024-09-06 1:47 ` Lucas De Marchi
2024-09-04 0:21 ` [PATCH 07/43] drm/xe: Add xe_device backpointer to xe_mmio Matt Roper
2024-09-06 1:51 ` Lucas De Marchi
2024-09-06 14:15 ` Michal Wajdeczko
2024-09-04 0:21 ` [PATCH 08/43] drm/xe: Adjust mmio code to pass VF substructure to SRIOV code Matt Roper
2024-09-06 3:32 ` Lucas De Marchi
2024-09-06 15:28 ` Michal Wajdeczko
2024-09-06 19:44 ` Matt Roper
2024-09-04 0:21 ` [PATCH 09/43] drm/xe: Switch MMIO interface to take xe_mmio instead of xe_gt Matt Roper
2024-09-06 3:44 ` Lucas De Marchi
2024-09-06 22:44 ` Matt Roper
2024-09-04 0:21 ` [PATCH 10/43] drm/xe/irq: Convert register access to use xe_mmio Matt Roper
2024-09-06 3:47 ` Lucas De Marchi
2024-09-04 0:21 ` [PATCH 11/43] drm/xe/pcode: " Matt Roper
2024-09-06 21:40 ` Lucas De Marchi
2024-09-04 0:21 ` [PATCH 12/43] drm/xe/hwmon: " Matt Roper
2024-09-06 21:41 ` Lucas De Marchi
2024-09-04 0:21 ` [PATCH 13/43] drm/xe/vram: " Matt Roper
2024-09-06 21:46 ` Lucas De Marchi
2024-09-04 0:21 ` [PATCH 14/43] drm/xe/compat-i915: " Matt Roper
2024-09-06 9:02 ` Jani Nikula
2024-09-06 21:51 ` Lucas De Marchi
2024-09-06 23:17 ` Matt Roper
2024-09-04 0:21 ` [PATCH 15/43] drm/xe/lmtt: " Matt Roper
2024-09-06 21:52 ` Lucas De Marchi
2024-09-04 0:21 ` [PATCH 16/43] drm/xe/stolen: " Matt Roper
2024-09-06 23:17 ` Lucas De Marchi
2024-09-04 0:21 ` [PATCH 17/43] drm/xe/device: " Matt Roper
2024-09-04 0:21 ` [PATCH 18/43] drm/xe/pci: " Matt Roper
2024-09-04 0:21 ` [PATCH 19/43] drm/xe/wa: " Matt Roper
2024-09-04 0:21 ` [PATCH 20/43] drm/xe/uc: " Matt Roper
2024-09-04 0:21 ` [PATCH 21/43] drm/xe/guc: " Matt Roper
2024-09-04 0:21 ` [PATCH 22/43] drm/xe/huc: " Matt Roper
2024-09-04 0:21 ` [PATCH 23/43] drm/xe/gsc: " Matt Roper
2024-09-04 0:21 ` [PATCH 24/43] drm/xe/query: " Matt Roper
2024-09-04 0:21 ` [PATCH 25/43] drm/xe/mcr: " Matt Roper
2024-09-04 0:21 ` Matt Roper [this message]
2024-09-04 0:21 ` [PATCH 27/43] drm/xe/hw_engine: " Matt Roper
2024-09-04 0:21 ` [PATCH 28/43] drm/xe/gt_throttle: " Matt Roper
2024-09-04 0:21 ` [PATCH 29/43] drm/xe/pat: " Matt Roper
2024-09-04 0:21 ` [PATCH 30/43] drm/xe/wopcm: " Matt Roper
2024-09-04 0:21 ` [PATCH 31/43] drm/xe/oa: " Matt Roper
2024-09-04 0:21 ` [PATCH 32/43] drm/xe/topology: " Matt Roper
2024-09-04 0:21 ` [PATCH 33/43] drm/xe/execlist: " Matt Roper
2024-09-04 0:21 ` [PATCH 34/43] drm/xe/gt_clock: " Matt Roper
2024-09-04 0:21 ` [PATCH 35/43] drm/xe/reg_sr: " Matt Roper
2024-09-04 0:21 ` [PATCH 36/43] drm/xe/gt: " Matt Roper
2024-09-04 0:21 ` [PATCH 37/43] drm/xe/sriov: " Matt Roper
2024-09-04 0:21 ` [PATCH 38/43] drm/xe/tlb: " Matt Roper
2024-09-04 0:21 ` [PATCH 39/43] drm/xe/gt_idle: " Matt Roper
2024-09-04 0:21 ` [PATCH 40/43] drm/xe/forcewake: " Matt Roper
2024-09-04 0:21 ` [PATCH 41/43] drm/xe/ggtt: " Matt Roper
2024-09-04 0:21 ` [PATCH 42/43] drm/xe/ccs_mode: " Matt Roper
2024-09-04 0:21 ` [PATCH 43/43] drm/xe/mmio: Drop compatibility macros Matt Roper
2024-09-04 0:27 ` ✓ CI.Patch_applied: success for Stop using xe_gt as a register MMIO target Patchwork
2024-09-04 0:28 ` ✗ CI.checkpatch: warning " Patchwork
2024-09-04 0:29 ` ✓ CI.KUnit: success " Patchwork
2024-09-04 0:41 ` ✓ CI.Build: " Patchwork
2024-09-04 0:43 ` ✗ CI.Hooks: failure " Patchwork
2024-09-04 0:44 ` ✓ CI.checksparse: success " Patchwork
2024-09-04 1:03 ` ✓ CI.BAT: " Patchwork
2024-09-04 5:33 ` ✗ CI.FULL: failure " Patchwork
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