From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com
Subject: [PATCH 15/16] drm/i915/display: Adjust Pipe SRC Width for Odd Pixels
Date: Wed, 23 Oct 2024 12:22:56 +0530 [thread overview]
Message-ID: <20241023065257.190035-16-ankit.k.nautiyal@intel.com> (raw)
In-Reply-To: <20241023065257.190035-1-ankit.k.nautiyal@intel.com>
Enhance the `intel_splitter_adjust_pipe_width` helper to account for
both pixel replication and odd pixels. When the display width is
divided among multiple pipes, extra pixels can make the pipe source
width odd. Since hardware expects an even width, an extra pixel is
added to each pipe to ensure even width.
The splitter hardware will remove these extra pixels.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 22 +++++++++++++++-----
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index bab1ab1236df..67dfada13eab 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2514,12 +2514,18 @@ void intel_encoder_get_config(struct intel_encoder *encoder,
intel_crtc_readout_derived_state(crtc_state);
}
-static int intel_splitter_adjust_pipe_width(int width, int replicated_pixels)
+static int intel_splitter_adjust_pipe_width(int width, int replicated_pixels,
+ bool has_odd_pixel, int num_pipes)
{
- /* Account for Pixel replication:
+ /* Account for Pixel replication + Odd pixel:
* Pixel replication is required due to the rounding of slice_width (Hactive / slice_count).
*
- * Splitter HW takes care of these by removing replicated pixels from the last pipe.
+ * These extra pixels when added to the pipe source width, can make the pipe source width
+ * odd. Since HW expects the pipe source width to be even, therefore one extra pixel needs
+ * to be added to the pipe source width to make it even.
+ *
+ * Splitter HW takes care of these by removing odd pixel from each pipe and
+ * replicated pixels from the last pipe.
*/
if (!replicated_pixels)
@@ -2527,7 +2533,11 @@ static int intel_splitter_adjust_pipe_width(int width, int replicated_pixels)
width += replicated_pixels;
- return width;
+ if (!has_odd_pixel)
+ return width;
+
+ /* Account for one extra pixel for each pipe */
+ return width + num_pipes;
}
static void intel_joiner_compute_pipe_src(struct intel_crtc_state *crtc_state)
@@ -2539,7 +2549,9 @@ static void intel_joiner_compute_pipe_src(struct intel_crtc_state *crtc_state)
return;
width = intel_splitter_adjust_pipe_width(drm_rect_width(&crtc_state->pipe_src),
- crtc_state->dsc.replicated_pixels);
+ crtc_state->dsc.replicated_pixels,
+ crtc_state->dsc.has_odd_pixel,
+ num_pipes);
height = drm_rect_height(&crtc_state->pipe_src);
--
2.45.2
next prev parent reply other threads:[~2024-10-23 6:51 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-23 6:52 [PATCH 00/16] Add support for 3 VDSC engines 12 slices Ankit Nautiyal
2024-10-23 6:52 ` [PATCH 01/16] drm/i915/dp: Update Comment for Valid DSC Slices per Line Ankit Nautiyal
2024-10-23 6:52 ` [PATCH 02/16] drm/i915/display: Prepare for dsc 3 stream splitter Ankit Nautiyal
2024-10-23 8:42 ` Kandpal, Suraj
2024-10-23 6:52 ` [PATCH 03/16] drm/i915/vdsc: Use VDSC0/VDSC1 for LEFT/RIGHT VDSC engine Ankit Nautiyal
2024-10-23 6:52 ` [PATCH 04/16] drm/i915/vdsc: Introduce 3rd VDSC engine VDSC2 Ankit Nautiyal
2024-10-23 8:34 ` Kandpal, Suraj
2024-10-23 6:52 ` [PATCH 05/16] drm/i915/vdsc: Add support for read/write PPS for 3rd DSC engine Ankit Nautiyal
2024-10-23 6:52 ` [PATCH 06/16] drm/i915/dp: Ensure hactive is divisible by slice count Ankit Nautiyal
2024-10-23 8:35 ` Kandpal, Suraj
2024-10-23 6:52 ` [PATCH 07/16] drm/i915/dp: Enable 3 DSC engines for 12 slices Ankit Nautiyal
2024-10-23 8:38 ` Kandpal, Suraj
2024-10-23 6:52 ` [PATCH 08/16] drm/i915/display: Add macro HAS_PIXEL_REPLICATION Ankit Nautiyal
2024-10-23 8:39 ` Kandpal, Suraj
2024-10-23 6:52 ` [PATCH 09/16] drm/i915/display: Add support for DSC pixel replication Ankit Nautiyal
2024-10-23 6:52 ` [PATCH 10/16] drm/i915/dp_mst: Account for pixel replication for MST overhead with DSC Ankit Nautiyal
2024-10-23 6:52 ` [PATCH 11/16] drm/i915/dp: Account for pixel replication for BW computation " Ankit Nautiyal
2024-10-23 6:52 ` [PATCH 12/16] drm/i915/display: Account for pixel replication in pipe_src Ankit Nautiyal
2024-10-23 6:52 ` [PATCH 13/16] drm/i915/dp: Enable DSC pixel replication Ankit Nautiyal
2024-10-23 6:52 ` [PATCH 14/16] drm/i915/dsc: Introduce odd pixel removal Ankit Nautiyal
2024-10-23 6:52 ` Ankit Nautiyal [this message]
2024-10-23 6:52 ` [PATCH 16/16] drm/i915/dp: Add Check for Odd Pixel Requirement Ankit Nautiyal
2024-10-23 6:56 ` ✓ CI.Patch_applied: success for Add support for 3 VDSC engines 12 slices (rev5) Patchwork
2024-10-23 6:57 ` ✗ CI.checkpatch: warning " Patchwork
2024-10-23 6:58 ` ✓ CI.KUnit: success " Patchwork
2024-10-23 7:09 ` ✓ CI.Build: " Patchwork
2024-10-23 7:12 ` ✓ CI.Hooks: " Patchwork
2024-10-23 7:13 ` ✗ CI.checksparse: warning " Patchwork
2024-10-23 7:40 ` ✗ CI.BAT: failure " Patchwork
2024-10-23 10:55 ` ✗ CI.FULL: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2024-10-21 12:33 [PATCH 00/16] Add support for 3 VDSC engines 12 slices Ankit Nautiyal
2024-10-21 12:34 ` [PATCH 15/16] drm/i915/display: Adjust Pipe SRC Width for Odd Pixels Ankit Nautiyal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20241023065257.190035-16-ankit.k.nautiyal@intel.com \
--to=ankit.k.nautiyal@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=suraj.kandpal@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox