* [PATCH 2/4] include/drm-uapi-experimental: Move i915_drm_local.h to drm-uapi-experimental
2024-11-13 14:10 [PATCH 0/4] Add pci_membarrier test in xe_mmap Tejas Upadhyay
2024-11-13 14:10 ` [PATCH 1/4] lib/i915_drm_local: Remove macros added via merged kernel Tejas Upadhyay
@ 2024-11-13 14:10 ` Tejas Upadhyay
2024-11-13 14:10 ` [PATCH 3/4] include/intel_drm_local.h: Add DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER Tejas Upadhyay
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Tejas Upadhyay @ 2024-11-13 14:10 UTC (permalink / raw)
To: igt-dev, intel-xe; +Cc: Tejas Upadhyay
Move i915_drm_local.h to drm-uapi-experimental/intel_drm_local.h
Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
---
.../drm-uapi-experimental/intel_drm_local.h | 27 +++++++++++++++++++
lib/i915/gem_scheduler.c | 2 +-
lib/i915/intel_memory_region.h | 2 +-
lib/igt_gt.h | 2 +-
tools/i915-perf/i915_perf_recorder.c | 2 +-
5 files changed, 31 insertions(+), 4 deletions(-)
create mode 100644 include/drm-uapi-experimental/intel_drm_local.h
diff --git a/include/drm-uapi-experimental/intel_drm_local.h b/include/drm-uapi-experimental/intel_drm_local.h
new file mode 100644
index 000000000..1773c649b
--- /dev/null
+++ b/include/drm-uapi-experimental/intel_drm_local.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+#ifndef _INTEL_DRM_LOCAL_H_
+#define _INTEL_DRM_LOCAL_H_
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/*
+ * It is necessary on occasion to add uapi declarations to IGT before they
+ * appear in imported kernel uapi headers. This header is provided for this
+ * purpose.
+
+ * Early uapi declarations should be added here exactly as they are
+ * expected to appear in the kernel uapi headers, i.e. without the LOCAL_
+ * or local_ prefix and without any #ifndef's. Attempt should be made to
+ * clean these up when kernel uapi headers are sync'd.
+ */
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* _INTEL_DRM_LOCAL_H_ */
diff --git a/lib/i915/gem_scheduler.c b/lib/i915/gem_scheduler.c
index 0087df902..7c4eea983 100644
--- a/lib/i915/gem_scheduler.c
+++ b/lib/i915/gem_scheduler.c
@@ -25,10 +25,10 @@
#include <string.h>
#include <sys/ioctl.h>
+#include "drm-uapi-experimental/intel_drm_local.h"
#include "igt_core.h"
#include "ioctl_wrappers.h"
-#include "i915/i915_drm_local.h"
#include "i915/gem_scheduler.h"
#include "i915/gem_submission.h"
diff --git a/lib/i915/intel_memory_region.h b/lib/i915/intel_memory_region.h
index 9e24bd8fb..ce187f426 100644
--- a/lib/i915/intel_memory_region.h
+++ b/lib/i915/intel_memory_region.h
@@ -22,7 +22,7 @@
*/
#include "i915_drm.h"
#include "igt_collection.h"
-#include "i915_drm_local.h"
+#include "intel_drm_local.h"
#ifndef INTEL_MEMORY_REGION_H
#define INTEL_MEMORY_REGION_H
diff --git a/lib/igt_gt.h b/lib/igt_gt.h
index d3213123d..82ed22be7 100644
--- a/lib/igt_gt.h
+++ b/lib/igt_gt.h
@@ -24,11 +24,11 @@
#ifndef IGT_GT_H
#define IGT_GT_H
+#include "drm-uapi-experimental/intel_drm_local.h"
#include "igt_debugfs.h"
#include "igt_dummyload.h"
#include "igt_core.h"
-#include "i915/i915_drm_local.h"
#include "i915_drm.h"
struct pci_device;
diff --git a/tools/i915-perf/i915_perf_recorder.c b/tools/i915-perf/i915_perf_recorder.c
index ca4354832..5dc5eb65d 100644
--- a/tools/i915-perf/i915_perf_recorder.c
+++ b/tools/i915-perf/i915_perf_recorder.c
@@ -44,7 +44,7 @@
#include <i915_drm.h>
-#include "i915/i915_drm_local.h"
+#include "drm-uapi-experimental/intel_drm_local.h"
#include "igt_core.h"
#include "intel_chipset.h"
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 4/4] tests/xe/mmap: add tests for pci mem barrier
2024-11-13 14:10 [PATCH 0/4] Add pci_membarrier test in xe_mmap Tejas Upadhyay
` (2 preceding siblings ...)
2024-11-13 14:10 ` [PATCH 3/4] include/intel_drm_local.h: Add DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER Tejas Upadhyay
@ 2024-11-13 14:10 ` Tejas Upadhyay
2024-11-13 16:24 ` ✗ CI.Patch_applied: failure for Add pci_membarrier test in xe_mmap Patchwork
2024-11-14 4:58 ` [PATCH 0/4] " Upadhyay, Tejas
5 siblings, 0 replies; 7+ messages in thread
From: Tejas Upadhyay @ 2024-11-13 14:10 UTC (permalink / raw)
To: igt-dev, intel-xe; +Cc: Tejas Upadhyay
We want to make sure that mmap do direct mapping of physical
page at doorbell space and whole page is accessible in order
to use pci memory barrier effect effectively.
Following subtests are added,
./build/tests/xe_mmap --r pci-membarrier
./build/tests/xe_mmap --r pci-membarrier-bad-pagesize
./build/tests/xe_mmap --r pci-membarrier-bad-object
Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
---
tests/intel/xe_mmap.c | 96 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 96 insertions(+)
diff --git a/tests/intel/xe_mmap.c b/tests/intel/xe_mmap.c
index fc5d73d59..ae0363a20 100644
--- a/tests/intel/xe_mmap.c
+++ b/tests/intel/xe_mmap.c
@@ -64,6 +64,74 @@ test_mmap(int fd, uint32_t placement, uint32_t flags)
gem_close(fd, bo);
}
+#define PAGE_SHIFT 12
+#define PAGE_SIZE 4096
+
+/**
+ * SUBTEST: pci-membarrier
+ * Description: create pci memory barrier with write on defined mmap offset.
+ * Test category: functionality test
+ *
+ */
+static void test_pci_membarrier(int xe)
+{
+ uint64_t flags = MAP_SHARED;
+ unsigned int prot = PROT_WRITE;
+ uint32_t *ptr;
+ uint64_t size = PAGE_SIZE;
+ struct timespec tv;
+ struct drm_xe_gem_mmap_offset mmo = {
+ .handle = 0,
+ .flags = DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER,
+ };
+
+ igt_assert_eq(igt_ioctl(xe, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo), 0);
+ ptr = mmap(NULL, size, prot, flags, xe, mmo.offset);
+ igt_assert(ptr != MAP_FAILED);
+
+ /* Check whole page for any errors, also check as
+ * we should not read written values back
+ */
+ for (int i = 0; i < size / sizeof(*ptr); i++) {
+ /* It is expected unconfigured doorbell space
+ * will return read value 0xdeadbeef
+ */
+ igt_assert_eq_u32(READ_ONCE(ptr[i]), 0xdeadbeef);
+
+ igt_gettime(&tv);
+ ptr[i] = i;
+ if (READ_ONCE(ptr[i]) == i) {
+ while (READ_ONCE(ptr[i]) == i)
+ ;
+ igt_info("fd:%d value retained for %"PRId64"ns pos:%d\n",
+ xe, igt_nsec_elapsed(&tv), i);
+ }
+ igt_assert_neq(READ_ONCE(ptr[i]), i);
+ }
+
+ munmap(ptr, size);
+}
+
+/**
+ * SUBTEST: pci-membarrier-bad-pagesize
+ * Description: Test mmap offset with bad pagesize for pci membarrier.
+ * Test category: negative test
+ *
+ */
+static void test_bad_pagesize_for_pcimem(int fd)
+{
+ uint32_t *map;
+ uint64_t page_size = PAGE_SIZE * 2;
+ struct drm_xe_gem_mmap_offset mmo = {
+ .handle = 0,
+ .flags = DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER,
+ };
+
+ igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo), 0);
+ map = mmap(NULL, page_size, PROT_WRITE, MAP_SHARED, fd, mmo.offset);
+ igt_assert(map == MAP_FAILED);
+}
+
/**
* SUBTEST: bad-flags
* Description: Test mmap offset with bad flags.
@@ -126,6 +194,25 @@ static void test_bad_object(int fd)
do_ioctl_err(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo, ENOENT);
}
+/**
+ * SUBTEST: pci-membarrier-bad-object
+ * Description: Test mmap offset with bad object for pci mem barrier.
+ * Test category: negative test
+ *
+ */
+static void test_bad_object_for_pcimem(int fd)
+{
+ uint64_t size = xe_get_default_alignment(fd);
+ struct drm_xe_gem_mmap_offset mmo = {
+ .handle = xe_bo_create(fd, 0, size,
+ vram_if_possible(fd, 0),
+ DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM),
+ .flags = DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER,
+ };
+
+ do_ioctl_err(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo, EINVAL);
+}
+
static jmp_buf jmp;
__noreturn static void sigtrap(int sig)
@@ -273,6 +360,12 @@ igt_main
test_mmap(fd, vram_memory(fd, 0) | system_memory(fd),
DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
+ igt_subtest("pci-membarrier")
+ test_pci_membarrier(fd);
+
+ igt_subtest_f("pci-membarrier-bad-pagesize")
+ test_bad_pagesize_for_pcimem(fd);
+
igt_subtest("bad-flags")
test_bad_flags(fd);
@@ -282,6 +375,9 @@ igt_main
igt_subtest("bad-object")
test_bad_object(fd);
+ igt_subtest("pci-membarrier-bad-object")
+ test_bad_object_for_pcimem(fd);
+
igt_subtest("small-bar") {
igt_require(xe_visible_vram_size(fd, 0));
igt_require(xe_visible_vram_size(fd, 0) < xe_vram_size(fd, 0));
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* RE: [PATCH 0/4] Add pci_membarrier test in xe_mmap
2024-11-13 14:10 [PATCH 0/4] Add pci_membarrier test in xe_mmap Tejas Upadhyay
` (4 preceding siblings ...)
2024-11-13 16:24 ` ✗ CI.Patch_applied: failure for Add pci_membarrier test in xe_mmap Patchwork
@ 2024-11-14 4:58 ` Upadhyay, Tejas
5 siblings, 0 replies; 7+ messages in thread
From: Upadhyay, Tejas @ 2024-11-14 4:58 UTC (permalink / raw)
To: igt-dev@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Forgot to "i-g-t" tag, please ignore this sending another one.
> -----Original Message-----
> From: Upadhyay, Tejas <tejas.upadhyay@intel.com>
> Sent: Wednesday, November 13, 2024 7:40 PM
> To: igt-dev@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Upadhyay, Tejas <tejas.upadhyay@intel.com>
> Subject: [PATCH 0/4] Add pci_membarrier test in xe_mmap
>
> Series adds,
> 1. Remove all local defines which are landed from upstream kernel include 2.
> New flag in mmap_offset ioctl to provide query support for special offset.
> 3. Adds pci_membarrier subtests xe_mmap test
>
> Note: Similar drm-uapi change made here is under review in KMD as well
>
> Tejas Upadhyay (4):
> lib/i915_drm_local: Remove macros added via merged kernel
> include/drm-uapi-experimental: Move i915_drm_local.h to
> drm-uapi-experimental
> include/intel_drm_local.h: Add
> DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER
> tests/xe/mmap: add tests for pci mem barrier
>
> .../drm-uapi-experimental/intel_drm_local.h | 29 ++++++
> lib/i915/gem_scheduler.c | 2 +-
> lib/i915/i915_drm_local.h | 6 --
> lib/i915/intel_memory_region.h | 2 +-
> lib/igt_gt.h | 2 +-
> tests/intel/xe_mmap.c | 96 +++++++++++++++++++
> tools/i915-perf/i915_perf_recorder.c | 2 +-
> 7 files changed, 129 insertions(+), 10 deletions(-) create mode 100644
> include/drm-uapi-experimental/intel_drm_local.h
>
> --
> 2.34.1
^ permalink raw reply [flat|nested] 7+ messages in thread