From: Matthew Brost <matthew.brost@intel.com>
To: intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: kenneth.w.graunke@intel.com, lionel.g.landwerlin@intel.com,
jose.souza@intel.com, simona.vetter@ffwll.ch,
thomas.hellstrom@linux.intel.com, boris.brezillon@collabora.com,
airlied@gmail.com, christian.koenig@amd.com,
mihail.atanassov@arm.com, steven.price@arm.com,
shashank.sharma@amd.com
Subject: [RFC PATCH 27/29] drm/xe: Teach xe_sync layer about drm_xe_semaphore
Date: Mon, 18 Nov 2024 15:37:55 -0800 [thread overview]
Message-ID: <20241118233757.2374041-28-matthew.brost@intel.com> (raw)
In-Reply-To: <20241118233757.2374041-1-matthew.brost@intel.com>
Teach xe_sync layer about drm_xe_semaphore which is used import / export
user fences.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_sync.c | 90 ++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_sync.h | 8 +++
drivers/gpu/drm/xe/xe_sync_types.h | 5 +-
3 files changed, 102 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_sync.c b/drivers/gpu/drm/xe/xe_sync.c
index 42f5bebd09e5..ac4510ad52a9 100644
--- a/drivers/gpu/drm/xe/xe_sync.c
+++ b/drivers/gpu/drm/xe/xe_sync.c
@@ -6,6 +6,7 @@
#include "xe_sync.h"
#include <linux/dma-fence-array.h>
+#include <linux/dma-fence-user-fence.h>
#include <linux/kthread.h>
#include <linux/sched/mm.h>
#include <linux/uaccess.h>
@@ -14,11 +15,15 @@
#include <drm/drm_syncobj.h>
#include <uapi/drm/xe_drm.h>
+#include "xe_bo.h"
#include "xe_device_types.h"
#include "xe_exec_queue.h"
+#include "xe_hw_fence.h"
#include "xe_macros.h"
#include "xe_sched_job_types.h"
+#define IS_UNINSTALLED_HW_FENCE BIT(31)
+
struct xe_user_fence {
struct xe_device *xe;
struct kref refcount;
@@ -211,6 +216,74 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
return 0;
}
+int xe_sync_semaphore_parse(struct xe_device *xe, struct xe_file *xef,
+ struct xe_sync_entry *sync,
+ struct drm_xe_semaphore __user *semaphore_user,
+ unsigned int flags)
+{
+ struct drm_xe_semaphore semaphore_in;
+ struct drm_gem_object *gem_obj;
+ struct xe_bo *bo;
+
+ if (copy_from_user(&semaphore_in, semaphore_user,
+ sizeof(*semaphore_user)))
+ return -EFAULT;
+
+ if (XE_IOCTL_DBG(xe, semaphore_in.offset & 0x7 ||
+ !semaphore_in.handle || semaphore_in.token ||
+ semaphore_in.reserved[0] || semaphore_in.reserved[1]))
+ return -EINVAL;
+
+ gem_obj = drm_gem_object_lookup(xef->drm, semaphore_in.handle);
+ if (XE_IOCTL_DBG(xe, !gem_obj))
+ return -ENOENT;
+
+ bo = gem_to_xe_bo(gem_obj);
+
+ if (XE_IOCTL_DBG(xe, bo->size < semaphore_in.offset)) {
+ xe_bo_put(bo);
+ return -EINVAL;
+ }
+
+ if (flags & DRM_XE_SYNC_FLAG_SIGNAL) {
+ struct iosys_map vmap = sync->bo->vmap;
+ struct dma_fence *fence;
+
+ sync->chain_fence = dma_fence_chain_alloc();
+ if (!sync->chain_fence) {
+ xe_bo_put(bo);
+ dma_fence_chain_free(sync->chain_fence);
+ return -ENOMEM;
+ }
+
+ fence = xe_hw_fence_alloc();
+ if (IS_ERR(fence)) {
+ xe_bo_put(bo);
+ return PTR_ERR(fence);
+ }
+
+ vmap = bo->vmap;
+ iosys_map_incr(&vmap, semaphore_in.offset);
+
+ xe_hw_fence_user_init(fence, xe, vmap, semaphore_in.seqno);
+ sync->fence = fence;
+ sync->flags = IS_UNINSTALLED_HW_FENCE;
+ } else {
+ sync->user_fence = dma_fence_user_fence_alloc();
+ if (XE_IOCTL_DBG(xe, !sync->user_fence)) {
+ xe_bo_put(bo);
+ return PTR_ERR(sync->ufence);
+ }
+
+ sync->addr = semaphore_in.offset;
+ sync->timeline_value = semaphore_in.seqno;
+ sync->flags = DRM_XE_SYNC_FLAG_SIGNAL;
+ }
+ sync->bo = bo;
+
+ return 0;
+}
+
int xe_sync_entry_add_deps(struct xe_sync_entry *sync, struct xe_sched_job *job)
{
if (sync->fence)
@@ -249,17 +322,34 @@ void xe_sync_entry_signal(struct xe_sync_entry *sync, struct dma_fence *fence)
user_fence_put(sync->ufence);
dma_fence_put(fence);
}
+ } else if (sync->user_fence) {
+ struct iosys_map vmap = sync->bo->vmap;
+
+ iosys_map_incr(&vmap, sync->addr);
+ dma_fence_user_fence_attach(fence, sync->user_fence,
+ &vmap, sync->timeline_value);
+ sync->user_fence = NULL;
}
}
+void xe_sync_entry_hw_fence_installed(struct xe_sync_entry *sync)
+{
+ sync->flags &= ~IS_UNINSTALLED_HW_FENCE;
+}
+
void xe_sync_entry_cleanup(struct xe_sync_entry *sync)
{
if (sync->syncobj)
drm_syncobj_put(sync->syncobj);
+ xe_bo_put(sync->bo);
+ if (sync->flags & IS_UNINSTALLED_HW_FENCE)
+ dma_fence_set_error(sync->fence, -ECANCELED);
dma_fence_put(sync->fence);
dma_fence_chain_free(sync->chain_fence);
if (sync->ufence)
user_fence_put(sync->ufence);
+ if (sync->user_fence)
+ dma_fence_user_fence_free(sync->user_fence);
}
/**
diff --git a/drivers/gpu/drm/xe/xe_sync.h b/drivers/gpu/drm/xe/xe_sync.h
index 256ffc1e54dc..fd56929e37cc 100644
--- a/drivers/gpu/drm/xe/xe_sync.h
+++ b/drivers/gpu/drm/xe/xe_sync.h
@@ -8,6 +8,9 @@
#include "xe_sync_types.h"
+struct drm_xe_semaphore;
+struct drm_xe_sync;
+
struct xe_device;
struct xe_exec_queue;
struct xe_file;
@@ -22,10 +25,15 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
struct xe_sync_entry *sync,
struct drm_xe_sync __user *sync_user,
unsigned int flags);
+int xe_sync_semaphore_parse(struct xe_device *xe, struct xe_file *xef,
+ struct xe_sync_entry *sync,
+ struct drm_xe_semaphore __user *semaphore_user,
+ unsigned int flags);
int xe_sync_entry_add_deps(struct xe_sync_entry *sync,
struct xe_sched_job *job);
void xe_sync_entry_signal(struct xe_sync_entry *sync,
struct dma_fence *fence);
+void xe_sync_entry_hw_fence_installed(struct xe_sync_entry *sync);
void xe_sync_entry_cleanup(struct xe_sync_entry *sync);
struct dma_fence *
xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync,
diff --git a/drivers/gpu/drm/xe/xe_sync_types.h b/drivers/gpu/drm/xe/xe_sync_types.h
index 30ac3f51993b..28e846c29122 100644
--- a/drivers/gpu/drm/xe/xe_sync_types.h
+++ b/drivers/gpu/drm/xe/xe_sync_types.h
@@ -11,14 +11,17 @@
struct drm_syncobj;
struct dma_fence;
struct dma_fence_chain;
-struct drm_xe_sync;
+struct dma_fence_user_fence;
struct user_fence;
+struct xe_bo;
struct xe_sync_entry {
struct drm_syncobj *syncobj;
struct dma_fence *fence;
struct dma_fence_chain *chain_fence;
struct xe_user_fence *ufence;
+ struct dma_fence_user_fence *user_fence;
+ struct xe_bo *bo;
u64 addr;
u64 timeline_value;
u32 type;
--
2.34.1
next prev parent reply other threads:[~2024-11-18 23:37 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-18 23:37 [RFC PATCH 00/29] UMD direct submission in Xe Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 01/29] dma-fence: Add dma_fence_preempt base class Matthew Brost
2024-11-20 13:31 ` Christian König
2024-11-20 17:36 ` Matthew Brost
2024-11-21 10:04 ` Christian König
2024-11-21 18:41 ` Matthew Brost
2024-11-22 10:56 ` Christian König
2024-11-18 23:37 ` [RFC PATCH 02/29] dma-fence: Add dma_fence_user_fence Matthew Brost
2024-11-20 13:38 ` Christian König
2024-11-20 22:50 ` Matthew Brost
2024-11-21 9:31 ` Christian König
2024-11-22 2:35 ` Matthew Brost
2024-11-22 10:28 ` Christian König
2024-11-18 23:37 ` [RFC PATCH 03/29] drm/xe: Use dma_fence_preempt base class Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 04/29] drm/xe: Allocate doorbells for UMD exec queues Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 05/29] drm/xe: Add doorbell ID to snapshot capture Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 06/29] drm/xe: Break submission ring out into its own BO Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 07/29] drm/xe: Break indirect ring state " Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 08/29] drm/xe: Clear GGTT in xe_bo_restore_kernel Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 09/29] FIXME: drm/xe: Add pad to ring and indirect state Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 10/29] drm/xe: Enable indirect ring on media GT Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 11/29] drm/xe: Don't add pinned mappings to VM bulk move Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 12/29] drm/xe: Add exec queue post init extension processing Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 13/29] drm/xe/mmap: Add mmap support for PCI memory barrier Matthew Brost
2024-11-19 10:00 ` Christian König
2024-11-19 11:57 ` Joonas Lahtinen
2024-11-19 12:42 ` Mrozek, Michal
2024-12-18 12:59 ` Upadhyay, Tejas
2024-11-18 23:37 ` [RFC PATCH 14/29] drm/xe: Add support for mmapping doorbells to user space Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 15/29] drm/xe: Add support for mmapping submission ring and indirect ring state " Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 16/29] drm/xe/uapi: Define UMD exec queue mapping uAPI Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 17/29] drm/xe: Add usermap exec queue extension Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 18/29] drm/xe: Drop EXEC_QUEUE_FLAG_UMD_SUBMISSION flag Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 19/29] drm/xe: Do not allow usermap exec queues in exec IOCTL Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 20/29] drm/xe: Teach GuC backend to kill usermap queues Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 21/29] drm/xe: Enable preempt fences on " Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 22/29] drm/xe/uapi: Add uAPI to convert user semaphore to / from drm syncobj Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 23/29] drm/xe: Add user fence IRQ handler Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 24/29] drm/xe: Add xe_hw_fence_user_init Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 25/29] drm/xe: Add a message lock to the Xe GPU scheduler Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 26/29] drm/xe: Always wait on preempt fences in vma_check_userptr Matthew Brost
2024-11-18 23:37 ` Matthew Brost [this message]
2024-11-18 23:37 ` [RFC PATCH 28/29] drm/xe: Add VM convert fence IOCTL Matthew Brost
2024-11-18 23:37 ` [RFC PATCH 29/29] drm/xe: Add user fence TDR Matthew Brost
2024-11-18 23:55 ` ✓ CI.Patch_applied: success for UMD direct submission in Xe Patchwork
2024-11-18 23:56 ` ✗ CI.checkpatch: warning " Patchwork
2024-11-18 23:57 ` ✓ CI.KUnit: success " Patchwork
2024-11-19 0:15 ` ✓ CI.Build: " Patchwork
2024-11-19 0:17 ` ✗ CI.Hooks: failure " Patchwork
2024-11-19 0:19 ` ✓ CI.checksparse: success " Patchwork
2024-11-19 0:39 ` ✗ CI.BAT: failure " Patchwork
2024-11-19 11:44 ` ✗ CI.FULL: " Patchwork
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