From: Nirmoy Das <nirmoy.das@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: "Nirmoy Das" <nirmoy.das@intel.com>,
"Matthew Auld" <matthew.auld@intel.com>,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>
Subject: [PATCH] drm/xe/tests: Wait for clear fence operation to complete
Date: Thu, 5 Dec 2024 12:47:02 +0100 [thread overview]
Message-ID: <20241205114702.1963303-1-nirmoy.das@intel.com> (raw)
Ensure the clear operation completes before proceeding, as the clear
fence is not attached to the BO's dma-resv object.
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
---
drivers/gpu/drm/xe/tests/xe_bo.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/xe/tests/xe_bo.c b/drivers/gpu/drm/xe/tests/xe_bo.c
index 3e0ae40ebbd2..c9ec7a313c6b 100644
--- a/drivers/gpu/drm/xe/tests/xe_bo.c
+++ b/drivers/gpu/drm/xe/tests/xe_bo.c
@@ -49,6 +49,13 @@ static int ccs_test_migrate(struct xe_tile *tile, struct xe_bo *bo,
KUNIT_FAIL(test, "Failed to submit bo clear.\n");
return PTR_ERR(fence);
}
+
+ if (dma_fence_wait_timeout(fence, false, 5 * HZ) <= 0) {
+ dma_fence_put(fence);
+ KUNIT_FAIL(test, "Timeout while clearing bo.\n");
+ return -ETIME;
+ }
+
dma_fence_put(fence);
}
--
2.46.0
next reply other threads:[~2024-12-05 11:28 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-05 11:47 Nirmoy Das [this message]
2024-12-05 11:49 ` [PATCH] drm/xe/tests: Wait for clear fence operation to complete Matthew Auld
2024-12-05 14:35 ` Nirmoy Das
2024-12-05 14:05 ` ✓ CI.Patch_applied: success for " Patchwork
2024-12-05 14:05 ` ✓ CI.checkpatch: " Patchwork
2024-12-05 14:06 ` ✓ CI.KUnit: " Patchwork
2024-12-05 14:25 ` ✓ CI.Build: " Patchwork
2024-12-05 14:27 ` ✓ CI.Hooks: " Patchwork
2024-12-05 14:28 ` ✓ CI.checksparse: " Patchwork
2024-12-05 14:58 ` ✗ Xe.CI.BAT: failure " Patchwork
2024-12-09 8:37 ` Nirmoy Das
2024-12-05 15:56 ` ✗ Xe.CI.Full: " Patchwork
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