Re: [PATCH] drm/xe/tests: Wait for clear fence operation to complete

[Nirmoy Das <nirmoy.das@linux.intel.com>]

On 12/5/2024 12:49 PM, Matthew Auld wrote:
> On 05/12/2024 11:47, Nirmoy Das wrote:
>> Ensure the clear operation completes before proceeding, as the clear
>> fence is not attached to the BO's dma-resv object.
>>
>> Cc: Matthew Auld <matthew.auld@intel.com>
>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
>
> In theory it is all single timeline underneath, so the later copy job would anyway happen after the clear, and we should wait for that. So hopefully in practice this is not issue.


I haven't seen any issue caused by this yet but found it while looking into the IOMMU+CAT error issue.

>
> Reviewed-by: Matthew Auld <matthew.auld@intel.com>


Thanks,

Nirmoy

>
>> ---
>>   drivers/gpu/drm/xe/tests/xe_bo.c | 7 +++++++
>>   1 file changed, 7 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/tests/xe_bo.c b/drivers/gpu/drm/xe/tests/xe_bo.c
>> index 3e0ae40ebbd2..c9ec7a313c6b 100644
>> --- a/drivers/gpu/drm/xe/tests/xe_bo.c
>> +++ b/drivers/gpu/drm/xe/tests/xe_bo.c
>> @@ -49,6 +49,13 @@ static int ccs_test_migrate(struct xe_tile *tile, struct xe_bo *bo,
>>               KUNIT_FAIL(test, "Failed to submit bo clear.\n");
>>               return PTR_ERR(fence);
>>           }
>> +
>> +        if (dma_fence_wait_timeout(fence, false, 5 * HZ) <= 0) {
>> +            dma_fence_put(fence);
>> +            KUNIT_FAIL(test, "Timeout while clearing bo.\n");
>> +            return  -ETIME;
>> +        }
>> +
>>           dma_fence_put(fence);
>>       }
>>   
>