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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: [PATCH 4/9] drm/i915/dp: Have intel_dp_get_adjust_train() tell us if anything changed
Date: Mon, 24 Feb 2025 19:26:40 +0200	[thread overview]
Message-ID: <20250224172645.15763-5-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20250224172645.15763-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

In order to implement the POST_LT_ADJ_REQ sequence we need to
know whether the sink actually requested a changed to the
vswing/pre-emph values.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 .../drm/i915/display/intel_dp_link_training.c  | 18 +++++++++++++-----
 .../drm/i915/display/intel_dp_link_training.h  |  2 +-
 2 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index b2fb641e4e96..2506996bf16d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -489,12 +489,13 @@ static u8 intel_dp_get_lane_adjust_train(struct intel_dp *intel_dp,
 	_TRAIN_REQ_TX_FFE_ARGS(link_status, 2), \
 	_TRAIN_REQ_TX_FFE_ARGS(link_status, 3)
 
-void
+bool
 intel_dp_get_adjust_train(struct intel_dp *intel_dp,
 			  const struct intel_crtc_state *crtc_state,
 			  enum drm_dp_phy dp_phy,
 			  const u8 link_status[DP_LINK_STATUS_SIZE])
 {
+	bool changed = false;
 	int lane;
 
 	if (intel_dp_is_uhbr(crtc_state)) {
@@ -513,10 +514,17 @@ intel_dp_get_adjust_train(struct intel_dp *intel_dp,
 		       TRAIN_REQ_PREEMPH_ARGS(link_status));
 	}
 
-	for (lane = 0; lane < 4; lane++)
-		intel_dp->train_set[lane] =
-			intel_dp_get_lane_adjust_train(intel_dp, crtc_state,
-						       dp_phy, link_status, lane);
+	for (lane = 0; lane < 4; lane++) {
+		u8 new = intel_dp_get_lane_adjust_train(intel_dp, crtc_state,
+							dp_phy, link_status, lane);
+		if (intel_dp->train_set[lane] == new)
+			continue;
+
+		intel_dp->train_set[lane] = new;
+		changed = true;
+	}
+
+	return changed;
 }
 
 static int intel_dp_training_pattern_set_reg(struct intel_dp *intel_dp,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
index 46614124569f..1ba22ed6db08 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
@@ -23,7 +23,7 @@ void intel_dp_link_training_set_bw(struct intel_dp *intel_dp,
 				   int link_bw, int rate_select, int lane_count,
 				   bool enhanced_framing);
 
-void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
+bool intel_dp_get_adjust_train(struct intel_dp *intel_dp,
 			       const struct intel_crtc_state *crtc_state,
 			       enum drm_dp_phy dp_phy,
 			       const u8 link_status[DP_LINK_STATUS_SIZE]);
-- 
2.45.3


  parent reply	other threads:[~2025-02-24 17:27 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-24 17:26 [PATCH 0/9] drm/i915/dp: Implement POST_LT_ADJ_REQ Ville Syrjala
2025-02-24 17:26 ` [PATCH 1/9] drm/dp: Add definitions for POST_LT_ADJ training sequence Ville Syrjala
2025-02-25 15:55   ` Jani Nikula
2025-02-27 20:42   ` [PATCH v2 " Ville Syrjala
2025-06-16 16:28     ` Imre Deak
2025-02-24 17:26 ` [PATCH 2/9] drm/dp: Add POST_LT_ADJ_REQ helpers Ville Syrjala
2025-02-24 17:26 ` [PATCH 3/9] drm/i915/dp: Clear DPCD training pattern before transmitting the idle pattern Ville Syrjala
2025-02-24 17:26 ` Ville Syrjala [this message]
2025-02-24 17:26 ` [PATCH 5/9] drm/i915/dp: Implement the POST_LT_ADJ_REQ sequence Ville Syrjala
2025-06-16 16:30   ` Imre Deak
2025-02-24 17:26 ` [PATCH 6/9] drm/i915/dp: Move intel_dp_training_pattern() Ville Syrjala
2025-02-24 17:26 ` [PATCH 7/9] drm/i915/dp: Implement .set_idle_link_train() for everyone Ville Syrjala
2025-06-16 16:31   ` Imre Deak
2025-02-24 17:26 ` [PATCH 8/9] drm/i915/dp: Make .set_idle_link_train() mandatory Ville Syrjala
2025-02-24 17:26 ` [PATCH 9/9] hax: drm/i915: Disable TPS4 support to force POST_LT_ADJ_REQ usage Ville Syrjala
2025-02-25  1:06 ` ✓ CI.Patch_applied: success for drm/i915/dp: Implement POST_LT_ADJ_REQ Patchwork
2025-02-25  1:06 ` ✗ CI.checkpatch: warning " Patchwork
2025-02-25  1:07 ` ✓ CI.KUnit: success " Patchwork
2025-02-25  1:24 ` ✓ CI.Build: " Patchwork
2025-02-25  1:26 ` ✓ CI.Hooks: " Patchwork
2025-02-25  1:28 ` ✗ CI.checksparse: warning " Patchwork
2025-02-25  1:46 ` ✓ Xe.CI.BAT: success " Patchwork
2025-02-25  4:34 ` ✗ Xe.CI.Full: failure " Patchwork
2025-02-27 22:35 ` ✓ CI.Patch_applied: success for drm/i915/dp: Implement POST_LT_ADJ_REQ (rev2) Patchwork
2025-02-27 22:35 ` ✗ CI.checkpatch: warning " Patchwork
2025-02-27 22:37 ` ✓ CI.KUnit: success " Patchwork
2025-02-27 22:53 ` ✓ CI.Build: " Patchwork
2025-02-27 22:56 ` ✓ CI.Hooks: " Patchwork
2025-02-27 22:57 ` ✗ CI.checksparse: warning " Patchwork
2025-02-27 23:15 ` ✓ Xe.CI.BAT: success " Patchwork
2025-02-28  3:23 ` ✗ Xe.CI.Full: failure " Patchwork
2025-06-16 16:25 ` [PATCH 0/9] drm/i915/dp: Implement POST_LT_ADJ_REQ Imre Deak

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