From: Jonathan Cavitt <jonathan.cavitt@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com,
jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com,
matthew.brost@intel.com, jianxun.zhang@intel.com,
dri-devel@lists.freedesktop.org
Subject: [PATCH v4 2/6] drm/xe/xe_gt_pagefault: Migrate pagefault struct to header
Date: Mon, 3 Mar 2025 22:00:18 +0000 [thread overview]
Message-ID: <20250303220022.67200-3-jonathan.cavitt@intel.com> (raw)
In-Reply-To: <20250303220022.67200-1-jonathan.cavitt@intel.com>
Migrate the pagefault struct from xe_gt_pagefault.c to the
xe_gt_pagefault.h header file, along with the associated enum values.
v2: Normalize names for common header (Matt Brost)
Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
---
drivers/gpu/drm/xe/xe_gt_pagefault.c | 43 ++++++----------------------
drivers/gpu/drm/xe/xe_gt_pagefault.h | 28 ++++++++++++++++++
2 files changed, 36 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c
index f608a765fa7c..07b52d3c1a60 100644
--- a/drivers/gpu/drm/xe/xe_gt_pagefault.c
+++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c
@@ -22,33 +22,6 @@
#include "xe_trace_bo.h"
#include "xe_vm.h"
-struct pagefault {
- u64 page_addr;
- u32 asid;
- u16 pdata;
- u8 vfid;
- u8 access_type;
- u8 fault_type;
- u8 fault_level;
- u8 engine_class;
- u8 engine_instance;
- u8 fault_unsuccessful;
- bool trva_fault;
-};
-
-enum access_type {
- ACCESS_TYPE_READ = 0,
- ACCESS_TYPE_WRITE = 1,
- ACCESS_TYPE_ATOMIC = 2,
- ACCESS_TYPE_RESERVED = 3,
-};
-
-enum fault_type {
- NOT_PRESENT = 0,
- WRITE_ACCESS_VIOLATION = 1,
- ATOMIC_ACCESS_VIOLATION = 2,
-};
-
struct acc {
u64 va_range_base;
u32 asid;
@@ -60,9 +33,9 @@ struct acc {
u8 engine_instance;
};
-static bool access_is_atomic(enum access_type access_type)
+static bool access_is_atomic(enum xe_pagefault_access_type access_type)
{
- return access_type == ACCESS_TYPE_ATOMIC;
+ return access_type == XE_PAGEFAULT_ACCESS_TYPE_ATOMIC;
}
static bool vma_is_valid(struct xe_tile *tile, struct xe_vma *vma)
@@ -125,7 +98,7 @@ static int xe_pf_begin(struct drm_exec *exec, struct xe_vma *vma,
return 0;
}
-static int handle_vma_pagefault(struct xe_gt *gt, struct pagefault *pf,
+static int handle_vma_pagefault(struct xe_gt *gt, struct xe_pagefault *pf,
struct xe_vma *vma)
{
struct xe_vm *vm = xe_vma_vm(vma);
@@ -204,7 +177,7 @@ static struct xe_vm *asid_to_vm(struct xe_device *xe, u32 asid)
return vm;
}
-static int handle_pagefault(struct xe_gt *gt, struct pagefault *pf)
+static int handle_pagefault(struct xe_gt *gt, struct xe_pagefault *pf)
{
struct xe_device *xe = gt_to_xe(gt);
struct xe_vm *vm;
@@ -235,7 +208,7 @@ static int handle_pagefault(struct xe_gt *gt, struct pagefault *pf)
goto unlock_vm;
}
- if (xe_vma_read_only(vma) && pf->access_type != ACCESS_TYPE_READ) {
+ if (xe_vma_read_only(vma) && pf->access_type != XE_PAGEFAULT_ACCESS_TYPE_READ) {
err = -EPERM;
goto unlock_vm;
}
@@ -263,7 +236,7 @@ static int send_pagefault_reply(struct xe_guc *guc,
return xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 0, 0);
}
-static void print_pagefault(struct xe_device *xe, struct pagefault *pf)
+static void print_pagefault(struct xe_device *xe, struct xe_pagefault *pf)
{
drm_dbg(&xe->drm, "\n\tASID: %d\n"
"\tVFID: %d\n"
@@ -283,7 +256,7 @@ static void print_pagefault(struct xe_device *xe, struct pagefault *pf)
#define PF_MSG_LEN_DW 4
-static bool get_pagefault(struct pf_queue *pf_queue, struct pagefault *pf)
+static bool get_pagefault(struct pf_queue *pf_queue, struct xe_pagefault *pf)
{
const struct xe_guc_pagefault_desc *desc;
bool ret = false;
@@ -370,7 +343,7 @@ static void pf_queue_work_func(struct work_struct *w)
struct xe_gt *gt = pf_queue->gt;
struct xe_device *xe = gt_to_xe(gt);
struct xe_guc_pagefault_reply reply = {};
- struct pagefault pf = {};
+ struct xe_pagefault pf = {};
unsigned long threshold;
int ret;
diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.h b/drivers/gpu/drm/xe/xe_gt_pagefault.h
index 839c065a5e4c..33616043d17a 100644
--- a/drivers/gpu/drm/xe/xe_gt_pagefault.h
+++ b/drivers/gpu/drm/xe/xe_gt_pagefault.h
@@ -11,6 +11,34 @@
struct xe_gt;
struct xe_guc;
+struct xe_pagefault {
+ u64 page_addr;
+ u32 asid;
+ u16 pdata;
+ u8 vfid;
+ u8 access_type;
+ u8 fault_type;
+ u8 fault_level;
+ u8 engine_class;
+ u8 engine_instance;
+ u8 fault_unsuccessful;
+ bool prefetch;
+ bool trva_fault;
+};
+
+enum xe_pagefault_access_type {
+ XE_PAGEFAULT_ACCESS_TYPE_READ = 0,
+ XE_PAGEFAULT_ACCESS_TYPE_WRITE = 1,
+ XE_PAGEFAULT_ACCESS_TYPE_ATOMIC = 2,
+ XE_PAGEFAULT_ACCESS_TYPE_RESERVED = 3,
+};
+
+enum xe_pagefault_type {
+ XE_PAGEFAULT_TYPE_NOT_PRESENT = 0,
+ XE_PAGEFAULT_TYPE_WRITE_ACCESS_VIOLATION = 1,
+ XE_PAGEFAULT_TYPE_ATOMIC_ACCESS_VIOLATION = 2,
+};
+
int xe_gt_pagefault_init(struct xe_gt *gt);
void xe_gt_pagefault_reset(struct xe_gt *gt);
int xe_guc_pagefault_handler(struct xe_guc *guc, u32 *msg, u32 len);
--
2.43.0
next prev parent reply other threads:[~2025-03-03 22:00 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-03 22:00 [PATCH v4 0/6] drm/xe/xe_vm: Implement xe_vm_get_property_ioctl Jonathan Cavitt
2025-03-03 22:00 ` [PATCH v4 1/6] drm/xe/xe_gt_pagefault: Disallow writes to read-only VMAs Jonathan Cavitt
2025-03-03 22:00 ` Jonathan Cavitt [this message]
2025-03-03 22:00 ` [PATCH v4 3/6] drm/xe/xe_vm: Add per VM pagefault info Jonathan Cavitt
2025-03-03 22:00 ` [PATCH v4 4/6] drm/xe/uapi: Define drm_xe_vm_get_property Jonathan Cavitt
2025-03-03 22:00 ` [PATCH v4 5/6] drm/xe/xe_gt_pagefault: Add address_type field to pagefaults Jonathan Cavitt
2025-03-03 22:00 ` [PATCH v4 6/6] drm/xe/xe_vm: Implement xe_vm_get_property_ioctl Jonathan Cavitt
2025-03-03 23:38 ` Lin, Shuicheng
2025-03-03 22:42 ` ✓ CI.Patch_applied: success for drm/xe/xe_vm: Implement xe_vm_get_property_ioctl (rev5) Patchwork
2025-03-03 22:42 ` ✗ CI.checkpatch: warning " Patchwork
2025-03-03 22:44 ` ✓ CI.KUnit: success " Patchwork
2025-03-03 23:00 ` ✓ CI.Build: " Patchwork
2025-03-03 23:03 ` ✓ CI.Hooks: " Patchwork
2025-03-03 23:04 ` ✓ CI.checksparse: " Patchwork
2025-03-04 5:58 ` ✓ Xe.CI.BAT: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2025-02-20 20:38 [PATCH v4 0/6] drm/xe/xe_drm_client: Add per drm client reset stats Jonathan Cavitt
2025-02-20 20:38 ` [PATCH v4 2/6] drm/xe/xe_gt_pagefault: Migrate pagefault struct to header Jonathan Cavitt
2025-02-25 20:48 ` Matthew Brost
2025-02-19 20:28 [PATCH v4 0/6] drm/xe/xe_drm_client: Add per drm client reset stats Jonathan Cavitt
2025-02-19 20:28 ` [PATCH v4 2/6] drm/xe/xe_gt_pagefault: Migrate pagefault struct to header Jonathan Cavitt
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250303220022.67200-3-jonathan.cavitt@intel.com \
--to=jonathan.cavitt@intel.com \
--cc=alex.zuo@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=jianxun.zhang@intel.com \
--cc=joonas.lahtinen@linux.intel.com \
--cc=matthew.brost@intel.com \
--cc=saurabhg.gupta@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox