From: Maarten Lankhorst <dev@lankhorst.se>
To: intel-xe@lists.freedesktop.org
Cc: Maarten Lankhorst <dev@lankhorst.se>
Subject: [PATCH 4/6] drm/xe/display: Remove dereferences of ggtt for tile id
Date: Thu, 3 Apr 2025 14:45:18 +0200 [thread overview]
Message-ID: <20250403124520.470916-5-dev@lankhorst.se> (raw)
In-Reply-To: <20250403124520.470916-1-dev@lankhorst.se>
Obtain the id from the root tile. Likely this can be hardcoded to 0,
but use the clean solution of obtaining root id and doing that.
to_xe_device(ggtt->tile) can also be easily replaced with xe.
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index d918ae1c80618..d509def82b134 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -199,14 +199,15 @@ static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
struct drm_gem_object *obj = intel_fb_bo(&fb->base);
struct xe_bo *bo = gem_to_xe_bo(obj);
struct xe_device *xe = to_xe_device(fb->base.dev);
- struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
+ struct xe_tile *tile0 = xe_device_get_root_tile(xe);
+ struct xe_ggtt *ggtt = tile0->mem.ggtt;
u32 align;
int ret;
/* TODO: Consider sharing framebuffer mapping?
* embed i915_vma inside intel_framebuffer
*/
- xe_pm_runtime_get_noresume(tile_to_xe(ggtt->tile));
+ xe_pm_runtime_get_noresume(xe);
ret = mutex_lock_interruptible(&ggtt->lock);
if (ret)
goto out;
@@ -215,8 +216,8 @@ static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
if (xe_bo_is_vram(bo) && ggtt->flags & XE_GGTT_FLAGS_64K)
align = max_t(u32, align, SZ_64K);
- if (bo->ggtt_node[ggtt->tile->id] && view->type == I915_GTT_VIEW_NORMAL) {
- vma->node = bo->ggtt_node[ggtt->tile->id];
+ if (bo->ggtt_node[tile0->id] && view->type == I915_GTT_VIEW_NORMAL) {
+ vma->node = bo->ggtt_node[tile0->id];
} else if (view->type == I915_GTT_VIEW_NORMAL) {
u32 x, size = bo->ttm.base.size;
@@ -271,7 +272,7 @@ static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
out_unlock:
mutex_unlock(&ggtt->lock);
out:
- xe_pm_runtime_put(tile_to_xe(ggtt->tile));
+ xe_pm_runtime_put(xe);
return ret;
}
@@ -348,7 +349,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
static void __xe_unpin_fb_vma(struct i915_vma *vma)
{
- u8 tile_id = vma->node->ggtt->tile->id;
+ u8 tile_id = xe_device_get_root_tile(xe_bo_device(vma->bo))->id;
if (!refcount_dec_and_test(&vma->ref))
return;
--
2.45.2
next prev parent reply other threads:[~2025-04-03 12:45 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-03 12:45 [PATCH 0/6] drm/xe: Preparations for making struct xe_ggtt private Maarten Lankhorst
2025-04-03 12:45 ` [PATCH 1/6] drm/xe: Use xe_ggtt_map_bo_unlocked for resume Maarten Lankhorst
2025-04-03 12:45 ` [PATCH 2/6] drm/xe: Add xe_ggtt_might_lock Maarten Lankhorst
2025-04-03 12:45 ` [PATCH 3/6] drm/xe: Add xe_ggtt_alloc Maarten Lankhorst
2025-04-03 12:45 ` Maarten Lankhorst [this message]
2025-04-03 12:45 ` [PATCH 5/6] drm/xe/ggtt: Seperate flags and address in PTE encoding Maarten Lankhorst
2025-04-03 12:45 ` [PATCH 6/6] drm/xe: Implement a helper for reading out a GGTT PTE at a specified offset Maarten Lankhorst
2025-04-03 15:45 ` ✓ CI.Patch_applied: success for drm/xe: Preparations for making struct xe_ggtt private Patchwork
2025-04-03 15:46 ` ✗ CI.checkpatch: warning " Patchwork
2025-04-03 15:48 ` ✓ CI.KUnit: success " Patchwork
2025-04-03 16:11 ` ✓ CI.Build: " Patchwork
2025-04-03 16:14 ` ✓ CI.Hooks: " Patchwork
2025-04-03 16:15 ` ✓ CI.checksparse: " Patchwork
2025-04-03 17:03 ` ✓ Xe.CI.BAT: " Patchwork
2025-04-03 21:08 ` ✗ Xe.CI.Full: failure " Patchwork
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