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From: Maarten Lankhorst <dev@lankhorst.se>
To: intel-xe@lists.freedesktop.org
Cc: Maarten Lankhorst <dev@lankhorst.se>
Subject: [PATCH 6/6] drm/xe: Implement a helper for reading out a GGTT PTE at a specified offset
Date: Thu,  3 Apr 2025 14:45:20 +0200	[thread overview]
Message-ID: <20250403124520.470916-7-dev@lankhorst.se> (raw)
In-Reply-To: <20250403124520.470916-1-dev@lankhorst.se>

Split the GGTT PTE readout to a separate function, this is useful for
adding testcases in the next commit, and also cleaner than manually
reading out GGTT.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/xe/display/xe_plane_initial.c |  6 +-----
 drivers/gpu/drm/xe/xe_ggtt.c                  | 12 ++++++++++++
 drivers/gpu/drm/xe/xe_ggtt.h                  |  2 ++
 3 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/xe/display/xe_plane_initial.c b/drivers/gpu/drm/xe/display/xe_plane_initial.c
index 4ca0cb5711941..67f712472ca26 100644
--- a/drivers/gpu/drm/xe/display/xe_plane_initial.c
+++ b/drivers/gpu/drm/xe/display/xe_plane_initial.c
@@ -87,12 +87,8 @@ initial_plane_bo(struct xe_device *xe,
 
 	base = round_down(plane_config->base, page_size);
 	if (IS_DGFX(xe)) {
-		u64 __iomem *gte = tile0->mem.ggtt->gsm;
-		u64 pte;
+		u64 pte = xe_ggtt_read_pte(tile0->mem.ggtt, base);
 
-		gte += base / XE_PAGE_SIZE;
-
-		pte = ioread64(gte);
 		if (!(pte & XE_GGTT_PTE_DM)) {
 			drm_err(&xe->drm,
 				"Initial plane programming missing DM bit\n");
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index e37dc2149f9a3..8d2f4ab6ee131 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -904,3 +904,15 @@ u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer
 
 	return total;
 }
+
+/**
+ * xe_ggtt_read_pte - Read a PTE from the GGTT
+ * @ggtt: &xe_ggtt
+ * @offset: the offset for which the mapping should be read.
+ *
+ * Used by testcases, and by display reading out an inherited bios FB.
+ */
+u64 xe_ggtt_read_pte(struct xe_ggtt *ggtt, u64 offset)
+{
+	return ioread64(ggtt->gsm + (offset / XE_PAGE_SIZE));
+}
diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
index c48da99908848..ca606d610ea4f 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.h
+++ b/drivers/gpu/drm/xe/xe_ggtt.h
@@ -49,4 +49,6 @@ static inline void xe_ggtt_might_lock(struct xe_ggtt *ggtt)
 void xe_ggtt_might_lock(struct xe_ggtt *ggtt);
 #endif
 
+u64 xe_ggtt_read_pte(struct xe_ggtt *ggtt, u64 offset);
+
 #endif
-- 
2.45.2


  parent reply	other threads:[~2025-04-03 12:45 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-03 12:45 [PATCH 0/6] drm/xe: Preparations for making struct xe_ggtt private Maarten Lankhorst
2025-04-03 12:45 ` [PATCH 1/6] drm/xe: Use xe_ggtt_map_bo_unlocked for resume Maarten Lankhorst
2025-04-03 12:45 ` [PATCH 2/6] drm/xe: Add xe_ggtt_might_lock Maarten Lankhorst
2025-04-03 12:45 ` [PATCH 3/6] drm/xe: Add xe_ggtt_alloc Maarten Lankhorst
2025-04-03 12:45 ` [PATCH 4/6] drm/xe/display: Remove dereferences of ggtt for tile id Maarten Lankhorst
2025-04-03 12:45 ` [PATCH 5/6] drm/xe/ggtt: Seperate flags and address in PTE encoding Maarten Lankhorst
2025-04-03 12:45 ` Maarten Lankhorst [this message]
2025-04-03 15:45 ` ✓ CI.Patch_applied: success for drm/xe: Preparations for making struct xe_ggtt private Patchwork
2025-04-03 15:46 ` ✗ CI.checkpatch: warning " Patchwork
2025-04-03 15:48 ` ✓ CI.KUnit: success " Patchwork
2025-04-03 16:11 ` ✓ CI.Build: " Patchwork
2025-04-03 16:14 ` ✓ CI.Hooks: " Patchwork
2025-04-03 16:15 ` ✓ CI.checksparse: " Patchwork
2025-04-03 17:03 ` ✓ Xe.CI.BAT: " Patchwork
2025-04-03 21:08 ` ✗ Xe.CI.Full: failure " Patchwork

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