From: Soham Purkait <soham.purkait@intel.com>
To: intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com,
badal.nilawar@intel.com, karthik.poosa@intel.com,
riana.tauro@intel.com, jonathan.cavitt@intel.com
Cc: lucas.demarchi@intel.com, soham.purkait@intel.com,
ashutosh.dixit@intel.com, jani.nikula@intel.com
Subject: [PATCH v5 1/2] drm/xe/regs/xe_pmt: Macros for G-State and pcie link state residency offset
Date: Fri, 20 Jun 2025 17:33:55 +0530 [thread overview]
Message-ID: <20250620120356.3289744-2-soham.purkait@intel.com> (raw)
In-Reply-To: <20250620120356.3289744-1-soham.purkait@intel.com>
Add G-State residency and pcie link state residency
offset macros for G2, G6, G8, G10, ModS and L0, L1, L1.2
respectively.
v1 : Moved offset macros to drm/xe/regs/xe_pmt. (Riana)
v5 : Reordered commits to reflect the correct dependency hierarchy. (Jonathan)
Signed-off-by: Soham Purkait <soham.purkait@intel.com>
---
drivers/gpu/drm/xe/regs/xe_pmt.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/xe/regs/xe_pmt.h b/drivers/gpu/drm/xe/regs/xe_pmt.h
index b0efd9b48d1e..4e377b6eac92 100644
--- a/drivers/gpu/drm/xe/regs/xe_pmt.h
+++ b/drivers/gpu/drm/xe/regs/xe_pmt.h
@@ -21,4 +21,14 @@
#define SG_REMAP_INDEX1 XE_REG(SOC_BASE + 0x08)
#define SG_REMAP_BITS REG_GENMASK(31, 24)
+#define BMG_G2_RESIDENCY_OFFSET (0x530)
+#define BMG_G6_RESIDENCY_OFFSET (0x538)
+#define BMG_G8_RESIDENCY_OFFSET (0x540)
+#define BMG_G10_RESIDENCY_OFFSET (0x548)
+#define BMG_MODS_RESIDENCY_OFFSET (0x4D0)
+
+#define PCIE_LINK_L0_RESIDENCY_COUNTER (0x570)
+#define PCIE_LINK_L1_RESIDENCY_COUNTER (0x578)
+#define PCIE_LINK_L1_2_RESIDENCY_COUNTER (0x580)
+
#endif
--
2.34.1
next prev parent reply other threads:[~2025-06-20 12:09 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-20 12:03 [PATCH v5 0/2] Add debugfs node to expose G-state and pcie link state residency Soham Purkait
2025-06-20 12:03 ` Soham Purkait [this message]
2025-06-22 5:57 ` [PATCH v5 1/2] drm/xe/regs/xe_pmt: Macros for G-State and pcie link state residency offset Gupta, Anshuman
2025-06-24 13:10 ` Poosa, Karthik
2025-06-20 12:03 ` [PATCH v5 2/2] drm/xe/xe_debugfs: Exposure of G-State and pcie link state residency counters through debugfs Soham Purkait
2025-06-24 13:01 ` Poosa, Karthik
2025-06-20 12:28 ` ✗ CI.checkpatch: warning for Add debugfs node to expose G-state and pcie link state residency (rev3) Patchwork
2025-06-20 12:29 ` ✓ CI.KUnit: success " Patchwork
2025-06-20 22:52 ` ✗ Xe.CI.Full: failure " Patchwork
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