* [PATCH 0/4] Basic TLB inval refactor
@ 2025-07-15 21:21 stuartsummers
2025-07-15 21:21 ` [PATCH 1/4] drm/xe: Explicitly mark migration queues with flag stuartsummers
` (7 more replies)
0 siblings, 8 replies; 11+ messages in thread
From: stuartsummers @ 2025-07-15 21:21 UTC (permalink / raw)
Cc: matthew.brost, matthew.auld, maarten.lankhorst, intel-xe,
stuartsummers
Just a few refactors for the TLB invalidation related
files written by Matt. Couple of these have already been
reviewed and I did some small rebasing on the latest.
Working on building some of his other recent changes
plus a few others that have been floating around on
top of this. Doing this series explicitly first since
this is a reduced overall scope.
Matthew Brost (4):
drm/xe: Explicitly mark migration queues with flag
drm/xe: Remove unused GT TLB invalidation trace points
drm/xe: s/tlb_invalidation/tlb_inval
drm/xe: Add xe_tlb_inval structure
drivers/gpu/drm/xe/Makefile | 2 +-
drivers/gpu/drm/xe/xe_device_types.h | 4 +-
drivers/gpu/drm/xe/xe_exec_queue_types.h | 2 +
drivers/gpu/drm/xe/xe_ggtt.c | 6 +-
drivers/gpu/drm/xe/xe_gt.c | 8 +-
drivers/gpu/drm/xe/xe_gt_pagefault.c | 1 -
...t_tlb_invalidation.c => xe_gt_tlb_inval.c} | 239 +++++++++---------
drivers/gpu/drm/xe/xe_gt_tlb_inval.h | 40 +++
drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h | 62 +++++
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h | 40 ---
.../gpu/drm/xe/xe_gt_tlb_invalidation_types.h | 32 ---
drivers/gpu/drm/xe/xe_gt_types.h | 31 +--
drivers/gpu/drm/xe/xe_guc_ct.c | 8 +-
drivers/gpu/drm/xe/xe_lmtt.c | 12 +-
drivers/gpu/drm/xe/xe_migrate.c | 6 +-
drivers/gpu/drm/xe/xe_pci.c | 6 +-
drivers/gpu/drm/xe/xe_pci_types.h | 2 +-
drivers/gpu/drm/xe/xe_pt.c | 61 ++---
drivers/gpu/drm/xe/xe_svm.c | 4 +-
drivers/gpu/drm/xe/xe_trace.h | 40 +--
drivers/gpu/drm/xe/xe_vm.c | 64 +++--
drivers/gpu/drm/xe/xe_vm.h | 4 +-
22 files changed, 325 insertions(+), 349 deletions(-)
rename drivers/gpu/drm/xe/{xe_gt_tlb_invalidation.c => xe_gt_tlb_inval.c} (62%)
create mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_inval.h
create mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
delete mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
delete mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_invalidation_types.h
--
2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 1/4] drm/xe: Explicitly mark migration queues with flag
2025-07-15 21:21 [PATCH 0/4] Basic TLB inval refactor stuartsummers
@ 2025-07-15 21:21 ` stuartsummers
2025-07-15 21:21 ` [PATCH 2/4] drm/xe: Remove unused GT TLB invalidation trace points stuartsummers
` (6 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: stuartsummers @ 2025-07-15 21:21 UTC (permalink / raw)
Cc: matthew.brost, matthew.auld, maarten.lankhorst, intel-xe,
Francois Dugast, Stuart Summers
From: Matthew Brost <matthew.brost@intel.com>
Rather than inferring if an exec queue is a migration queue for a flag,
explicitly mark migration queues with a flag.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
---
drivers/gpu/drm/xe/xe_exec_queue_types.h | 2 ++
drivers/gpu/drm/xe/xe_migrate.c | 6 ++++--
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
index cc1cffb5c87f..abdf4a57e6e2 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
@@ -87,6 +87,8 @@ struct xe_exec_queue {
#define EXEC_QUEUE_FLAG_HIGH_PRIORITY BIT(4)
/* flag to indicate low latency hint to guc */
#define EXEC_QUEUE_FLAG_LOW_LATENCY BIT(5)
+/* for migration (kernel copy, clear, bind) jobs */
+#define EXEC_QUEUE_FLAG_MIGRATE BIT(6)
/**
* @flags: flags for this exec queue, should statically setup aside from ban
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index ba1cff2e4cda..713eb63b4c4e 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -437,12 +437,14 @@ struct xe_migrate *xe_migrate_init(struct xe_tile *tile)
m->q = xe_exec_queue_create(xe, vm, logical_mask, 1, hwe,
EXEC_QUEUE_FLAG_KERNEL |
EXEC_QUEUE_FLAG_PERMANENT |
- EXEC_QUEUE_FLAG_HIGH_PRIORITY, 0);
+ EXEC_QUEUE_FLAG_HIGH_PRIORITY |
+ EXEC_QUEUE_FLAG_MIGRATE, 0);
} else {
m->q = xe_exec_queue_create_class(xe, primary_gt, vm,
XE_ENGINE_CLASS_COPY,
EXEC_QUEUE_FLAG_KERNEL |
- EXEC_QUEUE_FLAG_PERMANENT, 0);
+ EXEC_QUEUE_FLAG_PERMANENT |
+ EXEC_QUEUE_FLAG_MIGRATE, 0);
}
if (IS_ERR(m->q)) {
xe_vm_close_and_put(vm);
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/4] drm/xe: Remove unused GT TLB invalidation trace points
2025-07-15 21:21 [PATCH 0/4] Basic TLB inval refactor stuartsummers
2025-07-15 21:21 ` [PATCH 1/4] drm/xe: Explicitly mark migration queues with flag stuartsummers
@ 2025-07-15 21:21 ` stuartsummers
2025-07-15 21:21 ` [PATCH 3/4] drm/xe: s/tlb_invalidation/tlb_inval stuartsummers
` (5 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: stuartsummers @ 2025-07-15 21:21 UTC (permalink / raw)
Cc: matthew.brost, matthew.auld, maarten.lankhorst, intel-xe,
Stuart Summers
From: Matthew Brost <matthew.brost@intel.com>
Remove unused GT TLB invalidation trace points after converting to used
GT TLB invalidation jobs. Tracepoint removed were used during early
bring up of unstable driver, with a stable driver no need to replace
with new tracepoints.
v2: Separate this out from the original series to make it a little
more standalone
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
---
drivers/gpu/drm/xe/xe_pt.c | 6 ------
drivers/gpu/drm/xe/xe_trace.h | 16 ----------------
2 files changed, 22 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index c8e63bd23300..7b441d1a77e9 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -1525,9 +1525,7 @@ static void invalidation_fence_cb(struct dma_fence *fence,
{
struct invalidation_fence *ifence =
container_of(cb, struct invalidation_fence, cb);
- struct xe_device *xe = gt_to_xe(ifence->gt);
- trace_xe_gt_tlb_invalidation_fence_cb(xe, &ifence->base);
if (!ifence->fence->error) {
queue_work(system_wq, &ifence->work);
} else {
@@ -1541,9 +1539,7 @@ static void invalidation_fence_work_func(struct work_struct *w)
{
struct invalidation_fence *ifence =
container_of(w, struct invalidation_fence, work);
- struct xe_device *xe = gt_to_xe(ifence->gt);
- trace_xe_gt_tlb_invalidation_fence_work_func(xe, &ifence->base);
xe_gt_tlb_invalidation_range(ifence->gt, &ifence->base, ifence->start,
ifence->end, ifence->asid);
}
@@ -1555,8 +1551,6 @@ static void invalidation_fence_init(struct xe_gt *gt,
{
int ret;
- trace_xe_gt_tlb_invalidation_fence_create(gt_to_xe(gt), &ifence->base);
-
xe_gt_tlb_invalidation_fence_init(gt, &ifence->base, false);
ifence->fence = fence;
diff --git a/drivers/gpu/drm/xe/xe_trace.h b/drivers/gpu/drm/xe/xe_trace.h
index b4a3577df70c..21486a6f693a 100644
--- a/drivers/gpu/drm/xe/xe_trace.h
+++ b/drivers/gpu/drm/xe/xe_trace.h
@@ -45,22 +45,6 @@ DECLARE_EVENT_CLASS(xe_gt_tlb_invalidation_fence,
__get_str(dev), __entry->fence, __entry->seqno)
);
-DEFINE_EVENT(xe_gt_tlb_invalidation_fence, xe_gt_tlb_invalidation_fence_create,
- TP_PROTO(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence),
- TP_ARGS(xe, fence)
-);
-
-DEFINE_EVENT(xe_gt_tlb_invalidation_fence,
- xe_gt_tlb_invalidation_fence_work_func,
- TP_PROTO(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence),
- TP_ARGS(xe, fence)
-);
-
-DEFINE_EVENT(xe_gt_tlb_invalidation_fence, xe_gt_tlb_invalidation_fence_cb,
- TP_PROTO(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence),
- TP_ARGS(xe, fence)
-);
-
DEFINE_EVENT(xe_gt_tlb_invalidation_fence, xe_gt_tlb_invalidation_fence_send,
TP_PROTO(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence),
TP_ARGS(xe, fence)
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 3/4] drm/xe: s/tlb_invalidation/tlb_inval
2025-07-15 21:21 [PATCH 0/4] Basic TLB inval refactor stuartsummers
2025-07-15 21:21 ` [PATCH 1/4] drm/xe: Explicitly mark migration queues with flag stuartsummers
2025-07-15 21:21 ` [PATCH 2/4] drm/xe: Remove unused GT TLB invalidation trace points stuartsummers
@ 2025-07-15 21:21 ` stuartsummers
2025-07-15 21:24 ` Summers, Stuart
2025-07-15 21:21 ` [PATCH 4/4] drm/xe: Add xe_tlb_inval structure stuartsummers
` (4 subsequent siblings)
7 siblings, 1 reply; 11+ messages in thread
From: stuartsummers @ 2025-07-15 21:21 UTC (permalink / raw)
Cc: matthew.brost, matthew.auld, maarten.lankhorst, intel-xe,
Stuart Summers
From: Matthew Brost <matthew.brost@intel.com>
tlb_invalidation is a bit verbose leading to ugly wraps in the code,
shorten to tlb_inval.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
drivers/gpu/drm/xe/Makefile | 2 +-
drivers/gpu/drm/xe/xe_device_types.h | 4 +-
drivers/gpu/drm/xe/xe_ggtt.c | 6 +-
drivers/gpu/drm/xe/xe_gt.c | 8 +-
drivers/gpu/drm/xe/xe_gt_pagefault.c | 1 -
...t_tlb_invalidation.c => xe_gt_tlb_inval.c} | 239 +++++++++---------
drivers/gpu/drm/xe/xe_gt_tlb_inval.h | 40 +++
...dation_types.h => xe_gt_tlb_inval_types.h} | 14 +-
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h | 40 ---
drivers/gpu/drm/xe/xe_gt_types.h | 18 +-
drivers/gpu/drm/xe/xe_guc_ct.c | 8 +-
drivers/gpu/drm/xe/xe_lmtt.c | 12 +-
drivers/gpu/drm/xe/xe_pci.c | 6 +-
drivers/gpu/drm/xe/xe_pci_types.h | 2 +-
drivers/gpu/drm/xe/xe_pt.c | 55 ++--
drivers/gpu/drm/xe/xe_svm.c | 4 +-
drivers/gpu/drm/xe/xe_trace.h | 24 +-
drivers/gpu/drm/xe/xe_vm.c | 64 +++--
drivers/gpu/drm/xe/xe_vm.h | 4 +-
19 files changed, 270 insertions(+), 281 deletions(-)
rename drivers/gpu/drm/xe/{xe_gt_tlb_invalidation.c => xe_gt_tlb_inval.c} (62%)
create mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_inval.h
rename drivers/gpu/drm/xe/{xe_gt_tlb_invalidation_types.h => xe_gt_tlb_inval_types.h} (55%)
delete mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 07c71a29963d..8ad427f0d6fe 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -60,7 +60,7 @@ xe-y += xe_bb.o \
xe_gt_pagefault.o \
xe_gt_sysfs.o \
xe_gt_throttle.o \
- xe_gt_tlb_invalidation.o \
+ xe_gt_tlb_inval.o \
xe_gt_topology.o \
xe_guc.o \
xe_guc_ads.o \
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index d4d2c6854790..7fba91a5146e 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -336,8 +336,8 @@ struct xe_device {
u8 has_mbx_power_limits:1;
/** @info.has_pxp: Device has PXP support */
u8 has_pxp:1;
- /** @info.has_range_tlb_invalidation: Has range based TLB invalidations */
- u8 has_range_tlb_invalidation:1;
+ /** @info.has_range_tlb_inval: Has range based TLB invalidations */
+ u8 has_range_tlb_inval:1;
/** @info.has_sriov: Supports SR-IOV */
u8 has_sriov:1;
/** @info.has_usm: Device has unified shared memory support */
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 29d4d3f51da1..9a06d68946cf 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -23,7 +23,7 @@
#include "xe_device.h"
#include "xe_gt.h"
#include "xe_gt_printk.h"
-#include "xe_gt_tlb_invalidation.h"
+#include "xe_gt_tlb_inval.h"
#include "xe_map.h"
#include "xe_mmio.h"
#include "xe_pm.h"
@@ -438,9 +438,9 @@ static void ggtt_invalidate_gt_tlb(struct xe_gt *gt)
if (!gt)
return;
- err = xe_gt_tlb_invalidation_ggtt(gt);
+ err = xe_gt_tlb_inval_ggtt(gt);
if (err)
- drm_warn(>_to_xe(gt)->drm, "xe_gt_tlb_invalidation_ggtt error=%d", err);
+ drm_warn(>_to_xe(gt)->drm, "xe_gt_tlb_inval_ggtt error=%d", err);
}
static void xe_ggtt_invalidate(struct xe_ggtt *ggtt)
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index c8eda36546d3..a7048e7c7177 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -37,7 +37,7 @@
#include "xe_gt_sriov_pf.h"
#include "xe_gt_sriov_vf.h"
#include "xe_gt_sysfs.h"
-#include "xe_gt_tlb_invalidation.h"
+#include "xe_gt_tlb_inval.h"
#include "xe_gt_topology.h"
#include "xe_guc_exec_queue_types.h"
#include "xe_guc_pc.h"
@@ -412,7 +412,7 @@ int xe_gt_init_early(struct xe_gt *gt)
xe_force_wake_init_gt(gt, gt_to_fw(gt));
spin_lock_init(>->global_invl_lock);
- err = xe_gt_tlb_invalidation_init_early(gt);
+ err = xe_gt_tlb_inval_init_early(gt);
if (err)
return err;
@@ -842,7 +842,7 @@ static int gt_reset(struct xe_gt *gt)
xe_uc_stop(>->uc);
- xe_gt_tlb_invalidation_reset(gt);
+ xe_gt_tlb_inval_reset(gt);
err = do_gt_reset(gt);
if (err)
@@ -1056,5 +1056,5 @@ void xe_gt_declare_wedged(struct xe_gt *gt)
xe_gt_assert(gt, gt_to_xe(gt)->wedged.mode);
xe_uc_declare_wedged(>->uc);
- xe_gt_tlb_invalidation_reset(gt);
+ xe_gt_tlb_inval_reset(gt);
}
diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c
index 5a75d56d8558..6a24e1eaafa8 100644
--- a/drivers/gpu/drm/xe/xe_gt_pagefault.c
+++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c
@@ -16,7 +16,6 @@
#include "xe_gt.h"
#include "xe_gt_printk.h"
#include "xe_gt_stats.h"
-#include "xe_gt_tlb_invalidation.h"
#include "xe_guc.h"
#include "xe_guc_ct.h"
#include "xe_migrate.h"
diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c b/drivers/gpu/drm/xe/xe_gt_tlb_inval.c
similarity index 62%
rename from drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
rename to drivers/gpu/drm/xe/xe_gt_tlb_inval.c
index 086c12ee3d9d..7ffa9488f947 100644
--- a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
+++ b/drivers/gpu/drm/xe/xe_gt_tlb_inval.c
@@ -3,7 +3,7 @@
* Copyright © 2023 Intel Corporation
*/
-#include "xe_gt_tlb_invalidation.h"
+#include "xe_gt_tlb_inval.h"
#include "abi/guc_actions_abi.h"
#include "xe_device.h"
@@ -37,7 +37,7 @@ static long tlb_timeout_jiffies(struct xe_gt *gt)
return hw_tlb_timeout + 2 * delay;
}
-static void xe_gt_tlb_invalidation_fence_fini(struct xe_gt_tlb_invalidation_fence *fence)
+static void xe_gt_tlb_inval_fence_fini(struct xe_gt_tlb_inval_fence *fence)
{
if (WARN_ON_ONCE(!fence->gt))
return;
@@ -47,66 +47,66 @@ static void xe_gt_tlb_invalidation_fence_fini(struct xe_gt_tlb_invalidation_fenc
}
static void
-__invalidation_fence_signal(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence)
+__inval_fence_signal(struct xe_device *xe, struct xe_gt_tlb_inval_fence *fence)
{
bool stack = test_bit(FENCE_STACK_BIT, &fence->base.flags);
- trace_xe_gt_tlb_invalidation_fence_signal(xe, fence);
- xe_gt_tlb_invalidation_fence_fini(fence);
+ trace_xe_gt_tlb_inval_fence_signal(xe, fence);
+ xe_gt_tlb_inval_fence_fini(fence);
dma_fence_signal(&fence->base);
if (!stack)
dma_fence_put(&fence->base);
}
static void
-invalidation_fence_signal(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence)
+inval_fence_signal(struct xe_device *xe, struct xe_gt_tlb_inval_fence *fence)
{
list_del(&fence->link);
- __invalidation_fence_signal(xe, fence);
+ __inval_fence_signal(xe, fence);
}
-void xe_gt_tlb_invalidation_fence_signal(struct xe_gt_tlb_invalidation_fence *fence)
+void xe_gt_tlb_inval_fence_signal(struct xe_gt_tlb_inval_fence *fence)
{
if (WARN_ON_ONCE(!fence->gt))
return;
- __invalidation_fence_signal(gt_to_xe(fence->gt), fence);
+ __inval_fence_signal(gt_to_xe(fence->gt), fence);
}
static void xe_gt_tlb_fence_timeout(struct work_struct *work)
{
struct xe_gt *gt = container_of(work, struct xe_gt,
- tlb_invalidation.fence_tdr.work);
+ tlb_inval.fence_tdr.work);
struct xe_device *xe = gt_to_xe(gt);
- struct xe_gt_tlb_invalidation_fence *fence, *next;
+ struct xe_gt_tlb_inval_fence *fence, *next;
LNL_FLUSH_WORK(>->uc.guc.ct.g2h_worker);
- spin_lock_irq(>->tlb_invalidation.pending_lock);
+ spin_lock_irq(>->tlb_inval.pending_lock);
list_for_each_entry_safe(fence, next,
- >->tlb_invalidation.pending_fences, link) {
+ >->tlb_inval.pending_fences, link) {
s64 since_inval_ms = ktime_ms_delta(ktime_get(),
- fence->invalidation_time);
+ fence->inval_time);
if (msecs_to_jiffies(since_inval_ms) < tlb_timeout_jiffies(gt))
break;
- trace_xe_gt_tlb_invalidation_fence_timeout(xe, fence);
+ trace_xe_gt_tlb_inval_fence_timeout(xe, fence);
xe_gt_err(gt, "TLB invalidation fence timeout, seqno=%d recv=%d",
- fence->seqno, gt->tlb_invalidation.seqno_recv);
+ fence->seqno, gt->tlb_inval.seqno_recv);
fence->base.error = -ETIME;
- invalidation_fence_signal(xe, fence);
+ inval_fence_signal(xe, fence);
}
- if (!list_empty(>->tlb_invalidation.pending_fences))
+ if (!list_empty(>->tlb_inval.pending_fences))
queue_delayed_work(system_wq,
- >->tlb_invalidation.fence_tdr,
+ >->tlb_inval.fence_tdr,
tlb_timeout_jiffies(gt));
- spin_unlock_irq(>->tlb_invalidation.pending_lock);
+ spin_unlock_irq(>->tlb_inval.pending_lock);
}
/**
- * xe_gt_tlb_invalidation_init_early - Initialize GT TLB invalidation state
+ * xe_gt_tlb_inval_init_early - Initialize GT TLB invalidation state
* @gt: GT structure
*
* Initialize GT TLB invalidation state, purely software initialization, should
@@ -114,27 +114,27 @@ static void xe_gt_tlb_fence_timeout(struct work_struct *work)
*
* Return: 0 on success, negative error code on error.
*/
-int xe_gt_tlb_invalidation_init_early(struct xe_gt *gt)
+int xe_gt_tlb_inval_init_early(struct xe_gt *gt)
{
- gt->tlb_invalidation.seqno = 1;
- INIT_LIST_HEAD(>->tlb_invalidation.pending_fences);
- spin_lock_init(>->tlb_invalidation.pending_lock);
- spin_lock_init(>->tlb_invalidation.lock);
- INIT_DELAYED_WORK(>->tlb_invalidation.fence_tdr,
+ gt->tlb_inval.seqno = 1;
+ INIT_LIST_HEAD(>->tlb_inval.pending_fences);
+ spin_lock_init(>->tlb_inval.pending_lock);
+ spin_lock_init(>->tlb_inval.lock);
+ INIT_DELAYED_WORK(>->tlb_inval.fence_tdr,
xe_gt_tlb_fence_timeout);
return 0;
}
/**
- * xe_gt_tlb_invalidation_reset - Initialize GT TLB invalidation reset
+ * xe_gt_tlb_inval_reset - Initialize GT TLB invalidation reset
* @gt: GT structure
*
* Signal any pending invalidation fences, should be called during a GT reset
*/
-void xe_gt_tlb_invalidation_reset(struct xe_gt *gt)
+void xe_gt_tlb_inval_reset(struct xe_gt *gt)
{
- struct xe_gt_tlb_invalidation_fence *fence, *next;
+ struct xe_gt_tlb_inval_fence *fence, *next;
int pending_seqno;
/*
@@ -151,8 +151,8 @@ void xe_gt_tlb_invalidation_reset(struct xe_gt *gt)
*/
mutex_lock(>->uc.guc.ct.lock);
- spin_lock_irq(>->tlb_invalidation.pending_lock);
- cancel_delayed_work(>->tlb_invalidation.fence_tdr);
+ spin_lock_irq(>->tlb_inval.pending_lock);
+ cancel_delayed_work(>->tlb_inval.fence_tdr);
/*
* We might have various kworkers waiting for TLB flushes to complete
* which are not tracked with an explicit TLB fence, however at this
@@ -160,22 +160,22 @@ void xe_gt_tlb_invalidation_reset(struct xe_gt *gt)
* make sure we signal them here under the assumption that we have
* completed a full GT reset.
*/
- if (gt->tlb_invalidation.seqno == 1)
+ if (gt->tlb_inval.seqno == 1)
pending_seqno = TLB_INVALIDATION_SEQNO_MAX - 1;
else
- pending_seqno = gt->tlb_invalidation.seqno - 1;
- WRITE_ONCE(gt->tlb_invalidation.seqno_recv, pending_seqno);
+ pending_seqno = gt->tlb_inval.seqno - 1;
+ WRITE_ONCE(gt->tlb_inval.seqno_recv, pending_seqno);
list_for_each_entry_safe(fence, next,
- >->tlb_invalidation.pending_fences, link)
- invalidation_fence_signal(gt_to_xe(gt), fence);
- spin_unlock_irq(>->tlb_invalidation.pending_lock);
+ >->tlb_inval.pending_fences, link)
+ inval_fence_signal(gt_to_xe(gt), fence);
+ spin_unlock_irq(>->tlb_inval.pending_lock);
mutex_unlock(>->uc.guc.ct.lock);
}
-static bool tlb_invalidation_seqno_past(struct xe_gt *gt, int seqno)
+static bool tlb_inval_seqno_past(struct xe_gt *gt, int seqno)
{
- int seqno_recv = READ_ONCE(gt->tlb_invalidation.seqno_recv);
+ int seqno_recv = READ_ONCE(gt->tlb_inval.seqno_recv);
if (seqno - seqno_recv < -(TLB_INVALIDATION_SEQNO_MAX / 2))
return false;
@@ -186,9 +186,9 @@ static bool tlb_invalidation_seqno_past(struct xe_gt *gt, int seqno)
return seqno_recv >= seqno;
}
-static int send_tlb_invalidation(struct xe_guc *guc,
- struct xe_gt_tlb_invalidation_fence *fence,
- u32 *action, int len)
+static int send_tlb_inval(struct xe_guc *guc,
+ struct xe_gt_tlb_inval_fence *fence,
+ u32 *action, int len)
{
struct xe_gt *gt = guc_to_gt(guc);
struct xe_device *xe = gt_to_xe(gt);
@@ -204,41 +204,41 @@ static int send_tlb_invalidation(struct xe_guc *guc,
*/
mutex_lock(&guc->ct.lock);
- seqno = gt->tlb_invalidation.seqno;
+ seqno = gt->tlb_inval.seqno;
fence->seqno = seqno;
- trace_xe_gt_tlb_invalidation_fence_send(xe, fence);
+ trace_xe_gt_tlb_inval_fence_send(xe, fence);
action[1] = seqno;
ret = xe_guc_ct_send_locked(&guc->ct, action, len,
G2H_LEN_DW_TLB_INVALIDATE, 1);
if (!ret) {
- spin_lock_irq(>->tlb_invalidation.pending_lock);
+ spin_lock_irq(>->tlb_inval.pending_lock);
/*
* We haven't actually published the TLB fence as per
* pending_fences, but in theory our seqno could have already
* been written as we acquired the pending_lock. In such a case
* we can just go ahead and signal the fence here.
*/
- if (tlb_invalidation_seqno_past(gt, seqno)) {
- __invalidation_fence_signal(xe, fence);
+ if (tlb_inval_seqno_past(gt, seqno)) {
+ __inval_fence_signal(xe, fence);
} else {
- fence->invalidation_time = ktime_get();
+ fence->inval_time = ktime_get();
list_add_tail(&fence->link,
- >->tlb_invalidation.pending_fences);
+ >->tlb_inval.pending_fences);
- if (list_is_singular(>->tlb_invalidation.pending_fences))
+ if (list_is_singular(>->tlb_inval.pending_fences))
queue_delayed_work(system_wq,
- >->tlb_invalidation.fence_tdr,
+ >->tlb_inval.fence_tdr,
tlb_timeout_jiffies(gt));
}
- spin_unlock_irq(>->tlb_invalidation.pending_lock);
+ spin_unlock_irq(>->tlb_inval.pending_lock);
} else {
- __invalidation_fence_signal(xe, fence);
+ __inval_fence_signal(xe, fence);
}
if (!ret) {
- gt->tlb_invalidation.seqno = (gt->tlb_invalidation.seqno + 1) %
+ gt->tlb_inval.seqno = (gt->tlb_inval.seqno + 1) %
TLB_INVALIDATION_SEQNO_MAX;
- if (!gt->tlb_invalidation.seqno)
- gt->tlb_invalidation.seqno = 1;
+ if (!gt->tlb_inval.seqno)
+ gt->tlb_inval.seqno = 1;
}
mutex_unlock(&guc->ct.lock);
xe_gt_stats_incr(gt, XE_GT_STATS_ID_TLB_INVAL, 1);
@@ -251,7 +251,7 @@ static int send_tlb_invalidation(struct xe_guc *guc,
XE_GUC_TLB_INVAL_FLUSH_CACHE)
/**
- * xe_gt_tlb_invalidation_guc - Issue a TLB invalidation on this GT for the GuC
+ * xe_gt_tlb_inval_guc - Issue a TLB invalidation on this GT for the GuC
* @gt: GT structure
* @fence: invalidation fence which will be signal on TLB invalidation
* completion
@@ -261,18 +261,17 @@ static int send_tlb_invalidation(struct xe_guc *guc,
*
* Return: 0 on success, negative error code on error
*/
-static int xe_gt_tlb_invalidation_guc(struct xe_gt *gt,
- struct xe_gt_tlb_invalidation_fence *fence)
+static int xe_gt_tlb_inval_guc(struct xe_gt *gt,
+ struct xe_gt_tlb_inval_fence *fence)
{
u32 action[] = {
XE_GUC_ACTION_TLB_INVALIDATION,
- 0, /* seqno, replaced in send_tlb_invalidation */
+ 0, /* seqno, replaced in send_tlb_inval */
MAKE_INVAL_OP(XE_GUC_TLB_INVAL_GUC),
};
int ret;
- ret = send_tlb_invalidation(>->uc.guc, fence, action,
- ARRAY_SIZE(action));
+ ret = send_tlb_inval(>->uc.guc, fence, action, ARRAY_SIZE(action));
/*
* -ECANCELED indicates the CT is stopped for a GT reset. TLB caches
* should be nuked on a GT reset so this error can be ignored.
@@ -284,7 +283,7 @@ static int xe_gt_tlb_invalidation_guc(struct xe_gt *gt,
}
/**
- * xe_gt_tlb_invalidation_ggtt - Issue a TLB invalidation on this GT for the GGTT
+ * xe_gt_tlb_inval_ggtt - Issue a TLB invalidation on this GT for the GGTT
* @gt: GT structure
*
* Issue a TLB invalidation for the GGTT. Completion of TLB invalidation is
@@ -292,22 +291,22 @@ static int xe_gt_tlb_invalidation_guc(struct xe_gt *gt,
*
* Return: 0 on success, negative error code on error
*/
-int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt)
+int xe_gt_tlb_inval_ggtt(struct xe_gt *gt)
{
struct xe_device *xe = gt_to_xe(gt);
unsigned int fw_ref;
if (xe_guc_ct_enabled(>->uc.guc.ct) &&
gt->uc.guc.submission_state.enabled) {
- struct xe_gt_tlb_invalidation_fence fence;
+ struct xe_gt_tlb_inval_fence fence;
int ret;
- xe_gt_tlb_invalidation_fence_init(gt, &fence, true);
- ret = xe_gt_tlb_invalidation_guc(gt, &fence);
+ xe_gt_tlb_inval_fence_init(gt, &fence, true);
+ ret = xe_gt_tlb_inval_guc(gt, &fence);
if (ret)
return ret;
- xe_gt_tlb_invalidation_fence_wait(&fence);
+ xe_gt_tlb_inval_fence_wait(&fence);
} else if (xe_device_uc_enabled(xe) && !xe_device_wedged(xe)) {
struct xe_mmio *mmio = >->mmio;
@@ -330,34 +329,34 @@ int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt)
return 0;
}
-static int send_tlb_invalidation_all(struct xe_gt *gt,
- struct xe_gt_tlb_invalidation_fence *fence)
+static int send_tlb_inval_all(struct xe_gt *gt,
+ struct xe_gt_tlb_inval_fence *fence)
{
u32 action[] = {
XE_GUC_ACTION_TLB_INVALIDATION_ALL,
- 0, /* seqno, replaced in send_tlb_invalidation */
+ 0, /* seqno, replaced in send_tlb_inval */
MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL),
};
- return send_tlb_invalidation(>->uc.guc, fence, action, ARRAY_SIZE(action));
+ return send_tlb_inval(>->uc.guc, fence, action, ARRAY_SIZE(action));
}
/**
* xe_gt_tlb_invalidation_all - Invalidate all TLBs across PF and all VFs.
* @gt: the &xe_gt structure
- * @fence: the &xe_gt_tlb_invalidation_fence to be signaled on completion
+ * @fence: the &xe_gt_tlb_inval_fence to be signaled on completion
*
* Send a request to invalidate all TLBs across PF and all VFs.
*
* Return: 0 on success, negative error code on error
*/
-int xe_gt_tlb_invalidation_all(struct xe_gt *gt, struct xe_gt_tlb_invalidation_fence *fence)
+int xe_gt_tlb_inval_all(struct xe_gt *gt, struct xe_gt_tlb_inval_fence *fence)
{
int err;
xe_gt_assert(gt, gt == fence->gt);
- err = send_tlb_invalidation_all(gt, fence);
+ err = send_tlb_inval_all(gt, fence);
if (err)
xe_gt_err(gt, "TLB invalidation request failed (%pe)", ERR_PTR(err));
@@ -372,8 +371,7 @@ int xe_gt_tlb_invalidation_all(struct xe_gt *gt, struct xe_gt_tlb_invalidation_f
#define MAX_RANGE_TLB_INVALIDATION_LENGTH (rounddown_pow_of_two(ULONG_MAX))
/**
- * xe_gt_tlb_invalidation_range - Issue a TLB invalidation on this GT for an
- * address range
+ * xe_gt_tlb_inval_range - Issue a TLB invalidation on this GT for an address range
*
* @gt: GT structure
* @fence: invalidation fence which will be signal on TLB invalidation
@@ -388,9 +386,8 @@ int xe_gt_tlb_invalidation_all(struct xe_gt *gt, struct xe_gt_tlb_invalidation_f
*
* Return: Negative error code on error, 0 on success
*/
-int xe_gt_tlb_invalidation_range(struct xe_gt *gt,
- struct xe_gt_tlb_invalidation_fence *fence,
- u64 start, u64 end, u32 asid)
+int xe_gt_tlb_inval_range(struct xe_gt *gt, struct xe_gt_tlb_inval_fence *fence,
+ u64 start, u64 end, u32 asid)
{
struct xe_device *xe = gt_to_xe(gt);
#define MAX_TLB_INVALIDATION_LEN 7
@@ -402,13 +399,13 @@ int xe_gt_tlb_invalidation_range(struct xe_gt *gt,
/* Execlists not supported */
if (gt_to_xe(gt)->info.force_execlist) {
- __invalidation_fence_signal(xe, fence);
+ __inval_fence_signal(xe, fence);
return 0;
}
action[len++] = XE_GUC_ACTION_TLB_INVALIDATION;
- action[len++] = 0; /* seqno, replaced in send_tlb_invalidation */
- if (!xe->info.has_range_tlb_invalidation ||
+ action[len++] = 0; /* seqno, replaced in send_tlb_inval */
+ if (!xe->info.has_range_tlb_inval ||
length > MAX_RANGE_TLB_INVALIDATION_LENGTH) {
action[len++] = MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL);
} else {
@@ -457,33 +454,33 @@ int xe_gt_tlb_invalidation_range(struct xe_gt *gt,
xe_gt_assert(gt, len <= MAX_TLB_INVALIDATION_LEN);
- return send_tlb_invalidation(>->uc.guc, fence, action, len);
+ return send_tlb_inval(>->uc.guc, fence, action, len);
}
/**
- * xe_gt_tlb_invalidation_vm - Issue a TLB invalidation on this GT for a VM
+ * xe_gt_tlb_inval_vm - Issue a TLB invalidation on this GT for a VM
* @gt: graphics tile
* @vm: VM to invalidate
*
* Invalidate entire VM's address space
*/
-void xe_gt_tlb_invalidation_vm(struct xe_gt *gt, struct xe_vm *vm)
+void xe_gt_tlb_inval_vm(struct xe_gt *gt, struct xe_vm *vm)
{
- struct xe_gt_tlb_invalidation_fence fence;
+ struct xe_gt_tlb_inval_fence fence;
u64 range = 1ull << vm->xe->info.va_bits;
int ret;
- xe_gt_tlb_invalidation_fence_init(gt, &fence, true);
+ xe_gt_tlb_inval_fence_init(gt, &fence, true);
- ret = xe_gt_tlb_invalidation_range(gt, &fence, 0, range, vm->usm.asid);
+ ret = xe_gt_tlb_inval_range(gt, &fence, 0, range, vm->usm.asid);
if (ret < 0)
return;
- xe_gt_tlb_invalidation_fence_wait(&fence);
+ xe_gt_tlb_inval_fence_wait(&fence);
}
/**
- * xe_guc_tlb_invalidation_done_handler - TLB invalidation done handler
+ * xe_guc_tlb_inval_done_handler - TLB invalidation done handler
* @guc: guc
* @msg: message indicating TLB invalidation done
* @len: length of message
@@ -494,11 +491,11 @@ void xe_gt_tlb_invalidation_vm(struct xe_gt *gt, struct xe_vm *vm)
*
* Return: 0 on success, -EPROTO for malformed messages.
*/
-int xe_guc_tlb_invalidation_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
+int xe_guc_tlb_inval_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
{
struct xe_gt *gt = guc_to_gt(guc);
struct xe_device *xe = gt_to_xe(gt);
- struct xe_gt_tlb_invalidation_fence *fence, *next;
+ struct xe_gt_tlb_inval_fence *fence, *next;
unsigned long flags;
if (unlikely(len != 1))
@@ -519,74 +516,74 @@ int xe_guc_tlb_invalidation_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
* officially process the CT message like if racing against
* process_g2h_msg().
*/
- spin_lock_irqsave(>->tlb_invalidation.pending_lock, flags);
- if (tlb_invalidation_seqno_past(gt, msg[0])) {
- spin_unlock_irqrestore(>->tlb_invalidation.pending_lock, flags);
+ spin_lock_irqsave(>->tlb_inval.pending_lock, flags);
+ if (tlb_inval_seqno_past(gt, msg[0])) {
+ spin_unlock_irqrestore(>->tlb_inval.pending_lock, flags);
return 0;
}
- WRITE_ONCE(gt->tlb_invalidation.seqno_recv, msg[0]);
+ WRITE_ONCE(gt->tlb_inval.seqno_recv, msg[0]);
list_for_each_entry_safe(fence, next,
- >->tlb_invalidation.pending_fences, link) {
- trace_xe_gt_tlb_invalidation_fence_recv(xe, fence);
+ >->tlb_inval.pending_fences, link) {
+ trace_xe_gt_tlb_inval_fence_recv(xe, fence);
- if (!tlb_invalidation_seqno_past(gt, fence->seqno))
+ if (!tlb_inval_seqno_past(gt, fence->seqno))
break;
- invalidation_fence_signal(xe, fence);
+ inval_fence_signal(xe, fence);
}
- if (!list_empty(>->tlb_invalidation.pending_fences))
+ if (!list_empty(>->tlb_inval.pending_fences))
mod_delayed_work(system_wq,
- >->tlb_invalidation.fence_tdr,
+ >->tlb_inval.fence_tdr,
tlb_timeout_jiffies(gt));
else
- cancel_delayed_work(>->tlb_invalidation.fence_tdr);
+ cancel_delayed_work(>->tlb_inval.fence_tdr);
- spin_unlock_irqrestore(>->tlb_invalidation.pending_lock, flags);
+ spin_unlock_irqrestore(>->tlb_inval.pending_lock, flags);
return 0;
}
static const char *
-invalidation_fence_get_driver_name(struct dma_fence *dma_fence)
+inval_fence_get_driver_name(struct dma_fence *dma_fence)
{
return "xe";
}
static const char *
-invalidation_fence_get_timeline_name(struct dma_fence *dma_fence)
+inval_fence_get_timeline_name(struct dma_fence *dma_fence)
{
- return "invalidation_fence";
+ return "inval_fence";
}
-static const struct dma_fence_ops invalidation_fence_ops = {
- .get_driver_name = invalidation_fence_get_driver_name,
- .get_timeline_name = invalidation_fence_get_timeline_name,
+static const struct dma_fence_ops inval_fence_ops = {
+ .get_driver_name = inval_fence_get_driver_name,
+ .get_timeline_name = inval_fence_get_timeline_name,
};
/**
- * xe_gt_tlb_invalidation_fence_init - Initialize TLB invalidation fence
+ * xe_gt_tlb_inval_fence_init - Initialize TLB invalidation fence
* @gt: GT
* @fence: TLB invalidation fence to initialize
* @stack: fence is stack variable
*
- * Initialize TLB invalidation fence for use. xe_gt_tlb_invalidation_fence_fini
+ * Initialize TLB invalidation fence for use. xe_gt_tlb_inval_fence_fini
* will be automatically called when fence is signalled (all fences must signal),
* even on error.
*/
-void xe_gt_tlb_invalidation_fence_init(struct xe_gt *gt,
- struct xe_gt_tlb_invalidation_fence *fence,
- bool stack)
+void xe_gt_tlb_inval_fence_init(struct xe_gt *gt,
+ struct xe_gt_tlb_inval_fence *fence,
+ bool stack)
{
xe_pm_runtime_get_noresume(gt_to_xe(gt));
- spin_lock_irq(>->tlb_invalidation.lock);
- dma_fence_init(&fence->base, &invalidation_fence_ops,
- >->tlb_invalidation.lock,
+ spin_lock_irq(>->tlb_inval.lock);
+ dma_fence_init(&fence->base, &inval_fence_ops,
+ >->tlb_inval.lock,
dma_fence_context_alloc(1), 1);
- spin_unlock_irq(>->tlb_invalidation.lock);
+ spin_unlock_irq(>->tlb_inval.lock);
INIT_LIST_HEAD(&fence->link);
if (stack)
set_bit(FENCE_STACK_BIT, &fence->base.flags);
diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_inval.h b/drivers/gpu/drm/xe/xe_gt_tlb_inval.h
new file mode 100644
index 000000000000..801d4ecf88f0
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_gt_tlb_inval.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef _XE_GT_TLB_INVAL_H_
+#define _XE_GT_TLB_INVAL_H_
+
+#include <linux/types.h>
+
+#include "xe_gt_tlb_inval_types.h"
+
+struct xe_gt;
+struct xe_guc;
+struct xe_vm;
+struct xe_vma;
+
+int xe_gt_tlb_inval_init_early(struct xe_gt *gt);
+
+void xe_gt_tlb_inval_reset(struct xe_gt *gt);
+int xe_gt_tlb_inval_ggtt(struct xe_gt *gt);
+void xe_gt_tlb_inval_vm(struct xe_gt *gt, struct xe_vm *vm);
+int xe_gt_tlb_inval_all(struct xe_gt *gt, struct xe_gt_tlb_inval_fence *fence);
+int xe_gt_tlb_inval_range(struct xe_gt *gt,
+ struct xe_gt_tlb_inval_fence *fence,
+ u64 start, u64 end, u32 asid);
+int xe_guc_tlb_inval_done_handler(struct xe_guc *guc, u32 *msg, u32 len);
+
+void xe_gt_tlb_inval_fence_init(struct xe_gt *gt,
+ struct xe_gt_tlb_inval_fence *fence,
+ bool stack);
+void xe_gt_tlb_inval_fence_signal(struct xe_gt_tlb_inval_fence *fence);
+
+static inline void
+xe_gt_tlb_inval_fence_wait(struct xe_gt_tlb_inval_fence *fence)
+{
+ dma_fence_wait(&fence->base, false);
+}
+
+#endif /* _XE_GT_TLB_INVAL_ */
diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation_types.h b/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
similarity index 55%
rename from drivers/gpu/drm/xe/xe_gt_tlb_invalidation_types.h
rename to drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
index de6e825e0851..919430359103 100644
--- a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
@@ -3,20 +3,20 @@
* Copyright © 2023 Intel Corporation
*/
-#ifndef _XE_GT_TLB_INVALIDATION_TYPES_H_
-#define _XE_GT_TLB_INVALIDATION_TYPES_H_
+#ifndef _XE_GT_TLB_INVAL_TYPES_H_
+#define _XE_GT_TLB_INVAL_TYPES_H_
#include <linux/dma-fence.h>
struct xe_gt;
/**
- * struct xe_gt_tlb_invalidation_fence - XE GT TLB invalidation fence
+ * struct xe_gt_tlb_inval_fence - XE GT TLB invalidation fence
*
- * Optionally passed to xe_gt_tlb_invalidation and will be signaled upon TLB
+ * Optionally passed to xe_gt_tlb_inval and will be signaled upon TLB
* invalidation completion.
*/
-struct xe_gt_tlb_invalidation_fence {
+struct xe_gt_tlb_inval_fence {
/** @base: dma fence base */
struct dma_fence base;
/** @gt: GT which fence belong to */
@@ -25,8 +25,8 @@ struct xe_gt_tlb_invalidation_fence {
struct list_head link;
/** @seqno: seqno of TLB invalidation to signal fence one */
int seqno;
- /** @invalidation_time: time of TLB invalidation */
- ktime_t invalidation_time;
+ /** @inval_time: time of TLB invalidation */
+ ktime_t inval_time;
};
#endif
diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
deleted file mode 100644
index f7f0f2eaf4b5..000000000000
--- a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#ifndef _XE_GT_TLB_INVALIDATION_H_
-#define _XE_GT_TLB_INVALIDATION_H_
-
-#include <linux/types.h>
-
-#include "xe_gt_tlb_invalidation_types.h"
-
-struct xe_gt;
-struct xe_guc;
-struct xe_vm;
-struct xe_vma;
-
-int xe_gt_tlb_invalidation_init_early(struct xe_gt *gt);
-
-void xe_gt_tlb_invalidation_reset(struct xe_gt *gt);
-int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt);
-void xe_gt_tlb_invalidation_vm(struct xe_gt *gt, struct xe_vm *vm);
-int xe_gt_tlb_invalidation_all(struct xe_gt *gt, struct xe_gt_tlb_invalidation_fence *fence);
-int xe_gt_tlb_invalidation_range(struct xe_gt *gt,
- struct xe_gt_tlb_invalidation_fence *fence,
- u64 start, u64 end, u32 asid);
-int xe_guc_tlb_invalidation_done_handler(struct xe_guc *guc, u32 *msg, u32 len);
-
-void xe_gt_tlb_invalidation_fence_init(struct xe_gt *gt,
- struct xe_gt_tlb_invalidation_fence *fence,
- bool stack);
-void xe_gt_tlb_invalidation_fence_signal(struct xe_gt_tlb_invalidation_fence *fence);
-
-static inline void
-xe_gt_tlb_invalidation_fence_wait(struct xe_gt_tlb_invalidation_fence *fence)
-{
- dma_fence_wait(&fence->base, false);
-}
-
-#endif /* _XE_GT_TLB_INVALIDATION_ */
diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
index 96344c604726..b82795fc0070 100644
--- a/drivers/gpu/drm/xe/xe_gt_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_types.h
@@ -185,34 +185,34 @@ struct xe_gt {
struct work_struct worker;
} reset;
- /** @tlb_invalidation: TLB invalidation state */
+ /** @tlb_inval: TLB invalidation state */
struct {
- /** @tlb_invalidation.seqno: TLB invalidation seqno, protected by CT lock */
+ /** @tlb_inval.seqno: TLB invalidation seqno, protected by CT lock */
#define TLB_INVALIDATION_SEQNO_MAX 0x100000
int seqno;
/**
- * @tlb_invalidation.seqno_recv: last received TLB invalidation seqno,
+ * @tlb_inval.seqno_recv: last received TLB invalidation seqno,
* protected by CT lock
*/
int seqno_recv;
/**
- * @tlb_invalidation.pending_fences: list of pending fences waiting TLB
+ * @tlb_inval.pending_fences: list of pending fences waiting TLB
* invaliations, protected by CT lock
*/
struct list_head pending_fences;
/**
- * @tlb_invalidation.pending_lock: protects @tlb_invalidation.pending_fences
- * and updating @tlb_invalidation.seqno_recv.
+ * @tlb_inval.pending_lock: protects @tlb_inval.pending_fences
+ * and updating @tlb_inval.seqno_recv.
*/
spinlock_t pending_lock;
/**
- * @tlb_invalidation.fence_tdr: schedules a delayed call to
+ * @tlb_inval.fence_tdr: schedules a delayed call to
* xe_gt_tlb_fence_timeout after the timeut interval is over.
*/
struct delayed_work fence_tdr;
- /** @tlb_invalidation.lock: protects TLB invalidation fences */
+ /** @tlb_inval.lock: protects TLB invalidation fences */
spinlock_t lock;
- } tlb_invalidation;
+ } tlb_inval;
/**
* @ccs_mode: Number of compute engines enabled.
diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
index b6acccfcd351..c213a037b346 100644
--- a/drivers/gpu/drm/xe/xe_guc_ct.c
+++ b/drivers/gpu/drm/xe/xe_guc_ct.c
@@ -26,7 +26,7 @@
#include "xe_gt_sriov_pf_control.h"
#include "xe_gt_sriov_pf_monitor.h"
#include "xe_gt_sriov_printk.h"
-#include "xe_gt_tlb_invalidation.h"
+#include "xe_gt_tlb_inval.h"
#include "xe_guc.h"
#include "xe_guc_log.h"
#include "xe_guc_relay.h"
@@ -1420,8 +1420,7 @@ static int process_g2h_msg(struct xe_guc_ct *ct, u32 *msg, u32 len)
ret = xe_guc_pagefault_handler(guc, payload, adj_len);
break;
case XE_GUC_ACTION_TLB_INVALIDATION_DONE:
- ret = xe_guc_tlb_invalidation_done_handler(guc, payload,
- adj_len);
+ ret = xe_guc_tlb_inval_done_handler(guc, payload, adj_len);
break;
case XE_GUC_ACTION_ACCESS_COUNTER_NOTIFY:
ret = xe_guc_access_counter_notify_handler(guc, payload,
@@ -1622,8 +1621,7 @@ static void g2h_fast_path(struct xe_guc_ct *ct, u32 *msg, u32 len)
break;
case XE_GUC_ACTION_TLB_INVALIDATION_DONE:
__g2h_release_space(ct, len);
- ret = xe_guc_tlb_invalidation_done_handler(guc, payload,
- adj_len);
+ ret = xe_guc_tlb_inval_done_handler(guc, payload, adj_len);
break;
default:
xe_gt_warn(gt, "NOT_POSSIBLE");
diff --git a/drivers/gpu/drm/xe/xe_lmtt.c b/drivers/gpu/drm/xe/xe_lmtt.c
index a2000307d5bf..8869ad491d99 100644
--- a/drivers/gpu/drm/xe/xe_lmtt.c
+++ b/drivers/gpu/drm/xe/xe_lmtt.c
@@ -11,7 +11,7 @@
#include "xe_assert.h"
#include "xe_bo.h"
-#include "xe_gt_tlb_invalidation.h"
+#include "xe_gt_tlb_inval.h"
#include "xe_lmtt.h"
#include "xe_map.h"
#include "xe_mmio.h"
@@ -225,8 +225,8 @@ void xe_lmtt_init_hw(struct xe_lmtt *lmtt)
static int lmtt_invalidate_hw(struct xe_lmtt *lmtt)
{
- struct xe_gt_tlb_invalidation_fence fences[XE_MAX_GT_PER_TILE];
- struct xe_gt_tlb_invalidation_fence *fence = fences;
+ struct xe_gt_tlb_inval_fence fences[XE_MAX_GT_PER_TILE];
+ struct xe_gt_tlb_inval_fence *fence = fences;
struct xe_tile *tile = lmtt_to_tile(lmtt);
struct xe_gt *gt;
int result = 0;
@@ -234,8 +234,8 @@ static int lmtt_invalidate_hw(struct xe_lmtt *lmtt)
u8 id;
for_each_gt_on_tile(gt, tile, id) {
- xe_gt_tlb_invalidation_fence_init(gt, fence, true);
- err = xe_gt_tlb_invalidation_all(gt, fence);
+ xe_gt_tlb_inval_fence_init(gt, fence, true);
+ err = xe_gt_tlb_inval_all(gt, fence);
result = result ?: err;
fence++;
}
@@ -249,7 +249,7 @@ static int lmtt_invalidate_hw(struct xe_lmtt *lmtt)
*/
fence = fences;
for_each_gt_on_tile(gt, tile, id)
- xe_gt_tlb_invalidation_fence_wait(fence++);
+ xe_gt_tlb_inval_fence_wait(fence++);
return result;
}
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index dc4c8e861a84..2c14e3b10679 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -55,7 +55,7 @@ static const struct xe_graphics_desc graphics_xelp = {
};
#define XE_HP_FEATURES \
- .has_range_tlb_invalidation = true, \
+ .has_range_tlb_inval = true, \
.va_bits = 48, \
.vm_max_level = 3
@@ -103,7 +103,7 @@ static const struct xe_graphics_desc graphics_xelpg = {
.has_asid = 1, \
.has_atomic_enable_pte_bit = 1, \
.has_flat_ccs = 1, \
- .has_range_tlb_invalidation = 1, \
+ .has_range_tlb_inval = 1, \
.has_usm = 1, \
.has_64bit_timestamp = 1, \
.va_bits = 48, \
@@ -673,7 +673,7 @@ static int xe_info_init(struct xe_device *xe,
/* Runtime detection may change this later */
xe->info.has_flat_ccs = graphics_desc->has_flat_ccs;
- xe->info.has_range_tlb_invalidation = graphics_desc->has_range_tlb_invalidation;
+ xe->info.has_range_tlb_inval = graphics_desc->has_range_tlb_inval;
xe->info.has_usm = graphics_desc->has_usm;
xe->info.has_64bit_timestamp = graphics_desc->has_64bit_timestamp;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index 4de6f69ed975..b63002fc0f67 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -60,7 +60,7 @@ struct xe_graphics_desc {
u8 has_atomic_enable_pte_bit:1;
u8 has_flat_ccs:1;
u8 has_indirect_ring_state:1;
- u8 has_range_tlb_invalidation:1;
+ u8 has_range_tlb_inval:1;
u8 has_usm:1;
u8 has_64bit_timestamp:1;
};
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index 7b441d1a77e9..04c52926828f 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -13,7 +13,7 @@
#include "xe_drm_client.h"
#include "xe_exec_queue.h"
#include "xe_gt.h"
-#include "xe_gt_tlb_invalidation.h"
+#include "xe_gt_tlb_inval.h"
#include "xe_migrate.h"
#include "xe_pt_types.h"
#include "xe_pt_walk.h"
@@ -1509,8 +1509,8 @@ static int xe_pt_svm_pre_commit(struct xe_migrate_pt_update *pt_update)
}
#endif
-struct invalidation_fence {
- struct xe_gt_tlb_invalidation_fence base;
+struct inval_fence {
+ struct xe_gt_tlb_inval_fence base;
struct xe_gt *gt;
struct dma_fence *fence;
struct dma_fence_cb cb;
@@ -1520,38 +1520,37 @@ struct invalidation_fence {
u32 asid;
};
-static void invalidation_fence_cb(struct dma_fence *fence,
- struct dma_fence_cb *cb)
+static void inval_fence_cb(struct dma_fence *fence, struct dma_fence_cb *cb)
{
- struct invalidation_fence *ifence =
- container_of(cb, struct invalidation_fence, cb);
+ struct inval_fence *ifence =
+ container_of(cb, struct inval_fence, cb);
if (!ifence->fence->error) {
queue_work(system_wq, &ifence->work);
} else {
ifence->base.base.error = ifence->fence->error;
- xe_gt_tlb_invalidation_fence_signal(&ifence->base);
+ xe_gt_tlb_inval_fence_signal(&ifence->base);
}
dma_fence_put(ifence->fence);
}
-static void invalidation_fence_work_func(struct work_struct *w)
+static void inval_fence_work_func(struct work_struct *w)
{
- struct invalidation_fence *ifence =
- container_of(w, struct invalidation_fence, work);
+ struct inval_fence *ifence =
+ container_of(w, struct inval_fence, work);
- xe_gt_tlb_invalidation_range(ifence->gt, &ifence->base, ifence->start,
- ifence->end, ifence->asid);
+ xe_gt_tlb_inval_range(ifence->gt, &ifence->base, ifence->start,
+ ifence->end, ifence->asid);
}
-static void invalidation_fence_init(struct xe_gt *gt,
- struct invalidation_fence *ifence,
- struct dma_fence *fence,
- u64 start, u64 end, u32 asid)
+static void inval_fence_init(struct xe_gt *gt,
+ struct inval_fence *ifence,
+ struct dma_fence *fence,
+ u64 start, u64 end, u32 asid)
{
int ret;
- xe_gt_tlb_invalidation_fence_init(gt, &ifence->base, false);
+ xe_gt_tlb_inval_fence_init(gt, &ifence->base, false);
ifence->fence = fence;
ifence->gt = gt;
@@ -1559,11 +1558,11 @@ static void invalidation_fence_init(struct xe_gt *gt,
ifence->end = end;
ifence->asid = asid;
- INIT_WORK(&ifence->work, invalidation_fence_work_func);
- ret = dma_fence_add_callback(fence, &ifence->cb, invalidation_fence_cb);
+ INIT_WORK(&ifence->work, inval_fence_work_func);
+ ret = dma_fence_add_callback(fence, &ifence->cb, inval_fence_cb);
if (ret == -ENOENT) {
dma_fence_put(ifence->fence); /* Usually dropped in CB */
- invalidation_fence_work_func(&ifence->work);
+ inval_fence_work_func(&ifence->work);
} else if (ret) {
dma_fence_put(&ifence->base.base); /* Caller ref */
dma_fence_put(&ifence->base.base); /* Creation ref */
@@ -2402,7 +2401,7 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
struct xe_vm_pgtable_update_ops *pt_update_ops =
&vops->pt_update_ops[tile->id];
struct dma_fence *fence;
- struct invalidation_fence *ifence = NULL, *mfence = NULL;
+ struct inval_fence *ifence = NULL, *mfence = NULL;
struct dma_fence **fences = NULL;
struct dma_fence_array *cf = NULL;
struct xe_range_fence *rfence;
@@ -2489,13 +2488,13 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
if (ifence) {
if (mfence)
dma_fence_get(fence);
- invalidation_fence_init(tile->primary_gt, ifence, fence,
- pt_update_ops->start,
- pt_update_ops->last, vm->usm.asid);
+ inval_fence_init(tile->primary_gt, ifence, fence,
+ pt_update_ops->start,
+ pt_update_ops->last, vm->usm.asid);
if (mfence) {
- invalidation_fence_init(tile->media_gt, mfence, fence,
- pt_update_ops->start,
- pt_update_ops->last, vm->usm.asid);
+ inval_fence_init(tile->media_gt, mfence, fence,
+ pt_update_ops->start,
+ pt_update_ops->last, vm->usm.asid);
fences[0] = &ifence->base.base;
fences[1] = &mfence->base.base;
dma_fence_array_init(cf, 2, fences,
diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
index a7ff5975873f..030412cda6a4 100644
--- a/drivers/gpu/drm/xe/xe_svm.c
+++ b/drivers/gpu/drm/xe/xe_svm.c
@@ -7,7 +7,7 @@
#include "xe_bo.h"
#include "xe_gt_stats.h"
-#include "xe_gt_tlb_invalidation.h"
+#include "xe_gt_tlb_inval.h"
#include "xe_migrate.h"
#include "xe_module.h"
#include "xe_pm.h"
@@ -224,7 +224,7 @@ static void xe_svm_invalidate(struct drm_gpusvm *gpusvm,
xe_device_wmb(xe);
- err = xe_vm_range_tilemask_tlb_invalidation(vm, adj_start, adj_end, tile_mask);
+ err = xe_vm_range_tilemask_tlb_inval(vm, adj_start, adj_end, tile_mask);
WARN_ON_ONCE(err);
range_notifier_event_end:
diff --git a/drivers/gpu/drm/xe/xe_trace.h b/drivers/gpu/drm/xe/xe_trace.h
index 21486a6f693a..36538f50d06f 100644
--- a/drivers/gpu/drm/xe/xe_trace.h
+++ b/drivers/gpu/drm/xe/xe_trace.h
@@ -14,7 +14,7 @@
#include "xe_exec_queue_types.h"
#include "xe_gpu_scheduler_types.h"
-#include "xe_gt_tlb_invalidation_types.h"
+#include "xe_gt_tlb_inval_types.h"
#include "xe_gt_types.h"
#include "xe_guc_exec_queue_types.h"
#include "xe_sched_job.h"
@@ -25,13 +25,13 @@
#define __dev_name_gt(gt) __dev_name_xe(gt_to_xe((gt)))
#define __dev_name_eq(q) __dev_name_gt((q)->gt)
-DECLARE_EVENT_CLASS(xe_gt_tlb_invalidation_fence,
- TP_PROTO(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence),
+DECLARE_EVENT_CLASS(xe_gt_tlb_inval_fence,
+ TP_PROTO(struct xe_device *xe, struct xe_gt_tlb_inval_fence *fence),
TP_ARGS(xe, fence),
TP_STRUCT__entry(
__string(dev, __dev_name_xe(xe))
- __field(struct xe_gt_tlb_invalidation_fence *, fence)
+ __field(struct xe_gt_tlb_inval_fence *, fence)
__field(int, seqno)
),
@@ -45,23 +45,23 @@ DECLARE_EVENT_CLASS(xe_gt_tlb_invalidation_fence,
__get_str(dev), __entry->fence, __entry->seqno)
);
-DEFINE_EVENT(xe_gt_tlb_invalidation_fence, xe_gt_tlb_invalidation_fence_send,
- TP_PROTO(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence),
+DEFINE_EVENT(xe_gt_tlb_inval_fence, xe_gt_tlb_inval_fence_send,
+ TP_PROTO(struct xe_device *xe, struct xe_gt_tlb_inval_fence *fence),
TP_ARGS(xe, fence)
);
-DEFINE_EVENT(xe_gt_tlb_invalidation_fence, xe_gt_tlb_invalidation_fence_recv,
- TP_PROTO(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence),
+DEFINE_EVENT(xe_gt_tlb_inval_fence, xe_gt_tlb_inval_fence_recv,
+ TP_PROTO(struct xe_device *xe, struct xe_gt_tlb_inval_fence *fence),
TP_ARGS(xe, fence)
);
-DEFINE_EVENT(xe_gt_tlb_invalidation_fence, xe_gt_tlb_invalidation_fence_signal,
- TP_PROTO(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence),
+DEFINE_EVENT(xe_gt_tlb_inval_fence, xe_gt_tlb_inval_fence_signal,
+ TP_PROTO(struct xe_device *xe, struct xe_gt_tlb_inval_fence *fence),
TP_ARGS(xe, fence)
);
-DEFINE_EVENT(xe_gt_tlb_invalidation_fence, xe_gt_tlb_invalidation_fence_timeout,
- TP_PROTO(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence),
+DEFINE_EVENT(xe_gt_tlb_inval_fence, xe_gt_tlb_inval_fence_timeout,
+ TP_PROTO(struct xe_device *xe, struct xe_gt_tlb_inval_fence *fence),
TP_ARGS(xe, fence)
);
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 2035604121e6..a5fe59f63268 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -28,7 +28,7 @@
#include "xe_drm_client.h"
#include "xe_exec_queue.h"
#include "xe_gt_pagefault.h"
-#include "xe_gt_tlb_invalidation.h"
+#include "xe_gt_tlb_inval.h"
#include "xe_migrate.h"
#include "xe_pat.h"
#include "xe_pm.h"
@@ -1850,7 +1850,7 @@ static void xe_vm_close(struct xe_vm *vm)
xe_pt_clear(xe, vm->pt_root[id]);
for_each_gt(gt, xe, id)
- xe_gt_tlb_invalidation_vm(gt, vm);
+ xe_gt_tlb_inval_vm(gt, vm);
}
}
@@ -3843,7 +3843,7 @@ void xe_vm_unlock(struct xe_vm *vm)
}
/**
- * xe_vm_range_tilemask_tlb_invalidation - Issue a TLB invalidation on this tilemask for an
+ * xe_vm_range_tilemask_tlb_inval - Issue a TLB invalidation on this tilemask for an
* address range
* @vm: The VM
* @start: start address
@@ -3854,10 +3854,11 @@ void xe_vm_unlock(struct xe_vm *vm)
*
* Returns 0 for success, negative error code otherwise.
*/
-int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64 start,
- u64 end, u8 tile_mask)
+int xe_vm_range_tilemask_tlb_inval(struct xe_vm *vm, u64 start,
+ u64 end, u8 tile_mask)
{
- struct xe_gt_tlb_invalidation_fence fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
+ struct xe_gt_tlb_inval_fence
+ fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
struct xe_tile *tile;
u32 fence_id = 0;
u8 id;
@@ -3867,39 +3868,34 @@ int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64 start,
return 0;
for_each_tile(tile, vm->xe, id) {
- if (tile_mask & BIT(id)) {
- xe_gt_tlb_invalidation_fence_init(tile->primary_gt,
- &fence[fence_id], true);
-
- err = xe_gt_tlb_invalidation_range(tile->primary_gt,
- &fence[fence_id],
- start,
- end,
- vm->usm.asid);
- if (err)
- goto wait;
- ++fence_id;
+ if (!(tile_mask & BIT(id)))
+ continue;
- if (!tile->media_gt)
- continue;
+ xe_gt_tlb_inval_fence_init(tile->primary_gt,
+ &fence[fence_id], true);
- xe_gt_tlb_invalidation_fence_init(tile->media_gt,
- &fence[fence_id], true);
+ err = xe_gt_tlb_inval_range(tile->primary_gt, &fence[fence_id],
+ start, end, vm->usm.asid);
+ if (err)
+ goto wait;
+ ++fence_id;
- err = xe_gt_tlb_invalidation_range(tile->media_gt,
- &fence[fence_id],
- start,
- end,
- vm->usm.asid);
- if (err)
- goto wait;
- ++fence_id;
- }
+ if (!tile->media_gt)
+ continue;
+
+ xe_gt_tlb_inval_fence_init(tile->media_gt,
+ &fence[fence_id], true);
+
+ err = xe_gt_tlb_inval_range(tile->media_gt, &fence[fence_id],
+ start, end, vm->usm.asid);
+ if (err)
+ goto wait;
+ ++fence_id;
}
wait:
for (id = 0; id < fence_id; ++id)
- xe_gt_tlb_invalidation_fence_wait(&fence[id]);
+ xe_gt_tlb_inval_fence_wait(&fence[id]);
return err;
}
@@ -3958,8 +3954,8 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
xe_device_wmb(xe);
- ret = xe_vm_range_tilemask_tlb_invalidation(xe_vma_vm(vma), xe_vma_start(vma),
- xe_vma_end(vma), tile_mask);
+ ret = xe_vm_range_tilemask_tlb_inval(xe_vma_vm(vma), xe_vma_start(vma),
+ xe_vma_end(vma), tile_mask);
/* WRITE_ONCE pairs with READ_ONCE in xe_vm_has_valid_gpu_mapping() */
WRITE_ONCE(vma->tile_invalidated, vma->tile_mask);
diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
index 3475a118f666..fade8ad92bad 100644
--- a/drivers/gpu/drm/xe/xe_vm.h
+++ b/drivers/gpu/drm/xe/xe_vm.h
@@ -228,8 +228,8 @@ struct dma_fence *xe_vm_range_rebind(struct xe_vm *vm,
struct dma_fence *xe_vm_range_unbind(struct xe_vm *vm,
struct xe_svm_range *range);
-int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64 start,
- u64 end, u8 tile_mask);
+int xe_vm_range_tilemask_tlb_inval(struct xe_vm *vm, u64 start,
+ u64 end, u8 tile_mask);
int xe_vm_invalidate_vma(struct xe_vma *vma);
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 4/4] drm/xe: Add xe_tlb_inval structure
2025-07-15 21:21 [PATCH 0/4] Basic TLB inval refactor stuartsummers
` (2 preceding siblings ...)
2025-07-15 21:21 ` [PATCH 3/4] drm/xe: s/tlb_invalidation/tlb_inval stuartsummers
@ 2025-07-15 21:21 ` stuartsummers
2025-07-15 21:25 ` Summers, Stuart
2025-07-15 21:26 ` [PATCH 0/4] Basic TLB inval refactor Summers, Stuart
` (3 subsequent siblings)
7 siblings, 1 reply; 11+ messages in thread
From: stuartsummers @ 2025-07-15 21:21 UTC (permalink / raw)
Cc: matthew.brost, matthew.auld, maarten.lankhorst, intel-xe,
Stuart Summers
From: Matthew Brost <matthew.brost@intel.com>
Extract TLB invalidation state into a structure to decouple TLB
invalidations from the GT, allowing the structure to be embedded
anywhere in the driver.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h | 30 ++++++++++++++++++++++
drivers/gpu/drm/xe/xe_gt_types.h | 29 ++-------------------
2 files changed, 32 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
index 919430359103..b998276dd931 100644
--- a/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
@@ -6,10 +6,40 @@
#ifndef _XE_GT_TLB_INVAL_TYPES_H_
#define _XE_GT_TLB_INVAL_TYPES_H_
+#include <linux/workqueue.h>
#include <linux/dma-fence.h>
struct xe_gt;
+/** struct xe_tlb_inval - TLB invalidation client */
+struct xe_tlb_inval {
+ /** @tlb_inval.seqno: TLB invalidation seqno, protected by CT lock */
+#define TLB_INVALIDATION_SEQNO_MAX 0x100000
+ int seqno;
+ /**
+ * @tlb_inval.seqno_recv: last received TLB invalidation seqno,
+ * protected by CT lock
+ */
+ int seqno_recv;
+ /**
+ * @tlb_inval.pending_fences: list of pending fences waiting TLB
+ * invaliations, protected by CT lock
+ */
+ struct list_head pending_fences;
+ /**
+ * @tlb_inval.pending_lock: protects @tlb_inval.pending_fences
+ * and updating @tlb_inval.seqno_recv.
+ */
+ spinlock_t pending_lock;
+ /**
+ * @tlb_inval.fence_tdr: schedules a delayed call to
+ * xe_gt_tlb_fence_timeout after the timeut interval is over.
+ */
+ struct delayed_work fence_tdr;
+ /** @tlb_inval.lock: protects TLB invalidation fences */
+ spinlock_t lock;
+};
+
/**
* struct xe_gt_tlb_inval_fence - XE GT TLB invalidation fence
*
diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
index b82795fc0070..ed21bd63b001 100644
--- a/drivers/gpu/drm/xe/xe_gt_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_types.h
@@ -12,6 +12,7 @@
#include "xe_gt_sriov_pf_types.h"
#include "xe_gt_sriov_vf_types.h"
#include "xe_gt_stats_types.h"
+#include "xe_gt_tlb_inval_types.h"
#include "xe_hw_engine_types.h"
#include "xe_hw_fence_types.h"
#include "xe_oa_types.h"
@@ -186,33 +187,7 @@ struct xe_gt {
} reset;
/** @tlb_inval: TLB invalidation state */
- struct {
- /** @tlb_inval.seqno: TLB invalidation seqno, protected by CT lock */
-#define TLB_INVALIDATION_SEQNO_MAX 0x100000
- int seqno;
- /**
- * @tlb_inval.seqno_recv: last received TLB invalidation seqno,
- * protected by CT lock
- */
- int seqno_recv;
- /**
- * @tlb_inval.pending_fences: list of pending fences waiting TLB
- * invaliations, protected by CT lock
- */
- struct list_head pending_fences;
- /**
- * @tlb_inval.pending_lock: protects @tlb_inval.pending_fences
- * and updating @tlb_inval.seqno_recv.
- */
- spinlock_t pending_lock;
- /**
- * @tlb_inval.fence_tdr: schedules a delayed call to
- * xe_gt_tlb_fence_timeout after the timeut interval is over.
- */
- struct delayed_work fence_tdr;
- /** @tlb_inval.lock: protects TLB invalidation fences */
- spinlock_t lock;
- } tlb_inval;
+ struct xe_tlb_inval tlb_inval;
/**
* @ccs_mode: Number of compute engines enabled.
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 3/4] drm/xe: s/tlb_invalidation/tlb_inval
2025-07-15 21:21 ` [PATCH 3/4] drm/xe: s/tlb_invalidation/tlb_inval stuartsummers
@ 2025-07-15 21:24 ` Summers, Stuart
0 siblings, 0 replies; 11+ messages in thread
From: Summers, Stuart @ 2025-07-15 21:24 UTC (permalink / raw)
To: Summers, Stuart
Cc: intel-xe@lists.freedesktop.org, Brost, Matthew,
maarten.lankhorst@linux.intel.com, Auld, Matthew
On Tue, 2025-07-15 at 21:21 +0000, stuartsummers wrote:
> From: Matthew Brost <matthew.brost@intel.com>
>
> tlb_invalidation is a bit verbose leading to ugly wraps in the code,
> shorten to tlb_inval.
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
So I did touch this one slightly as part of a rebase, particularly the
pieces around the more recent LMTT changes, but generally I agree with
the changes from Matt that it certainly makes things a little more
manageable and seems obvious with the shortened name anyway:
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
Thanks,
Stuart
> ---
> drivers/gpu/drm/xe/Makefile | 2 +-
> drivers/gpu/drm/xe/xe_device_types.h | 4 +-
> drivers/gpu/drm/xe/xe_ggtt.c | 6 +-
> drivers/gpu/drm/xe/xe_gt.c | 8 +-
> drivers/gpu/drm/xe/xe_gt_pagefault.c | 1 -
> ...t_tlb_invalidation.c => xe_gt_tlb_inval.c} | 239 +++++++++-------
> --
> drivers/gpu/drm/xe/xe_gt_tlb_inval.h | 40 +++
> ...dation_types.h => xe_gt_tlb_inval_types.h} | 14 +-
> drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h | 40 ---
> drivers/gpu/drm/xe/xe_gt_types.h | 18 +-
> drivers/gpu/drm/xe/xe_guc_ct.c | 8 +-
> drivers/gpu/drm/xe/xe_lmtt.c | 12 +-
> drivers/gpu/drm/xe/xe_pci.c | 6 +-
> drivers/gpu/drm/xe/xe_pci_types.h | 2 +-
> drivers/gpu/drm/xe/xe_pt.c | 55 ++--
> drivers/gpu/drm/xe/xe_svm.c | 4 +-
> drivers/gpu/drm/xe/xe_trace.h | 24 +-
> drivers/gpu/drm/xe/xe_vm.c | 64 +++--
> drivers/gpu/drm/xe/xe_vm.h | 4 +-
> 19 files changed, 270 insertions(+), 281 deletions(-)
> rename drivers/gpu/drm/xe/{xe_gt_tlb_invalidation.c =>
> xe_gt_tlb_inval.c} (62%)
> create mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_inval.h
> rename drivers/gpu/drm/xe/{xe_gt_tlb_invalidation_types.h =>
> xe_gt_tlb_inval_types.h} (55%)
> delete mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
>
> diff --git a/drivers/gpu/drm/xe/Makefile
> b/drivers/gpu/drm/xe/Makefile
> index 07c71a29963d..8ad427f0d6fe 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -60,7 +60,7 @@ xe-y += xe_bb.o \
> xe_gt_pagefault.o \
> xe_gt_sysfs.o \
> xe_gt_throttle.o \
> - xe_gt_tlb_invalidation.o \
> + xe_gt_tlb_inval.o \
> xe_gt_topology.o \
> xe_guc.o \
> xe_guc_ads.o \
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h
> b/drivers/gpu/drm/xe/xe_device_types.h
> index d4d2c6854790..7fba91a5146e 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -336,8 +336,8 @@ struct xe_device {
> u8 has_mbx_power_limits:1;
> /** @info.has_pxp: Device has PXP support */
> u8 has_pxp:1;
> - /** @info.has_range_tlb_invalidation: Has range based
> TLB invalidations */
> - u8 has_range_tlb_invalidation:1;
> + /** @info.has_range_tlb_inval: Has range based TLB
> invalidations */
> + u8 has_range_tlb_inval:1;
> /** @info.has_sriov: Supports SR-IOV */
> u8 has_sriov:1;
> /** @info.has_usm: Device has unified shared memory
> support */
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c
> b/drivers/gpu/drm/xe/xe_ggtt.c
> index 29d4d3f51da1..9a06d68946cf 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -23,7 +23,7 @@
> #include "xe_device.h"
> #include "xe_gt.h"
> #include "xe_gt_printk.h"
> -#include "xe_gt_tlb_invalidation.h"
> +#include "xe_gt_tlb_inval.h"
> #include "xe_map.h"
> #include "xe_mmio.h"
> #include "xe_pm.h"
> @@ -438,9 +438,9 @@ static void ggtt_invalidate_gt_tlb(struct xe_gt
> *gt)
> if (!gt)
> return;
>
> - err = xe_gt_tlb_invalidation_ggtt(gt);
> + err = xe_gt_tlb_inval_ggtt(gt);
> if (err)
> - drm_warn(>_to_xe(gt)->drm,
> "xe_gt_tlb_invalidation_ggtt error=%d", err);
> + drm_warn(>_to_xe(gt)->drm, "xe_gt_tlb_inval_ggtt
> error=%d", err);
> }
>
> static void xe_ggtt_invalidate(struct xe_ggtt *ggtt)
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index c8eda36546d3..a7048e7c7177 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -37,7 +37,7 @@
> #include "xe_gt_sriov_pf.h"
> #include "xe_gt_sriov_vf.h"
> #include "xe_gt_sysfs.h"
> -#include "xe_gt_tlb_invalidation.h"
> +#include "xe_gt_tlb_inval.h"
> #include "xe_gt_topology.h"
> #include "xe_guc_exec_queue_types.h"
> #include "xe_guc_pc.h"
> @@ -412,7 +412,7 @@ int xe_gt_init_early(struct xe_gt *gt)
> xe_force_wake_init_gt(gt, gt_to_fw(gt));
> spin_lock_init(>->global_invl_lock);
>
> - err = xe_gt_tlb_invalidation_init_early(gt);
> + err = xe_gt_tlb_inval_init_early(gt);
> if (err)
> return err;
>
> @@ -842,7 +842,7 @@ static int gt_reset(struct xe_gt *gt)
>
> xe_uc_stop(>->uc);
>
> - xe_gt_tlb_invalidation_reset(gt);
> + xe_gt_tlb_inval_reset(gt);
>
> err = do_gt_reset(gt);
> if (err)
> @@ -1056,5 +1056,5 @@ void xe_gt_declare_wedged(struct xe_gt *gt)
> xe_gt_assert(gt, gt_to_xe(gt)->wedged.mode);
>
> xe_uc_declare_wedged(>->uc);
> - xe_gt_tlb_invalidation_reset(gt);
> + xe_gt_tlb_inval_reset(gt);
> }
> diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c
> b/drivers/gpu/drm/xe/xe_gt_pagefault.c
> index 5a75d56d8558..6a24e1eaafa8 100644
> --- a/drivers/gpu/drm/xe/xe_gt_pagefault.c
> +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c
> @@ -16,7 +16,6 @@
> #include "xe_gt.h"
> #include "xe_gt_printk.h"
> #include "xe_gt_stats.h"
> -#include "xe_gt_tlb_invalidation.h"
> #include "xe_guc.h"
> #include "xe_guc_ct.h"
> #include "xe_migrate.h"
> diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
> b/drivers/gpu/drm/xe/xe_gt_tlb_inval.c
> similarity index 62%
> rename from drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
> rename to drivers/gpu/drm/xe/xe_gt_tlb_inval.c
> index 086c12ee3d9d..7ffa9488f947 100644
> --- a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
> +++ b/drivers/gpu/drm/xe/xe_gt_tlb_inval.c
> @@ -3,7 +3,7 @@
> * Copyright © 2023 Intel Corporation
> */
>
> -#include "xe_gt_tlb_invalidation.h"
> +#include "xe_gt_tlb_inval.h"
>
> #include "abi/guc_actions_abi.h"
> #include "xe_device.h"
> @@ -37,7 +37,7 @@ static long tlb_timeout_jiffies(struct xe_gt *gt)
> return hw_tlb_timeout + 2 * delay;
> }
>
> -static void xe_gt_tlb_invalidation_fence_fini(struct
> xe_gt_tlb_invalidation_fence *fence)
> +static void xe_gt_tlb_inval_fence_fini(struct xe_gt_tlb_inval_fence
> *fence)
> {
> if (WARN_ON_ONCE(!fence->gt))
> return;
> @@ -47,66 +47,66 @@ static void
> xe_gt_tlb_invalidation_fence_fini(struct xe_gt_tlb_invalidation_fenc
> }
>
> static void
> -__invalidation_fence_signal(struct xe_device *xe, struct
> xe_gt_tlb_invalidation_fence *fence)
> +__inval_fence_signal(struct xe_device *xe, struct
> xe_gt_tlb_inval_fence *fence)
> {
> bool stack = test_bit(FENCE_STACK_BIT, &fence->base.flags);
>
> - trace_xe_gt_tlb_invalidation_fence_signal(xe, fence);
> - xe_gt_tlb_invalidation_fence_fini(fence);
> + trace_xe_gt_tlb_inval_fence_signal(xe, fence);
> + xe_gt_tlb_inval_fence_fini(fence);
> dma_fence_signal(&fence->base);
> if (!stack)
> dma_fence_put(&fence->base);
> }
>
> static void
> -invalidation_fence_signal(struct xe_device *xe, struct
> xe_gt_tlb_invalidation_fence *fence)
> +inval_fence_signal(struct xe_device *xe, struct
> xe_gt_tlb_inval_fence *fence)
> {
> list_del(&fence->link);
> - __invalidation_fence_signal(xe, fence);
> + __inval_fence_signal(xe, fence);
> }
>
> -void xe_gt_tlb_invalidation_fence_signal(struct
> xe_gt_tlb_invalidation_fence *fence)
> +void xe_gt_tlb_inval_fence_signal(struct xe_gt_tlb_inval_fence
> *fence)
> {
> if (WARN_ON_ONCE(!fence->gt))
> return;
>
> - __invalidation_fence_signal(gt_to_xe(fence->gt), fence);
> + __inval_fence_signal(gt_to_xe(fence->gt), fence);
> }
>
> static void xe_gt_tlb_fence_timeout(struct work_struct *work)
> {
> struct xe_gt *gt = container_of(work, struct xe_gt,
> -
> tlb_invalidation.fence_tdr.work
> );
> + tlb_inval.fence_tdr.work);
> struct xe_device *xe = gt_to_xe(gt);
> - struct xe_gt_tlb_invalidation_fence *fence, *next;
> + struct xe_gt_tlb_inval_fence *fence, *next;
>
> LNL_FLUSH_WORK(>->uc.guc.ct.g2h_worker);
>
> - spin_lock_irq(>->tlb_invalidation.pending_lock);
> + spin_lock_irq(>->tlb_inval.pending_lock);
> list_for_each_entry_safe(fence, next,
> - >-
> >tlb_invalidation.pending_fences, link) {
> + >->tlb_inval.pending_fences, link)
> {
> s64 since_inval_ms = ktime_ms_delta(ktime_get(),
> - fence-
> >invalidation_time);
> + fence-
> >inval_time);
>
> if (msecs_to_jiffies(since_inval_ms) <
> tlb_timeout_jiffies(gt))
> break;
>
> - trace_xe_gt_tlb_invalidation_fence_timeout(xe,
> fence);
> + trace_xe_gt_tlb_inval_fence_timeout(xe, fence);
> xe_gt_err(gt, "TLB invalidation fence timeout,
> seqno=%d recv=%d",
> - fence->seqno, gt-
> >tlb_invalidation.seqno_recv);
> + fence->seqno, gt->tlb_inval.seqno_recv);
>
> fence->base.error = -ETIME;
> - invalidation_fence_signal(xe, fence);
> + inval_fence_signal(xe, fence);
> }
> - if (!list_empty(>->tlb_invalidation.pending_fences))
> + if (!list_empty(>->tlb_inval.pending_fences))
> queue_delayed_work(system_wq,
> - >->tlb_invalidation.fence_tdr,
> + >->tlb_inval.fence_tdr,
> tlb_timeout_jiffies(gt));
> - spin_unlock_irq(>->tlb_invalidation.pending_lock);
> + spin_unlock_irq(>->tlb_inval.pending_lock);
> }
>
> /**
> - * xe_gt_tlb_invalidation_init_early - Initialize GT TLB
> invalidation state
> + * xe_gt_tlb_inval_init_early - Initialize GT TLB invalidation state
> * @gt: GT structure
> *
> * Initialize GT TLB invalidation state, purely software
> initialization, should
> @@ -114,27 +114,27 @@ static void xe_gt_tlb_fence_timeout(struct
> work_struct *work)
> *
> * Return: 0 on success, negative error code on error.
> */
> -int xe_gt_tlb_invalidation_init_early(struct xe_gt *gt)
> +int xe_gt_tlb_inval_init_early(struct xe_gt *gt)
> {
> - gt->tlb_invalidation.seqno = 1;
> - INIT_LIST_HEAD(>->tlb_invalidation.pending_fences);
> - spin_lock_init(>->tlb_invalidation.pending_lock);
> - spin_lock_init(>->tlb_invalidation.lock);
> - INIT_DELAYED_WORK(>->tlb_invalidation.fence_tdr,
> + gt->tlb_inval.seqno = 1;
> + INIT_LIST_HEAD(>->tlb_inval.pending_fences);
> + spin_lock_init(>->tlb_inval.pending_lock);
> + spin_lock_init(>->tlb_inval.lock);
> + INIT_DELAYED_WORK(>->tlb_inval.fence_tdr,
> xe_gt_tlb_fence_timeout);
>
> return 0;
> }
>
> /**
> - * xe_gt_tlb_invalidation_reset - Initialize GT TLB invalidation
> reset
> + * xe_gt_tlb_inval_reset - Initialize GT TLB invalidation reset
> * @gt: GT structure
> *
> * Signal any pending invalidation fences, should be called during a
> GT reset
> */
> -void xe_gt_tlb_invalidation_reset(struct xe_gt *gt)
> +void xe_gt_tlb_inval_reset(struct xe_gt *gt)
> {
> - struct xe_gt_tlb_invalidation_fence *fence, *next;
> + struct xe_gt_tlb_inval_fence *fence, *next;
> int pending_seqno;
>
> /*
> @@ -151,8 +151,8 @@ void xe_gt_tlb_invalidation_reset(struct xe_gt
> *gt)
> */
>
> mutex_lock(>->uc.guc.ct.lock);
> - spin_lock_irq(>->tlb_invalidation.pending_lock);
> - cancel_delayed_work(>->tlb_invalidation.fence_tdr);
> + spin_lock_irq(>->tlb_inval.pending_lock);
> + cancel_delayed_work(>->tlb_inval.fence_tdr);
> /*
> * We might have various kworkers waiting for TLB flushes to
> complete
> * which are not tracked with an explicit TLB fence, however
> at this
> @@ -160,22 +160,22 @@ void xe_gt_tlb_invalidation_reset(struct xe_gt
> *gt)
> * make sure we signal them here under the assumption that we
> have
> * completed a full GT reset.
> */
> - if (gt->tlb_invalidation.seqno == 1)
> + if (gt->tlb_inval.seqno == 1)
> pending_seqno = TLB_INVALIDATION_SEQNO_MAX - 1;
> else
> - pending_seqno = gt->tlb_invalidation.seqno - 1;
> - WRITE_ONCE(gt->tlb_invalidation.seqno_recv, pending_seqno);
> + pending_seqno = gt->tlb_inval.seqno - 1;
> + WRITE_ONCE(gt->tlb_inval.seqno_recv, pending_seqno);
>
> list_for_each_entry_safe(fence, next,
> - >-
> >tlb_invalidation.pending_fences, link)
> - invalidation_fence_signal(gt_to_xe(gt), fence);
> - spin_unlock_irq(>->tlb_invalidation.pending_lock);
> + >->tlb_inval.pending_fences, link)
> + inval_fence_signal(gt_to_xe(gt), fence);
> + spin_unlock_irq(>->tlb_inval.pending_lock);
> mutex_unlock(>->uc.guc.ct.lock);
> }
>
> -static bool tlb_invalidation_seqno_past(struct xe_gt *gt, int seqno)
> +static bool tlb_inval_seqno_past(struct xe_gt *gt, int seqno)
> {
> - int seqno_recv = READ_ONCE(gt->tlb_invalidation.seqno_recv);
> + int seqno_recv = READ_ONCE(gt->tlb_inval.seqno_recv);
>
> if (seqno - seqno_recv < -(TLB_INVALIDATION_SEQNO_MAX / 2))
> return false;
> @@ -186,9 +186,9 @@ static bool tlb_invalidation_seqno_past(struct
> xe_gt *gt, int seqno)
> return seqno_recv >= seqno;
> }
>
> -static int send_tlb_invalidation(struct xe_guc *guc,
> - struct xe_gt_tlb_invalidation_fence
> *fence,
> - u32 *action, int len)
> +static int send_tlb_inval(struct xe_guc *guc,
> + struct xe_gt_tlb_inval_fence *fence,
> + u32 *action, int len)
> {
> struct xe_gt *gt = guc_to_gt(guc);
> struct xe_device *xe = gt_to_xe(gt);
> @@ -204,41 +204,41 @@ static int send_tlb_invalidation(struct xe_guc
> *guc,
> */
>
> mutex_lock(&guc->ct.lock);
> - seqno = gt->tlb_invalidation.seqno;
> + seqno = gt->tlb_inval.seqno;
> fence->seqno = seqno;
> - trace_xe_gt_tlb_invalidation_fence_send(xe, fence);
> + trace_xe_gt_tlb_inval_fence_send(xe, fence);
> action[1] = seqno;
> ret = xe_guc_ct_send_locked(&guc->ct, action, len,
> G2H_LEN_DW_TLB_INVALIDATE, 1);
> if (!ret) {
> - spin_lock_irq(>->tlb_invalidation.pending_lock);
> + spin_lock_irq(>->tlb_inval.pending_lock);
> /*
> * We haven't actually published the TLB fence as per
> * pending_fences, but in theory our seqno could have
> already
> * been written as we acquired the pending_lock. In
> such a case
> * we can just go ahead and signal the fence here.
> */
> - if (tlb_invalidation_seqno_past(gt, seqno)) {
> - __invalidation_fence_signal(xe, fence);
> + if (tlb_inval_seqno_past(gt, seqno)) {
> + __inval_fence_signal(xe, fence);
> } else {
> - fence->invalidation_time = ktime_get();
> + fence->inval_time = ktime_get();
> list_add_tail(&fence->link,
> - >-
> >tlb_invalidation.pending_fences);
> + >->tlb_inval.pending_fences);
>
> - if (list_is_singular(>-
> >tlb_invalidation.pending_fences))
> + if (list_is_singular(>-
> >tlb_inval.pending_fences))
> queue_delayed_work(system_wq,
> - >-
> >tlb_invalidation.fence_tdr,
> + >-
> >tlb_inval.fence_tdr,
>
> tlb_timeout_jiffies(gt));
> }
> - spin_unlock_irq(>->tlb_invalidation.pending_lock);
> + spin_unlock_irq(>->tlb_inval.pending_lock);
> } else {
> - __invalidation_fence_signal(xe, fence);
> + __inval_fence_signal(xe, fence);
> }
> if (!ret) {
> - gt->tlb_invalidation.seqno = (gt-
> >tlb_invalidation.seqno + 1) %
> + gt->tlb_inval.seqno = (gt->tlb_inval.seqno + 1) %
> TLB_INVALIDATION_SEQNO_MAX;
> - if (!gt->tlb_invalidation.seqno)
> - gt->tlb_invalidation.seqno = 1;
> + if (!gt->tlb_inval.seqno)
> + gt->tlb_inval.seqno = 1;
> }
> mutex_unlock(&guc->ct.lock);
> xe_gt_stats_incr(gt, XE_GT_STATS_ID_TLB_INVAL, 1);
> @@ -251,7 +251,7 @@ static int send_tlb_invalidation(struct xe_guc
> *guc,
> XE_GUC_TLB_INVAL_FLUSH_CACHE)
>
> /**
> - * xe_gt_tlb_invalidation_guc - Issue a TLB invalidation on this GT
> for the GuC
> + * xe_gt_tlb_inval_guc - Issue a TLB invalidation on this GT for the
> GuC
> * @gt: GT structure
> * @fence: invalidation fence which will be signal on TLB
> invalidation
> * completion
> @@ -261,18 +261,17 @@ static int send_tlb_invalidation(struct xe_guc
> *guc,
> *
> * Return: 0 on success, negative error code on error
> */
> -static int xe_gt_tlb_invalidation_guc(struct xe_gt *gt,
> - struct
> xe_gt_tlb_invalidation_fence *fence)
> +static int xe_gt_tlb_inval_guc(struct xe_gt *gt,
> + struct xe_gt_tlb_inval_fence *fence)
> {
> u32 action[] = {
> XE_GUC_ACTION_TLB_INVALIDATION,
> - 0, /* seqno, replaced in send_tlb_invalidation */
> + 0, /* seqno, replaced in send_tlb_inval */
> MAKE_INVAL_OP(XE_GUC_TLB_INVAL_GUC),
> };
> int ret;
>
> - ret = send_tlb_invalidation(>->uc.guc, fence, action,
> - ARRAY_SIZE(action));
> + ret = send_tlb_inval(>->uc.guc, fence, action,
> ARRAY_SIZE(action));
> /*
> * -ECANCELED indicates the CT is stopped for a GT reset. TLB
> caches
> * should be nuked on a GT reset so this error can be
> ignored.
> @@ -284,7 +283,7 @@ static int xe_gt_tlb_invalidation_guc(struct
> xe_gt *gt,
> }
>
> /**
> - * xe_gt_tlb_invalidation_ggtt - Issue a TLB invalidation on this GT
> for the GGTT
> + * xe_gt_tlb_inval_ggtt - Issue a TLB invalidation on this GT for
> the GGTT
> * @gt: GT structure
> *
> * Issue a TLB invalidation for the GGTT. Completion of TLB
> invalidation is
> @@ -292,22 +291,22 @@ static int xe_gt_tlb_invalidation_guc(struct
> xe_gt *gt,
> *
> * Return: 0 on success, negative error code on error
> */
> -int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt)
> +int xe_gt_tlb_inval_ggtt(struct xe_gt *gt)
> {
> struct xe_device *xe = gt_to_xe(gt);
> unsigned int fw_ref;
>
> if (xe_guc_ct_enabled(>->uc.guc.ct) &&
> gt->uc.guc.submission_state.enabled) {
> - struct xe_gt_tlb_invalidation_fence fence;
> + struct xe_gt_tlb_inval_fence fence;
> int ret;
>
> - xe_gt_tlb_invalidation_fence_init(gt, &fence, true);
> - ret = xe_gt_tlb_invalidation_guc(gt, &fence);
> + xe_gt_tlb_inval_fence_init(gt, &fence, true);
> + ret = xe_gt_tlb_inval_guc(gt, &fence);
> if (ret)
> return ret;
>
> - xe_gt_tlb_invalidation_fence_wait(&fence);
> + xe_gt_tlb_inval_fence_wait(&fence);
> } else if (xe_device_uc_enabled(xe) && !xe_device_wedged(xe))
> {
> struct xe_mmio *mmio = >->mmio;
>
> @@ -330,34 +329,34 @@ int xe_gt_tlb_invalidation_ggtt(struct xe_gt
> *gt)
> return 0;
> }
>
> -static int send_tlb_invalidation_all(struct xe_gt *gt,
> - struct
> xe_gt_tlb_invalidation_fence *fence)
> +static int send_tlb_inval_all(struct xe_gt *gt,
> + struct xe_gt_tlb_inval_fence *fence)
> {
> u32 action[] = {
> XE_GUC_ACTION_TLB_INVALIDATION_ALL,
> - 0, /* seqno, replaced in send_tlb_invalidation */
> + 0, /* seqno, replaced in send_tlb_inval */
> MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL),
> };
>
> - return send_tlb_invalidation(>->uc.guc, fence, action,
> ARRAY_SIZE(action));
> + return send_tlb_inval(>->uc.guc, fence, action,
> ARRAY_SIZE(action));
> }
>
> /**
> * xe_gt_tlb_invalidation_all - Invalidate all TLBs across PF and
> all VFs.
> * @gt: the &xe_gt structure
> - * @fence: the &xe_gt_tlb_invalidation_fence to be signaled on
> completion
> + * @fence: the &xe_gt_tlb_inval_fence to be signaled on completion
> *
> * Send a request to invalidate all TLBs across PF and all VFs.
> *
> * Return: 0 on success, negative error code on error
> */
> -int xe_gt_tlb_invalidation_all(struct xe_gt *gt, struct
> xe_gt_tlb_invalidation_fence *fence)
> +int xe_gt_tlb_inval_all(struct xe_gt *gt, struct
> xe_gt_tlb_inval_fence *fence)
> {
> int err;
>
> xe_gt_assert(gt, gt == fence->gt);
>
> - err = send_tlb_invalidation_all(gt, fence);
> + err = send_tlb_inval_all(gt, fence);
> if (err)
> xe_gt_err(gt, "TLB invalidation request failed
> (%pe)", ERR_PTR(err));
>
> @@ -372,8 +371,7 @@ int xe_gt_tlb_invalidation_all(struct xe_gt *gt,
> struct xe_gt_tlb_invalidation_f
> #define MAX_RANGE_TLB_INVALIDATION_LENGTH
> (rounddown_pow_of_two(ULONG_MAX))
>
> /**
> - * xe_gt_tlb_invalidation_range - Issue a TLB invalidation on this
> GT for an
> - * address range
> + * xe_gt_tlb_inval_range - Issue a TLB invalidation on this GT for
> an address range
> *
> * @gt: GT structure
> * @fence: invalidation fence which will be signal on TLB
> invalidation
> @@ -388,9 +386,8 @@ int xe_gt_tlb_invalidation_all(struct xe_gt *gt,
> struct xe_gt_tlb_invalidation_f
> *
> * Return: Negative error code on error, 0 on success
> */
> -int xe_gt_tlb_invalidation_range(struct xe_gt *gt,
> - struct xe_gt_tlb_invalidation_fence
> *fence,
> - u64 start, u64 end, u32 asid)
> +int xe_gt_tlb_inval_range(struct xe_gt *gt, struct
> xe_gt_tlb_inval_fence *fence,
> + u64 start, u64 end, u32 asid)
> {
> struct xe_device *xe = gt_to_xe(gt);
> #define MAX_TLB_INVALIDATION_LEN 7
> @@ -402,13 +399,13 @@ int xe_gt_tlb_invalidation_range(struct xe_gt
> *gt,
>
> /* Execlists not supported */
> if (gt_to_xe(gt)->info.force_execlist) {
> - __invalidation_fence_signal(xe, fence);
> + __inval_fence_signal(xe, fence);
> return 0;
> }
>
> action[len++] = XE_GUC_ACTION_TLB_INVALIDATION;
> - action[len++] = 0; /* seqno, replaced in
> send_tlb_invalidation */
> - if (!xe->info.has_range_tlb_invalidation ||
> + action[len++] = 0; /* seqno, replaced in send_tlb_inval */
> + if (!xe->info.has_range_tlb_inval ||
> length > MAX_RANGE_TLB_INVALIDATION_LENGTH) {
> action[len++] = MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL);
> } else {
> @@ -457,33 +454,33 @@ int xe_gt_tlb_invalidation_range(struct xe_gt
> *gt,
>
> xe_gt_assert(gt, len <= MAX_TLB_INVALIDATION_LEN);
>
> - return send_tlb_invalidation(>->uc.guc, fence, action,
> len);
> + return send_tlb_inval(>->uc.guc, fence, action, len);
> }
>
> /**
> - * xe_gt_tlb_invalidation_vm - Issue a TLB invalidation on this GT
> for a VM
> + * xe_gt_tlb_inval_vm - Issue a TLB invalidation on this GT for a VM
> * @gt: graphics tile
> * @vm: VM to invalidate
> *
> * Invalidate entire VM's address space
> */
> -void xe_gt_tlb_invalidation_vm(struct xe_gt *gt, struct xe_vm *vm)
> +void xe_gt_tlb_inval_vm(struct xe_gt *gt, struct xe_vm *vm)
> {
> - struct xe_gt_tlb_invalidation_fence fence;
> + struct xe_gt_tlb_inval_fence fence;
> u64 range = 1ull << vm->xe->info.va_bits;
> int ret;
>
> - xe_gt_tlb_invalidation_fence_init(gt, &fence, true);
> + xe_gt_tlb_inval_fence_init(gt, &fence, true);
>
> - ret = xe_gt_tlb_invalidation_range(gt, &fence, 0, range, vm-
> >usm.asid);
> + ret = xe_gt_tlb_inval_range(gt, &fence, 0, range, vm-
> >usm.asid);
> if (ret < 0)
> return;
>
> - xe_gt_tlb_invalidation_fence_wait(&fence);
> + xe_gt_tlb_inval_fence_wait(&fence);
> }
>
> /**
> - * xe_guc_tlb_invalidation_done_handler - TLB invalidation done
> handler
> + * xe_guc_tlb_inval_done_handler - TLB invalidation done handler
> * @guc: guc
> * @msg: message indicating TLB invalidation done
> * @len: length of message
> @@ -494,11 +491,11 @@ void xe_gt_tlb_invalidation_vm(struct xe_gt
> *gt, struct xe_vm *vm)
> *
> * Return: 0 on success, -EPROTO for malformed messages.
> */
> -int xe_guc_tlb_invalidation_done_handler(struct xe_guc *guc, u32
> *msg, u32 len)
> +int xe_guc_tlb_inval_done_handler(struct xe_guc *guc, u32 *msg, u32
> len)
> {
> struct xe_gt *gt = guc_to_gt(guc);
> struct xe_device *xe = gt_to_xe(gt);
> - struct xe_gt_tlb_invalidation_fence *fence, *next;
> + struct xe_gt_tlb_inval_fence *fence, *next;
> unsigned long flags;
>
> if (unlikely(len != 1))
> @@ -519,74 +516,74 @@ int xe_guc_tlb_invalidation_done_handler(struct
> xe_guc *guc, u32 *msg, u32 len)
> * officially process the CT message like if racing against
> * process_g2h_msg().
> */
> - spin_lock_irqsave(>->tlb_invalidation.pending_lock, flags);
> - if (tlb_invalidation_seqno_past(gt, msg[0])) {
> - spin_unlock_irqrestore(>-
> >tlb_invalidation.pending_lock, flags);
> + spin_lock_irqsave(>->tlb_inval.pending_lock, flags);
> + if (tlb_inval_seqno_past(gt, msg[0])) {
> + spin_unlock_irqrestore(>->tlb_inval.pending_lock,
> flags);
> return 0;
> }
>
> - WRITE_ONCE(gt->tlb_invalidation.seqno_recv, msg[0]);
> + WRITE_ONCE(gt->tlb_inval.seqno_recv, msg[0]);
>
> list_for_each_entry_safe(fence, next,
> - >-
> >tlb_invalidation.pending_fences, link) {
> - trace_xe_gt_tlb_invalidation_fence_recv(xe, fence);
> + >->tlb_inval.pending_fences, link)
> {
> + trace_xe_gt_tlb_inval_fence_recv(xe, fence);
>
> - if (!tlb_invalidation_seqno_past(gt, fence->seqno))
> + if (!tlb_inval_seqno_past(gt, fence->seqno))
> break;
>
> - invalidation_fence_signal(xe, fence);
> + inval_fence_signal(xe, fence);
> }
>
> - if (!list_empty(>->tlb_invalidation.pending_fences))
> + if (!list_empty(>->tlb_inval.pending_fences))
> mod_delayed_work(system_wq,
> - >->tlb_invalidation.fence_tdr,
> + >->tlb_inval.fence_tdr,
> tlb_timeout_jiffies(gt));
> else
> - cancel_delayed_work(>->tlb_invalidation.fence_tdr);
> + cancel_delayed_work(>->tlb_inval.fence_tdr);
>
> - spin_unlock_irqrestore(>->tlb_invalidation.pending_lock,
> flags);
> + spin_unlock_irqrestore(>->tlb_inval.pending_lock, flags);
>
> return 0;
> }
>
> static const char *
> -invalidation_fence_get_driver_name(struct dma_fence *dma_fence)
> +inval_fence_get_driver_name(struct dma_fence *dma_fence)
> {
> return "xe";
> }
>
> static const char *
> -invalidation_fence_get_timeline_name(struct dma_fence *dma_fence)
> +inval_fence_get_timeline_name(struct dma_fence *dma_fence)
> {
> - return "invalidation_fence";
> + return "inval_fence";
> }
>
> -static const struct dma_fence_ops invalidation_fence_ops = {
> - .get_driver_name = invalidation_fence_get_driver_name,
> - .get_timeline_name = invalidation_fence_get_timeline_name,
> +static const struct dma_fence_ops inval_fence_ops = {
> + .get_driver_name = inval_fence_get_driver_name,
> + .get_timeline_name = inval_fence_get_timeline_name,
> };
>
> /**
> - * xe_gt_tlb_invalidation_fence_init - Initialize TLB invalidation
> fence
> + * xe_gt_tlb_inval_fence_init - Initialize TLB invalidation fence
> * @gt: GT
> * @fence: TLB invalidation fence to initialize
> * @stack: fence is stack variable
> *
> - * Initialize TLB invalidation fence for use.
> xe_gt_tlb_invalidation_fence_fini
> + * Initialize TLB invalidation fence for use.
> xe_gt_tlb_inval_fence_fini
> * will be automatically called when fence is signalled (all fences
> must signal),
> * even on error.
> */
> -void xe_gt_tlb_invalidation_fence_init(struct xe_gt *gt,
> - struct
> xe_gt_tlb_invalidation_fence *fence,
> - bool stack)
> +void xe_gt_tlb_inval_fence_init(struct xe_gt *gt,
> + struct xe_gt_tlb_inval_fence *fence,
> + bool stack)
> {
> xe_pm_runtime_get_noresume(gt_to_xe(gt));
>
> - spin_lock_irq(>->tlb_invalidation.lock);
> - dma_fence_init(&fence->base, &invalidation_fence_ops,
> - >->tlb_invalidation.lock,
> + spin_lock_irq(>->tlb_inval.lock);
> + dma_fence_init(&fence->base, &inval_fence_ops,
> + >->tlb_inval.lock,
> dma_fence_context_alloc(1), 1);
> - spin_unlock_irq(>->tlb_invalidation.lock);
> + spin_unlock_irq(>->tlb_inval.lock);
> INIT_LIST_HEAD(&fence->link);
> if (stack)
> set_bit(FENCE_STACK_BIT, &fence->base.flags);
> diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_inval.h
> b/drivers/gpu/drm/xe/xe_gt_tlb_inval.h
> new file mode 100644
> index 000000000000..801d4ecf88f0
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_gt_tlb_inval.h
> @@ -0,0 +1,40 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2023 Intel Corporation
> + */
> +
> +#ifndef _XE_GT_TLB_INVAL_H_
> +#define _XE_GT_TLB_INVAL_H_
> +
> +#include <linux/types.h>
> +
> +#include "xe_gt_tlb_inval_types.h"
> +
> +struct xe_gt;
> +struct xe_guc;
> +struct xe_vm;
> +struct xe_vma;
> +
> +int xe_gt_tlb_inval_init_early(struct xe_gt *gt);
> +
> +void xe_gt_tlb_inval_reset(struct xe_gt *gt);
> +int xe_gt_tlb_inval_ggtt(struct xe_gt *gt);
> +void xe_gt_tlb_inval_vm(struct xe_gt *gt, struct xe_vm *vm);
> +int xe_gt_tlb_inval_all(struct xe_gt *gt, struct
> xe_gt_tlb_inval_fence *fence);
> +int xe_gt_tlb_inval_range(struct xe_gt *gt,
> + struct xe_gt_tlb_inval_fence *fence,
> + u64 start, u64 end, u32 asid);
> +int xe_guc_tlb_inval_done_handler(struct xe_guc *guc, u32 *msg, u32
> len);
> +
> +void xe_gt_tlb_inval_fence_init(struct xe_gt *gt,
> + struct xe_gt_tlb_inval_fence *fence,
> + bool stack);
> +void xe_gt_tlb_inval_fence_signal(struct xe_gt_tlb_inval_fence
> *fence);
> +
> +static inline void
> +xe_gt_tlb_inval_fence_wait(struct xe_gt_tlb_inval_fence *fence)
> +{
> + dma_fence_wait(&fence->base, false);
> +}
> +
> +#endif /* _XE_GT_TLB_INVAL_ */
> diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation_types.h
> b/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
> similarity index 55%
> rename from drivers/gpu/drm/xe/xe_gt_tlb_invalidation_types.h
> rename to drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
> index de6e825e0851..919430359103 100644
> --- a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation_types.h
> +++ b/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
> @@ -3,20 +3,20 @@
> * Copyright © 2023 Intel Corporation
> */
>
> -#ifndef _XE_GT_TLB_INVALIDATION_TYPES_H_
> -#define _XE_GT_TLB_INVALIDATION_TYPES_H_
> +#ifndef _XE_GT_TLB_INVAL_TYPES_H_
> +#define _XE_GT_TLB_INVAL_TYPES_H_
>
> #include <linux/dma-fence.h>
>
> struct xe_gt;
>
> /**
> - * struct xe_gt_tlb_invalidation_fence - XE GT TLB invalidation
> fence
> + * struct xe_gt_tlb_inval_fence - XE GT TLB invalidation fence
> *
> - * Optionally passed to xe_gt_tlb_invalidation and will be signaled
> upon TLB
> + * Optionally passed to xe_gt_tlb_inval and will be signaled upon
> TLB
> * invalidation completion.
> */
> -struct xe_gt_tlb_invalidation_fence {
> +struct xe_gt_tlb_inval_fence {
> /** @base: dma fence base */
> struct dma_fence base;
> /** @gt: GT which fence belong to */
> @@ -25,8 +25,8 @@ struct xe_gt_tlb_invalidation_fence {
> struct list_head link;
> /** @seqno: seqno of TLB invalidation to signal fence one */
> int seqno;
> - /** @invalidation_time: time of TLB invalidation */
> - ktime_t invalidation_time;
> + /** @inval_time: time of TLB invalidation */
> + ktime_t inval_time;
> };
>
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
> b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
> deleted file mode 100644
> index f7f0f2eaf4b5..000000000000
> --- a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
> +++ /dev/null
> @@ -1,40 +0,0 @@
> -/* SPDX-License-Identifier: MIT */
> -/*
> - * Copyright © 2023 Intel Corporation
> - */
> -
> -#ifndef _XE_GT_TLB_INVALIDATION_H_
> -#define _XE_GT_TLB_INVALIDATION_H_
> -
> -#include <linux/types.h>
> -
> -#include "xe_gt_tlb_invalidation_types.h"
> -
> -struct xe_gt;
> -struct xe_guc;
> -struct xe_vm;
> -struct xe_vma;
> -
> -int xe_gt_tlb_invalidation_init_early(struct xe_gt *gt);
> -
> -void xe_gt_tlb_invalidation_reset(struct xe_gt *gt);
> -int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt);
> -void xe_gt_tlb_invalidation_vm(struct xe_gt *gt, struct xe_vm *vm);
> -int xe_gt_tlb_invalidation_all(struct xe_gt *gt, struct
> xe_gt_tlb_invalidation_fence *fence);
> -int xe_gt_tlb_invalidation_range(struct xe_gt *gt,
> - struct xe_gt_tlb_invalidation_fence
> *fence,
> - u64 start, u64 end, u32 asid);
> -int xe_guc_tlb_invalidation_done_handler(struct xe_guc *guc, u32
> *msg, u32 len);
> -
> -void xe_gt_tlb_invalidation_fence_init(struct xe_gt *gt,
> - struct
> xe_gt_tlb_invalidation_fence *fence,
> - bool stack);
> -void xe_gt_tlb_invalidation_fence_signal(struct
> xe_gt_tlb_invalidation_fence *fence);
> -
> -static inline void
> -xe_gt_tlb_invalidation_fence_wait(struct
> xe_gt_tlb_invalidation_fence *fence)
> -{
> - dma_fence_wait(&fence->base, false);
> -}
> -
> -#endif /* _XE_GT_TLB_INVALIDATION_ */
> diff --git a/drivers/gpu/drm/xe/xe_gt_types.h
> b/drivers/gpu/drm/xe/xe_gt_types.h
> index 96344c604726..b82795fc0070 100644
> --- a/drivers/gpu/drm/xe/xe_gt_types.h
> +++ b/drivers/gpu/drm/xe/xe_gt_types.h
> @@ -185,34 +185,34 @@ struct xe_gt {
> struct work_struct worker;
> } reset;
>
> - /** @tlb_invalidation: TLB invalidation state */
> + /** @tlb_inval: TLB invalidation state */
> struct {
> - /** @tlb_invalidation.seqno: TLB invalidation seqno,
> protected by CT lock */
> + /** @tlb_inval.seqno: TLB invalidation seqno,
> protected by CT lock */
> #define TLB_INVALIDATION_SEQNO_MAX 0x100000
> int seqno;
> /**
> - * @tlb_invalidation.seqno_recv: last received TLB
> invalidation seqno,
> + * @tlb_inval.seqno_recv: last received TLB
> invalidation seqno,
> * protected by CT lock
> */
> int seqno_recv;
> /**
> - * @tlb_invalidation.pending_fences: list of pending
> fences waiting TLB
> + * @tlb_inval.pending_fences: list of pending fences
> waiting TLB
> * invaliations, protected by CT lock
> */
> struct list_head pending_fences;
> /**
> - * @tlb_invalidation.pending_lock: protects
> @tlb_invalidation.pending_fences
> - * and updating @tlb_invalidation.seqno_recv.
> + * @tlb_inval.pending_lock: protects
> @tlb_inval.pending_fences
> + * and updating @tlb_inval.seqno_recv.
> */
> spinlock_t pending_lock;
> /**
> - * @tlb_invalidation.fence_tdr: schedules a delayed
> call to
> + * @tlb_inval.fence_tdr: schedules a delayed call to
> * xe_gt_tlb_fence_timeout after the timeut interval
> is over.
> */
> struct delayed_work fence_tdr;
> - /** @tlb_invalidation.lock: protects TLB invalidation
> fences */
> + /** @tlb_inval.lock: protects TLB invalidation fences
> */
> spinlock_t lock;
> - } tlb_invalidation;
> + } tlb_inval;
>
> /**
> * @ccs_mode: Number of compute engines enabled.
> diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c
> b/drivers/gpu/drm/xe/xe_guc_ct.c
> index b6acccfcd351..c213a037b346 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ct.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ct.c
> @@ -26,7 +26,7 @@
> #include "xe_gt_sriov_pf_control.h"
> #include "xe_gt_sriov_pf_monitor.h"
> #include "xe_gt_sriov_printk.h"
> -#include "xe_gt_tlb_invalidation.h"
> +#include "xe_gt_tlb_inval.h"
> #include "xe_guc.h"
> #include "xe_guc_log.h"
> #include "xe_guc_relay.h"
> @@ -1420,8 +1420,7 @@ static int process_g2h_msg(struct xe_guc_ct
> *ct, u32 *msg, u32 len)
> ret = xe_guc_pagefault_handler(guc, payload,
> adj_len);
> break;
> case XE_GUC_ACTION_TLB_INVALIDATION_DONE:
> - ret = xe_guc_tlb_invalidation_done_handler(guc,
> payload,
> - adj_len);
> + ret = xe_guc_tlb_inval_done_handler(guc, payload,
> adj_len);
> break;
> case XE_GUC_ACTION_ACCESS_COUNTER_NOTIFY:
> ret = xe_guc_access_counter_notify_handler(guc,
> payload,
> @@ -1622,8 +1621,7 @@ static void g2h_fast_path(struct xe_guc_ct *ct,
> u32 *msg, u32 len)
> break;
> case XE_GUC_ACTION_TLB_INVALIDATION_DONE:
> __g2h_release_space(ct, len);
> - ret = xe_guc_tlb_invalidation_done_handler(guc,
> payload,
> - adj_len);
> + ret = xe_guc_tlb_inval_done_handler(guc, payload,
> adj_len);
> break;
> default:
> xe_gt_warn(gt, "NOT_POSSIBLE");
> diff --git a/drivers/gpu/drm/xe/xe_lmtt.c
> b/drivers/gpu/drm/xe/xe_lmtt.c
> index a2000307d5bf..8869ad491d99 100644
> --- a/drivers/gpu/drm/xe/xe_lmtt.c
> +++ b/drivers/gpu/drm/xe/xe_lmtt.c
> @@ -11,7 +11,7 @@
>
> #include "xe_assert.h"
> #include "xe_bo.h"
> -#include "xe_gt_tlb_invalidation.h"
> +#include "xe_gt_tlb_inval.h"
> #include "xe_lmtt.h"
> #include "xe_map.h"
> #include "xe_mmio.h"
> @@ -225,8 +225,8 @@ void xe_lmtt_init_hw(struct xe_lmtt *lmtt)
>
> static int lmtt_invalidate_hw(struct xe_lmtt *lmtt)
> {
> - struct xe_gt_tlb_invalidation_fence
> fences[XE_MAX_GT_PER_TILE];
> - struct xe_gt_tlb_invalidation_fence *fence = fences;
> + struct xe_gt_tlb_inval_fence fences[XE_MAX_GT_PER_TILE];
> + struct xe_gt_tlb_inval_fence *fence = fences;
> struct xe_tile *tile = lmtt_to_tile(lmtt);
> struct xe_gt *gt;
> int result = 0;
> @@ -234,8 +234,8 @@ static int lmtt_invalidate_hw(struct xe_lmtt
> *lmtt)
> u8 id;
>
> for_each_gt_on_tile(gt, tile, id) {
> - xe_gt_tlb_invalidation_fence_init(gt, fence, true);
> - err = xe_gt_tlb_invalidation_all(gt, fence);
> + xe_gt_tlb_inval_fence_init(gt, fence, true);
> + err = xe_gt_tlb_inval_all(gt, fence);
> result = result ?: err;
> fence++;
> }
> @@ -249,7 +249,7 @@ static int lmtt_invalidate_hw(struct xe_lmtt
> *lmtt)
> */
> fence = fences;
> for_each_gt_on_tile(gt, tile, id)
> - xe_gt_tlb_invalidation_fence_wait(fence++);
> + xe_gt_tlb_inval_fence_wait(fence++);
>
> return result;
> }
> diff --git a/drivers/gpu/drm/xe/xe_pci.c
> b/drivers/gpu/drm/xe/xe_pci.c
> index dc4c8e861a84..2c14e3b10679 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -55,7 +55,7 @@ static const struct xe_graphics_desc graphics_xelp
> = {
> };
>
> #define XE_HP_FEATURES \
> - .has_range_tlb_invalidation = true, \
> + .has_range_tlb_inval = true, \
> .va_bits = 48, \
> .vm_max_level = 3
>
> @@ -103,7 +103,7 @@ static const struct xe_graphics_desc
> graphics_xelpg = {
> .has_asid = 1, \
> .has_atomic_enable_pte_bit = 1, \
> .has_flat_ccs = 1, \
> - .has_range_tlb_invalidation = 1, \
> + .has_range_tlb_inval = 1, \
> .has_usm = 1, \
> .has_64bit_timestamp = 1, \
> .va_bits = 48, \
> @@ -673,7 +673,7 @@ static int xe_info_init(struct xe_device *xe,
> /* Runtime detection may change this later */
> xe->info.has_flat_ccs = graphics_desc->has_flat_ccs;
>
> - xe->info.has_range_tlb_invalidation = graphics_desc-
> >has_range_tlb_invalidation;
> + xe->info.has_range_tlb_inval = graphics_desc-
> >has_range_tlb_inval;
> xe->info.has_usm = graphics_desc->has_usm;
> xe->info.has_64bit_timestamp = graphics_desc-
> >has_64bit_timestamp;
>
> diff --git a/drivers/gpu/drm/xe/xe_pci_types.h
> b/drivers/gpu/drm/xe/xe_pci_types.h
> index 4de6f69ed975..b63002fc0f67 100644
> --- a/drivers/gpu/drm/xe/xe_pci_types.h
> +++ b/drivers/gpu/drm/xe/xe_pci_types.h
> @@ -60,7 +60,7 @@ struct xe_graphics_desc {
> u8 has_atomic_enable_pte_bit:1;
> u8 has_flat_ccs:1;
> u8 has_indirect_ring_state:1;
> - u8 has_range_tlb_invalidation:1;
> + u8 has_range_tlb_inval:1;
> u8 has_usm:1;
> u8 has_64bit_timestamp:1;
> };
> diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
> index 7b441d1a77e9..04c52926828f 100644
> --- a/drivers/gpu/drm/xe/xe_pt.c
> +++ b/drivers/gpu/drm/xe/xe_pt.c
> @@ -13,7 +13,7 @@
> #include "xe_drm_client.h"
> #include "xe_exec_queue.h"
> #include "xe_gt.h"
> -#include "xe_gt_tlb_invalidation.h"
> +#include "xe_gt_tlb_inval.h"
> #include "xe_migrate.h"
> #include "xe_pt_types.h"
> #include "xe_pt_walk.h"
> @@ -1509,8 +1509,8 @@ static int xe_pt_svm_pre_commit(struct
> xe_migrate_pt_update *pt_update)
> }
> #endif
>
> -struct invalidation_fence {
> - struct xe_gt_tlb_invalidation_fence base;
> +struct inval_fence {
> + struct xe_gt_tlb_inval_fence base;
> struct xe_gt *gt;
> struct dma_fence *fence;
> struct dma_fence_cb cb;
> @@ -1520,38 +1520,37 @@ struct invalidation_fence {
> u32 asid;
> };
>
> -static void invalidation_fence_cb(struct dma_fence *fence,
> - struct dma_fence_cb *cb)
> +static void inval_fence_cb(struct dma_fence *fence, struct
> dma_fence_cb *cb)
> {
> - struct invalidation_fence *ifence =
> - container_of(cb, struct invalidation_fence, cb);
> + struct inval_fence *ifence =
> + container_of(cb, struct inval_fence, cb);
>
> if (!ifence->fence->error) {
> queue_work(system_wq, &ifence->work);
> } else {
> ifence->base.base.error = ifence->fence->error;
> - xe_gt_tlb_invalidation_fence_signal(&ifence->base);
> + xe_gt_tlb_inval_fence_signal(&ifence->base);
> }
> dma_fence_put(ifence->fence);
> }
>
> -static void invalidation_fence_work_func(struct work_struct *w)
> +static void inval_fence_work_func(struct work_struct *w)
> {
> - struct invalidation_fence *ifence =
> - container_of(w, struct invalidation_fence, work);
> + struct inval_fence *ifence =
> + container_of(w, struct inval_fence, work);
>
> - xe_gt_tlb_invalidation_range(ifence->gt, &ifence->base,
> ifence->start,
> - ifence->end, ifence->asid);
> + xe_gt_tlb_inval_range(ifence->gt, &ifence->base, ifence-
> >start,
> + ifence->end, ifence->asid);
> }
>
> -static void invalidation_fence_init(struct xe_gt *gt,
> - struct invalidation_fence
> *ifence,
> - struct dma_fence *fence,
> - u64 start, u64 end, u32 asid)
> +static void inval_fence_init(struct xe_gt *gt,
> + struct inval_fence *ifence,
> + struct dma_fence *fence,
> + u64 start, u64 end, u32 asid)
> {
> int ret;
>
> - xe_gt_tlb_invalidation_fence_init(gt, &ifence->base, false);
> + xe_gt_tlb_inval_fence_init(gt, &ifence->base, false);
>
> ifence->fence = fence;
> ifence->gt = gt;
> @@ -1559,11 +1558,11 @@ static void invalidation_fence_init(struct
> xe_gt *gt,
> ifence->end = end;
> ifence->asid = asid;
>
> - INIT_WORK(&ifence->work, invalidation_fence_work_func);
> - ret = dma_fence_add_callback(fence, &ifence->cb,
> invalidation_fence_cb);
> + INIT_WORK(&ifence->work, inval_fence_work_func);
> + ret = dma_fence_add_callback(fence, &ifence->cb,
> inval_fence_cb);
> if (ret == -ENOENT) {
> dma_fence_put(ifence->fence); /* Usually dropped in
> CB */
> - invalidation_fence_work_func(&ifence->work);
> + inval_fence_work_func(&ifence->work);
> } else if (ret) {
> dma_fence_put(&ifence->base.base); /* Caller ref
> */
> dma_fence_put(&ifence->base.base); /* Creation
> ref */
> @@ -2402,7 +2401,7 @@ xe_pt_update_ops_run(struct xe_tile *tile,
> struct xe_vma_ops *vops)
> struct xe_vm_pgtable_update_ops *pt_update_ops =
> &vops->pt_update_ops[tile->id];
> struct dma_fence *fence;
> - struct invalidation_fence *ifence = NULL, *mfence = NULL;
> + struct inval_fence *ifence = NULL, *mfence = NULL;
> struct dma_fence **fences = NULL;
> struct dma_fence_array *cf = NULL;
> struct xe_range_fence *rfence;
> @@ -2489,13 +2488,13 @@ xe_pt_update_ops_run(struct xe_tile *tile,
> struct xe_vma_ops *vops)
> if (ifence) {
> if (mfence)
> dma_fence_get(fence);
> - invalidation_fence_init(tile->primary_gt, ifence,
> fence,
> - pt_update_ops->start,
> - pt_update_ops->last, vm-
> >usm.asid);
> + inval_fence_init(tile->primary_gt, ifence, fence,
> + pt_update_ops->start,
> + pt_update_ops->last, vm->usm.asid);
> if (mfence) {
> - invalidation_fence_init(tile->media_gt,
> mfence, fence,
> - pt_update_ops->start,
> - pt_update_ops->last,
> vm->usm.asid);
> + inval_fence_init(tile->media_gt, mfence,
> fence,
> + pt_update_ops->start,
> + pt_update_ops->last, vm-
> >usm.asid);
> fences[0] = &ifence->base.base;
> fences[1] = &mfence->base.base;
> dma_fence_array_init(cf, 2, fences,
> diff --git a/drivers/gpu/drm/xe/xe_svm.c
> b/drivers/gpu/drm/xe/xe_svm.c
> index a7ff5975873f..030412cda6a4 100644
> --- a/drivers/gpu/drm/xe/xe_svm.c
> +++ b/drivers/gpu/drm/xe/xe_svm.c
> @@ -7,7 +7,7 @@
>
> #include "xe_bo.h"
> #include "xe_gt_stats.h"
> -#include "xe_gt_tlb_invalidation.h"
> +#include "xe_gt_tlb_inval.h"
> #include "xe_migrate.h"
> #include "xe_module.h"
> #include "xe_pm.h"
> @@ -224,7 +224,7 @@ static void xe_svm_invalidate(struct drm_gpusvm
> *gpusvm,
>
> xe_device_wmb(xe);
>
> - err = xe_vm_range_tilemask_tlb_invalidation(vm, adj_start,
> adj_end, tile_mask);
> + err = xe_vm_range_tilemask_tlb_inval(vm, adj_start, adj_end,
> tile_mask);
> WARN_ON_ONCE(err);
>
> range_notifier_event_end:
> diff --git a/drivers/gpu/drm/xe/xe_trace.h
> b/drivers/gpu/drm/xe/xe_trace.h
> index 21486a6f693a..36538f50d06f 100644
> --- a/drivers/gpu/drm/xe/xe_trace.h
> +++ b/drivers/gpu/drm/xe/xe_trace.h
> @@ -14,7 +14,7 @@
>
> #include "xe_exec_queue_types.h"
> #include "xe_gpu_scheduler_types.h"
> -#include "xe_gt_tlb_invalidation_types.h"
> +#include "xe_gt_tlb_inval_types.h"
> #include "xe_gt_types.h"
> #include "xe_guc_exec_queue_types.h"
> #include "xe_sched_job.h"
> @@ -25,13 +25,13 @@
> #define __dev_name_gt(gt) __dev_name_xe(gt_to_xe((gt)))
> #define __dev_name_eq(q) __dev_name_gt((q)->gt)
>
> -DECLARE_EVENT_CLASS(xe_gt_tlb_invalidation_fence,
> - TP_PROTO(struct xe_device *xe, struct
> xe_gt_tlb_invalidation_fence *fence),
> +DECLARE_EVENT_CLASS(xe_gt_tlb_inval_fence,
> + TP_PROTO(struct xe_device *xe, struct
> xe_gt_tlb_inval_fence *fence),
> TP_ARGS(xe, fence),
>
> TP_STRUCT__entry(
> __string(dev, __dev_name_xe(xe))
> - __field(struct
> xe_gt_tlb_invalidation_fence *, fence)
> + __field(struct xe_gt_tlb_inval_fence *,
> fence)
> __field(int, seqno)
> ),
>
> @@ -45,23 +45,23 @@ DECLARE_EVENT_CLASS(xe_gt_tlb_invalidation_fence,
> __get_str(dev), __entry->fence,
> __entry->seqno)
> );
>
> -DEFINE_EVENT(xe_gt_tlb_invalidation_fence,
> xe_gt_tlb_invalidation_fence_send,
> - TP_PROTO(struct xe_device *xe, struct
> xe_gt_tlb_invalidation_fence *fence),
> +DEFINE_EVENT(xe_gt_tlb_inval_fence, xe_gt_tlb_inval_fence_send,
> + TP_PROTO(struct xe_device *xe, struct
> xe_gt_tlb_inval_fence *fence),
> TP_ARGS(xe, fence)
> );
>
> -DEFINE_EVENT(xe_gt_tlb_invalidation_fence,
> xe_gt_tlb_invalidation_fence_recv,
> - TP_PROTO(struct xe_device *xe, struct
> xe_gt_tlb_invalidation_fence *fence),
> +DEFINE_EVENT(xe_gt_tlb_inval_fence, xe_gt_tlb_inval_fence_recv,
> + TP_PROTO(struct xe_device *xe, struct
> xe_gt_tlb_inval_fence *fence),
> TP_ARGS(xe, fence)
> );
>
> -DEFINE_EVENT(xe_gt_tlb_invalidation_fence,
> xe_gt_tlb_invalidation_fence_signal,
> - TP_PROTO(struct xe_device *xe, struct
> xe_gt_tlb_invalidation_fence *fence),
> +DEFINE_EVENT(xe_gt_tlb_inval_fence, xe_gt_tlb_inval_fence_signal,
> + TP_PROTO(struct xe_device *xe, struct
> xe_gt_tlb_inval_fence *fence),
> TP_ARGS(xe, fence)
> );
>
> -DEFINE_EVENT(xe_gt_tlb_invalidation_fence,
> xe_gt_tlb_invalidation_fence_timeout,
> - TP_PROTO(struct xe_device *xe, struct
> xe_gt_tlb_invalidation_fence *fence),
> +DEFINE_EVENT(xe_gt_tlb_inval_fence, xe_gt_tlb_inval_fence_timeout,
> + TP_PROTO(struct xe_device *xe, struct
> xe_gt_tlb_inval_fence *fence),
> TP_ARGS(xe, fence)
> );
>
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index 2035604121e6..a5fe59f63268 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -28,7 +28,7 @@
> #include "xe_drm_client.h"
> #include "xe_exec_queue.h"
> #include "xe_gt_pagefault.h"
> -#include "xe_gt_tlb_invalidation.h"
> +#include "xe_gt_tlb_inval.h"
> #include "xe_migrate.h"
> #include "xe_pat.h"
> #include "xe_pm.h"
> @@ -1850,7 +1850,7 @@ static void xe_vm_close(struct xe_vm *vm)
> xe_pt_clear(xe, vm-
> >pt_root[id]);
>
> for_each_gt(gt, xe, id)
> - xe_gt_tlb_invalidation_vm(gt, vm);
> + xe_gt_tlb_inval_vm(gt, vm);
> }
> }
>
> @@ -3843,7 +3843,7 @@ void xe_vm_unlock(struct xe_vm *vm)
> }
>
> /**
> - * xe_vm_range_tilemask_tlb_invalidation - Issue a TLB invalidation
> on this tilemask for an
> + * xe_vm_range_tilemask_tlb_inval - Issue a TLB invalidation on this
> tilemask for an
> * address range
> * @vm: The VM
> * @start: start address
> @@ -3854,10 +3854,11 @@ void xe_vm_unlock(struct xe_vm *vm)
> *
> * Returns 0 for success, negative error code otherwise.
> */
> -int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64
> start,
> - u64 end, u8 tile_mask)
> +int xe_vm_range_tilemask_tlb_inval(struct xe_vm *vm, u64 start,
> + u64 end, u8 tile_mask)
> {
> - struct xe_gt_tlb_invalidation_fence
> fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
> + struct xe_gt_tlb_inval_fence
> + fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
> struct xe_tile *tile;
> u32 fence_id = 0;
> u8 id;
> @@ -3867,39 +3868,34 @@ int
> xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64 start,
> return 0;
>
> for_each_tile(tile, vm->xe, id) {
> - if (tile_mask & BIT(id)) {
> - xe_gt_tlb_invalidation_fence_init(tile-
> >primary_gt,
> -
> &fence[fence_id], true);
> -
> - err = xe_gt_tlb_invalidation_range(tile-
> >primary_gt,
> -
> &fence[fence_id],
> - start,
> - end,
> - vm-
> >usm.asid);
> - if (err)
> - goto wait;
> - ++fence_id;
> + if (!(tile_mask & BIT(id)))
> + continue;
>
> - if (!tile->media_gt)
> - continue;
> + xe_gt_tlb_inval_fence_init(tile->primary_gt,
> + &fence[fence_id], true);
>
> - xe_gt_tlb_invalidation_fence_init(tile-
> >media_gt,
> -
> &fence[fence_id], true);
> + err = xe_gt_tlb_inval_range(tile->primary_gt,
> &fence[fence_id],
> + start, end, vm-
> >usm.asid);
> + if (err)
> + goto wait;
> + ++fence_id;
>
> - err = xe_gt_tlb_invalidation_range(tile-
> >media_gt,
> -
> &fence[fence_id],
> - start,
> - end,
> - vm-
> >usm.asid);
> - if (err)
> - goto wait;
> - ++fence_id;
> - }
> + if (!tile->media_gt)
> + continue;
> +
> + xe_gt_tlb_inval_fence_init(tile->media_gt,
> + &fence[fence_id], true);
> +
> + err = xe_gt_tlb_inval_range(tile->media_gt,
> &fence[fence_id],
> + start, end, vm-
> >usm.asid);
> + if (err)
> + goto wait;
> + ++fence_id;
> }
>
> wait:
> for (id = 0; id < fence_id; ++id)
> - xe_gt_tlb_invalidation_fence_wait(&fence[id]);
> + xe_gt_tlb_inval_fence_wait(&fence[id]);
>
> return err;
> }
> @@ -3958,8 +3954,8 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
>
> xe_device_wmb(xe);
>
> - ret = xe_vm_range_tilemask_tlb_invalidation(xe_vma_vm(vma),
> xe_vma_start(vma),
> - xe_vma_end(vma),
> tile_mask);
> + ret = xe_vm_range_tilemask_tlb_inval(xe_vma_vm(vma),
> xe_vma_start(vma),
> + xe_vma_end(vma),
> tile_mask);
>
> /* WRITE_ONCE pairs with READ_ONCE in
> xe_vm_has_valid_gpu_mapping() */
> WRITE_ONCE(vma->tile_invalidated, vma->tile_mask);
> diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
> index 3475a118f666..fade8ad92bad 100644
> --- a/drivers/gpu/drm/xe/xe_vm.h
> +++ b/drivers/gpu/drm/xe/xe_vm.h
> @@ -228,8 +228,8 @@ struct dma_fence *xe_vm_range_rebind(struct xe_vm
> *vm,
> struct dma_fence *xe_vm_range_unbind(struct xe_vm *vm,
> struct xe_svm_range *range);
>
> -int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64
> start,
> - u64 end, u8 tile_mask);
> +int xe_vm_range_tilemask_tlb_inval(struct xe_vm *vm, u64 start,
> + u64 end, u8 tile_mask);
>
> int xe_vm_invalidate_vma(struct xe_vma *vma);
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 4/4] drm/xe: Add xe_tlb_inval structure
2025-07-15 21:21 ` [PATCH 4/4] drm/xe: Add xe_tlb_inval structure stuartsummers
@ 2025-07-15 21:25 ` Summers, Stuart
0 siblings, 0 replies; 11+ messages in thread
From: Summers, Stuart @ 2025-07-15 21:25 UTC (permalink / raw)
To: Summers, Stuart
Cc: intel-xe@lists.freedesktop.org, Brost, Matthew,
maarten.lankhorst@linux.intel.com, Auld, Matthew
On Tue, 2025-07-15 at 21:21 +0000, stuartsummers wrote:
> From: Matthew Brost <matthew.brost@intel.com>
>
> Extract TLB invalidation state into a structure to decouple TLB
> invalidations from the GT, allowing the structure to be embedded
> anywhere in the driver.
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Also makes sense to me as an incremental move to the tlb inval specific
encapsulation.
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
Thanks,
Stuart
> ---
> drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h | 30
> ++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_gt_types.h | 29 ++------------------
> -
> 2 files changed, 32 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
> b/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
> index 919430359103..b998276dd931 100644
> --- a/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
> +++ b/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
> @@ -6,10 +6,40 @@
> #ifndef _XE_GT_TLB_INVAL_TYPES_H_
> #define _XE_GT_TLB_INVAL_TYPES_H_
>
> +#include <linux/workqueue.h>
> #include <linux/dma-fence.h>
>
> struct xe_gt;
>
> +/** struct xe_tlb_inval - TLB invalidation client */
> +struct xe_tlb_inval {
> + /** @tlb_inval.seqno: TLB invalidation seqno, protected by CT
> lock */
> +#define TLB_INVALIDATION_SEQNO_MAX 0x100000
> + int seqno;
> + /**
> + * @tlb_inval.seqno_recv: last received TLB invalidation
> seqno,
> + * protected by CT lock
> + */
> + int seqno_recv;
> + /**
> + * @tlb_inval.pending_fences: list of pending fences waiting
> TLB
> + * invaliations, protected by CT lock
> + */
> + struct list_head pending_fences;
> + /**
> + * @tlb_inval.pending_lock: protects
> @tlb_inval.pending_fences
> + * and updating @tlb_inval.seqno_recv.
> + */
> + spinlock_t pending_lock;
> + /**
> + * @tlb_inval.fence_tdr: schedules a delayed call to
> + * xe_gt_tlb_fence_timeout after the timeut interval is over.
> + */
> + struct delayed_work fence_tdr;
> + /** @tlb_inval.lock: protects TLB invalidation fences */
> + spinlock_t lock;
> +};
> +
> /**
> * struct xe_gt_tlb_inval_fence - XE GT TLB invalidation fence
> *
> diff --git a/drivers/gpu/drm/xe/xe_gt_types.h
> b/drivers/gpu/drm/xe/xe_gt_types.h
> index b82795fc0070..ed21bd63b001 100644
> --- a/drivers/gpu/drm/xe/xe_gt_types.h
> +++ b/drivers/gpu/drm/xe/xe_gt_types.h
> @@ -12,6 +12,7 @@
> #include "xe_gt_sriov_pf_types.h"
> #include "xe_gt_sriov_vf_types.h"
> #include "xe_gt_stats_types.h"
> +#include "xe_gt_tlb_inval_types.h"
> #include "xe_hw_engine_types.h"
> #include "xe_hw_fence_types.h"
> #include "xe_oa_types.h"
> @@ -186,33 +187,7 @@ struct xe_gt {
> } reset;
>
> /** @tlb_inval: TLB invalidation state */
> - struct {
> - /** @tlb_inval.seqno: TLB invalidation seqno,
> protected by CT lock */
> -#define TLB_INVALIDATION_SEQNO_MAX 0x100000
> - int seqno;
> - /**
> - * @tlb_inval.seqno_recv: last received TLB
> invalidation seqno,
> - * protected by CT lock
> - */
> - int seqno_recv;
> - /**
> - * @tlb_inval.pending_fences: list of pending fences
> waiting TLB
> - * invaliations, protected by CT lock
> - */
> - struct list_head pending_fences;
> - /**
> - * @tlb_inval.pending_lock: protects
> @tlb_inval.pending_fences
> - * and updating @tlb_inval.seqno_recv.
> - */
> - spinlock_t pending_lock;
> - /**
> - * @tlb_inval.fence_tdr: schedules a delayed call to
> - * xe_gt_tlb_fence_timeout after the timeut interval
> is over.
> - */
> - struct delayed_work fence_tdr;
> - /** @tlb_inval.lock: protects TLB invalidation fences
> */
> - spinlock_t lock;
> - } tlb_inval;
> + struct xe_tlb_inval tlb_inval;
>
> /**
> * @ccs_mode: Number of compute engines enabled.
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 0/4] Basic TLB inval refactor
2025-07-15 21:21 [PATCH 0/4] Basic TLB inval refactor stuartsummers
` (3 preceding siblings ...)
2025-07-15 21:21 ` [PATCH 4/4] drm/xe: Add xe_tlb_inval structure stuartsummers
@ 2025-07-15 21:26 ` Summers, Stuart
2025-07-15 21:51 ` ✗ CI.checkpatch: warning for " Patchwork
` (2 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Summers, Stuart @ 2025-07-15 21:26 UTC (permalink / raw)
To: Summers, Stuart
Cc: intel-xe@lists.freedesktop.org, Brost, Matthew,
maarten.lankhorst@linux.intel.com, Auld, Matthew
On Tue, 2025-07-15 at 21:21 +0000, stuartsummers wrote:
> Just a few refactors for the TLB invalidation related
> files written by Matt. Couple of these have already been
> reviewed and I did some small rebasing on the latest.
>
> Working on building some of his other recent changes
> plus a few others that have been floating around on
> top of this. Doing this series explicitly first since
> this is a reduced overall scope.
I'll leave the series up here a bit for others to review. I just wanted
to get the ball rollling a bit quicker here. Thanks for the changes
Matt!
>
> Matthew Brost (4):
> drm/xe: Explicitly mark migration queues with flag
> drm/xe: Remove unused GT TLB invalidation trace points
> drm/xe: s/tlb_invalidation/tlb_inval
> drm/xe: Add xe_tlb_inval structure
>
> drivers/gpu/drm/xe/Makefile | 2 +-
> drivers/gpu/drm/xe/xe_device_types.h | 4 +-
> drivers/gpu/drm/xe/xe_exec_queue_types.h | 2 +
> drivers/gpu/drm/xe/xe_ggtt.c | 6 +-
> drivers/gpu/drm/xe/xe_gt.c | 8 +-
> drivers/gpu/drm/xe/xe_gt_pagefault.c | 1 -
> ...t_tlb_invalidation.c => xe_gt_tlb_inval.c} | 239 +++++++++-------
> --
> drivers/gpu/drm/xe/xe_gt_tlb_inval.h | 40 +++
> drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h | 62 +++++
> drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h | 40 ---
> .../gpu/drm/xe/xe_gt_tlb_invalidation_types.h | 32 ---
> drivers/gpu/drm/xe/xe_gt_types.h | 31 +--
> drivers/gpu/drm/xe/xe_guc_ct.c | 8 +-
> drivers/gpu/drm/xe/xe_lmtt.c | 12 +-
> drivers/gpu/drm/xe/xe_migrate.c | 6 +-
> drivers/gpu/drm/xe/xe_pci.c | 6 +-
> drivers/gpu/drm/xe/xe_pci_types.h | 2 +-
> drivers/gpu/drm/xe/xe_pt.c | 61 ++---
> drivers/gpu/drm/xe/xe_svm.c | 4 +-
> drivers/gpu/drm/xe/xe_trace.h | 40 +--
> drivers/gpu/drm/xe/xe_vm.c | 64 +++--
> drivers/gpu/drm/xe/xe_vm.h | 4 +-
> 22 files changed, 325 insertions(+), 349 deletions(-)
> rename drivers/gpu/drm/xe/{xe_gt_tlb_invalidation.c =>
> xe_gt_tlb_inval.c} (62%)
> create mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_inval.h
> create mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
> delete mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
> delete mode 100644 drivers/gpu/drm/xe/xe_gt_tlb_invalidation_types.h
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✗ CI.checkpatch: warning for Basic TLB inval refactor
2025-07-15 21:21 [PATCH 0/4] Basic TLB inval refactor stuartsummers
` (4 preceding siblings ...)
2025-07-15 21:26 ` [PATCH 0/4] Basic TLB inval refactor Summers, Stuart
@ 2025-07-15 21:51 ` Patchwork
2025-07-15 21:52 ` ✓ CI.KUnit: success " Patchwork
2025-07-16 10:06 ` ✗ Xe.CI.Full: failure " Patchwork
7 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2025-07-15 21:51 UTC (permalink / raw)
To: Summers, Stuart; +Cc: intel-xe
== Series Details ==
Series: Basic TLB inval refactor
URL : https://patchwork.freedesktop.org/series/151670/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
43254c2aa575037fc031c7ac21b0d031c700b2bf
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit b152feba79f272a417d0b3a97dea798bb7f4ae2d
Author: Matthew Brost <matthew.brost@intel.com>
Date: Tue Jul 15 21:21:25 2025 +0000
drm/xe: Add xe_tlb_inval structure
Extract TLB invalidation state into a structure to decouple TLB
invalidations from the GT, allowing the structure to be embedded
anywhere in the driver.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
+ /mt/dim checkpatch 394c972916ad8aa294c31fee993bde243b786bac drm-intel
f20f85b034a0 drm/xe: Explicitly mark migration queues with flag
2b673f231f04 drm/xe: Remove unused GT TLB invalidation trace points
c5db8ec0dc90 drm/xe: s/tlb_invalidation/tlb_inval
-:118: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#118:
rename from drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
total: 0 errors, 1 warnings, 0 checks, 1127 lines checked
b152feba79f2 drm/xe: Add xe_tlb_inval structure
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ CI.KUnit: success for Basic TLB inval refactor
2025-07-15 21:21 [PATCH 0/4] Basic TLB inval refactor stuartsummers
` (5 preceding siblings ...)
2025-07-15 21:51 ` ✗ CI.checkpatch: warning for " Patchwork
@ 2025-07-15 21:52 ` Patchwork
2025-07-16 10:06 ` ✗ Xe.CI.Full: failure " Patchwork
7 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2025-07-15 21:52 UTC (permalink / raw)
To: Summers, Stuart; +Cc: intel-xe
== Series Details ==
Series: Basic TLB inval refactor
URL : https://patchwork.freedesktop.org/series/151670/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[21:51:30] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:51:35] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[21:52:09] Starting KUnit Kernel (1/1)...
[21:52:09] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:52:09] ================== guc_buf (11 subtests) ===================
[21:52:09] [PASSED] test_smallest
[21:52:09] [PASSED] test_largest
[21:52:09] [PASSED] test_granular
[21:52:09] [PASSED] test_unique
[21:52:09] [PASSED] test_overlap
[21:52:09] [PASSED] test_reusable
[21:52:09] [PASSED] test_too_big
[21:52:09] [PASSED] test_flush
[21:52:09] [PASSED] test_lookup
[21:52:09] [PASSED] test_data
[21:52:09] [PASSED] test_class
[21:52:09] ===================== [PASSED] guc_buf =====================
[21:52:09] =================== guc_dbm (7 subtests) ===================
[21:52:09] [PASSED] test_empty
[21:52:09] [PASSED] test_default
[21:52:09] ======================== test_size ========================
[21:52:09] [PASSED] 4
[21:52:09] [PASSED] 8
[21:52:09] [PASSED] 32
[21:52:09] [PASSED] 256
[21:52:09] ==================== [PASSED] test_size ====================
[21:52:09] ======================= test_reuse ========================
[21:52:09] [PASSED] 4
[21:52:09] [PASSED] 8
[21:52:09] [PASSED] 32
[21:52:09] [PASSED] 256
[21:52:09] =================== [PASSED] test_reuse ====================
[21:52:09] =================== test_range_overlap ====================
[21:52:09] [PASSED] 4
[21:52:09] [PASSED] 8
[21:52:09] [PASSED] 32
[21:52:09] [PASSED] 256
[21:52:09] =============== [PASSED] test_range_overlap ================
[21:52:09] =================== test_range_compact ====================
[21:52:09] [PASSED] 4
[21:52:09] [PASSED] 8
[21:52:09] [PASSED] 32
[21:52:09] [PASSED] 256
[21:52:09] =============== [PASSED] test_range_compact ================
[21:52:09] ==================== test_range_spare =====================
[21:52:09] [PASSED] 4
[21:52:09] [PASSED] 8
[21:52:09] [PASSED] 32
[21:52:09] [PASSED] 256
[21:52:09] ================ [PASSED] test_range_spare =================
[21:52:09] ===================== [PASSED] guc_dbm =====================
[21:52:09] =================== guc_idm (6 subtests) ===================
[21:52:09] [PASSED] bad_init
[21:52:09] [PASSED] no_init
[21:52:09] [PASSED] init_fini
[21:52:09] [PASSED] check_used
[21:52:09] [PASSED] check_quota
[21:52:09] [PASSED] check_all
[21:52:09] ===================== [PASSED] guc_idm =====================
[21:52:09] ================== no_relay (3 subtests) ===================
[21:52:09] [PASSED] xe_drops_guc2pf_if_not_ready
[21:52:09] [PASSED] xe_drops_guc2vf_if_not_ready
[21:52:09] [PASSED] xe_rejects_send_if_not_ready
[21:52:09] ==================== [PASSED] no_relay =====================
[21:52:09] ================== pf_relay (14 subtests) ==================
[21:52:09] [PASSED] pf_rejects_guc2pf_too_short
[21:52:09] [PASSED] pf_rejects_guc2pf_too_long
[21:52:09] [PASSED] pf_rejects_guc2pf_no_payload
[21:52:09] [PASSED] pf_fails_no_payload
[21:52:09] [PASSED] pf_fails_bad_origin
[21:52:09] [PASSED] pf_fails_bad_type
[21:52:09] [PASSED] pf_txn_reports_error
[21:52:09] [PASSED] pf_txn_sends_pf2guc
[21:52:09] [PASSED] pf_sends_pf2guc
[21:52:09] [SKIPPED] pf_loopback_nop
[21:52:09] [SKIPPED] pf_loopback_echo
[21:52:09] [SKIPPED] pf_loopback_fail
[21:52:09] [SKIPPED] pf_loopback_busy
[21:52:09] [SKIPPED] pf_loopback_retry
[21:52:09] ==================== [PASSED] pf_relay =====================
[21:52:09] ================== vf_relay (3 subtests) ===================
[21:52:09] [PASSED] vf_rejects_guc2vf_too_short
[21:52:09] [PASSED] vf_rejects_guc2vf_too_long
[21:52:09] [PASSED] vf_rejects_guc2vf_no_payload
[21:52:09] ==================== [PASSED] vf_relay =====================
[21:52:09] ===================== lmtt (1 subtest) =====================
[21:52:09] ======================== test_ops =========================
[21:52:09] [PASSED] 2-level
[21:52:09] [PASSED] multi-level
[21:52:09] ==================== [PASSED] test_ops =====================
[21:52:09] ====================== [PASSED] lmtt =======================
[21:52:09] ================= pf_service (11 subtests) =================
[21:52:09] [PASSED] pf_negotiate_any
[21:52:09] [PASSED] pf_negotiate_base_match
[21:52:09] [PASSED] pf_negotiate_base_newer
[21:52:09] [PASSED] pf_negotiate_base_next
[21:52:09] [SKIPPED] pf_negotiate_base_older
[21:52:09] [PASSED] pf_negotiate_base_prev
[21:52:09] [PASSED] pf_negotiate_latest_match
[21:52:09] [PASSED] pf_negotiate_latest_newer
[21:52:09] [PASSED] pf_negotiate_latest_next
[21:52:09] [SKIPPED] pf_negotiate_latest_older
[21:52:09] [SKIPPED] pf_negotiate_latest_prev
[21:52:09] =================== [PASSED] pf_service ====================
[21:52:09] =================== xe_mocs (2 subtests) ===================
[21:52:09] ================ xe_live_mocs_kernel_kunit ================
[21:52:09] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[21:52:09] ================ xe_live_mocs_reset_kunit =================
[21:52:09] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[21:52:09] ==================== [SKIPPED] xe_mocs =====================
[21:52:09] ================= xe_migrate (2 subtests) ==================
[21:52:09] ================= xe_migrate_sanity_kunit =================
[21:52:09] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[21:52:09] ================== xe_validate_ccs_kunit ==================
[21:52:09] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[21:52:09] =================== [SKIPPED] xe_migrate ===================
[21:52:09] ================== xe_dma_buf (1 subtest) ==================
[21:52:09] ==================== xe_dma_buf_kunit =====================
[21:52:09] ================ [SKIPPED] xe_dma_buf_kunit ================
[21:52:09] =================== [SKIPPED] xe_dma_buf ===================
[21:52:09] ================= xe_bo_shrink (1 subtest) =================
[21:52:09] =================== xe_bo_shrink_kunit ====================
[21:52:09] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[21:52:09] ================== [SKIPPED] xe_bo_shrink ==================
[21:52:09] ==================== xe_bo (2 subtests) ====================
[21:52:09] ================== xe_ccs_migrate_kunit ===================
[21:52:09] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[21:52:09] ==================== xe_bo_evict_kunit ====================
[21:52:09] =============== [SKIPPED] xe_bo_evict_kunit ================
[21:52:09] ===================== [SKIPPED] xe_bo ======================
[21:52:09] ==================== args (11 subtests) ====================
[21:52:09] [PASSED] count_args_test
[21:52:09] [PASSED] call_args_example
[21:52:09] [PASSED] call_args_test
[21:52:09] [PASSED] drop_first_arg_example
[21:52:09] [PASSED] drop_first_arg_test
[21:52:09] [PASSED] first_arg_example
[21:52:09] [PASSED] first_arg_test
[21:52:09] [PASSED] last_arg_example
[21:52:09] [PASSED] last_arg_test
[21:52:09] [PASSED] pick_arg_example
[21:52:09] [PASSED] sep_comma_example
[21:52:09] ====================== [PASSED] args =======================
[21:52:09] =================== xe_pci (3 subtests) ====================
[21:52:09] ==================== check_graphics_ip ====================
[21:52:09] [PASSED] 12.70 Xe_LPG
[21:52:09] [PASSED] 12.71 Xe_LPG
[21:52:09] [PASSED] 12.74 Xe_LPG+
[21:52:09] [PASSED] 20.01 Xe2_HPG
[21:52:09] [PASSED] 20.02 Xe2_HPG
[21:52:09] [PASSED] 20.04 Xe2_LPG
[21:52:09] [PASSED] 30.00 Xe3_LPG
[21:52:09] [PASSED] 30.01 Xe3_LPG
[21:52:09] [PASSED] 30.03 Xe3_LPG
[21:52:09] ================ [PASSED] check_graphics_ip ================
[21:52:09] ===================== check_media_ip ======================
[21:52:09] [PASSED] 13.00 Xe_LPM+
[21:52:09] [PASSED] 13.01 Xe2_HPM
[21:52:09] [PASSED] 20.00 Xe2_LPM
[21:52:09] [PASSED] 30.00 Xe3_LPM
[21:52:09] [PASSED] 30.02 Xe3_LPM
[21:52:09] ================= [PASSED] check_media_ip ==================
[21:52:09] ================= check_platform_gt_count =================
[21:52:09] [PASSED] 0x9A60 (TIGERLAKE)
[21:52:09] [PASSED] 0x9A68 (TIGERLAKE)
[21:52:09] [PASSED] 0x9A70 (TIGERLAKE)
[21:52:09] [PASSED] 0x9A40 (TIGERLAKE)
[21:52:09] [PASSED] 0x9A49 (TIGERLAKE)
[21:52:09] [PASSED] 0x9A59 (TIGERLAKE)
[21:52:09] [PASSED] 0x9A78 (TIGERLAKE)
[21:52:09] [PASSED] 0x9AC0 (TIGERLAKE)
[21:52:09] [PASSED] 0x9AC9 (TIGERLAKE)
[21:52:09] [PASSED] 0x9AD9 (TIGERLAKE)
[21:52:09] [PASSED] 0x9AF8 (TIGERLAKE)
[21:52:09] [PASSED] 0x4C80 (ROCKETLAKE)
[21:52:09] [PASSED] 0x4C8A (ROCKETLAKE)
[21:52:09] [PASSED] 0x4C8B (ROCKETLAKE)
[21:52:09] [PASSED] 0x4C8C (ROCKETLAKE)
[21:52:09] [PASSED] 0x4C90 (ROCKETLAKE)
[21:52:09] [PASSED] 0x4C9A (ROCKETLAKE)
[21:52:09] [PASSED] 0x4680 (ALDERLAKE_S)
[21:52:09] [PASSED] 0x4682 (ALDERLAKE_S)
[21:52:09] [PASSED] 0x4688 (ALDERLAKE_S)
[21:52:09] [PASSED] 0x468A (ALDERLAKE_S)
[21:52:09] [PASSED] 0x468B (ALDERLAKE_S)
[21:52:09] [PASSED] 0x4690 (ALDERLAKE_S)
[21:52:09] [PASSED] 0x4692 (ALDERLAKE_S)
[21:52:09] [PASSED] 0x4693 (ALDERLAKE_S)
[21:52:09] [PASSED] 0x46A0 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x46A1 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x46A2 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x46A3 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x46A6 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x46A8 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x46AA (ALDERLAKE_P)
[21:52:09] [PASSED] 0x462A (ALDERLAKE_P)
[21:52:09] [PASSED] 0x4626 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x4628 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x46B0 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x46B1 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x46B2 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x46B3 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x46C0 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x46C1 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x46C2 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x46C3 (ALDERLAKE_P)
[21:52:09] [PASSED] 0x46D0 (ALDERLAKE_N)
[21:52:09] [PASSED] 0x46D1 (ALDERLAKE_N)
[21:52:09] [PASSED] 0x46D2 (ALDERLAKE_N)
[21:52:09] [PASSED] 0x46D3 (ALDERLAKE_N)
[21:52:09] [PASSED] 0x46D4 (ALDERLAKE_N)
[21:52:09] [PASSED] 0xA721 (ALDERLAKE_P)
[21:52:09] [PASSED] 0xA7A1 (ALDERLAKE_P)
[21:52:09] [PASSED] 0xA7A9 (ALDERLAKE_P)
[21:52:09] [PASSED] 0xA7AC (ALDERLAKE_P)
[21:52:09] [PASSED] 0xA7AD (ALDERLAKE_P)
[21:52:09] [PASSED] 0xA720 (ALDERLAKE_P)
[21:52:09] [PASSED] 0xA7A0 (ALDERLAKE_P)
[21:52:09] [PASSED] 0xA7A8 (ALDERLAKE_P)
[21:52:09] [PASSED] 0xA7AA (ALDERLAKE_P)
[21:52:09] [PASSED] 0xA7AB (ALDERLAKE_P)
[21:52:09] [PASSED] 0xA780 (ALDERLAKE_S)
[21:52:09] [PASSED] 0xA781 (ALDERLAKE_S)
[21:52:09] [PASSED] 0xA782 (ALDERLAKE_S)
[21:52:09] [PASSED] 0xA783 (ALDERLAKE_S)
[21:52:09] [PASSED] 0xA788 (ALDERLAKE_S)
[21:52:09] [PASSED] 0xA789 (ALDERLAKE_S)
[21:52:09] [PASSED] 0xA78A (ALDERLAKE_S)
[21:52:09] [PASSED] 0xA78B (ALDERLAKE_S)
[21:52:09] [PASSED] 0x4905 (DG1)
[21:52:09] [PASSED] 0x4906 (DG1)
[21:52:09] [PASSED] 0x4907 (DG1)
[21:52:09] [PASSED] 0x4908 (DG1)
[21:52:09] [PASSED] 0x4909 (DG1)
[21:52:09] [PASSED] 0x56C0 (DG2)
[21:52:09] [PASSED] 0x56C2 (DG2)
[21:52:09] [PASSED] 0x56C1 (DG2)
[21:52:09] [PASSED] 0x7D51 (METEORLAKE)
[21:52:09] [PASSED] 0x7DD1 (METEORLAKE)
[21:52:09] [PASSED] 0x7D41 (METEORLAKE)
[21:52:09] [PASSED] 0x7D67 (METEORLAKE)
[21:52:09] [PASSED] 0xB640 (METEORLAKE)
[21:52:09] [PASSED] 0x56A0 (DG2)
[21:52:09] [PASSED] 0x56A1 (DG2)
[21:52:09] [PASSED] 0x56A2 (DG2)
[21:52:09] [PASSED] 0x56BE (DG2)
[21:52:09] [PASSED] 0x56BF (DG2)
[21:52:09] [PASSED] 0x5690 (DG2)
[21:52:09] [PASSED] 0x5691 (DG2)
[21:52:09] [PASSED] 0x5692 (DG2)
[21:52:09] [PASSED] 0x56A5 (DG2)
[21:52:09] [PASSED] 0x56A6 (DG2)
[21:52:09] [PASSED] 0x56B0 (DG2)
[21:52:09] [PASSED] 0x56B1 (DG2)
[21:52:09] [PASSED] 0x56BA (DG2)
[21:52:09] [PASSED] 0x56BB (DG2)
[21:52:09] [PASSED] 0x56BC (DG2)
[21:52:09] [PASSED] 0x56BD (DG2)
[21:52:09] [PASSED] 0x5693 (DG2)
[21:52:09] [PASSED] 0x5694 (DG2)
[21:52:09] [PASSED] 0x5695 (DG2)
[21:52:09] [PASSED] 0x56A3 (DG2)
[21:52:09] [PASSED] 0x56A4 (DG2)
[21:52:09] [PASSED] 0x56B2 (DG2)
[21:52:09] [PASSED] 0x56B3 (DG2)
[21:52:09] [PASSED] 0x5696 (DG2)
[21:52:09] [PASSED] 0x5697 (DG2)
[21:52:09] [PASSED] 0xB69 (PVC)
[21:52:09] [PASSED] 0xB6E (PVC)
[21:52:09] [PASSED] 0xBD4 (PVC)
[21:52:09] [PASSED] 0xBD5 (PVC)
[21:52:09] [PASSED] 0xBD6 (PVC)
[21:52:09] [PASSED] 0xBD7 (PVC)
[21:52:09] [PASSED] 0xBD8 (PVC)
[21:52:09] [PASSED] 0xBD9 (PVC)
[21:52:09] [PASSED] 0xBDA (PVC)
[21:52:09] [PASSED] 0xBDB (PVC)
[21:52:09] [PASSED] 0xBE0 (PVC)
[21:52:09] [PASSED] 0xBE1 (PVC)
[21:52:09] [PASSED] 0xBE5 (PVC)
[21:52:09] [PASSED] 0x7D40 (METEORLAKE)
[21:52:09] [PASSED] 0x7D45 (METEORLAKE)
[21:52:09] [PASSED] 0x7D55 (METEORLAKE)
[21:52:09] [PASSED] 0x7D60 (METEORLAKE)
[21:52:09] [PASSED] 0x7DD5 (METEORLAKE)
[21:52:09] [PASSED] 0x6420 (LUNARLAKE)
[21:52:09] [PASSED] 0x64A0 (LUNARLAKE)
[21:52:09] [PASSED] 0x64B0 (LUNARLAKE)
[21:52:09] [PASSED] 0xE202 (BATTLEMAGE)
[21:52:09] [PASSED] 0xE209 (BATTLEMAGE)
[21:52:09] [PASSED] 0xE20B (BATTLEMAGE)
[21:52:09] [PASSED] 0xE20C (BATTLEMAGE)
[21:52:09] [PASSED] 0xE20D (BATTLEMAGE)
[21:52:09] [PASSED] 0xE210 (BATTLEMAGE)
[21:52:09] [PASSED] 0xE211 (BATTLEMAGE)
[21:52:09] [PASSED] 0xE212 (BATTLEMAGE)
[21:52:09] [PASSED] 0xE216 (BATTLEMAGE)
[21:52:09] [PASSED] 0xE220 (BATTLEMAGE)
[21:52:09] [PASSED] 0xE221 (BATTLEMAGE)
[21:52:09] [PASSED] 0xE222 (BATTLEMAGE)
[21:52:09] [PASSED] 0xE223 (BATTLEMAGE)
[21:52:09] [PASSED] 0xB080 (PANTHERLAKE)
[21:52:09] [PASSED] 0xB081 (PANTHERLAKE)
[21:52:09] [PASSED] 0xB082 (PANTHERLAKE)
[21:52:09] [PASSED] 0xB083 (PANTHERLAKE)
[21:52:09] [PASSED] 0xB084 (PANTHERLAKE)
[21:52:09] [PASSED] 0xB085 (PANTHERLAKE)
[21:52:09] [PASSED] 0xB086 (PANTHERLAKE)
[21:52:09] [PASSED] 0xB087 (PANTHERLAKE)
[21:52:09] [PASSED] 0xB08F (PANTHERLAKE)
[21:52:09] [PASSED] 0xB090 (PANTHERLAKE)
[21:52:09] [PASSED] 0xB0A0 (PANTHERLAKE)
[21:52:09] [PASSED] 0xB0B0 (PANTHERLAKE)
[21:52:09] [PASSED] 0xFD80 (PANTHERLAKE)
[21:52:09] [PASSED] 0xFD81 (PANTHERLAKE)
[21:52:09] ============= [PASSED] check_platform_gt_count =============
[21:52:09] ===================== [PASSED] xe_pci ======================
[21:52:09] =================== xe_rtp (2 subtests) ====================
[21:52:09] =============== xe_rtp_process_to_sr_tests ================
[21:52:09] [PASSED] coalesce-same-reg
[21:52:09] [PASSED] no-match-no-add
[21:52:09] [PASSED] match-or
[21:52:09] [PASSED] match-or-xfail
[21:52:09] [PASSED] no-match-no-add-multiple-rules
[21:52:09] [PASSED] two-regs-two-entries
[21:52:09] [PASSED] clr-one-set-other
[21:52:09] [PASSED] set-field
[21:52:09] [PASSED] conflict-duplicate
[21:52:09] [PASSED] conflict-not-disjoint
[21:52:09] [PASSED] conflict-reg-type
[21:52:09] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[21:52:09] ================== xe_rtp_process_tests ===================
[21:52:09] [PASSED] active1
[21:52:09] [PASSED] active2
[21:52:09] [PASSED] active-inactive
[21:52:09] [PASSED] inactive-active
[21:52:09] [PASSED] inactive-1st_or_active-inactive
[21:52:09] [PASSED] inactive-2nd_or_active-inactive
[21:52:09] [PASSED] inactive-last_or_active-inactive
[21:52:09] [PASSED] inactive-no_or_active-inactive
[21:52:09] ============== [PASSED] xe_rtp_process_tests ===============
[21:52:09] ===================== [PASSED] xe_rtp ======================
[21:52:09] ==================== xe_wa (1 subtest) =====================
[21:52:09] ======================== xe_wa_gt =========================
[21:52:09] [PASSED] TIGERLAKE (B0)
[21:52:09] [PASSED] DG1 (A0)
[21:52:09] [PASSED] DG1 (B0)
[21:52:09] [PASSED] ALDERLAKE_S (A0)
[21:52:09] [PASSED] ALDERLAKE_S (B0)
[21:52:09] [PASSED] ALDERLAKE_S (C0)
[21:52:09] [PASSED] ALDERLAKE_S (D0)
[21:52:09] [PASSED] ALDERLAKE_P (A0)
[21:52:09] [PASSED] ALDERLAKE_P (B0)
[21:52:09] [PASSED] ALDERLAKE_P (C0)
[21:52:09] [PASSED] ALDERLAKE_S_RPLS (D0)
[21:52:09] [PASSED] ALDERLAKE_P_RPLU (E0)
[21:52:09] [PASSED] DG2_G10 (C0)
[21:52:09] [PASSED] DG2_G11 (B1)
[21:52:09] [PASSED] DG2_G12 (A1)
[21:52:09] [PASSED] METEORLAKE (g:A0, m:A0)
[21:52:09] [PASSED] METEORLAKE (g:A0, m:A0)
[21:52:09] [PASSED] METEORLAKE (g:A0, m:A0)
[21:52:09] [PASSED] LUNARLAKE (g:A0, m:A0)
[21:52:09] [PASSED] LUNARLAKE (g:B0, m:A0)
stty: 'standard input': Inappropriate ioctl for device
[21:52:09] [PASSED] BATTLEMAGE (g:A0, m:A1)
[21:52:09] ==================== [PASSED] xe_wa_gt =====================
[21:52:09] ====================== [PASSED] xe_wa ======================
[21:52:09] ============================================================
[21:52:09] Testing complete. Ran 297 tests: passed: 281, skipped: 16
[21:52:10] Elapsed time: 39.293s total, 4.978s configuring, 33.949s building, 0.315s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[21:52:10] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:52:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[21:52:37] Starting KUnit Kernel (1/1)...
[21:52:37] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:52:37] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[21:52:37] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[21:52:37] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[21:52:37] =========== drm_validate_clone_mode (2 subtests) ===========
[21:52:37] ============== drm_test_check_in_clone_mode ===============
[21:52:37] [PASSED] in_clone_mode
[21:52:37] [PASSED] not_in_clone_mode
[21:52:37] ========== [PASSED] drm_test_check_in_clone_mode ===========
[21:52:37] =============== drm_test_check_valid_clones ===============
[21:52:37] [PASSED] not_in_clone_mode
[21:52:37] [PASSED] valid_clone
[21:52:37] [PASSED] invalid_clone
[21:52:37] =========== [PASSED] drm_test_check_valid_clones ===========
[21:52:37] ============= [PASSED] drm_validate_clone_mode =============
[21:52:37] ============= drm_validate_modeset (1 subtest) =============
[21:52:37] [PASSED] drm_test_check_connector_changed_modeset
[21:52:37] ============== [PASSED] drm_validate_modeset ===============
[21:52:37] ====== drm_test_bridge_get_current_state (2 subtests) ======
[21:52:37] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[21:52:37] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[21:52:37] ======== [PASSED] drm_test_bridge_get_current_state ========
[21:52:37] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[21:52:37] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[21:52:37] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[21:52:37] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[21:52:37] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[21:52:37] ============== drm_bridge_alloc (2 subtests) ===============
[21:52:37] [PASSED] drm_test_drm_bridge_alloc_basic
[21:52:37] [PASSED] drm_test_drm_bridge_alloc_get_put
[21:52:37] ================ [PASSED] drm_bridge_alloc =================
[21:52:37] ================== drm_buddy (7 subtests) ==================
[21:52:37] [PASSED] drm_test_buddy_alloc_limit
[21:52:37] [PASSED] drm_test_buddy_alloc_optimistic
[21:52:37] [PASSED] drm_test_buddy_alloc_pessimistic
[21:52:37] [PASSED] drm_test_buddy_alloc_pathological
[21:52:37] [PASSED] drm_test_buddy_alloc_contiguous
[21:52:37] [PASSED] drm_test_buddy_alloc_clear
[21:52:37] [PASSED] drm_test_buddy_alloc_range_bias
[21:52:37] ==================== [PASSED] drm_buddy ====================
[21:52:37] ============= drm_cmdline_parser (40 subtests) =============
[21:52:37] [PASSED] drm_test_cmdline_force_d_only
[21:52:37] [PASSED] drm_test_cmdline_force_D_only_dvi
[21:52:37] [PASSED] drm_test_cmdline_force_D_only_hdmi
[21:52:37] [PASSED] drm_test_cmdline_force_D_only_not_digital
[21:52:37] [PASSED] drm_test_cmdline_force_e_only
[21:52:37] [PASSED] drm_test_cmdline_res
[21:52:37] [PASSED] drm_test_cmdline_res_vesa
[21:52:37] [PASSED] drm_test_cmdline_res_vesa_rblank
[21:52:37] [PASSED] drm_test_cmdline_res_rblank
[21:52:37] [PASSED] drm_test_cmdline_res_bpp
[21:52:37] [PASSED] drm_test_cmdline_res_refresh
[21:52:37] [PASSED] drm_test_cmdline_res_bpp_refresh
[21:52:37] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[21:52:37] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[21:52:37] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[21:52:37] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[21:52:37] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[21:52:37] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[21:52:37] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[21:52:37] [PASSED] drm_test_cmdline_res_margins_force_on
[21:52:37] [PASSED] drm_test_cmdline_res_vesa_margins
[21:52:37] [PASSED] drm_test_cmdline_name
[21:52:37] [PASSED] drm_test_cmdline_name_bpp
[21:52:37] [PASSED] drm_test_cmdline_name_option
[21:52:37] [PASSED] drm_test_cmdline_name_bpp_option
[21:52:37] [PASSED] drm_test_cmdline_rotate_0
[21:52:37] [PASSED] drm_test_cmdline_rotate_90
[21:52:37] [PASSED] drm_test_cmdline_rotate_180
[21:52:37] [PASSED] drm_test_cmdline_rotate_270
[21:52:37] [PASSED] drm_test_cmdline_hmirror
[21:52:37] [PASSED] drm_test_cmdline_vmirror
[21:52:37] [PASSED] drm_test_cmdline_margin_options
[21:52:37] [PASSED] drm_test_cmdline_multiple_options
[21:52:37] [PASSED] drm_test_cmdline_bpp_extra_and_option
[21:52:37] [PASSED] drm_test_cmdline_extra_and_option
[21:52:37] [PASSED] drm_test_cmdline_freestanding_options
[21:52:37] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[21:52:37] [PASSED] drm_test_cmdline_panel_orientation
[21:52:37] ================ drm_test_cmdline_invalid =================
[21:52:37] [PASSED] margin_only
[21:52:37] [PASSED] interlace_only
[21:52:37] [PASSED] res_missing_x
[21:52:37] [PASSED] res_missing_y
[21:52:37] [PASSED] res_bad_y
[21:52:37] [PASSED] res_missing_y_bpp
[21:52:37] [PASSED] res_bad_bpp
[21:52:37] [PASSED] res_bad_refresh
[21:52:37] [PASSED] res_bpp_refresh_force_on_off
[21:52:37] [PASSED] res_invalid_mode
[21:52:37] [PASSED] res_bpp_wrong_place_mode
[21:52:37] [PASSED] name_bpp_refresh
[21:52:37] [PASSED] name_refresh
[21:52:37] [PASSED] name_refresh_wrong_mode
[21:52:37] [PASSED] name_refresh_invalid_mode
[21:52:37] [PASSED] rotate_multiple
[21:52:37] [PASSED] rotate_invalid_val
[21:52:37] [PASSED] rotate_truncated
[21:52:37] [PASSED] invalid_option
[21:52:37] [PASSED] invalid_tv_option
[21:52:37] [PASSED] truncated_tv_option
[21:52:37] ============ [PASSED] drm_test_cmdline_invalid =============
[21:52:37] =============== drm_test_cmdline_tv_options ===============
[21:52:37] [PASSED] NTSC
[21:52:37] [PASSED] NTSC_443
[21:52:37] [PASSED] NTSC_J
[21:52:37] [PASSED] PAL
[21:52:37] [PASSED] PAL_M
[21:52:37] [PASSED] PAL_N
[21:52:37] [PASSED] SECAM
[21:52:37] [PASSED] MONO_525
[21:52:37] [PASSED] MONO_625
[21:52:37] =========== [PASSED] drm_test_cmdline_tv_options ===========
[21:52:37] =============== [PASSED] drm_cmdline_parser ================
[21:52:37] ========== drmm_connector_hdmi_init (20 subtests) ==========
[21:52:37] [PASSED] drm_test_connector_hdmi_init_valid
[21:52:37] [PASSED] drm_test_connector_hdmi_init_bpc_8
[21:52:37] [PASSED] drm_test_connector_hdmi_init_bpc_10
[21:52:37] [PASSED] drm_test_connector_hdmi_init_bpc_12
[21:52:37] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[21:52:37] [PASSED] drm_test_connector_hdmi_init_bpc_null
[21:52:37] [PASSED] drm_test_connector_hdmi_init_formats_empty
[21:52:37] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[21:52:37] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:52:37] [PASSED] supported_formats=0x9 yuv420_allowed=1
[21:52:37] [PASSED] supported_formats=0x9 yuv420_allowed=0
[21:52:37] [PASSED] supported_formats=0x3 yuv420_allowed=1
[21:52:37] [PASSED] supported_formats=0x3 yuv420_allowed=0
[21:52:37] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:52:37] [PASSED] drm_test_connector_hdmi_init_null_ddc
[21:52:37] [PASSED] drm_test_connector_hdmi_init_null_product
[21:52:37] [PASSED] drm_test_connector_hdmi_init_null_vendor
[21:52:37] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[21:52:37] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[21:52:37] [PASSED] drm_test_connector_hdmi_init_product_valid
[21:52:37] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[21:52:37] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[21:52:37] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[21:52:37] ========= drm_test_connector_hdmi_init_type_valid =========
[21:52:37] [PASSED] HDMI-A
[21:52:37] [PASSED] HDMI-B
[21:52:37] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[21:52:37] ======== drm_test_connector_hdmi_init_type_invalid ========
[21:52:37] [PASSED] Unknown
[21:52:37] [PASSED] VGA
[21:52:37] [PASSED] DVI-I
[21:52:37] [PASSED] DVI-D
[21:52:37] [PASSED] DVI-A
[21:52:37] [PASSED] Composite
[21:52:37] [PASSED] SVIDEO
[21:52:37] [PASSED] LVDS
[21:52:37] [PASSED] Component
[21:52:37] [PASSED] DIN
[21:52:37] [PASSED] DP
[21:52:37] [PASSED] TV
[21:52:37] [PASSED] eDP
[21:52:37] [PASSED] Virtual
[21:52:37] [PASSED] DSI
[21:52:37] [PASSED] DPI
[21:52:37] [PASSED] Writeback
[21:52:37] [PASSED] SPI
[21:52:37] [PASSED] USB
[21:52:37] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[21:52:37] ============ [PASSED] drmm_connector_hdmi_init =============
[21:52:37] ============= drmm_connector_init (3 subtests) =============
[21:52:37] [PASSED] drm_test_drmm_connector_init
[21:52:37] [PASSED] drm_test_drmm_connector_init_null_ddc
[21:52:37] ========= drm_test_drmm_connector_init_type_valid =========
[21:52:37] [PASSED] Unknown
[21:52:37] [PASSED] VGA
[21:52:37] [PASSED] DVI-I
[21:52:37] [PASSED] DVI-D
[21:52:37] [PASSED] DVI-A
[21:52:37] [PASSED] Composite
[21:52:37] [PASSED] SVIDEO
[21:52:37] [PASSED] LVDS
[21:52:37] [PASSED] Component
[21:52:37] [PASSED] DIN
[21:52:37] [PASSED] DP
[21:52:37] [PASSED] HDMI-A
[21:52:37] [PASSED] HDMI-B
[21:52:37] [PASSED] TV
[21:52:37] [PASSED] eDP
[21:52:37] [PASSED] Virtual
[21:52:37] [PASSED] DSI
[21:52:37] [PASSED] DPI
[21:52:37] [PASSED] Writeback
[21:52:37] [PASSED] SPI
[21:52:37] [PASSED] USB
[21:52:37] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[21:52:37] =============== [PASSED] drmm_connector_init ===============
[21:52:37] ========= drm_connector_dynamic_init (6 subtests) ==========
[21:52:37] [PASSED] drm_test_drm_connector_dynamic_init
[21:52:37] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[21:52:37] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[21:52:37] [PASSED] drm_test_drm_connector_dynamic_init_properties
[21:52:37] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[21:52:37] [PASSED] Unknown
[21:52:37] [PASSED] VGA
[21:52:37] [PASSED] DVI-I
[21:52:37] [PASSED] DVI-D
[21:52:37] [PASSED] DVI-A
[21:52:37] [PASSED] Composite
[21:52:37] [PASSED] SVIDEO
[21:52:37] [PASSED] LVDS
[21:52:37] [PASSED] Component
[21:52:37] [PASSED] DIN
[21:52:37] [PASSED] DP
[21:52:37] [PASSED] HDMI-A
[21:52:37] [PASSED] HDMI-B
[21:52:37] [PASSED] TV
[21:52:37] [PASSED] eDP
[21:52:37] [PASSED] Virtual
[21:52:37] [PASSED] DSI
[21:52:37] [PASSED] DPI
[21:52:37] [PASSED] Writeback
[21:52:37] [PASSED] SPI
[21:52:37] [PASSED] USB
[21:52:37] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[21:52:37] ======== drm_test_drm_connector_dynamic_init_name =========
[21:52:37] [PASSED] Unknown
[21:52:37] [PASSED] VGA
[21:52:37] [PASSED] DVI-I
[21:52:37] [PASSED] DVI-D
[21:52:37] [PASSED] DVI-A
[21:52:37] [PASSED] Composite
[21:52:37] [PASSED] SVIDEO
[21:52:37] [PASSED] LVDS
[21:52:37] [PASSED] Component
[21:52:37] [PASSED] DIN
[21:52:37] [PASSED] DP
[21:52:37] [PASSED] HDMI-A
[21:52:37] [PASSED] HDMI-B
[21:52:37] [PASSED] TV
[21:52:37] [PASSED] eDP
[21:52:37] [PASSED] Virtual
[21:52:37] [PASSED] DSI
[21:52:37] [PASSED] DPI
[21:52:37] [PASSED] Writeback
[21:52:37] [PASSED] SPI
[21:52:37] [PASSED] USB
[21:52:37] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[21:52:37] =========== [PASSED] drm_connector_dynamic_init ============
[21:52:37] ==== drm_connector_dynamic_register_early (4 subtests) =====
[21:52:37] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[21:52:37] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[21:52:37] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[21:52:37] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[21:52:37] ====== [PASSED] drm_connector_dynamic_register_early =======
[21:52:37] ======= drm_connector_dynamic_register (7 subtests) ========
[21:52:37] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[21:52:37] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[21:52:37] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[21:52:37] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[21:52:37] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[21:52:37] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[21:52:37] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[21:52:37] ========= [PASSED] drm_connector_dynamic_register ==========
[21:52:37] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[21:52:37] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[21:52:37] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[21:52:37] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[21:52:37] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[21:52:37] ========== drm_test_get_tv_mode_from_name_valid ===========
[21:52:37] [PASSED] NTSC
[21:52:37] [PASSED] NTSC-443
[21:52:37] [PASSED] NTSC-J
[21:52:37] [PASSED] PAL
[21:52:37] [PASSED] PAL-M
[21:52:37] [PASSED] PAL-N
[21:52:37] [PASSED] SECAM
[21:52:37] [PASSED] Mono
[21:52:37] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[21:52:37] [PASSED] drm_test_get_tv_mode_from_name_truncated
[21:52:37] ============ [PASSED] drm_get_tv_mode_from_name ============
[21:52:37] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[21:52:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[21:52:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[21:52:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[21:52:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[21:52:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[21:52:37] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[21:52:37] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[21:52:37] [PASSED] VIC 96
[21:52:37] [PASSED] VIC 97
[21:52:37] [PASSED] VIC 101
[21:52:37] [PASSED] VIC 102
[21:52:37] [PASSED] VIC 106
[21:52:37] [PASSED] VIC 107
[21:52:37] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[21:52:37] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[21:52:37] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[21:52:37] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[21:52:37] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[21:52:37] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[21:52:37] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[21:52:37] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[21:52:37] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[21:52:37] [PASSED] Automatic
[21:52:37] [PASSED] Full
[21:52:37] [PASSED] Limited 16:235
[21:52:37] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[21:52:37] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[21:52:37] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[21:52:37] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[21:52:37] === drm_test_drm_hdmi_connector_get_output_format_name ====
[21:52:37] [PASSED] RGB
[21:52:37] [PASSED] YUV 4:2:0
[21:52:37] [PASSED] YUV 4:2:2
[21:52:37] [PASSED] YUV 4:4:4
[21:52:37] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[21:52:37] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[21:52:37] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[21:52:37] ============= drm_damage_helper (21 subtests) ==============
[21:52:37] [PASSED] drm_test_damage_iter_no_damage
[21:52:37] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[21:52:37] [PASSED] drm_test_damage_iter_no_damage_src_moved
[21:52:37] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[21:52:37] [PASSED] drm_test_damage_iter_no_damage_not_visible
[21:52:37] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[21:52:37] [PASSED] drm_test_damage_iter_no_damage_no_fb
[21:52:37] [PASSED] drm_test_damage_iter_simple_damage
[21:52:37] [PASSED] drm_test_damage_iter_single_damage
[21:52:37] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[21:52:37] [PASSED] drm_test_damage_iter_single_damage_outside_src
[21:52:37] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[21:52:37] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[21:52:37] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[21:52:37] [PASSED] drm_test_damage_iter_single_damage_src_moved
[21:52:37] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[21:52:37] [PASSED] drm_test_damage_iter_damage
[21:52:37] [PASSED] drm_test_damage_iter_damage_one_intersect
[21:52:37] [PASSED] drm_test_damage_iter_damage_one_outside
[21:52:37] [PASSED] drm_test_damage_iter_damage_src_moved
[21:52:37] [PASSED] drm_test_damage_iter_damage_not_visible
[21:52:37] ================ [PASSED] drm_damage_helper ================
[21:52:37] ============== drm_dp_mst_helper (3 subtests) ==============
[21:52:37] ============== drm_test_dp_mst_calc_pbn_mode ==============
[21:52:37] [PASSED] Clock 154000 BPP 30 DSC disabled
[21:52:37] [PASSED] Clock 234000 BPP 30 DSC disabled
[21:52:37] [PASSED] Clock 297000 BPP 24 DSC disabled
[21:52:37] [PASSED] Clock 332880 BPP 24 DSC enabled
[21:52:37] [PASSED] Clock 324540 BPP 24 DSC enabled
[21:52:37] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[21:52:37] ============== drm_test_dp_mst_calc_pbn_div ===============
[21:52:37] [PASSED] Link rate 2000000 lane count 4
[21:52:37] [PASSED] Link rate 2000000 lane count 2
[21:52:37] [PASSED] Link rate 2000000 lane count 1
[21:52:37] [PASSED] Link rate 1350000 lane count 4
[21:52:37] [PASSED] Link rate 1350000 lane count 2
[21:52:37] [PASSED] Link rate 1350000 lane count 1
[21:52:37] [PASSED] Link rate 1000000 lane count 4
[21:52:37] [PASSED] Link rate 1000000 lane count 2
[21:52:37] [PASSED] Link rate 1000000 lane count 1
[21:52:37] [PASSED] Link rate 810000 lane count 4
[21:52:37] [PASSED] Link rate 810000 lane count 2
[21:52:37] [PASSED] Link rate 810000 lane count 1
[21:52:37] [PASSED] Link rate 540000 lane count 4
[21:52:37] [PASSED] Link rate 540000 lane count 2
[21:52:37] [PASSED] Link rate 540000 lane count 1
[21:52:37] [PASSED] Link rate 270000 lane count 4
[21:52:37] [PASSED] Link rate 270000 lane count 2
[21:52:37] [PASSED] Link rate 270000 lane count 1
[21:52:37] [PASSED] Link rate 162000 lane count 4
[21:52:37] [PASSED] Link rate 162000 lane count 2
[21:52:37] [PASSED] Link rate 162000 lane count 1
[21:52:37] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[21:52:37] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[21:52:37] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[21:52:37] [PASSED] DP_POWER_UP_PHY with port number
[21:52:37] [PASSED] DP_POWER_DOWN_PHY with port number
[21:52:37] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[21:52:37] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[21:52:37] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[21:52:37] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[21:52:37] [PASSED] DP_QUERY_PAYLOAD with port number
[21:52:37] [PASSED] DP_QUERY_PAYLOAD with VCPI
[21:52:37] [PASSED] DP_REMOTE_DPCD_READ with port number
[21:52:37] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[21:52:37] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[21:52:37] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[21:52:37] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[21:52:37] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[21:52:37] [PASSED] DP_REMOTE_I2C_READ with port number
[21:52:37] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[21:52:37] [PASSED] DP_REMOTE_I2C_READ with transactions array
[21:52:37] [PASSED] DP_REMOTE_I2C_WRITE with port number
[21:52:37] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[21:52:37] [PASSED] DP_REMOTE_I2C_WRITE with data array
[21:52:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[21:52:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[21:52:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[21:52:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[21:52:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[21:52:37] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[21:52:37] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[21:52:37] ================ [PASSED] drm_dp_mst_helper ================
[21:52:37] ================== drm_exec (7 subtests) ===================
[21:52:37] [PASSED] sanitycheck
[21:52:37] [PASSED] test_lock
[21:52:37] [PASSED] test_lock_unlock
[21:52:37] [PASSED] test_duplicates
[21:52:37] [PASSED] test_prepare
[21:52:37] [PASSED] test_prepare_array
[21:52:37] [PASSED] test_multiple_loops
[21:52:37] ==================== [PASSED] drm_exec =====================
[21:52:37] =========== drm_format_helper_test (17 subtests) ===========
[21:52:37] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[21:52:37] [PASSED] single_pixel_source_buffer
[21:52:37] [PASSED] single_pixel_clip_rectangle
[21:52:37] [PASSED] well_known_colors
[21:52:37] [PASSED] destination_pitch
[21:52:37] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[21:52:37] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[21:52:37] [PASSED] single_pixel_source_buffer
[21:52:37] [PASSED] single_pixel_clip_rectangle
[21:52:37] [PASSED] well_known_colors
[21:52:37] [PASSED] destination_pitch
[21:52:37] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[21:52:37] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[21:52:37] [PASSED] single_pixel_source_buffer
[21:52:37] [PASSED] single_pixel_clip_rectangle
[21:52:37] [PASSED] well_known_colors
[21:52:37] [PASSED] destination_pitch
[21:52:37] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[21:52:37] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[21:52:37] [PASSED] single_pixel_source_buffer
[21:52:37] [PASSED] single_pixel_clip_rectangle
[21:52:37] [PASSED] well_known_colors
[21:52:37] [PASSED] destination_pitch
[21:52:37] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[21:52:37] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[21:52:37] [PASSED] single_pixel_source_buffer
[21:52:37] [PASSED] single_pixel_clip_rectangle
[21:52:37] [PASSED] well_known_colors
[21:52:37] [PASSED] destination_pitch
[21:52:37] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[21:52:37] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[21:52:37] [PASSED] single_pixel_source_buffer
[21:52:37] [PASSED] single_pixel_clip_rectangle
[21:52:37] [PASSED] well_known_colors
[21:52:37] [PASSED] destination_pitch
[21:52:37] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[21:52:37] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[21:52:37] [PASSED] single_pixel_source_buffer
[21:52:37] [PASSED] single_pixel_clip_rectangle
[21:52:37] [PASSED] well_known_colors
[21:52:37] [PASSED] destination_pitch
[21:52:37] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[21:52:37] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[21:52:37] [PASSED] single_pixel_source_buffer
[21:52:37] [PASSED] single_pixel_clip_rectangle
[21:52:37] [PASSED] well_known_colors
[21:52:37] [PASSED] destination_pitch
[21:52:37] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[21:52:37] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[21:52:37] [PASSED] single_pixel_source_buffer
[21:52:37] [PASSED] single_pixel_clip_rectangle
[21:52:37] [PASSED] well_known_colors
[21:52:37] [PASSED] destination_pitch
[21:52:37] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[21:52:37] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[21:52:37] [PASSED] single_pixel_source_buffer
[21:52:37] [PASSED] single_pixel_clip_rectangle
[21:52:37] [PASSED] well_known_colors
[21:52:37] [PASSED] destination_pitch
[21:52:37] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[21:52:37] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[21:52:37] [PASSED] single_pixel_source_buffer
[21:52:37] [PASSED] single_pixel_clip_rectangle
[21:52:37] [PASSED] well_known_colors
[21:52:37] [PASSED] destination_pitch
[21:52:37] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[21:52:37] ============== drm_test_fb_xrgb8888_to_mono ===============
[21:52:37] [PASSED] single_pixel_source_buffer
[21:52:37] [PASSED] single_pixel_clip_rectangle
[21:52:37] [PASSED] well_known_colors
[21:52:37] [PASSED] destination_pitch
[21:52:37] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[21:52:37] ==================== drm_test_fb_swab =====================
[21:52:37] [PASSED] single_pixel_source_buffer
[21:52:37] [PASSED] single_pixel_clip_rectangle
[21:52:37] [PASSED] well_known_colors
[21:52:37] [PASSED] destination_pitch
[21:52:37] ================ [PASSED] drm_test_fb_swab =================
[21:52:37] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[21:52:37] [PASSED] single_pixel_source_buffer
[21:52:37] [PASSED] single_pixel_clip_rectangle
[21:52:37] [PASSED] well_known_colors
[21:52:37] [PASSED] destination_pitch
[21:52:37] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[21:52:37] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[21:52:37] [PASSED] single_pixel_source_buffer
[21:52:37] [PASSED] single_pixel_clip_rectangle
[21:52:37] [PASSED] well_known_colors
[21:52:37] [PASSED] destination_pitch
[21:52:37] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[21:52:37] ================= drm_test_fb_clip_offset =================
[21:52:37] [PASSED] pass through
[21:52:37] [PASSED] horizontal offset
[21:52:37] [PASSED] vertical offset
[21:52:37] [PASSED] horizontal and vertical offset
[21:52:37] [PASSED] horizontal offset (custom pitch)
[21:52:37] [PASSED] vertical offset (custom pitch)
[21:52:37] [PASSED] horizontal and vertical offset (custom pitch)
[21:52:37] ============= [PASSED] drm_test_fb_clip_offset =============
[21:52:37] =================== drm_test_fb_memcpy ====================
[21:52:37] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[21:52:37] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[21:52:37] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[21:52:37] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[21:52:37] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[21:52:37] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[21:52:37] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[21:52:37] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[21:52:37] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[21:52:37] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[21:52:37] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[21:52:37] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[21:52:37] =============== [PASSED] drm_test_fb_memcpy ================
[21:52:37] ============= [PASSED] drm_format_helper_test ==============
[21:52:37] ================= drm_format (18 subtests) =================
[21:52:37] [PASSED] drm_test_format_block_width_invalid
[21:52:37] [PASSED] drm_test_format_block_width_one_plane
[21:52:37] [PASSED] drm_test_format_block_width_two_plane
[21:52:37] [PASSED] drm_test_format_block_width_three_plane
[21:52:37] [PASSED] drm_test_format_block_width_tiled
[21:52:37] [PASSED] drm_test_format_block_height_invalid
[21:52:37] [PASSED] drm_test_format_block_height_one_plane
[21:52:37] [PASSED] drm_test_format_block_height_two_plane
[21:52:37] [PASSED] drm_test_format_block_height_three_plane
[21:52:37] [PASSED] drm_test_format_block_height_tiled
[21:52:37] [PASSED] drm_test_format_min_pitch_invalid
[21:52:37] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[21:52:37] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[21:52:37] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[21:52:37] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[21:52:37] [PASSED] drm_test_format_min_pitch_two_plane
[21:52:37] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[21:52:37] [PASSED] drm_test_format_min_pitch_tiled
[21:52:37] =================== [PASSED] drm_format ====================
[21:52:37] ============== drm_framebuffer (10 subtests) ===============
[21:52:37] ========== drm_test_framebuffer_check_src_coords ==========
[21:52:37] [PASSED] Success: source fits into fb
[21:52:37] [PASSED] Fail: overflowing fb with x-axis coordinate
[21:52:37] [PASSED] Fail: overflowing fb with y-axis coordinate
[21:52:37] [PASSED] Fail: overflowing fb with source width
[21:52:37] [PASSED] Fail: overflowing fb with source height
[21:52:37] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[21:52:37] [PASSED] drm_test_framebuffer_cleanup
[21:52:37] =============== drm_test_framebuffer_create ===============
[21:52:37] [PASSED] ABGR8888 normal sizes
[21:52:37] [PASSED] ABGR8888 max sizes
[21:52:37] [PASSED] ABGR8888 pitch greater than min required
[21:52:37] [PASSED] ABGR8888 pitch less than min required
[21:52:37] [PASSED] ABGR8888 Invalid width
[21:52:37] [PASSED] ABGR8888 Invalid buffer handle
[21:52:37] [PASSED] No pixel format
[21:52:37] [PASSED] ABGR8888 Width 0
[21:52:37] [PASSED] ABGR8888 Height 0
[21:52:37] [PASSED] ABGR8888 Out of bound height * pitch combination
[21:52:37] [PASSED] ABGR8888 Large buffer offset
[21:52:37] [PASSED] ABGR8888 Buffer offset for inexistent plane
[21:52:37] [PASSED] ABGR8888 Invalid flag
[21:52:37] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[21:52:37] [PASSED] ABGR8888 Valid buffer modifier
[21:52:37] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[21:52:37] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[21:52:37] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[21:52:37] [PASSED] NV12 Normal sizes
[21:52:37] [PASSED] NV12 Max sizes
[21:52:37] [PASSED] NV12 Invalid pitch
[21:52:37] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[21:52:37] [PASSED] NV12 different modifier per-plane
[21:52:37] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[21:52:37] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[21:52:37] [PASSED] NV12 Modifier for inexistent plane
[21:52:37] [PASSED] NV12 Handle for inexistent plane
[21:52:37] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[21:52:37] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[21:52:37] [PASSED] YVU420 Normal sizes
[21:52:37] [PASSED] YVU420 Max sizes
[21:52:37] [PASSED] YVU420 Invalid pitch
[21:52:37] [PASSED] YVU420 Different pitches
[21:52:37] [PASSED] YVU420 Different buffer offsets/pitches
[21:52:37] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[21:52:37] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[21:52:37] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[21:52:37] [PASSED] YVU420 Valid modifier
[21:52:37] [PASSED] YVU420 Different modifiers per plane
[21:52:37] [PASSED] YVU420 Modifier for inexistent plane
[21:52:37] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[21:52:37] [PASSED] X0L2 Normal sizes
[21:52:37] [PASSED] X0L2 Max sizes
[21:52:37] [PASSED] X0L2 Invalid pitch
[21:52:37] [PASSED] X0L2 Pitch greater than minimum required
[21:52:37] [PASSED] X0L2 Handle for inexistent plane
[21:52:37] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[21:52:37] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[21:52:37] [PASSED] X0L2 Valid modifier
[21:52:37] [PASSED] X0L2 Modifier for inexistent plane
[21:52:37] =========== [PASSED] drm_test_framebuffer_create ===========
[21:52:37] [PASSED] drm_test_framebuffer_free
[21:52:37] [PASSED] drm_test_framebuffer_init
[21:52:37] [PASSED] drm_test_framebuffer_init_bad_format
[21:52:37] [PASSED] drm_test_framebuffer_init_dev_mismatch
[21:52:37] [PASSED] drm_test_framebuffer_lookup
[21:52:37] [PASSED] drm_test_framebuffer_lookup_inexistent
[21:52:37] [PASSED] drm_test_framebuffer_modifiers_not_supported
[21:52:37] ================= [PASSED] drm_framebuffer =================
[21:52:37] ================ drm_gem_shmem (8 subtests) ================
[21:52:37] [PASSED] drm_gem_shmem_test_obj_create
[21:52:37] [PASSED] drm_gem_shmem_test_obj_create_private
[21:52:37] [PASSED] drm_gem_shmem_test_pin_pages
[21:52:37] [PASSED] drm_gem_shmem_test_vmap
[21:52:37] [PASSED] drm_gem_shmem_test_get_pages_sgt
[21:52:37] [PASSED] drm_gem_shmem_test_get_sg_table
[21:52:37] [PASSED] drm_gem_shmem_test_madvise
[21:52:37] [PASSED] drm_gem_shmem_test_purge
[21:52:37] ================== [PASSED] drm_gem_shmem ==================
[21:52:37] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[21:52:37] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[21:52:37] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[21:52:37] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[21:52:37] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[21:52:37] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[21:52:37] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[21:52:37] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[21:52:37] [PASSED] Automatic
[21:52:37] [PASSED] Full
[21:52:37] [PASSED] Limited 16:235
[21:52:37] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[21:52:37] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[21:52:37] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[21:52:37] [PASSED] drm_test_check_disable_connector
[21:52:37] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[21:52:37] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[21:52:37] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[21:52:37] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[21:52:37] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[21:52:37] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[21:52:37] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[21:52:37] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[21:52:37] [PASSED] drm_test_check_output_bpc_dvi
[21:52:37] [PASSED] drm_test_check_output_bpc_format_vic_1
[21:52:37] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[21:52:37] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[21:52:37] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[21:52:37] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[21:52:37] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[21:52:37] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[21:52:37] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[21:52:37] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[21:52:37] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[21:52:37] [PASSED] drm_test_check_broadcast_rgb_value
[21:52:37] [PASSED] drm_test_check_bpc_8_value
[21:52:37] [PASSED] drm_test_check_bpc_10_value
[21:52:37] [PASSED] drm_test_check_bpc_12_value
[21:52:37] [PASSED] drm_test_check_format_value
[21:52:37] [PASSED] drm_test_check_tmds_char_value
[21:52:37] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[21:52:37] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[21:52:37] [PASSED] drm_test_check_mode_valid
[21:52:37] [PASSED] drm_test_check_mode_valid_reject
[21:52:37] [PASSED] drm_test_check_mode_valid_reject_rate
[21:52:37] [PASSED] drm_test_check_mode_valid_reject_max_clock
[21:52:37] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[21:52:37] ================= drm_managed (2 subtests) =================
[21:52:37] [PASSED] drm_test_managed_release_action
[21:52:37] [PASSED] drm_test_managed_run_action
[21:52:37] =================== [PASSED] drm_managed ===================
[21:52:37] =================== drm_mm (6 subtests) ====================
[21:52:37] [PASSED] drm_test_mm_init
[21:52:37] [PASSED] drm_test_mm_debug
[21:52:37] [PASSED] drm_test_mm_align32
[21:52:37] [PASSED] drm_test_mm_align64
[21:52:37] [PASSED] drm_test_mm_lowest
[21:52:37] [PASSED] drm_test_mm_highest
[21:52:37] ===================== [PASSED] drm_mm ======================
[21:52:37] ============= drm_modes_analog_tv (5 subtests) =============
[21:52:37] [PASSED] drm_test_modes_analog_tv_mono_576i
[21:52:37] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[21:52:37] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[21:52:37] [PASSED] drm_test_modes_analog_tv_pal_576i
[21:52:37] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[21:52:37] =============== [PASSED] drm_modes_analog_tv ===============
[21:52:37] ============== drm_plane_helper (2 subtests) ===============
[21:52:37] =============== drm_test_check_plane_state ================
[21:52:37] [PASSED] clipping_simple
[21:52:37] [PASSED] clipping_rotate_reflect
[21:52:37] [PASSED] positioning_simple
[21:52:37] [PASSED] upscaling
[21:52:37] [PASSED] downscaling
[21:52:37] [PASSED] rounding1
[21:52:37] [PASSED] rounding2
[21:52:37] [PASSED] rounding3
[21:52:37] [PASSED] rounding4
[21:52:37] =========== [PASSED] drm_test_check_plane_state ============
[21:52:37] =========== drm_test_check_invalid_plane_state ============
[21:52:37] [PASSED] positioning_invalid
[21:52:37] [PASSED] upscaling_invalid
[21:52:37] [PASSED] downscaling_invalid
[21:52:37] ======= [PASSED] drm_test_check_invalid_plane_state ========
[21:52:37] ================ [PASSED] drm_plane_helper =================
[21:52:37] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[21:52:37] ====== drm_test_connector_helper_tv_get_modes_check =======
[21:52:37] [PASSED] None
[21:52:37] [PASSED] PAL
[21:52:37] [PASSED] NTSC
[21:52:37] [PASSED] Both, NTSC Default
[21:52:37] [PASSED] Both, PAL Default
[21:52:37] [PASSED] Both, NTSC Default, with PAL on command-line
[21:52:37] [PASSED] Both, PAL Default, with NTSC on command-line
[21:52:37] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[21:52:37] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[21:52:37] ================== drm_rect (9 subtests) ===================
[21:52:37] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[21:52:37] [PASSED] drm_test_rect_clip_scaled_not_clipped
[21:52:37] [PASSED] drm_test_rect_clip_scaled_clipped
[21:52:37] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[21:52:37] ================= drm_test_rect_intersect =================
[21:52:37] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[21:52:37] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[21:52:37] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[21:52:37] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[21:52:37] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[21:52:37] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[21:52:37] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[21:52:37] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[21:52:37] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[21:52:37] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[21:52:37] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[21:52:37] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[21:52:37] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[21:52:37] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[21:52:37] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[21:52:37] ============= [PASSED] drm_test_rect_intersect =============
[21:52:37] ================ drm_test_rect_calc_hscale ================
[21:52:37] [PASSED] normal use
[21:52:37] [PASSED] out of max range
[21:52:37] [PASSED] out of min range
[21:52:37] [PASSED] zero dst
[21:52:37] [PASSED] negative src
[21:52:37] [PASSED] negative dst
[21:52:37] ============ [PASSED] drm_test_rect_calc_hscale ============
[21:52:37] ================ drm_test_rect_calc_vscale ================
[21:52:37] [PASSED] normal use
[21:52:37] [PASSED] out of max range
[21:52:37] [PASSED] out of min range
[21:52:37] [PASSED] zero dst
[21:52:37] [PASSED] negative src
[21:52:37] [PASSED] negative dst
[21:52:37] ============ [PASSED] drm_test_rect_calc_vscale ============
[21:52:37] ================== drm_test_rect_rotate ===================
[21:52:37] [PASSED] reflect-x
[21:52:37] [PASSED] reflect-y
[21:52:37] [PASSED] rotate-0
[21:52:37] [PASSED] rotate-90
[21:52:37] [PASSED] rotate-180
[21:52:37] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[21:52:37] ============== [PASSED] drm_test_rect_rotate ===============
[21:52:37] ================ drm_test_rect_rotate_inv =================
[21:52:37] [PASSED] reflect-x
[21:52:37] [PASSED] reflect-y
[21:52:37] [PASSED] rotate-0
[21:52:37] [PASSED] rotate-90
[21:52:37] [PASSED] rotate-180
[21:52:37] [PASSED] rotate-270
[21:52:37] ============ [PASSED] drm_test_rect_rotate_inv =============
[21:52:37] ==================== [PASSED] drm_rect =====================
[21:52:37] ============ drm_sysfb_modeset_test (1 subtest) ============
[21:52:37] ============ drm_test_sysfb_build_fourcc_list =============
[21:52:37] [PASSED] no native formats
[21:52:37] [PASSED] XRGB8888 as native format
[21:52:37] [PASSED] remove duplicates
[21:52:37] [PASSED] convert alpha formats
[21:52:37] [PASSED] random formats
[21:52:37] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[21:52:37] ============= [PASSED] drm_sysfb_modeset_test ==============
[21:52:37] ============================================================
[21:52:37] Testing complete. Ran 616 tests: passed: 616
[21:52:37] Elapsed time: 27.870s total, 1.607s configuring, 26.047s building, 0.178s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[21:52:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:52:39] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[21:52:47] Starting KUnit Kernel (1/1)...
[21:52:47] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:52:47] ================= ttm_device (5 subtests) ==================
[21:52:47] [PASSED] ttm_device_init_basic
[21:52:47] [PASSED] ttm_device_init_multiple
[21:52:47] [PASSED] ttm_device_fini_basic
[21:52:47] [PASSED] ttm_device_init_no_vma_man
[21:52:47] ================== ttm_device_init_pools ==================
[21:52:47] [PASSED] No DMA allocations, no DMA32 required
[21:52:47] [PASSED] DMA allocations, DMA32 required
[21:52:47] [PASSED] No DMA allocations, DMA32 required
[21:52:47] [PASSED] DMA allocations, no DMA32 required
[21:52:47] ============== [PASSED] ttm_device_init_pools ==============
[21:52:47] =================== [PASSED] ttm_device ====================
[21:52:47] ================== ttm_pool (8 subtests) ===================
[21:52:47] ================== ttm_pool_alloc_basic ===================
[21:52:47] [PASSED] One page
[21:52:47] [PASSED] More than one page
[21:52:47] [PASSED] Above the allocation limit
[21:52:47] [PASSED] One page, with coherent DMA mappings enabled
[21:52:47] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:52:47] ============== [PASSED] ttm_pool_alloc_basic ===============
[21:52:47] ============== ttm_pool_alloc_basic_dma_addr ==============
[21:52:47] [PASSED] One page
[21:52:47] [PASSED] More than one page
[21:52:47] [PASSED] Above the allocation limit
[21:52:47] [PASSED] One page, with coherent DMA mappings enabled
[21:52:47] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:52:47] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[21:52:47] [PASSED] ttm_pool_alloc_order_caching_match
[21:52:47] [PASSED] ttm_pool_alloc_caching_mismatch
[21:52:47] [PASSED] ttm_pool_alloc_order_mismatch
[21:52:47] [PASSED] ttm_pool_free_dma_alloc
[21:52:47] [PASSED] ttm_pool_free_no_dma_alloc
[21:52:47] [PASSED] ttm_pool_fini_basic
[21:52:47] ==================== [PASSED] ttm_pool =====================
[21:52:47] ================ ttm_resource (8 subtests) =================
[21:52:47] ================= ttm_resource_init_basic =================
[21:52:47] [PASSED] Init resource in TTM_PL_SYSTEM
[21:52:47] [PASSED] Init resource in TTM_PL_VRAM
[21:52:47] [PASSED] Init resource in a private placement
[21:52:47] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[21:52:47] ============= [PASSED] ttm_resource_init_basic =============
[21:52:47] [PASSED] ttm_resource_init_pinned
[21:52:47] [PASSED] ttm_resource_fini_basic
[21:52:47] [PASSED] ttm_resource_manager_init_basic
[21:52:47] [PASSED] ttm_resource_manager_usage_basic
[21:52:47] [PASSED] ttm_resource_manager_set_used_basic
[21:52:47] [PASSED] ttm_sys_man_alloc_basic
[21:52:47] [PASSED] ttm_sys_man_free_basic
[21:52:47] ================== [PASSED] ttm_resource ===================
[21:52:47] =================== ttm_tt (15 subtests) ===================
[21:52:47] ==================== ttm_tt_init_basic ====================
[21:52:47] [PASSED] Page-aligned size
[21:52:47] [PASSED] Extra pages requested
[21:52:47] ================ [PASSED] ttm_tt_init_basic ================
[21:52:47] [PASSED] ttm_tt_init_misaligned
[21:52:47] [PASSED] ttm_tt_fini_basic
[21:52:47] [PASSED] ttm_tt_fini_sg
[21:52:47] [PASSED] ttm_tt_fini_shmem
[21:52:47] [PASSED] ttm_tt_create_basic
[21:52:47] [PASSED] ttm_tt_create_invalid_bo_type
[21:52:47] [PASSED] ttm_tt_create_ttm_exists
[21:52:47] [PASSED] ttm_tt_create_failed
[21:52:47] [PASSED] ttm_tt_destroy_basic
[21:52:47] [PASSED] ttm_tt_populate_null_ttm
[21:52:47] [PASSED] ttm_tt_populate_populated_ttm
[21:52:47] [PASSED] ttm_tt_unpopulate_basic
[21:52:47] [PASSED] ttm_tt_unpopulate_empty_ttm
[21:52:47] [PASSED] ttm_tt_swapin_basic
[21:52:47] ===================== [PASSED] ttm_tt ======================
[21:52:47] =================== ttm_bo (14 subtests) ===================
[21:52:47] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[21:52:47] [PASSED] Cannot be interrupted and sleeps
[21:52:47] [PASSED] Cannot be interrupted, locks straight away
[21:52:47] [PASSED] Can be interrupted, sleeps
[21:52:47] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[21:52:47] [PASSED] ttm_bo_reserve_locked_no_sleep
[21:52:47] [PASSED] ttm_bo_reserve_no_wait_ticket
[21:52:47] [PASSED] ttm_bo_reserve_double_resv
[21:52:47] [PASSED] ttm_bo_reserve_interrupted
[21:52:47] [PASSED] ttm_bo_reserve_deadlock
[21:52:47] [PASSED] ttm_bo_unreserve_basic
[21:52:47] [PASSED] ttm_bo_unreserve_pinned
[21:52:47] [PASSED] ttm_bo_unreserve_bulk
[21:52:47] [PASSED] ttm_bo_put_basic
[21:52:47] [PASSED] ttm_bo_put_shared_resv
[21:52:47] [PASSED] ttm_bo_pin_basic
[21:52:47] [PASSED] ttm_bo_pin_unpin_resource
[21:52:47] [PASSED] ttm_bo_multiple_pin_one_unpin
[21:52:47] ===================== [PASSED] ttm_bo ======================
[21:52:47] ============== ttm_bo_validate (22 subtests) ===============
[21:52:47] ============== ttm_bo_init_reserved_sys_man ===============
[21:52:47] [PASSED] Buffer object for userspace
[21:52:47] [PASSED] Kernel buffer object
[21:52:47] [PASSED] Shared buffer object
[21:52:47] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[21:52:47] ============== ttm_bo_init_reserved_mock_man ==============
[21:52:47] [PASSED] Buffer object for userspace
[21:52:47] [PASSED] Kernel buffer object
[21:52:47] [PASSED] Shared buffer object
[21:52:47] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[21:52:47] [PASSED] ttm_bo_init_reserved_resv
[21:52:47] ================== ttm_bo_validate_basic ==================
[21:52:47] [PASSED] Buffer object for userspace
[21:52:47] [PASSED] Kernel buffer object
[21:52:47] [PASSED] Shared buffer object
[21:52:47] ============== [PASSED] ttm_bo_validate_basic ==============
[21:52:47] [PASSED] ttm_bo_validate_invalid_placement
[21:52:47] ============= ttm_bo_validate_same_placement ==============
[21:52:47] [PASSED] System manager
[21:52:47] [PASSED] VRAM manager
[21:52:47] ========= [PASSED] ttm_bo_validate_same_placement ==========
[21:52:47] [PASSED] ttm_bo_validate_failed_alloc
[21:52:47] [PASSED] ttm_bo_validate_pinned
[21:52:47] [PASSED] ttm_bo_validate_busy_placement
[21:52:47] ================ ttm_bo_validate_multihop =================
[21:52:47] [PASSED] Buffer object for userspace
[21:52:47] [PASSED] Kernel buffer object
[21:52:47] [PASSED] Shared buffer object
[21:52:47] ============ [PASSED] ttm_bo_validate_multihop =============
[21:52:47] ========== ttm_bo_validate_no_placement_signaled ==========
[21:52:47] [PASSED] Buffer object in system domain, no page vector
[21:52:47] [PASSED] Buffer object in system domain with an existing page vector
[21:52:47] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[21:52:47] ======== ttm_bo_validate_no_placement_not_signaled ========
[21:52:47] [PASSED] Buffer object for userspace
[21:52:47] [PASSED] Kernel buffer object
[21:52:47] [PASSED] Shared buffer object
[21:52:47] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[21:52:47] [PASSED] ttm_bo_validate_move_fence_signaled
[21:52:47] ========= ttm_bo_validate_move_fence_not_signaled =========
[21:52:47] [PASSED] Waits for GPU
[21:52:47] [PASSED] Tries to lock straight away
[21:52:48] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[21:52:48] [PASSED] ttm_bo_validate_swapout
[21:52:48] [PASSED] ttm_bo_validate_happy_evict
[21:52:48] [PASSED] ttm_bo_validate_all_pinned_evict
[21:52:48] [PASSED] ttm_bo_validate_allowed_only_evict
[21:52:48] [PASSED] ttm_bo_validate_deleted_evict
[21:52:48] [PASSED] ttm_bo_validate_busy_domain_evict
[21:52:48] [PASSED] ttm_bo_validate_evict_gutting
[21:52:48] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[21:52:48] ================= [PASSED] ttm_bo_validate =================
[21:52:48] ============================================================
[21:52:48] Testing complete. Ran 102 tests: passed: 102
[21:52:48] Elapsed time: 10.100s total, 1.609s configuring, 7.774s building, 0.599s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✗ Xe.CI.Full: failure for Basic TLB inval refactor
2025-07-15 21:21 [PATCH 0/4] Basic TLB inval refactor stuartsummers
` (6 preceding siblings ...)
2025-07-15 21:52 ` ✓ CI.KUnit: success " Patchwork
@ 2025-07-16 10:06 ` Patchwork
7 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2025-07-16 10:06 UTC (permalink / raw)
To: Summers, Stuart; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 355 bytes --]
== Series Details ==
Series: Basic TLB inval refactor
URL : https://patchwork.freedesktop.org/series/151670/
State : failure
== Summary ==
ERROR: The runconfig 'xe-3419-394c972916ad8aa294c31fee993bde243b786bac_FULL' does not exist in the database
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151670v1/index.html
[-- Attachment #2: Type: text/html, Size: 920 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2025-07-16 10:06 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-07-15 21:21 [PATCH 0/4] Basic TLB inval refactor stuartsummers
2025-07-15 21:21 ` [PATCH 1/4] drm/xe: Explicitly mark migration queues with flag stuartsummers
2025-07-15 21:21 ` [PATCH 2/4] drm/xe: Remove unused GT TLB invalidation trace points stuartsummers
2025-07-15 21:21 ` [PATCH 3/4] drm/xe: s/tlb_invalidation/tlb_inval stuartsummers
2025-07-15 21:24 ` Summers, Stuart
2025-07-15 21:21 ` [PATCH 4/4] drm/xe: Add xe_tlb_inval structure stuartsummers
2025-07-15 21:25 ` Summers, Stuart
2025-07-15 21:26 ` [PATCH 0/4] Basic TLB inval refactor Summers, Stuart
2025-07-15 21:51 ` ✗ CI.checkpatch: warning for " Patchwork
2025-07-15 21:52 ` ✓ CI.KUnit: success " Patchwork
2025-07-16 10:06 ` ✗ Xe.CI.Full: failure " Patchwork
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