* [PATCH] drm/xe: Extend wa_13012615864 to additional Xe2 and Xe3 platforms
@ 2025-07-31 15:29 Jonathan Cavitt
0 siblings, 0 replies; 7+ messages in thread
From: Jonathan Cavitt @ 2025-07-31 15:29 UTC (permalink / raw)
To: intel-xe
Cc: saurabhg.gupta, alex.zuo, jonathan.cavitt,
tilak.tirumalesh.tangudu, matthew.d.roper
From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
v2: Correct code placement (Matt R)
Extend WA 13012615864 to Graphics Versions 20.01,20.02,20.04
and 30.03 .
Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
---
drivers/gpu/drm/xe/xe_wa.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 22a98600fd8f..535067e7fb0c 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -538,6 +538,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
},
+ { XE_RTP_NAME("13012615864"),
+ XE_RTP_RULES(GRAPHICS_VERSION(2004),
+ FUNC(xe_rtp_match_first_render_or_compute)),
+ XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
+ },
/* Xe2_HPG */
@@ -602,6 +607,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
FUNC(xe_rtp_match_first_render_or_compute)),
XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, STK_ID_RESTRICT))
},
+ { XE_RTP_NAME("13012615864"),
+ XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
+ FUNC(xe_rtp_match_first_render_or_compute)),
+ XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
+ },
/* Xe2_LPM */
@@ -647,7 +657,8 @@ static const struct xe_rtp_entry_sr engine_was[] = {
XE_RTP_ACTIONS(SET(TDL_CHICKEN, QID_WAIT_FOR_THREAD_NOT_RUN_DISABLE))
},
{ XE_RTP_NAME("13012615864"),
- XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001),
+ XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001), OR,
+ GRAPHICS_VERSION(3003),
FUNC(xe_rtp_match_first_render_or_compute)),
XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
},
--
2.43.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH] drm/xe: Extend wa_13012615864 to additional Xe2 and Xe3 platforms
@ 2025-07-31 22:01 Jonathan Cavitt
2025-08-01 16:38 ` Gustavo Sousa
2025-09-04 18:59 ` Matt Roper
0 siblings, 2 replies; 7+ messages in thread
From: Jonathan Cavitt @ 2025-07-31 22:01 UTC (permalink / raw)
To: intel-xe
Cc: saurabhg.gupta, alex.zuo, jonathan.cavitt,
tilak.tirumalesh.tangudu, matthew.d.roper, michal.wajdeczko,
rodrigo.vivi
From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
Extend WA 13012615864 to Graphics Versions 20.01,20.02,20.04
and 30.03.
Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_wa.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 22a98600fd8f..535067e7fb0c 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -538,6 +538,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
},
+ { XE_RTP_NAME("13012615864"),
+ XE_RTP_RULES(GRAPHICS_VERSION(2004),
+ FUNC(xe_rtp_match_first_render_or_compute)),
+ XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
+ },
/* Xe2_HPG */
@@ -602,6 +607,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
FUNC(xe_rtp_match_first_render_or_compute)),
XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, STK_ID_RESTRICT))
},
+ { XE_RTP_NAME("13012615864"),
+ XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
+ FUNC(xe_rtp_match_first_render_or_compute)),
+ XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
+ },
/* Xe2_LPM */
@@ -647,7 +657,8 @@ static const struct xe_rtp_entry_sr engine_was[] = {
XE_RTP_ACTIONS(SET(TDL_CHICKEN, QID_WAIT_FOR_THREAD_NOT_RUN_DISABLE))
},
{ XE_RTP_NAME("13012615864"),
- XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001),
+ XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001), OR,
+ GRAPHICS_VERSION(3003),
FUNC(xe_rtp_match_first_render_or_compute)),
XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
},
--
2.43.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH] drm/xe: Extend wa_13012615864 to additional Xe2 and Xe3 platforms
2025-07-31 22:01 Jonathan Cavitt
@ 2025-08-01 16:38 ` Gustavo Sousa
2025-08-01 20:34 ` Rodrigo Vivi
2025-09-04 18:59 ` Matt Roper
1 sibling, 1 reply; 7+ messages in thread
From: Gustavo Sousa @ 2025-08-01 16:38 UTC (permalink / raw)
To: Jonathan Cavitt, intel-xe
Cc: saurabhg.gupta, alex.zuo, jonathan.cavitt,
tilak.tirumalesh.tangudu, matthew.d.roper, michal.wajdeczko,
rodrigo.vivi
Quoting Jonathan Cavitt (2025-07-31 19:01:44-03:00)
>From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>
>Extend WA 13012615864 to Graphics Versions 20.01,20.02,20.04
>and 30.03.
>
>Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
>Cc: Matt Roper <matthew.d.roper@intel.com>
>Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
>---
> drivers/gpu/drm/xe/xe_wa.c | 13 ++++++++++++-
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
>index 22a98600fd8f..535067e7fb0c 100644
>--- a/drivers/gpu/drm/xe/xe_wa.c
>+++ b/drivers/gpu/drm/xe/xe_wa.c
>@@ -538,6 +538,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
> XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
> },
>+ { XE_RTP_NAME("13012615864"),
>+ XE_RTP_RULES(GRAPHICS_VERSION(2004),
>+ FUNC(xe_rtp_match_first_render_or_compute)),
>+ XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
>+ },
>
> /* Xe2_HPG */
>
>@@ -602,6 +607,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> FUNC(xe_rtp_match_first_render_or_compute)),
> XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, STK_ID_RESTRICT))
> },
>+ { XE_RTP_NAME("13012615864"),
>+ XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
>+ FUNC(xe_rtp_match_first_render_or_compute)),
>+ XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
>+ },
>
> /* Xe2_LPM */
>
>@@ -647,7 +657,8 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> XE_RTP_ACTIONS(SET(TDL_CHICKEN, QID_WAIT_FOR_THREAD_NOT_RUN_DISABLE))
> },
> { XE_RTP_NAME("13012615864"),
>- XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001),
>+ XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001), OR,
>+ GRAPHICS_VERSION(3003),
> FUNC(xe_rtp_match_first_render_or_compute)),
> XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
> },
>--
>2.43.0
>
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] drm/xe: Extend wa_13012615864 to additional Xe2 and Xe3 platforms
2025-08-01 16:38 ` Gustavo Sousa
@ 2025-08-01 20:34 ` Rodrigo Vivi
0 siblings, 0 replies; 7+ messages in thread
From: Rodrigo Vivi @ 2025-08-01 20:34 UTC (permalink / raw)
To: Gustavo Sousa
Cc: Jonathan Cavitt, intel-xe, saurabhg.gupta, alex.zuo,
tilak.tirumalesh.tangudu, matthew.d.roper, michal.wajdeczko
On Fri, Aug 01, 2025 at 01:38:46PM -0300, Gustavo Sousa wrote:
> Quoting Jonathan Cavitt (2025-07-31 19:01:44-03:00)
> >From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> >
> >Extend WA 13012615864 to Graphics Versions 20.01,20.02,20.04
> >and 30.03.
> >
> >Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> >Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> >Cc: Matt Roper <matthew.d.roper@intel.com>
> >Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> >Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
pushed to drm-xe-next
>
> >---
> > drivers/gpu/drm/xe/xe_wa.c | 13 ++++++++++++-
> > 1 file changed, 12 insertions(+), 1 deletion(-)
> >
> >diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> >index 22a98600fd8f..535067e7fb0c 100644
> >--- a/drivers/gpu/drm/xe/xe_wa.c
> >+++ b/drivers/gpu/drm/xe/xe_wa.c
> >@@ -538,6 +538,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> > XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
> > XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
> > },
> >+ { XE_RTP_NAME("13012615864"),
> >+ XE_RTP_RULES(GRAPHICS_VERSION(2004),
> >+ FUNC(xe_rtp_match_first_render_or_compute)),
> >+ XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
> >+ },
> >
> > /* Xe2_HPG */
> >
> >@@ -602,6 +607,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> > FUNC(xe_rtp_match_first_render_or_compute)),
> > XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, STK_ID_RESTRICT))
> > },
> >+ { XE_RTP_NAME("13012615864"),
> >+ XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
> >+ FUNC(xe_rtp_match_first_render_or_compute)),
> >+ XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
> >+ },
> >
> > /* Xe2_LPM */
> >
> >@@ -647,7 +657,8 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> > XE_RTP_ACTIONS(SET(TDL_CHICKEN, QID_WAIT_FOR_THREAD_NOT_RUN_DISABLE))
> > },
> > { XE_RTP_NAME("13012615864"),
> >- XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001),
> >+ XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001), OR,
> >+ GRAPHICS_VERSION(3003),
> > FUNC(xe_rtp_match_first_render_or_compute)),
> > XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
> > },
> >--
> >2.43.0
> >
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/xe: Extend wa_13012615864 to additional Xe2 and Xe3 platforms
2025-07-31 22:01 Jonathan Cavitt
2025-08-01 16:38 ` Gustavo Sousa
@ 2025-09-04 18:59 ` Matt Roper
2025-09-04 19:25 ` Lucas De Marchi
2025-09-04 19:51 ` Gustavo Sousa
1 sibling, 2 replies; 7+ messages in thread
From: Matt Roper @ 2025-09-04 18:59 UTC (permalink / raw)
To: Jonathan Cavitt
Cc: intel-xe, saurabhg.gupta, alex.zuo, tilak.tirumalesh.tangudu,
michal.wajdeczko, rodrigo.vivi, Lucas De Marchi
On Thu, Jul 31, 2025 at 10:01:44PM +0000, Jonathan Cavitt wrote:
> From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>
> Extend WA 13012615864 to Graphics Versions 20.01,20.02,20.04
> and 30.03.
>
> Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/xe/xe_wa.c | 13 ++++++++++++-
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index 22a98600fd8f..535067e7fb0c 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -538,6 +538,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
> XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
> },
> + { XE_RTP_NAME("13012615864"),
> + XE_RTP_RULES(GRAPHICS_VERSION(2004),
> + FUNC(xe_rtp_match_first_render_or_compute)),
> + XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
> + },
>
> /* Xe2_HPG */
>
> @@ -602,6 +607,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> FUNC(xe_rtp_match_first_render_or_compute)),
> XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, STK_ID_RESTRICT))
> },
> + { XE_RTP_NAME("13012615864"),
> + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
> + FUNC(xe_rtp_match_first_render_or_compute)),
> + XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
> + },
>
> /* Xe2_LPM */
>
> @@ -647,7 +657,8 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> XE_RTP_ACTIONS(SET(TDL_CHICKEN, QID_WAIT_FOR_THREAD_NOT_RUN_DISABLE))
> },
> { XE_RTP_NAME("13012615864"),
> - XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001),
> + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001), OR,
> + GRAPHICS_VERSION(3003),
> FUNC(xe_rtp_match_first_render_or_compute)),
I don't think this works. If the graphics version matches
(30.00/30.01), then as soon as the parser in rule_matches() hits 'OR' we
consider the rule to evaluate to true and apply the action, even though
you haven't checked the engine yet.
I.e., what you've written here gets treated as
( 30.00/30.01 ) OR ( 30.03 AND first_render_compute )
when the proper logic for this workaround should have been
( 30.00/30.01 OR 30.03 ) AND first_render_compute
So at the moment we're probably accidentally applying this to a bunch of
engines that we didn't intend to on 30.00/30.01 platforms.
Since the new version is non-contiguous you can just create another
table entry for the new 30.03 version. At some point farther down the
road if it turns out no platform ever shows up to use the 30.02 version
number then we consolidate the two entries into a single entry that
spans 30.00 - 30.03, but we're not far enough past Xe3 (or even Xe2) to
do those kinds of consolidation yet.
Matt
> XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
> },
> --
> 2.43.0
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] drm/xe: Extend wa_13012615864 to additional Xe2 and Xe3 platforms
2025-09-04 18:59 ` Matt Roper
@ 2025-09-04 19:25 ` Lucas De Marchi
2025-09-04 19:51 ` Gustavo Sousa
1 sibling, 0 replies; 7+ messages in thread
From: Lucas De Marchi @ 2025-09-04 19:25 UTC (permalink / raw)
To: Matt Roper
Cc: Jonathan Cavitt, intel-xe, saurabhg.gupta, alex.zuo,
tilak.tirumalesh.tangudu, michal.wajdeczko, rodrigo.vivi
On Thu, Sep 04, 2025 at 11:59:19AM -0700, Matt Roper wrote:
>On Thu, Jul 31, 2025 at 10:01:44PM +0000, Jonathan Cavitt wrote:
>> From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>>
>> Extend WA 13012615864 to Graphics Versions 20.01,20.02,20.04
>> and 30.03.
>>
>> Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
>> Cc: Matt Roper <matthew.d.roper@intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_wa.c | 13 ++++++++++++-
>> 1 file changed, 12 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
>> index 22a98600fd8f..535067e7fb0c 100644
>> --- a/drivers/gpu/drm/xe/xe_wa.c
>> +++ b/drivers/gpu/drm/xe/xe_wa.c
>> @@ -538,6 +538,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
>> XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
>> XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
>> },
>> + { XE_RTP_NAME("13012615864"),
>> + XE_RTP_RULES(GRAPHICS_VERSION(2004),
>> + FUNC(xe_rtp_match_first_render_or_compute)),
>> + XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
>> + },
>>
>> /* Xe2_HPG */
>>
>> @@ -602,6 +607,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
>> FUNC(xe_rtp_match_first_render_or_compute)),
>> XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, STK_ID_RESTRICT))
>> },
>> + { XE_RTP_NAME("13012615864"),
>> + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
>> + FUNC(xe_rtp_match_first_render_or_compute)),
>> + XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
>> + },
>>
>> /* Xe2_LPM */
>>
>> @@ -647,7 +657,8 @@ static const struct xe_rtp_entry_sr engine_was[] = {
>> XE_RTP_ACTIONS(SET(TDL_CHICKEN, QID_WAIT_FOR_THREAD_NOT_RUN_DISABLE))
>> },
>> { XE_RTP_NAME("13012615864"),
>> - XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001),
>> + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001), OR,
>> + GRAPHICS_VERSION(3003),
>> FUNC(xe_rtp_match_first_render_or_compute)),
>
>I don't think this works. If the graphics version matches
>(30.00/30.01), then as soon as the parser in rule_matches() hits 'OR' we
>consider the rule to evaluate to true and apply the action, even though
>you haven't checked the engine yet.
>
>I.e., what you've written here gets treated as
>
> ( 30.00/30.01 ) OR ( 30.03 AND first_render_compute )
>
>when the proper logic for this workaround should have been
>
> ( 30.00/30.01 OR 30.03 ) AND first_render_compute
>
>So at the moment we're probably accidentally applying this to a bunch of
>engines that we didn't intend to on 30.00/30.01 platforms.
yes. We had another similar mistake in a pending patch that I fixed and
submitted:
8d6f16f1f082 ("drm/xe: Extend Wa_22021007897 to Xe3 platforms")
>
>
>Since the new version is non-contiguous you can just create another
>table entry for the new 30.03 version. At some point farther down the
or do this:
XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001), FUNC(xe_rtp_match_first_render_or_compute), OR
GRAPHICS_VERSION(3003), FUNC(xe_rtp_match_first_render_or_compute)),
>road if it turns out no platform ever shows up to use the 30.02 version
>number then we consolidate the two entries into a single entry that
>spans 30.00 - 30.03, but we're not far enough past Xe3 (or even Xe2) to
>do those kinds of consolidation yet.
In that commit I mentioned I decided differently and just extended the
range for these reasons:
1) if there is a 3002 in future it's much more likely the WA will also
apply since it's spanning several revs.
2) if there is a 3002, we will need to revisit the WAs for that IP
anyway. Checking for already matching WAs would be a sane thing.
I started wip patch for that[1]
3) if there isn't such IP, then we don't have to do anything
[1] I tweaked the xe_wa kunit to dump all the WAs in the driver
in toml format that is later converted to json. I was then applying
checks by parsing the json with jq and friends. That proved cumbersome
though as the check could be differently from what the driver is
deciding and we'd basically need to keep implementing it in 2 places.
https://lore.kernel.org/intel-xe/23b32a25-e157-435e-8b23-ccacb59be55f@intel.com/T/#u
when that lands, my intention is then to dump the WAs that match a
certain mock platform.
Lucas De Marchi
>
>
>Matt
>
>> XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
>> },
>> --
>> 2.43.0
>>
>
>--
>Matt Roper
>Graphics Software Engineer
>Linux GPU Platform Enablement
>Intel Corporation
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] drm/xe: Extend wa_13012615864 to additional Xe2 and Xe3 platforms
2025-09-04 18:59 ` Matt Roper
2025-09-04 19:25 ` Lucas De Marchi
@ 2025-09-04 19:51 ` Gustavo Sousa
1 sibling, 0 replies; 7+ messages in thread
From: Gustavo Sousa @ 2025-09-04 19:51 UTC (permalink / raw)
To: Jonathan Cavitt, Matt Roper
Cc: intel-xe, saurabhg.gupta, alex.zuo, tilak.tirumalesh.tangudu,
michal.wajdeczko, rodrigo.vivi, Lucas De Marchi
Quoting Matt Roper (2025-09-04 15:59:19-03:00)
>On Thu, Jul 31, 2025 at 10:01:44PM +0000, Jonathan Cavitt wrote:
>> From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>>
>> Extend WA 13012615864 to Graphics Versions 20.01,20.02,20.04
>> and 30.03.
>>
>> Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
>> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
>> Cc: Matt Roper <matthew.d.roper@intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_wa.c | 13 ++++++++++++-
>> 1 file changed, 12 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
>> index 22a98600fd8f..535067e7fb0c 100644
>> --- a/drivers/gpu/drm/xe/xe_wa.c
>> +++ b/drivers/gpu/drm/xe/xe_wa.c
>> @@ -538,6 +538,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
>> XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
>> XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
>> },
>> + { XE_RTP_NAME("13012615864"),
>> + XE_RTP_RULES(GRAPHICS_VERSION(2004),
>> + FUNC(xe_rtp_match_first_render_or_compute)),
>> + XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
>> + },
>>
>> /* Xe2_HPG */
>>
>> @@ -602,6 +607,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
>> FUNC(xe_rtp_match_first_render_or_compute)),
>> XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, STK_ID_RESTRICT))
>> },
>> + { XE_RTP_NAME("13012615864"),
>> + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
>> + FUNC(xe_rtp_match_first_render_or_compute)),
>> + XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
>> + },
>>
>> /* Xe2_LPM */
>>
>> @@ -647,7 +657,8 @@ static const struct xe_rtp_entry_sr engine_was[] = {
>> XE_RTP_ACTIONS(SET(TDL_CHICKEN, QID_WAIT_FOR_THREAD_NOT_RUN_DISABLE))
>> },
>> { XE_RTP_NAME("13012615864"),
>> - XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001),
>> + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001), OR,
>> + GRAPHICS_VERSION(3003),
>> FUNC(xe_rtp_match_first_render_or_compute)),
>
>I don't think this works. If the graphics version matches
>(30.00/30.01), then as soon as the parser in rule_matches() hits 'OR' we
>consider the rule to evaluate to true and apply the action, even though
>you haven't checked the engine yet.
>
>I.e., what you've written here gets treated as
>
> ( 30.00/30.01 ) OR ( 30.03 AND first_render_compute )
>
>when the proper logic for this workaround should have been
>
> ( 30.00/30.01 OR 30.03 ) AND first_render_compute
Oops. Right. Sorry for missing that during my review!
--
Gustavo Sousa
>
>So at the moment we're probably accidentally applying this to a bunch of
>engines that we didn't intend to on 30.00/30.01 platforms.
>
>
>Since the new version is non-contiguous you can just create another
>table entry for the new 30.03 version. At some point farther down the
>road if it turns out no platform ever shows up to use the 30.02 version
>number then we consolidate the two entries into a single entry that
>spans 30.00 - 30.03, but we're not far enough past Xe3 (or even Xe2) to
>do those kinds of consolidation yet.
>
>
>Matt
>
>> XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
>> },
>> --
>> 2.43.0
>>
>
>--
>Matt Roper
>Graphics Software Engineer
>Linux GPU Platform Enablement
>Intel Corporation
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2025-09-04 19:51 UTC | newest]
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2025-07-31 22:01 Jonathan Cavitt
2025-08-01 16:38 ` Gustavo Sousa
2025-08-01 20:34 ` Rodrigo Vivi
2025-09-04 18:59 ` Matt Roper
2025-09-04 19:25 ` Lucas De Marchi
2025-09-04 19:51 ` Gustavo Sousa
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