[PATCH v3 23/23] drm/xe/sriov: Disable SR-IOV if primary GT is disabled via configfs

[Matt Roper <matthew.d.roper@intel.com>]

SR-IOV operation relies on the primary GT's GuC to operate (in both PF
and VF mode).  If the primary GT is disabled in VF mode, fail the probe.
If the primary GT is disabled in PF mode, force the device back to
native (non-sriov) mode.

v2:
 - Move handling to xe_info_init().  (Michal)

Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/xe/xe_pci.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 4a792e1037d5..44f99c1a39e0 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -763,6 +763,18 @@ static int xe_info_init(struct xe_device *xe,
 	int ret;
 	u8 id;
 
+	/* SR-IOV (both PF and VF) relies on the primary GT's GuC */
+	if ((gt_types_allowed & BIT_ULL(XE_GT_TYPE_MAIN)) == 0) {
+		if (IS_SRIOV_PF(xe)) {
+			drm_info(&xe->drm, "Disabling SR-IOV because primary GT is disabled.\n");
+			pci_sriov_set_totalvfs(pdev, 0);
+			xe->sriov.__mode = XE_SRIOV_MODE_NONE;
+		} else if (IS_SRIOV_VF(xe)) {
+			drm_err(&xe->drm, "Cannot probe device in SR-IOV VF without primary GT enabled.\n");
+			return -ENODEV;
+		}
+	}
+
 	/*
 	 * If this platform supports GMD_ID, we'll detect the proper IP
 	 * descriptor to use from hardware registers.
-- 
2.51.0