From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: [RFC][PATCH 11/11] drm/i915/prefill: Also print out the worst case estimates
Date: Wed, 8 Oct 2025 21:25:58 +0300 [thread overview]
Message-ID: <20251008182559.20615-12-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20251008182559.20615-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We don't use the worst case prefill estimates yet for anything.
Print them out alongside the actual prefill details to help
conmfirm they are at leat getting computed somewhat sanely.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index b3e9e2a0dab3..7bfd61cb41ca 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2322,6 +2322,17 @@ static int skl_wm_check_vblank(struct intel_atomic_state *state,
}
}
+ /* hack to dump the worst case as well */
+ memset(&ctx, 0, sizeof(ctx));
+ intel_prefill_init_worst(&ctx, crtc_state);
+
+ level = skl_max_wm_level_for_vblank(crtc_state, &ctx);
+
+ if (DISPLAY_VER(display) >= 12 &&
+ display->sagv.block_time_us)
+ intel_prefill_vblank_too_short(&ctx, crtc_state,
+ display->sagv.block_time_us);
+
return 0;
}
--
2.49.1
next prev parent reply other threads:[~2025-10-08 18:26 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-08 18:25 [RFC][PATCH 00/11] drm/i915/prefill: Introduce helpers for prefill latency calculations Ville Syrjala
2025-10-08 18:25 ` [RFC][PATCH 01/11] drm/i915: Reject modes with linetime > 64 usec Ville Syrjala
2025-10-13 15:15 ` Shankar, Uma
2025-10-08 18:25 ` [RFC][PATCH 02/11] drm/i915/cdclk: Add prefill helpers for CDCLK Ville Syrjala
2025-10-13 16:11 ` Shankar, Uma
2025-10-08 18:25 ` [RFC][PATCH 03/11] drm/i915/cdclk: Add intel_cdclk_min_cdclk_for_prefill() Ville Syrjala
2025-10-13 16:25 ` Shankar, Uma
2025-10-08 18:25 ` [RFC][PATCH 04/11] drm/i915/dsc: Add prefill helper for DSC Ville Syrjala
2025-10-13 16:26 ` Shankar, Uma
2025-10-08 18:25 ` [RFC][PATCH 05/11] drm/i915/scaler: Add scaler prefill helpers Ville Syrjala
2025-10-13 17:56 ` Shankar, Uma
2025-10-08 18:25 ` [RFC][PATCH 06/11] drm/i195/wm: Add WM0 " Ville Syrjala
2025-10-13 18:30 ` Shankar, Uma
2025-10-13 21:49 ` Ville Syrjälä
2025-10-08 18:25 ` [RFC][PATCH 07/11] drm/i915: Introduce intel_compute_global_watermarks_late() Ville Syrjala
2025-10-13 18:36 ` Shankar, Uma
2025-10-13 20:35 ` Ville Syrjälä
2025-10-08 18:25 ` [RFC][PATCH 08/11] drm/i915/prefill: Introduce intel_prefill.c Ville Syrjala
2025-10-13 18:42 ` Shankar, Uma
2025-10-13 21:37 ` Ville Syrjälä
2025-10-08 18:25 ` [RFC][PATCH 09/11] drm/i915/wm: Use intel_prefill Ville Syrjala
2025-10-13 18:43 ` Shankar, Uma
2025-10-08 18:25 ` [RFC][PATCH 10/11] drm/i915/prefill: Print the prefill details Ville Syrjala
2025-10-13 18:45 ` Shankar, Uma
2025-10-08 18:25 ` Ville Syrjala [this message]
2025-10-13 18:47 ` [RFC][PATCH 11/11] drm/i915/prefill: Also print out the worst case estimates Shankar, Uma
2025-10-08 19:10 ` ✗ CI.checkpatch: warning for drm/i915/prefill: Introduce helpers for prefill latency calculations Patchwork
2025-10-08 19:11 ` ✓ CI.KUnit: success " Patchwork
2025-10-08 19:26 ` ✗ CI.checksparse: warning " Patchwork
2025-10-08 19:58 ` ✓ Xe.CI.BAT: success " Patchwork
2025-10-08 23:13 ` ✗ Xe.CI.Full: failure " Patchwork
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