* [PATCH v5 0/2] drm/xe/guc: Cleanup GuC log buffer macros and helpers
@ 2025-10-09 21:57 Zhanjun Dong
2025-10-09 21:57 ` [PATCH v5 1/2] drm/xe/guc: Update GuC log buffer type value Zhanjun Dong
` (4 more replies)
0 siblings, 5 replies; 11+ messages in thread
From: Zhanjun Dong @ 2025-10-09 21:57 UTC (permalink / raw)
To: intel-xe; +Cc: lucas.demarchi, Zhanjun Dong, michal.wajdeczko
Cleanup GuC log buffer macros and helpers, add Xe style macro prefix.
Update buffer type values to align with the GuC specification
---
Cc: michal.wajdeczko@intel.com
---
Change list:
v5: Change patch order
Sync macro names across buffer type, size and GUC_CTL_LOG_PARAMS
Replace guc_log_size with macro
Update log buffer layout comments
v4: Replace helper functions with macros
Rename log type xxx_DEBUG to xxx_EVENT_LOG
v3: Update comments
v2: Use SZ_4K, instead of PAGE_SIZE
Expand for loop with switch and fallthrough
Zhanjun Dong (2):
drm/xe/guc: Update GuC log buffer type value
drm/xe/guc: Add prefix to guc log buffer macros
drivers/gpu/drm/xe/abi/guc_log_abi.h | 4 +-
drivers/gpu/drm/xe/xe_guc.c | 23 ++---
drivers/gpu/drm/xe/xe_guc_capture.c | 16 ++--
drivers/gpu/drm/xe/xe_guc_fwif.h | 6 +-
drivers/gpu/drm/xe/xe_guc_log.c | 126 +++++++++++----------------
drivers/gpu/drm/xe/xe_guc_log.h | 14 ++-
6 files changed, 80 insertions(+), 109 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH v5 1/2] drm/xe/guc: Update GuC log buffer type value 2025-10-09 21:57 [PATCH v5 0/2] drm/xe/guc: Cleanup GuC log buffer macros and helpers Zhanjun Dong @ 2025-10-09 21:57 ` Zhanjun Dong 2025-10-21 17:23 ` Michal Wajdeczko 2025-10-09 21:57 ` [PATCH v5 2/2] drm/xe/guc: Add prefix to guc log buffer macros Zhanjun Dong ` (3 subsequent siblings) 4 siblings, 1 reply; 11+ messages in thread From: Zhanjun Dong @ 2025-10-09 21:57 UTC (permalink / raw) To: intel-xe; +Cc: lucas.demarchi, Zhanjun Dong Update GuC log buffer type value, to align with the GuC specification. Update buffer offset calulation. Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com> --- drivers/gpu/drm/xe/abi/guc_log_abi.h | 2 +- drivers/gpu/drm/xe/xe_guc_log.c | 13 +++++++++---- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/xe/abi/guc_log_abi.h b/drivers/gpu/drm/xe/abi/guc_log_abi.h index 554630b7ccd9..b1819679fa35 100644 --- a/drivers/gpu/drm/xe/abi/guc_log_abi.h +++ b/drivers/gpu/drm/xe/abi/guc_log_abi.h @@ -10,8 +10,8 @@ /* GuC logging buffer types */ enum guc_log_buffer_type { - GUC_LOG_BUFFER_CRASH_DUMP, GUC_LOG_BUFFER_DEBUG, + GUC_LOG_BUFFER_CRASH_DUMP, GUC_LOG_BUFFER_CAPTURE, }; diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c index c01ccb35dc75..b5d837efaf74 100644 --- a/drivers/gpu/drm/xe/xe_guc_log.c +++ b/drivers/gpu/drm/xe/xe_guc_log.c @@ -330,10 +330,15 @@ u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_typ enum guc_log_buffer_type i; u32 offset = PAGE_SIZE;/* for the log_buffer_states */ - for (i = GUC_LOG_BUFFER_CRASH_DUMP; i < GUC_LOG_BUFFER_TYPE_MAX; ++i) { - if (i == type) - break; - offset += xe_guc_get_log_buffer_size(log, i); + switch (type) { + case GUC_LOG_BUFFER_CAPTURE: + offset += XE_GUC_LOG_CRASH_BUFFER_SIZE; + fallthrough; + case GUC_LOG_BUFFER_CRASH_DUMP: + offset += XE_GUC_LOG_EVENT_LOG_BUFFER_SIZE; + fallthrough; + case GUC_LOG_BUFFER_EVENT_LOG: + break; } return offset; -- 2.34.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v5 1/2] drm/xe/guc: Update GuC log buffer type value 2025-10-09 21:57 ` [PATCH v5 1/2] drm/xe/guc: Update GuC log buffer type value Zhanjun Dong @ 2025-10-21 17:23 ` Michal Wajdeczko 2025-10-21 17:50 ` Dong, Zhanjun 0 siblings, 1 reply; 11+ messages in thread From: Michal Wajdeczko @ 2025-10-21 17:23 UTC (permalink / raw) To: Zhanjun Dong, intel-xe; +Cc: lucas.demarchi On 10/9/2025 11:57 PM, Zhanjun Dong wrote: > Update GuC log buffer type value, to align with the GuC specification. > Update buffer offset calulation. typo > > Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com> > --- > drivers/gpu/drm/xe/abi/guc_log_abi.h | 2 +- > drivers/gpu/drm/xe/xe_guc_log.c | 13 +++++++++---- > 2 files changed, 10 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/xe/abi/guc_log_abi.h b/drivers/gpu/drm/xe/abi/guc_log_abi.h > index 554630b7ccd9..b1819679fa35 100644 > --- a/drivers/gpu/drm/xe/abi/guc_log_abi.h > +++ b/drivers/gpu/drm/xe/abi/guc_log_abi.h > @@ -10,8 +10,8 @@ > > /* GuC logging buffer types */ > enum guc_log_buffer_type { > - GUC_LOG_BUFFER_CRASH_DUMP, > GUC_LOG_BUFFER_DEBUG, > + GUC_LOG_BUFFER_CRASH_DUMP, > GUC_LOG_BUFFER_CAPTURE, > }; > > diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c > index c01ccb35dc75..b5d837efaf74 100644 > --- a/drivers/gpu/drm/xe/xe_guc_log.c > +++ b/drivers/gpu/drm/xe/xe_guc_log.c > @@ -330,10 +330,15 @@ u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_typ > enum guc_log_buffer_type i; > u32 offset = PAGE_SIZE;/* for the log_buffer_states */ btw, this should be fixed SZ_4K, not a config PAGE_SIZE > > - for (i = GUC_LOG_BUFFER_CRASH_DUMP; i < GUC_LOG_BUFFER_TYPE_MAX; ++i) { > - if (i == type) > - break; > - offset += xe_guc_get_log_buffer_size(log, i); > + switch (type) { > + case GUC_LOG_BUFFER_CAPTURE: > + offset += XE_GUC_LOG_CRASH_BUFFER_SIZE; ../drivers/gpu/drm/xe/xe_guc_log.c: In function ‘xe_guc_get_log_buffer_offset’: ../drivers/gpu/drm/xe/xe_guc_log.c:335:27: error: ‘XE_GUC_LOG_CRASH_BUFFER_SIZE’ undeclared (first use in this function) 335 | offset += XE_GUC_LOG_CRASH_BUFFER_SIZE; | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ > + fallthrough; > + case GUC_LOG_BUFFER_CRASH_DUMP: > + offset += XE_GUC_LOG_EVENT_LOG_BUFFER_SIZE; > + fallthrough; > + case GUC_LOG_BUFFER_EVENT_LOG: > + break; > } > > return offset; ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v5 1/2] drm/xe/guc: Update GuC log buffer type value 2025-10-21 17:23 ` Michal Wajdeczko @ 2025-10-21 17:50 ` Dong, Zhanjun 0 siblings, 0 replies; 11+ messages in thread From: Dong, Zhanjun @ 2025-10-21 17:50 UTC (permalink / raw) To: Michal Wajdeczko, intel-xe; +Cc: lucas.demarchi On 2025-10-21 1:23 p.m., Michal Wajdeczko wrote: > > > On 10/9/2025 11:57 PM, Zhanjun Dong wrote: >> Update GuC log buffer type value, to align with the GuC specification. >> Update buffer offset calulation. > > typo > >> >> Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com> >> --- >> drivers/gpu/drm/xe/abi/guc_log_abi.h | 2 +- >> drivers/gpu/drm/xe/xe_guc_log.c | 13 +++++++++---- >> 2 files changed, 10 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/gpu/drm/xe/abi/guc_log_abi.h b/drivers/gpu/drm/xe/abi/guc_log_abi.h >> index 554630b7ccd9..b1819679fa35 100644 >> --- a/drivers/gpu/drm/xe/abi/guc_log_abi.h >> +++ b/drivers/gpu/drm/xe/abi/guc_log_abi.h >> @@ -10,8 +10,8 @@ >> >> /* GuC logging buffer types */ >> enum guc_log_buffer_type { >> - GUC_LOG_BUFFER_CRASH_DUMP, >> GUC_LOG_BUFFER_DEBUG, >> + GUC_LOG_BUFFER_CRASH_DUMP, >> GUC_LOG_BUFFER_CAPTURE, >> }; >> >> diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c >> index c01ccb35dc75..b5d837efaf74 100644 >> --- a/drivers/gpu/drm/xe/xe_guc_log.c >> +++ b/drivers/gpu/drm/xe/xe_guc_log.c >> @@ -330,10 +330,15 @@ u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_typ >> enum guc_log_buffer_type i; >> u32 offset = PAGE_SIZE;/* for the log_buffer_states */ > > btw, this should be fixed SZ_4K, not a config PAGE_SIZE Yes, to be fixed.> >> >> - for (i = GUC_LOG_BUFFER_CRASH_DUMP; i < GUC_LOG_BUFFER_TYPE_MAX; ++i) { >> - if (i == type) >> - break; >> - offset += xe_guc_get_log_buffer_size(log, i); >> + switch (type) { >> + case GUC_LOG_BUFFER_CAPTURE: >> + offset += XE_GUC_LOG_CRASH_BUFFER_SIZE; > > ../drivers/gpu/drm/xe/xe_guc_log.c: In function ‘xe_guc_get_log_buffer_offset’: > ../drivers/gpu/drm/xe/xe_guc_log.c:335:27: error: ‘XE_GUC_LOG_CRASH_BUFFER_SIZE’ undeclared (first use in this function) > 335 | offset += XE_GUC_LOG_CRASH_BUFFER_SIZE; > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ this rename should be in next patch. Thanks for review, will fix it in next rev. Regards, Zhanjun Dong> > >> + fallthrough; >> + case GUC_LOG_BUFFER_CRASH_DUMP: >> + offset += XE_GUC_LOG_EVENT_LOG_BUFFER_SIZE; >> + fallthrough; >> + case GUC_LOG_BUFFER_EVENT_LOG: >> + break; >> } >> >> return offset; > ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v5 2/2] drm/xe/guc: Add prefix to guc log buffer macros 2025-10-09 21:57 [PATCH v5 0/2] drm/xe/guc: Cleanup GuC log buffer macros and helpers Zhanjun Dong 2025-10-09 21:57 ` [PATCH v5 1/2] drm/xe/guc: Update GuC log buffer type value Zhanjun Dong @ 2025-10-09 21:57 ` Zhanjun Dong 2025-10-21 17:49 ` Michal Wajdeczko 2025-10-09 23:22 ` ✓ CI.KUnit: success for drm/xe/guc: Cleanup GuC log buffer macros and helpers (rev2) Patchwork ` (2 subsequent siblings) 4 siblings, 1 reply; 11+ messages in thread From: Zhanjun Dong @ 2025-10-09 21:57 UTC (permalink / raw) To: intel-xe; +Cc: lucas.demarchi, Zhanjun Dong Add prefix to GuC log buffer macros to follow Xe naming styles. Remove helper functions, replaced with macros. Rename GuC log related macros. Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com> --- drivers/gpu/drm/xe/abi/guc_log_abi.h | 4 +- drivers/gpu/drm/xe/xe_guc.c | 23 ++--- drivers/gpu/drm/xe/xe_guc_capture.c | 16 ++-- drivers/gpu/drm/xe/xe_guc_fwif.h | 6 +- drivers/gpu/drm/xe/xe_guc_log.c | 121 ++++++++++----------------- drivers/gpu/drm/xe/xe_guc_log.h | 14 ++-- 6 files changed, 75 insertions(+), 109 deletions(-) diff --git a/drivers/gpu/drm/xe/abi/guc_log_abi.h b/drivers/gpu/drm/xe/abi/guc_log_abi.h index b1819679fa35..fb5e2b8e7cf9 100644 --- a/drivers/gpu/drm/xe/abi/guc_log_abi.h +++ b/drivers/gpu/drm/xe/abi/guc_log_abi.h @@ -10,9 +10,9 @@ /* GuC logging buffer types */ enum guc_log_buffer_type { - GUC_LOG_BUFFER_DEBUG, + GUC_LOG_BUFFER_EVENT_DATA, GUC_LOG_BUFFER_CRASH_DUMP, - GUC_LOG_BUFFER_CAPTURE, + GUC_LOG_BUFFER_STATE_CAPTURE, }; #define GUC_LOG_BUFFER_TYPE_MAX 3 diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c index d5adbbb013ec..82a22479b741 100644 --- a/drivers/gpu/drm/xe/xe_guc.c +++ b/drivers/gpu/drm/xe/xe_guc.c @@ -99,7 +99,7 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc) u32 offset = guc_bo_ggtt_addr(guc, guc->log.bo) >> PAGE_SHIFT; u32 flags; - #if (((CRASH_BUFFER_SIZE) % SZ_1M) == 0) + #if (((XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE) % SZ_1M) == 0) #define LOG_UNIT SZ_1M #define LOG_FLAG GUC_LOG_LOG_ALLOC_UNITS #else @@ -107,7 +107,7 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc) #define LOG_FLAG 0 #endif - #if (((CAPTURE_BUFFER_SIZE) % SZ_1M) == 0) + #if (((XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE) % SZ_1M) == 0) #define CAPTURE_UNIT SZ_1M #define CAPTURE_FLAG GUC_LOG_CAPTURE_ALLOC_UNITS #else @@ -115,20 +115,21 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc) #define CAPTURE_FLAG 0 #endif - BUILD_BUG_ON(!CRASH_BUFFER_SIZE); - BUILD_BUG_ON(!IS_ALIGNED(CRASH_BUFFER_SIZE, LOG_UNIT)); - BUILD_BUG_ON(!DEBUG_BUFFER_SIZE); - BUILD_BUG_ON(!IS_ALIGNED(DEBUG_BUFFER_SIZE, LOG_UNIT)); - BUILD_BUG_ON(!CAPTURE_BUFFER_SIZE); - BUILD_BUG_ON(!IS_ALIGNED(CAPTURE_BUFFER_SIZE, CAPTURE_UNIT)); + BUILD_BUG_ON(!XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE); + BUILD_BUG_ON(!IS_ALIGNED(XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE, LOG_UNIT)); + BUILD_BUG_ON(!XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE); + BUILD_BUG_ON(!IS_ALIGNED(XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE, LOG_UNIT)); + BUILD_BUG_ON(!XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE); + BUILD_BUG_ON(!IS_ALIGNED(XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE, CAPTURE_UNIT)); flags = GUC_LOG_VALID | GUC_LOG_NOTIFY_ON_HALF_FULL | CAPTURE_FLAG | LOG_FLAG | - FIELD_PREP(GUC_LOG_CRASH, CRASH_BUFFER_SIZE / LOG_UNIT - 1) | - FIELD_PREP(GUC_LOG_DEBUG, DEBUG_BUFFER_SIZE / LOG_UNIT - 1) | - FIELD_PREP(GUC_LOG_CAPTURE, CAPTURE_BUFFER_SIZE / CAPTURE_UNIT - 1) | + FIELD_PREP(GUC_LOG_CRASH_DUMP, XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE / LOG_UNIT - 1) | + FIELD_PREP(GUC_LOG_EVENT_DATA, XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE / LOG_UNIT - 1) | + FIELD_PREP(GUC_LOG_STATE_CAPTURE, XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE / + CAPTURE_UNIT - 1) | FIELD_PREP(GUC_LOG_BUF_ADDR, offset); #undef LOG_UNIT diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c index 243dad3e2418..49b47727cd5a 100644 --- a/drivers/gpu/drm/xe/xe_guc_capture.c +++ b/drivers/gpu/drm/xe/xe_guc_capture.c @@ -816,7 +816,7 @@ static void check_guc_capture_size(struct xe_guc *guc) { int capture_size = guc_capture_output_size_est(guc); int spare_size = capture_size * GUC_CAPTURE_OVERBUFFER_MULTIPLIER; - u32 buffer_size = xe_guc_log_section_size_capture(&guc->log); + u32 buffer_size = XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE; /* * NOTE: capture_size is much smaller than the capture region @@ -922,7 +922,7 @@ guc_capture_init_node(struct xe_guc *guc, struct __guc_capture_parsed_output *no * ADS module also calls separately for PF vs VF. * * --> alloc B: GuC output capture buf (registered via guc_init_params(log_param)) - * Size = #define CAPTURE_BUFFER_SIZE (warns if on too-small) + * Size = #define XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE (warns if on too-small) * Note2: 'x 3' to hold multiple capture groups * * GUC Runtime notify capture: @@ -1340,7 +1340,7 @@ static int __guc_capture_flushlog_complete(struct xe_guc *guc) { u32 action[] = { XE_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE, - GUC_LOG_BUFFER_CAPTURE + GUC_LOG_BUFFER_STATE_CAPTURE }; return xe_guc_ct_send_g2h_handler(&guc->ct, action, ARRAY_SIZE(action)); @@ -1357,8 +1357,8 @@ static void __guc_capture_process_output(struct xe_guc *guc) u32 log_buf_state_offset; u32 src_data_offset; - log_buf_state_offset = sizeof(struct guc_log_buffer_state) * GUC_LOG_BUFFER_CAPTURE; - src_data_offset = xe_guc_get_log_buffer_offset(&guc->log, GUC_LOG_BUFFER_CAPTURE); + log_buf_state_offset = sizeof(struct guc_log_buffer_state) * GUC_LOG_BUFFER_STATE_CAPTURE; + src_data_offset = xe_guc_get_log_buffer_offset(&guc->log, GUC_LOG_BUFFER_STATE_CAPTURE); /* * Make a copy of the state structure, inside GuC log buffer @@ -1368,15 +1368,15 @@ static void __guc_capture_process_output(struct xe_guc *guc) xe_map_memcpy_from(guc_to_xe(guc), &log_buf_state_local, &guc->log.bo->vmap, log_buf_state_offset, sizeof(struct guc_log_buffer_state)); - buffer_size = xe_guc_get_log_buffer_size(&guc->log, GUC_LOG_BUFFER_CAPTURE); + buffer_size = XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE; read_offset = log_buf_state_local.read_ptr; write_offset = log_buf_state_local.sampled_write_ptr; full_count = FIELD_GET(GUC_LOG_BUFFER_STATE_BUFFER_FULL_CNT, log_buf_state_local.flags); /* Bookkeeping stuff */ tmp = FIELD_GET(GUC_LOG_BUFFER_STATE_FLUSH_TO_FILE, log_buf_state_local.flags); - guc->log.stats[GUC_LOG_BUFFER_CAPTURE].flush += tmp; - new_overflow = xe_guc_check_log_buf_overflow(&guc->log, GUC_LOG_BUFFER_CAPTURE, + guc->log.stats[GUC_LOG_BUFFER_STATE_CAPTURE].flush += tmp; + new_overflow = xe_guc_check_log_buf_overflow(&guc->log, GUC_LOG_BUFFER_STATE_CAPTURE, full_count); /* Now copy the actual logs. */ diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h index 50c4c2406132..8b5c58b1857c 100644 --- a/drivers/gpu/drm/xe/xe_guc_fwif.h +++ b/drivers/gpu/drm/xe/xe_guc_fwif.h @@ -91,9 +91,9 @@ struct guc_update_exec_queue_policy { #define GUC_LOG_NOTIFY_ON_HALF_FULL BIT(1) #define GUC_LOG_CAPTURE_ALLOC_UNITS BIT(2) #define GUC_LOG_LOG_ALLOC_UNITS BIT(3) -#define GUC_LOG_CRASH REG_GENMASK(5, 4) -#define GUC_LOG_DEBUG REG_GENMASK(9, 6) -#define GUC_LOG_CAPTURE REG_GENMASK(11, 10) +#define GUC_LOG_CRASH_DUMP REG_GENMASK(5, 4) +#define GUC_LOG_EVENT_DATA REG_GENMASK(9, 6) +#define GUC_LOG_STATE_CAPTURE REG_GENMASK(11, 10) #define GUC_LOG_BUF_ADDR REG_GENMASK(31, 12) #define GUC_CTL_WA 1 diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c index b5d837efaf74..90648968d4d9 100644 --- a/drivers/gpu/drm/xe/xe_guc_log.c +++ b/drivers/gpu/drm/xe/xe_guc_log.c @@ -19,6 +19,44 @@ #include "xe_mmio.h" #include "xe_module.h" +/* + * GuC Log buffer Layout + * + * +===============================+ 0000h + * | Crash dump state header | ^ + * +-------------------------------+ 32B | + * | Debug state header | | + * +-------------------------------+ 64B 4KB + * | Capture state header | | + * +-------------------------------+ 96B | + * | | v + * +===============================+ <--- EVENT_DATA offset + * | Event logs(raw data) | ^ + * | | | + * | | EVENT_DATA_BUFFER_SIZE + * | | | + * | | v + * +===============================+ <--- CRASH_DUMP offset + * | Crash Dump(raw data) | ^ + * | | | + * | | CRASH_DUMP_BUFFER_SIZE + * | | | + * | | v + * +===============================+ <--- STATE_CAPTURE offset + * | Error state capture(raw data) | ^ + * | | | + * | | STATE_CAPTURE_BUFFER_SIZE + * | | | + * | | v + * +===============================+ Total: GUC_LOG_SIZE + */ +#define GUC_LOG_SIZE ((SZ_4K) + \ + (XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE) + \ + (XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE) + \ + (XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE)) + +#define GUC_LOG_CHUNK_SIZE SZ_2M + static struct xe_guc * log_to_guc(struct xe_guc_log *log) { @@ -37,33 +75,6 @@ log_to_xe(struct xe_guc_log *log) return gt_to_xe(log_to_gt(log)); } -static size_t guc_log_size(void) -{ - /* - * GuC Log buffer Layout - * - * +===============================+ 00B - * | Crash dump state header | - * +-------------------------------+ 32B - * | Debug state header | - * +-------------------------------+ 64B - * | Capture state header | - * +-------------------------------+ 96B - * | | - * +===============================+ PAGE_SIZE (4KB) - * | Crash Dump logs | - * +===============================+ + CRASH_SIZE - * | Debug logs | - * +===============================+ + DEBUG_SIZE - * | Capture logs | - * +===============================+ + CAPTURE_SIZE - */ - return PAGE_SIZE + CRASH_BUFFER_SIZE + DEBUG_BUFFER_SIZE + - CAPTURE_BUFFER_SIZE; -} - -#define GUC_LOG_CHUNK_SIZE SZ_2M - static struct xe_guc_log_snapshot *xe_guc_log_snapshot_alloc(struct xe_guc_log *log, bool atomic) { struct xe_guc_log_snapshot *snapshot; @@ -257,7 +268,7 @@ int xe_guc_log_init(struct xe_guc_log *log) struct xe_tile *tile = gt_to_tile(log_to_gt(log)); struct xe_bo *bo; - bo = xe_managed_bo_create_pin_map(xe, tile, guc_log_size(), + bo = xe_managed_bo_create_pin_map(xe, tile, GUC_LOG_SIZE, XE_BO_FLAG_SYSTEM | XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE | @@ -265,7 +276,7 @@ int xe_guc_log_init(struct xe_guc_log *log) if (IS_ERR(bo)) return PTR_ERR(bo); - xe_map_memset(xe, &bo->vmap, 0, 0, guc_log_size()); + xe_map_memset(xe, &bo->vmap, 0, 0, GUC_LOG_SIZE); log->bo = bo; log->level = xe_modparam.guc_log_level; @@ -274,49 +285,6 @@ int xe_guc_log_init(struct xe_guc_log *log) ALLOW_ERROR_INJECTION(xe_guc_log_init, ERRNO); /* See xe_pci_probe() */ -static u32 xe_guc_log_section_size_crash(struct xe_guc_log *log) -{ - return CRASH_BUFFER_SIZE; -} - -static u32 xe_guc_log_section_size_debug(struct xe_guc_log *log) -{ - return DEBUG_BUFFER_SIZE; -} - -/** - * xe_guc_log_section_size_capture - Get capture buffer size within log sections. - * @log: The log object. - * - * This function will return the capture buffer size within log sections. - * - * Return: capture buffer size. - */ -u32 xe_guc_log_section_size_capture(struct xe_guc_log *log) -{ - return CAPTURE_BUFFER_SIZE; -} - -/** - * xe_guc_get_log_buffer_size - Get log buffer size for a type. - * @log: The log object. - * @type: The log buffer type - * - * Return: buffer size. - */ -u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type type) -{ - switch (type) { - case GUC_LOG_BUFFER_CRASH_DUMP: - return xe_guc_log_section_size_crash(log); - case GUC_LOG_BUFFER_DEBUG: - return xe_guc_log_section_size_debug(log); - case GUC_LOG_BUFFER_CAPTURE: - return xe_guc_log_section_size_capture(log); - } - return 0; -} - /** * xe_guc_get_log_buffer_offset - Get offset in log buffer for a type. * @log: The log object. @@ -327,17 +295,16 @@ u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type */ u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_type type) { - enum guc_log_buffer_type i; u32 offset = PAGE_SIZE;/* for the log_buffer_states */ switch (type) { - case GUC_LOG_BUFFER_CAPTURE: - offset += XE_GUC_LOG_CRASH_BUFFER_SIZE; + case GUC_LOG_BUFFER_STATE_CAPTURE: + offset += XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE; fallthrough; case GUC_LOG_BUFFER_CRASH_DUMP: - offset += XE_GUC_LOG_EVENT_LOG_BUFFER_SIZE; + offset += XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE; fallthrough; - case GUC_LOG_BUFFER_EVENT_LOG: + case GUC_LOG_BUFFER_EVENT_DATA: break; } diff --git a/drivers/gpu/drm/xe/xe_guc_log.h b/drivers/gpu/drm/xe/xe_guc_log.h index 98a47ac42b08..a3620462f44c 100644 --- a/drivers/gpu/drm/xe/xe_guc_log.h +++ b/drivers/gpu/drm/xe/xe_guc_log.h @@ -13,13 +13,13 @@ struct drm_printer; struct xe_device; #if IS_ENABLED(CONFIG_DRM_XE_DEBUG_GUC) -#define CRASH_BUFFER_SIZE SZ_1M -#define DEBUG_BUFFER_SIZE SZ_8M -#define CAPTURE_BUFFER_SIZE SZ_2M +#define XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE SZ_8M +#define XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE SZ_1M +#define XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE SZ_2M #else -#define CRASH_BUFFER_SIZE SZ_16K -#define DEBUG_BUFFER_SIZE SZ_64K -#define CAPTURE_BUFFER_SIZE SZ_1M +#define XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE SZ_64K +#define XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE SZ_16K +#define XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE SZ_1M #endif /* * While we're using plain log level in i915, GuC controls are much more... @@ -51,8 +51,6 @@ xe_guc_log_get_level(struct xe_guc_log *log) return log->level; } -u32 xe_guc_log_section_size_capture(struct xe_guc_log *log); -u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type type); u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_type type); bool xe_guc_check_log_buf_overflow(struct xe_guc_log *log, enum guc_log_buffer_type type, -- 2.34.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v5 2/2] drm/xe/guc: Add prefix to guc log buffer macros 2025-10-09 21:57 ` [PATCH v5 2/2] drm/xe/guc: Add prefix to guc log buffer macros Zhanjun Dong @ 2025-10-21 17:49 ` Michal Wajdeczko 2025-10-21 21:13 ` Dong, Zhanjun 0 siblings, 1 reply; 11+ messages in thread From: Michal Wajdeczko @ 2025-10-21 17:49 UTC (permalink / raw) To: Zhanjun Dong, intel-xe; +Cc: lucas.demarchi On 10/9/2025 11:57 PM, Zhanjun Dong wrote: > Add prefix to GuC log buffer macros to follow Xe naming styles. > Remove helper functions, replaced with macros. > Rename GuC log related macros. > > Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com> > --- > drivers/gpu/drm/xe/abi/guc_log_abi.h | 4 +- > drivers/gpu/drm/xe/xe_guc.c | 23 ++--- > drivers/gpu/drm/xe/xe_guc_capture.c | 16 ++-- > drivers/gpu/drm/xe/xe_guc_fwif.h | 6 +- > drivers/gpu/drm/xe/xe_guc_log.c | 121 ++++++++++----------------- > drivers/gpu/drm/xe/xe_guc_log.h | 14 ++-- > 6 files changed, 75 insertions(+), 109 deletions(-) > > diff --git a/drivers/gpu/drm/xe/abi/guc_log_abi.h b/drivers/gpu/drm/xe/abi/guc_log_abi.h > index b1819679fa35..fb5e2b8e7cf9 100644 > --- a/drivers/gpu/drm/xe/abi/guc_log_abi.h > +++ b/drivers/gpu/drm/xe/abi/guc_log_abi.h > @@ -10,9 +10,9 @@ > > /* GuC logging buffer types */ > enum guc_log_buffer_type { > - GUC_LOG_BUFFER_DEBUG, > + GUC_LOG_BUFFER_EVENT_DATA, > GUC_LOG_BUFFER_CRASH_DUMP, > - GUC_LOG_BUFFER_CAPTURE, > + GUC_LOG_BUFFER_STATE_CAPTURE, > }; > > #define GUC_LOG_BUFFER_TYPE_MAX 3 > diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c > index d5adbbb013ec..82a22479b741 100644 > --- a/drivers/gpu/drm/xe/xe_guc.c > +++ b/drivers/gpu/drm/xe/xe_guc.c > @@ -99,7 +99,7 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc) > u32 offset = guc_bo_ggtt_addr(guc, guc->log.bo) >> PAGE_SHIFT; > u32 flags; > > - #if (((CRASH_BUFFER_SIZE) % SZ_1M) == 0) > + #if (((XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE) % SZ_1M) == 0) > #define LOG_UNIT SZ_1M > #define LOG_FLAG GUC_LOG_LOG_ALLOC_UNITS > #else > @@ -107,7 +107,7 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc) > #define LOG_FLAG 0 > #endif > > - #if (((CAPTURE_BUFFER_SIZE) % SZ_1M) == 0) > + #if (((XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE) % SZ_1M) == 0) > #define CAPTURE_UNIT SZ_1M > #define CAPTURE_FLAG GUC_LOG_CAPTURE_ALLOC_UNITS > #else > @@ -115,20 +115,21 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc) > #define CAPTURE_FLAG 0 > #endif > > - BUILD_BUG_ON(!CRASH_BUFFER_SIZE); > - BUILD_BUG_ON(!IS_ALIGNED(CRASH_BUFFER_SIZE, LOG_UNIT)); > - BUILD_BUG_ON(!DEBUG_BUFFER_SIZE); > - BUILD_BUG_ON(!IS_ALIGNED(DEBUG_BUFFER_SIZE, LOG_UNIT)); > - BUILD_BUG_ON(!CAPTURE_BUFFER_SIZE); > - BUILD_BUG_ON(!IS_ALIGNED(CAPTURE_BUFFER_SIZE, CAPTURE_UNIT)); > + BUILD_BUG_ON(!XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE); > + BUILD_BUG_ON(!IS_ALIGNED(XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE, LOG_UNIT)); > + BUILD_BUG_ON(!XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE); > + BUILD_BUG_ON(!IS_ALIGNED(XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE, LOG_UNIT)); > + BUILD_BUG_ON(!XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE); > + BUILD_BUG_ON(!IS_ALIGNED(XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE, CAPTURE_UNIT)); > > flags = GUC_LOG_VALID | > GUC_LOG_NOTIFY_ON_HALF_FULL | > CAPTURE_FLAG | > LOG_FLAG | > - FIELD_PREP(GUC_LOG_CRASH, CRASH_BUFFER_SIZE / LOG_UNIT - 1) | > - FIELD_PREP(GUC_LOG_DEBUG, DEBUG_BUFFER_SIZE / LOG_UNIT - 1) | > - FIELD_PREP(GUC_LOG_CAPTURE, CAPTURE_BUFFER_SIZE / CAPTURE_UNIT - 1) | > + FIELD_PREP(GUC_LOG_CRASH_DUMP, XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE / LOG_UNIT - 1) | > + FIELD_PREP(GUC_LOG_EVENT_DATA, XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE / LOG_UNIT - 1) | > + FIELD_PREP(GUC_LOG_STATE_CAPTURE, XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE / > + CAPTURE_UNIT - 1) | > FIELD_PREP(GUC_LOG_BUF_ADDR, offset); > > #undef LOG_UNIT > diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c > index 243dad3e2418..49b47727cd5a 100644 > --- a/drivers/gpu/drm/xe/xe_guc_capture.c > +++ b/drivers/gpu/drm/xe/xe_guc_capture.c > @@ -816,7 +816,7 @@ static void check_guc_capture_size(struct xe_guc *guc) > { > int capture_size = guc_capture_output_size_est(guc); > int spare_size = capture_size * GUC_CAPTURE_OVERBUFFER_MULTIPLIER; > - u32 buffer_size = xe_guc_log_section_size_capture(&guc->log); > + u32 buffer_size = XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE; > > /* > * NOTE: capture_size is much smaller than the capture region > @@ -922,7 +922,7 @@ guc_capture_init_node(struct xe_guc *guc, struct __guc_capture_parsed_output *no > * ADS module also calls separately for PF vs VF. > * > * --> alloc B: GuC output capture buf (registered via guc_init_params(log_param)) > - * Size = #define CAPTURE_BUFFER_SIZE (warns if on too-small) > + * Size = #define XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE (warns if on too-small) > * Note2: 'x 3' to hold multiple capture groups > * > * GUC Runtime notify capture: > @@ -1340,7 +1340,7 @@ static int __guc_capture_flushlog_complete(struct xe_guc *guc) > { > u32 action[] = { > XE_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE, > - GUC_LOG_BUFFER_CAPTURE > + GUC_LOG_BUFFER_STATE_CAPTURE > }; > > return xe_guc_ct_send_g2h_handler(&guc->ct, action, ARRAY_SIZE(action)); > @@ -1357,8 +1357,8 @@ static void __guc_capture_process_output(struct xe_guc *guc) > u32 log_buf_state_offset; > u32 src_data_offset; > > - log_buf_state_offset = sizeof(struct guc_log_buffer_state) * GUC_LOG_BUFFER_CAPTURE; > - src_data_offset = xe_guc_get_log_buffer_offset(&guc->log, GUC_LOG_BUFFER_CAPTURE); > + log_buf_state_offset = sizeof(struct guc_log_buffer_state) * GUC_LOG_BUFFER_STATE_CAPTURE; > + src_data_offset = xe_guc_get_log_buffer_offset(&guc->log, GUC_LOG_BUFFER_STATE_CAPTURE); > > /* > * Make a copy of the state structure, inside GuC log buffer > @@ -1368,15 +1368,15 @@ static void __guc_capture_process_output(struct xe_guc *guc) > xe_map_memcpy_from(guc_to_xe(guc), &log_buf_state_local, &guc->log.bo->vmap, > log_buf_state_offset, sizeof(struct guc_log_buffer_state)); > > - buffer_size = xe_guc_get_log_buffer_size(&guc->log, GUC_LOG_BUFFER_CAPTURE); > + buffer_size = XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE; > read_offset = log_buf_state_local.read_ptr; > write_offset = log_buf_state_local.sampled_write_ptr; > full_count = FIELD_GET(GUC_LOG_BUFFER_STATE_BUFFER_FULL_CNT, log_buf_state_local.flags); > > /* Bookkeeping stuff */ > tmp = FIELD_GET(GUC_LOG_BUFFER_STATE_FLUSH_TO_FILE, log_buf_state_local.flags); > - guc->log.stats[GUC_LOG_BUFFER_CAPTURE].flush += tmp; > - new_overflow = xe_guc_check_log_buf_overflow(&guc->log, GUC_LOG_BUFFER_CAPTURE, > + guc->log.stats[GUC_LOG_BUFFER_STATE_CAPTURE].flush += tmp; > + new_overflow = xe_guc_check_log_buf_overflow(&guc->log, GUC_LOG_BUFFER_STATE_CAPTURE, > full_count); > > /* Now copy the actual logs. */ > diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h > index 50c4c2406132..8b5c58b1857c 100644 > --- a/drivers/gpu/drm/xe/xe_guc_fwif.h > +++ b/drivers/gpu/drm/xe/xe_guc_fwif.h > @@ -91,9 +91,9 @@ struct guc_update_exec_queue_policy { > #define GUC_LOG_NOTIFY_ON_HALF_FULL BIT(1) > #define GUC_LOG_CAPTURE_ALLOC_UNITS BIT(2) > #define GUC_LOG_LOG_ALLOC_UNITS BIT(3) > -#define GUC_LOG_CRASH REG_GENMASK(5, 4) > -#define GUC_LOG_DEBUG REG_GENMASK(9, 6) > -#define GUC_LOG_CAPTURE REG_GENMASK(11, 10) > +#define GUC_LOG_CRASH_DUMP REG_GENMASK(5, 4) > +#define GUC_LOG_EVENT_DATA REG_GENMASK(9, 6) > +#define GUC_LOG_STATE_CAPTURE REG_GENMASK(11, 10) > #define GUC_LOG_BUF_ADDR REG_GENMASK(31, 12) > > #define GUC_CTL_WA 1 > diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c > index b5d837efaf74..90648968d4d9 100644 > --- a/drivers/gpu/drm/xe/xe_guc_log.c > +++ b/drivers/gpu/drm/xe/xe_guc_log.c > @@ -19,6 +19,44 @@ > #include "xe_mmio.h" > #include "xe_module.h" > > +/* > + * GuC Log buffer Layout maybe this could be promoted do kernel-doc: /** * DOC: GuC Log buffer Layout * * :: * > + * > + * +===============================+ 0000h > + * | Crash dump state header | ^ > + * +-------------------------------+ 32B | > + * | Debug state header | | > + * +-------------------------------+ 64B 4KB > + * | Capture state header | | > + * +-------------------------------+ 96B | > + * | | v > + * +===============================+ <--- EVENT_DATA offset > + * | Event logs(raw data) | ^ > + * | | | > + * | | EVENT_DATA_BUFFER_SIZE > + * | | | > + * | | v > + * +===============================+ <--- CRASH_DUMP offset > + * | Crash Dump(raw data) | ^ > + * | | | > + * | | CRASH_DUMP_BUFFER_SIZE > + * | | | > + * | | v > + * +===============================+ <--- STATE_CAPTURE offset > + * | Error state capture(raw data) | ^ > + * | | | > + * | | STATE_CAPTURE_BUFFER_SIZE > + * | | | > + * | | v > + * +===============================+ Total: GUC_LOG_SIZE > + */ > +#define GUC_LOG_SIZE ((SZ_4K) + \ > + (XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE) + \ > + (XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE) + \ > + (XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE)) too many ( ), only one set is needed to wrap all additions > + > +#define GUC_LOG_CHUNK_SIZE SZ_2M > + > static struct xe_guc * > log_to_guc(struct xe_guc_log *log) > { > @@ -37,33 +75,6 @@ log_to_xe(struct xe_guc_log *log) > return gt_to_xe(log_to_gt(log)); > } > > -static size_t guc_log_size(void) > -{ > - /* > - * GuC Log buffer Layout > - * > - * +===============================+ 00B > - * | Crash dump state header | > - * +-------------------------------+ 32B > - * | Debug state header | > - * +-------------------------------+ 64B > - * | Capture state header | > - * +-------------------------------+ 96B > - * | | > - * +===============================+ PAGE_SIZE (4KB) > - * | Crash Dump logs | > - * +===============================+ + CRASH_SIZE > - * | Debug logs | > - * +===============================+ + DEBUG_SIZE > - * | Capture logs | > - * +===============================+ + CAPTURE_SIZE > - */ > - return PAGE_SIZE + CRASH_BUFFER_SIZE + DEBUG_BUFFER_SIZE + > - CAPTURE_BUFFER_SIZE; > -} > - > -#define GUC_LOG_CHUNK_SIZE SZ_2M > - > static struct xe_guc_log_snapshot *xe_guc_log_snapshot_alloc(struct xe_guc_log *log, bool atomic) > { > struct xe_guc_log_snapshot *snapshot; > @@ -257,7 +268,7 @@ int xe_guc_log_init(struct xe_guc_log *log) > struct xe_tile *tile = gt_to_tile(log_to_gt(log)); > struct xe_bo *bo; > > - bo = xe_managed_bo_create_pin_map(xe, tile, guc_log_size(), > + bo = xe_managed_bo_create_pin_map(xe, tile, GUC_LOG_SIZE, > XE_BO_FLAG_SYSTEM | > XE_BO_FLAG_GGTT | > XE_BO_FLAG_GGTT_INVALIDATE | > @@ -265,7 +276,7 @@ int xe_guc_log_init(struct xe_guc_log *log) > if (IS_ERR(bo)) > return PTR_ERR(bo); > > - xe_map_memset(xe, &bo->vmap, 0, 0, guc_log_size()); > + xe_map_memset(xe, &bo->vmap, 0, 0, GUC_LOG_SIZE); > log->bo = bo; > log->level = xe_modparam.guc_log_level; > > @@ -274,49 +285,6 @@ int xe_guc_log_init(struct xe_guc_log *log) > > ALLOW_ERROR_INJECTION(xe_guc_log_init, ERRNO); /* See xe_pci_probe() */ > > -static u32 xe_guc_log_section_size_crash(struct xe_guc_log *log) > -{ > - return CRASH_BUFFER_SIZE; > -} > - > -static u32 xe_guc_log_section_size_debug(struct xe_guc_log *log) > -{ > - return DEBUG_BUFFER_SIZE; > -} > - > -/** > - * xe_guc_log_section_size_capture - Get capture buffer size within log sections. > - * @log: The log object. > - * > - * This function will return the capture buffer size within log sections. > - * > - * Return: capture buffer size. > - */ > -u32 xe_guc_log_section_size_capture(struct xe_guc_log *log) > -{ > - return CAPTURE_BUFFER_SIZE; > -} > - > -/** > - * xe_guc_get_log_buffer_size - Get log buffer size for a type. > - * @log: The log object. > - * @type: The log buffer type > - * > - * Return: buffer size. > - */ > -u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type type) > -{ > - switch (type) { > - case GUC_LOG_BUFFER_CRASH_DUMP: > - return xe_guc_log_section_size_crash(log); > - case GUC_LOG_BUFFER_DEBUG: > - return xe_guc_log_section_size_debug(log); > - case GUC_LOG_BUFFER_CAPTURE: > - return xe_guc_log_section_size_capture(log); > - } > - return 0; > -} > - > /** > * xe_guc_get_log_buffer_offset - Get offset in log buffer for a type. > * @log: The log object. > @@ -327,17 +295,16 @@ u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type > */ > u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_type type) > { > - enum guc_log_buffer_type i; > u32 offset = PAGE_SIZE;/* for the log_buffer_states */ > > switch (type) { > - case GUC_LOG_BUFFER_CAPTURE: > - offset += XE_GUC_LOG_CRASH_BUFFER_SIZE; > + case GUC_LOG_BUFFER_STATE_CAPTURE: > + offset += XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE; > fallthrough; > case GUC_LOG_BUFFER_CRASH_DUMP: > - offset += XE_GUC_LOG_EVENT_LOG_BUFFER_SIZE; > + offset += XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE; > fallthrough; > - case GUC_LOG_BUFFER_EVENT_LOG: > + case GUC_LOG_BUFFER_EVENT_DATA: maybe to avoid changing the same lines in the same small series twice, in patch 1 change not just order of enums but also update their names and don't do anything else.. maybe patches shall be in this order: * reorder enum guc_log_buffer_type to match spec * rename enum guc_log_buffer_type to match spec * add XE_GUC_LOG prefix to public macros to match naming pattern * use macros instead functions for size/offset or if the split is really not feasible then do everything in a single patch ;( > break; > } > > diff --git a/drivers/gpu/drm/xe/xe_guc_log.h b/drivers/gpu/drm/xe/xe_guc_log.h > index 98a47ac42b08..a3620462f44c 100644 > --- a/drivers/gpu/drm/xe/xe_guc_log.h > +++ b/drivers/gpu/drm/xe/xe_guc_log.h > @@ -13,13 +13,13 @@ struct drm_printer; > struct xe_device; > > #if IS_ENABLED(CONFIG_DRM_XE_DEBUG_GUC) > -#define CRASH_BUFFER_SIZE SZ_1M > -#define DEBUG_BUFFER_SIZE SZ_8M > -#define CAPTURE_BUFFER_SIZE SZ_2M > +#define XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE SZ_8M > +#define XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE SZ_1M > +#define XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE SZ_2M > #else > -#define CRASH_BUFFER_SIZE SZ_16K > -#define DEBUG_BUFFER_SIZE SZ_64K > -#define CAPTURE_BUFFER_SIZE SZ_1M > +#define XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE SZ_64K > +#define XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE SZ_16K > +#define XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE SZ_1M > #endif > /* > * While we're using plain log level in i915, GuC controls are much more... > @@ -51,8 +51,6 @@ xe_guc_log_get_level(struct xe_guc_log *log) > return log->level; > } > > -u32 xe_guc_log_section_size_capture(struct xe_guc_log *log); > -u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type type); > u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_type type); > bool xe_guc_check_log_buf_overflow(struct xe_guc_log *log, > enum guc_log_buffer_type type, ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v5 2/2] drm/xe/guc: Add prefix to guc log buffer macros 2025-10-21 17:49 ` Michal Wajdeczko @ 2025-10-21 21:13 ` Dong, Zhanjun 2025-10-21 21:25 ` Michal Wajdeczko 0 siblings, 1 reply; 11+ messages in thread From: Dong, Zhanjun @ 2025-10-21 21:13 UTC (permalink / raw) To: Michal Wajdeczko, intel-xe; +Cc: lucas.demarchi On 2025-10-21 1:49 p.m., Michal Wajdeczko wrote: > > > On 10/9/2025 11:57 PM, Zhanjun Dong wrote: >> Add prefix to GuC log buffer macros to follow Xe naming styles. >> Remove helper functions, replaced with macros. >> Rename GuC log related macros. >> >> Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com> >> --- >> drivers/gpu/drm/xe/abi/guc_log_abi.h | 4 +- >> drivers/gpu/drm/xe/xe_guc.c | 23 ++--- >> drivers/gpu/drm/xe/xe_guc_capture.c | 16 ++-- >> drivers/gpu/drm/xe/xe_guc_fwif.h | 6 +- >> drivers/gpu/drm/xe/xe_guc_log.c | 121 ++++++++++----------------- >> drivers/gpu/drm/xe/xe_guc_log.h | 14 ++-- >> 6 files changed, 75 insertions(+), 109 deletions(-) >> >> diff --git a/drivers/gpu/drm/xe/abi/guc_log_abi.h b/drivers/gpu/drm/xe/abi/guc_log_abi.h >> index b1819679fa35..fb5e2b8e7cf9 100644 >> --- a/drivers/gpu/drm/xe/abi/guc_log_abi.h >> +++ b/drivers/gpu/drm/xe/abi/guc_log_abi.h >> @@ -10,9 +10,9 @@ >> >> /* GuC logging buffer types */ >> enum guc_log_buffer_type { >> - GUC_LOG_BUFFER_DEBUG, >> + GUC_LOG_BUFFER_EVENT_DATA, >> GUC_LOG_BUFFER_CRASH_DUMP, >> - GUC_LOG_BUFFER_CAPTURE, >> + GUC_LOG_BUFFER_STATE_CAPTURE, >> }; >> >> #define GUC_LOG_BUFFER_TYPE_MAX 3 >> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c >> index d5adbbb013ec..82a22479b741 100644 >> --- a/drivers/gpu/drm/xe/xe_guc.c >> +++ b/drivers/gpu/drm/xe/xe_guc.c >> @@ -99,7 +99,7 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc) >> u32 offset = guc_bo_ggtt_addr(guc, guc->log.bo) >> PAGE_SHIFT; >> u32 flags; >> >> - #if (((CRASH_BUFFER_SIZE) % SZ_1M) == 0) >> + #if (((XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE) % SZ_1M) == 0) >> #define LOG_UNIT SZ_1M >> #define LOG_FLAG GUC_LOG_LOG_ALLOC_UNITS >> #else >> @@ -107,7 +107,7 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc) >> #define LOG_FLAG 0 >> #endif >> >> - #if (((CAPTURE_BUFFER_SIZE) % SZ_1M) == 0) >> + #if (((XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE) % SZ_1M) == 0) >> #define CAPTURE_UNIT SZ_1M >> #define CAPTURE_FLAG GUC_LOG_CAPTURE_ALLOC_UNITS >> #else >> @@ -115,20 +115,21 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc) >> #define CAPTURE_FLAG 0 >> #endif >> >> - BUILD_BUG_ON(!CRASH_BUFFER_SIZE); >> - BUILD_BUG_ON(!IS_ALIGNED(CRASH_BUFFER_SIZE, LOG_UNIT)); >> - BUILD_BUG_ON(!DEBUG_BUFFER_SIZE); >> - BUILD_BUG_ON(!IS_ALIGNED(DEBUG_BUFFER_SIZE, LOG_UNIT)); >> - BUILD_BUG_ON(!CAPTURE_BUFFER_SIZE); >> - BUILD_BUG_ON(!IS_ALIGNED(CAPTURE_BUFFER_SIZE, CAPTURE_UNIT)); >> + BUILD_BUG_ON(!XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE); >> + BUILD_BUG_ON(!IS_ALIGNED(XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE, LOG_UNIT)); >> + BUILD_BUG_ON(!XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE); >> + BUILD_BUG_ON(!IS_ALIGNED(XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE, LOG_UNIT)); >> + BUILD_BUG_ON(!XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE); >> + BUILD_BUG_ON(!IS_ALIGNED(XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE, CAPTURE_UNIT)); >> >> flags = GUC_LOG_VALID | >> GUC_LOG_NOTIFY_ON_HALF_FULL | >> CAPTURE_FLAG | >> LOG_FLAG | >> - FIELD_PREP(GUC_LOG_CRASH, CRASH_BUFFER_SIZE / LOG_UNIT - 1) | >> - FIELD_PREP(GUC_LOG_DEBUG, DEBUG_BUFFER_SIZE / LOG_UNIT - 1) | >> - FIELD_PREP(GUC_LOG_CAPTURE, CAPTURE_BUFFER_SIZE / CAPTURE_UNIT - 1) | >> + FIELD_PREP(GUC_LOG_CRASH_DUMP, XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE / LOG_UNIT - 1) | >> + FIELD_PREP(GUC_LOG_EVENT_DATA, XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE / LOG_UNIT - 1) | >> + FIELD_PREP(GUC_LOG_STATE_CAPTURE, XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE / >> + CAPTURE_UNIT - 1) | >> FIELD_PREP(GUC_LOG_BUF_ADDR, offset); >> >> #undef LOG_UNIT >> diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c >> index 243dad3e2418..49b47727cd5a 100644 >> --- a/drivers/gpu/drm/xe/xe_guc_capture.c >> +++ b/drivers/gpu/drm/xe/xe_guc_capture.c >> @@ -816,7 +816,7 @@ static void check_guc_capture_size(struct xe_guc *guc) >> { >> int capture_size = guc_capture_output_size_est(guc); >> int spare_size = capture_size * GUC_CAPTURE_OVERBUFFER_MULTIPLIER; >> - u32 buffer_size = xe_guc_log_section_size_capture(&guc->log); >> + u32 buffer_size = XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE; >> >> /* >> * NOTE: capture_size is much smaller than the capture region >> @@ -922,7 +922,7 @@ guc_capture_init_node(struct xe_guc *guc, struct __guc_capture_parsed_output *no >> * ADS module also calls separately for PF vs VF. >> * >> * --> alloc B: GuC output capture buf (registered via guc_init_params(log_param)) >> - * Size = #define CAPTURE_BUFFER_SIZE (warns if on too-small) >> + * Size = #define XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE (warns if on too-small) >> * Note2: 'x 3' to hold multiple capture groups >> * >> * GUC Runtime notify capture: >> @@ -1340,7 +1340,7 @@ static int __guc_capture_flushlog_complete(struct xe_guc *guc) >> { >> u32 action[] = { >> XE_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE, >> - GUC_LOG_BUFFER_CAPTURE >> + GUC_LOG_BUFFER_STATE_CAPTURE >> }; >> >> return xe_guc_ct_send_g2h_handler(&guc->ct, action, ARRAY_SIZE(action)); >> @@ -1357,8 +1357,8 @@ static void __guc_capture_process_output(struct xe_guc *guc) >> u32 log_buf_state_offset; >> u32 src_data_offset; >> >> - log_buf_state_offset = sizeof(struct guc_log_buffer_state) * GUC_LOG_BUFFER_CAPTURE; >> - src_data_offset = xe_guc_get_log_buffer_offset(&guc->log, GUC_LOG_BUFFER_CAPTURE); >> + log_buf_state_offset = sizeof(struct guc_log_buffer_state) * GUC_LOG_BUFFER_STATE_CAPTURE; >> + src_data_offset = xe_guc_get_log_buffer_offset(&guc->log, GUC_LOG_BUFFER_STATE_CAPTURE); >> >> /* >> * Make a copy of the state structure, inside GuC log buffer >> @@ -1368,15 +1368,15 @@ static void __guc_capture_process_output(struct xe_guc *guc) >> xe_map_memcpy_from(guc_to_xe(guc), &log_buf_state_local, &guc->log.bo->vmap, >> log_buf_state_offset, sizeof(struct guc_log_buffer_state)); >> >> - buffer_size = xe_guc_get_log_buffer_size(&guc->log, GUC_LOG_BUFFER_CAPTURE); >> + buffer_size = XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE; >> read_offset = log_buf_state_local.read_ptr; >> write_offset = log_buf_state_local.sampled_write_ptr; >> full_count = FIELD_GET(GUC_LOG_BUFFER_STATE_BUFFER_FULL_CNT, log_buf_state_local.flags); >> >> /* Bookkeeping stuff */ >> tmp = FIELD_GET(GUC_LOG_BUFFER_STATE_FLUSH_TO_FILE, log_buf_state_local.flags); >> - guc->log.stats[GUC_LOG_BUFFER_CAPTURE].flush += tmp; >> - new_overflow = xe_guc_check_log_buf_overflow(&guc->log, GUC_LOG_BUFFER_CAPTURE, >> + guc->log.stats[GUC_LOG_BUFFER_STATE_CAPTURE].flush += tmp; >> + new_overflow = xe_guc_check_log_buf_overflow(&guc->log, GUC_LOG_BUFFER_STATE_CAPTURE, >> full_count); >> >> /* Now copy the actual logs. */ >> diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h >> index 50c4c2406132..8b5c58b1857c 100644 >> --- a/drivers/gpu/drm/xe/xe_guc_fwif.h >> +++ b/drivers/gpu/drm/xe/xe_guc_fwif.h >> @@ -91,9 +91,9 @@ struct guc_update_exec_queue_policy { >> #define GUC_LOG_NOTIFY_ON_HALF_FULL BIT(1) >> #define GUC_LOG_CAPTURE_ALLOC_UNITS BIT(2) >> #define GUC_LOG_LOG_ALLOC_UNITS BIT(3) >> -#define GUC_LOG_CRASH REG_GENMASK(5, 4) >> -#define GUC_LOG_DEBUG REG_GENMASK(9, 6) >> -#define GUC_LOG_CAPTURE REG_GENMASK(11, 10) >> +#define GUC_LOG_CRASH_DUMP REG_GENMASK(5, 4) >> +#define GUC_LOG_EVENT_DATA REG_GENMASK(9, 6) >> +#define GUC_LOG_STATE_CAPTURE REG_GENMASK(11, 10) >> #define GUC_LOG_BUF_ADDR REG_GENMASK(31, 12) >> >> #define GUC_CTL_WA 1 >> diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c >> index b5d837efaf74..90648968d4d9 100644 >> --- a/drivers/gpu/drm/xe/xe_guc_log.c >> +++ b/drivers/gpu/drm/xe/xe_guc_log.c >> @@ -19,6 +19,44 @@ >> #include "xe_mmio.h" >> #include "xe_module.h" >> >> +/* >> + * GuC Log buffer Layout > > maybe this could be promoted do kernel-doc: > > /** > * DOC: GuC Log buffer Layout > * > * :: > * > >> + * >> + * +===============================+ 0000h >> + * | Crash dump state header | ^ >> + * +-------------------------------+ 32B | >> + * | Debug state header | | >> + * +-------------------------------+ 64B 4KB >> + * | Capture state header | | >> + * +-------------------------------+ 96B | >> + * | | v >> + * +===============================+ <--- EVENT_DATA offset >> + * | Event logs(raw data) | ^ >> + * | | | >> + * | | EVENT_DATA_BUFFER_SIZE >> + * | | | >> + * | | v >> + * +===============================+ <--- CRASH_DUMP offset >> + * | Crash Dump(raw data) | ^ >> + * | | | >> + * | | CRASH_DUMP_BUFFER_SIZE >> + * | | | >> + * | | v >> + * +===============================+ <--- STATE_CAPTURE offset >> + * | Error state capture(raw data) | ^ >> + * | | | >> + * | | STATE_CAPTURE_BUFFER_SIZE >> + * | | | >> + * | | v >> + * +===============================+ Total: GUC_LOG_SIZE >> + */ >> +#define GUC_LOG_SIZE ((SZ_4K) + \ >> + (XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE) + \ >> + (XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE) + \ >> + (XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE)) > > too many ( ), only one set is needed to wrap all additions will change it to +#define GUC_LOG_SIZE (SZ_4K) + \ + (XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE) + \ + (XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE) + \ + (XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE) I follow the rule that add () to all macros referenced as operand within an expression. This way if the operand macro was change in the future, the logic in this macro, like operator precedence will not be effected. >> + >> +#define GUC_LOG_CHUNK_SIZE SZ_2M >> + >> static struct xe_guc * >> log_to_guc(struct xe_guc_log *log) >> { >> @@ -37,33 +75,6 @@ log_to_xe(struct xe_guc_log *log) >> return gt_to_xe(log_to_gt(log)); >> } >> >> -static size_t guc_log_size(void) >> -{ >> - /* >> - * GuC Log buffer Layout >> - * >> - * +===============================+ 00B >> - * | Crash dump state header | >> - * +-------------------------------+ 32B >> - * | Debug state header | >> - * +-------------------------------+ 64B >> - * | Capture state header | >> - * +-------------------------------+ 96B >> - * | | >> - * +===============================+ PAGE_SIZE (4KB) >> - * | Crash Dump logs | >> - * +===============================+ + CRASH_SIZE >> - * | Debug logs | >> - * +===============================+ + DEBUG_SIZE >> - * | Capture logs | >> - * +===============================+ + CAPTURE_SIZE >> - */ >> - return PAGE_SIZE + CRASH_BUFFER_SIZE + DEBUG_BUFFER_SIZE + >> - CAPTURE_BUFFER_SIZE; >> -} >> - >> -#define GUC_LOG_CHUNK_SIZE SZ_2M >> - >> static struct xe_guc_log_snapshot *xe_guc_log_snapshot_alloc(struct xe_guc_log *log, bool atomic) >> { >> struct xe_guc_log_snapshot *snapshot; >> @@ -257,7 +268,7 @@ int xe_guc_log_init(struct xe_guc_log *log) >> struct xe_tile *tile = gt_to_tile(log_to_gt(log)); >> struct xe_bo *bo; >> >> - bo = xe_managed_bo_create_pin_map(xe, tile, guc_log_size(), >> + bo = xe_managed_bo_create_pin_map(xe, tile, GUC_LOG_SIZE, >> XE_BO_FLAG_SYSTEM | >> XE_BO_FLAG_GGTT | >> XE_BO_FLAG_GGTT_INVALIDATE | >> @@ -265,7 +276,7 @@ int xe_guc_log_init(struct xe_guc_log *log) >> if (IS_ERR(bo)) >> return PTR_ERR(bo); >> >> - xe_map_memset(xe, &bo->vmap, 0, 0, guc_log_size()); >> + xe_map_memset(xe, &bo->vmap, 0, 0, GUC_LOG_SIZE); >> log->bo = bo; >> log->level = xe_modparam.guc_log_level; >> >> @@ -274,49 +285,6 @@ int xe_guc_log_init(struct xe_guc_log *log) >> >> ALLOW_ERROR_INJECTION(xe_guc_log_init, ERRNO); /* See xe_pci_probe() */ >> >> -static u32 xe_guc_log_section_size_crash(struct xe_guc_log *log) >> -{ >> - return CRASH_BUFFER_SIZE; >> -} >> - >> -static u32 xe_guc_log_section_size_debug(struct xe_guc_log *log) >> -{ >> - return DEBUG_BUFFER_SIZE; >> -} >> - >> -/** >> - * xe_guc_log_section_size_capture - Get capture buffer size within log sections. >> - * @log: The log object. >> - * >> - * This function will return the capture buffer size within log sections. >> - * >> - * Return: capture buffer size. >> - */ >> -u32 xe_guc_log_section_size_capture(struct xe_guc_log *log) >> -{ >> - return CAPTURE_BUFFER_SIZE; >> -} >> - >> -/** >> - * xe_guc_get_log_buffer_size - Get log buffer size for a type. >> - * @log: The log object. >> - * @type: The log buffer type >> - * >> - * Return: buffer size. >> - */ >> -u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type type) >> -{ >> - switch (type) { >> - case GUC_LOG_BUFFER_CRASH_DUMP: >> - return xe_guc_log_section_size_crash(log); >> - case GUC_LOG_BUFFER_DEBUG: >> - return xe_guc_log_section_size_debug(log); >> - case GUC_LOG_BUFFER_CAPTURE: >> - return xe_guc_log_section_size_capture(log); >> - } >> - return 0; >> -} >> - >> /** >> * xe_guc_get_log_buffer_offset - Get offset in log buffer for a type. >> * @log: The log object. >> @@ -327,17 +295,16 @@ u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type >> */ >> u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_type type) >> { >> - enum guc_log_buffer_type i; >> u32 offset = PAGE_SIZE;/* for the log_buffer_states */ >> >> switch (type) { >> - case GUC_LOG_BUFFER_CAPTURE: >> - offset += XE_GUC_LOG_CRASH_BUFFER_SIZE; >> + case GUC_LOG_BUFFER_STATE_CAPTURE: >> + offset += XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE; >> fallthrough; >> case GUC_LOG_BUFFER_CRASH_DUMP: >> - offset += XE_GUC_LOG_EVENT_LOG_BUFFER_SIZE; >> + offset += XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE; >> fallthrough; >> - case GUC_LOG_BUFFER_EVENT_LOG: >> + case GUC_LOG_BUFFER_EVENT_DATA: > > maybe to avoid changing the same lines in the same small series twice, > in patch 1 change not just order of enums but also update their names > and don't do anything else.. > > maybe patches shall be in this order: > * reorder enum guc_log_buffer_type to match spec > * rename enum guc_log_buffer_type to match spec > * add XE_GUC_LOG prefix to public macros to match naming pattern > * use macros instead functions for size/offset > > or if the split is really not feasible then do everything in a single patch ;( I like this idea Regards, Zhanjun Dong >> break; >> } >> >> diff --git a/drivers/gpu/drm/xe/xe_guc_log.h b/drivers/gpu/drm/xe/xe_guc_log.h >> index 98a47ac42b08..a3620462f44c 100644 >> --- a/drivers/gpu/drm/xe/xe_guc_log.h >> +++ b/drivers/gpu/drm/xe/xe_guc_log.h >> @@ -13,13 +13,13 @@ struct drm_printer; >> struct xe_device; >> >> #if IS_ENABLED(CONFIG_DRM_XE_DEBUG_GUC) >> -#define CRASH_BUFFER_SIZE SZ_1M >> -#define DEBUG_BUFFER_SIZE SZ_8M >> -#define CAPTURE_BUFFER_SIZE SZ_2M >> +#define XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE SZ_8M >> +#define XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE SZ_1M >> +#define XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE SZ_2M >> #else >> -#define CRASH_BUFFER_SIZE SZ_16K >> -#define DEBUG_BUFFER_SIZE SZ_64K >> -#define CAPTURE_BUFFER_SIZE SZ_1M >> +#define XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE SZ_64K >> +#define XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE SZ_16K >> +#define XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE SZ_1M >> #endif >> /* >> * While we're using plain log level in i915, GuC controls are much more... >> @@ -51,8 +51,6 @@ xe_guc_log_get_level(struct xe_guc_log *log) >> return log->level; >> } >> >> -u32 xe_guc_log_section_size_capture(struct xe_guc_log *log); >> -u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type type); >> u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_type type); >> bool xe_guc_check_log_buf_overflow(struct xe_guc_log *log, >> enum guc_log_buffer_type type, > ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v5 2/2] drm/xe/guc: Add prefix to guc log buffer macros 2025-10-21 21:13 ` Dong, Zhanjun @ 2025-10-21 21:25 ` Michal Wajdeczko 0 siblings, 0 replies; 11+ messages in thread From: Michal Wajdeczko @ 2025-10-21 21:25 UTC (permalink / raw) To: Dong, Zhanjun, intel-xe; +Cc: lucas.demarchi On 10/21/2025 11:13 PM, Dong, Zhanjun wrote: > > > On 2025-10-21 1:49 p.m., Michal Wajdeczko wrote: >> >> >> On 10/9/2025 11:57 PM, Zhanjun Dong wrote: ... >>> +#define GUC_LOG_SIZE ((SZ_4K) + \ >>> + (XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE) + \ >>> + (XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE) + \ >>> + (XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE)) >> >> too many ( ), only one set is needed to wrap all additions > > will change it to > +#define GUC_LOG_SIZE (SZ_4K) + \ > + (XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE) + \ > + (XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE) + \ > + (XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE) > > I follow the rule that add () to all macros referenced as operand within an expression. > This way if the operand macro was change in the future, the logic in this macro, like operator precedence will not be effected. > but it is the responsibility of each macro definition to provide consistent outcome while it is possible, it would be an huge mistake to define something like this: #define SZ_1K 1023 + 1 as that would break not just your code, but 1000's other places so IMO GUC_LOG_SIZE should be defined as: #define GUC_LOG_SIZE (SZ_4K + \ XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE + \ XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE + \ XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE) and just make sure that all other XE_GUC_LOG_xxx macros follows the same BKM ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ CI.KUnit: success for drm/xe/guc: Cleanup GuC log buffer macros and helpers (rev2) 2025-10-09 21:57 [PATCH v5 0/2] drm/xe/guc: Cleanup GuC log buffer macros and helpers Zhanjun Dong 2025-10-09 21:57 ` [PATCH v5 1/2] drm/xe/guc: Update GuC log buffer type value Zhanjun Dong 2025-10-09 21:57 ` [PATCH v5 2/2] drm/xe/guc: Add prefix to guc log buffer macros Zhanjun Dong @ 2025-10-09 23:22 ` Patchwork 2025-10-10 0:17 ` ✓ Xe.CI.BAT: " Patchwork 2025-10-10 9:04 ` ✓ Xe.CI.Full: " Patchwork 4 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2025-10-09 23:22 UTC (permalink / raw) To: Zhanjun Dong; +Cc: intel-xe == Series Details == Series: drm/xe/guc: Cleanup GuC log buffer macros and helpers (rev2) URL : https://patchwork.freedesktop.org/series/155338/ State : success == Summary == + trap cleanup EXIT + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig [23:21:03] Configuring KUnit Kernel ... Generating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [23:21:07] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [23:21:36] Starting KUnit Kernel (1/1)... [23:21:36] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [23:21:36] ================== guc_buf (11 subtests) =================== [23:21:36] [PASSED] test_smallest [23:21:36] [PASSED] test_largest [23:21:36] [PASSED] test_granular [23:21:36] [PASSED] test_unique [23:21:36] [PASSED] test_overlap [23:21:36] [PASSED] test_reusable [23:21:36] [PASSED] test_too_big [23:21:36] [PASSED] test_flush [23:21:36] [PASSED] test_lookup [23:21:36] [PASSED] test_data [23:21:36] [PASSED] test_class [23:21:36] ===================== [PASSED] guc_buf ===================== [23:21:36] =================== guc_dbm (7 subtests) =================== [23:21:36] [PASSED] test_empty [23:21:36] [PASSED] test_default [23:21:36] ======================== test_size ======================== [23:21:36] [PASSED] 4 [23:21:36] [PASSED] 8 [23:21:36] [PASSED] 32 [23:21:36] [PASSED] 256 [23:21:36] ==================== [PASSED] test_size ==================== [23:21:36] ======================= test_reuse ======================== [23:21:36] [PASSED] 4 [23:21:36] [PASSED] 8 [23:21:36] [PASSED] 32 [23:21:36] [PASSED] 256 [23:21:36] =================== [PASSED] test_reuse ==================== [23:21:36] =================== test_range_overlap ==================== [23:21:36] [PASSED] 4 [23:21:36] [PASSED] 8 [23:21:36] [PASSED] 32 [23:21:36] [PASSED] 256 [23:21:36] =============== [PASSED] test_range_overlap ================ [23:21:36] =================== test_range_compact ==================== [23:21:36] [PASSED] 4 [23:21:36] [PASSED] 8 [23:21:36] [PASSED] 32 [23:21:36] [PASSED] 256 [23:21:36] =============== [PASSED] test_range_compact ================ [23:21:36] ==================== test_range_spare ===================== [23:21:36] [PASSED] 4 [23:21:36] [PASSED] 8 [23:21:36] [PASSED] 32 [23:21:36] [PASSED] 256 [23:21:36] ================ [PASSED] test_range_spare ================= [23:21:36] ===================== [PASSED] guc_dbm ===================== [23:21:36] =================== guc_idm (6 subtests) =================== [23:21:36] [PASSED] bad_init [23:21:36] [PASSED] no_init [23:21:36] [PASSED] init_fini [23:21:36] [PASSED] check_used [23:21:36] [PASSED] check_quota [23:21:36] [PASSED] check_all [23:21:36] ===================== [PASSED] guc_idm ===================== [23:21:36] ================== no_relay (3 subtests) =================== [23:21:36] [PASSED] xe_drops_guc2pf_if_not_ready [23:21:36] [PASSED] xe_drops_guc2vf_if_not_ready [23:21:36] [PASSED] xe_rejects_send_if_not_ready [23:21:36] ==================== [PASSED] no_relay ===================== [23:21:36] ================== pf_relay (14 subtests) ================== [23:21:36] [PASSED] pf_rejects_guc2pf_too_short [23:21:36] [PASSED] pf_rejects_guc2pf_too_long [23:21:36] [PASSED] pf_rejects_guc2pf_no_payload [23:21:36] [PASSED] pf_fails_no_payload [23:21:36] [PASSED] pf_fails_bad_origin [23:21:36] [PASSED] pf_fails_bad_type [23:21:36] [PASSED] pf_txn_reports_error [23:21:36] [PASSED] pf_txn_sends_pf2guc [23:21:36] [PASSED] pf_sends_pf2guc [23:21:36] [SKIPPED] pf_loopback_nop [23:21:36] [SKIPPED] pf_loopback_echo [23:21:36] [SKIPPED] pf_loopback_fail [23:21:36] [SKIPPED] pf_loopback_busy [23:21:36] [SKIPPED] pf_loopback_retry [23:21:36] ==================== [PASSED] pf_relay ===================== [23:21:36] ================== vf_relay (3 subtests) =================== [23:21:36] [PASSED] vf_rejects_guc2vf_too_short [23:21:36] [PASSED] vf_rejects_guc2vf_too_long [23:21:36] [PASSED] vf_rejects_guc2vf_no_payload [23:21:36] ==================== [PASSED] vf_relay ===================== [23:21:36] ===================== lmtt (1 subtest) ===================== [23:21:36] ======================== test_ops ========================= [23:21:36] [PASSED] 2-level [23:21:36] [PASSED] multi-level [23:21:36] ==================== [PASSED] test_ops ===================== [23:21:36] ====================== [PASSED] lmtt ======================= [23:21:36] ================= pf_service (11 subtests) ================= [23:21:36] [PASSED] pf_negotiate_any [23:21:36] [PASSED] pf_negotiate_base_match [23:21:36] [PASSED] pf_negotiate_base_newer [23:21:36] [PASSED] pf_negotiate_base_next [23:21:36] [SKIPPED] pf_negotiate_base_older [23:21:36] [PASSED] pf_negotiate_base_prev [23:21:36] [PASSED] pf_negotiate_latest_match [23:21:36] [PASSED] pf_negotiate_latest_newer [23:21:37] [PASSED] pf_negotiate_latest_next [23:21:37] [SKIPPED] pf_negotiate_latest_older [23:21:37] [SKIPPED] pf_negotiate_latest_prev [23:21:37] =================== [PASSED] pf_service ==================== [23:21:37] ================= xe_guc_g2g (2 subtests) ================== [23:21:37] ============== xe_live_guc_g2g_kunit_default ============== [23:21:37] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ========== [23:21:37] ============== xe_live_guc_g2g_kunit_allmem =============== [23:21:37] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ========== [23:21:37] =================== [SKIPPED] xe_guc_g2g =================== [23:21:37] =================== xe_mocs (2 subtests) =================== [23:21:37] ================ xe_live_mocs_kernel_kunit ================ [23:21:37] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============ [23:21:37] ================ xe_live_mocs_reset_kunit ================= [23:21:37] ============ [SKIPPED] xe_live_mocs_reset_kunit ============ [23:21:37] ==================== [SKIPPED] xe_mocs ===================== [23:21:37] ================= xe_migrate (2 subtests) ================== [23:21:37] ================= xe_migrate_sanity_kunit ================= [23:21:37] ============ [SKIPPED] xe_migrate_sanity_kunit ============= [23:21:37] ================== xe_validate_ccs_kunit ================== [23:21:37] ============= [SKIPPED] xe_validate_ccs_kunit ============== [23:21:37] =================== [SKIPPED] xe_migrate =================== [23:21:37] ================== xe_dma_buf (1 subtest) ================== [23:21:37] ==================== xe_dma_buf_kunit ===================== [23:21:37] ================ [SKIPPED] xe_dma_buf_kunit ================ [23:21:37] =================== [SKIPPED] xe_dma_buf =================== [23:21:37] ================= xe_bo_shrink (1 subtest) ================= [23:21:37] =================== xe_bo_shrink_kunit ==================== [23:21:37] =============== [SKIPPED] xe_bo_shrink_kunit =============== [23:21:37] ================== [SKIPPED] xe_bo_shrink ================== [23:21:37] ==================== xe_bo (2 subtests) ==================== [23:21:37] ================== xe_ccs_migrate_kunit =================== [23:21:37] ============== [SKIPPED] xe_ccs_migrate_kunit ============== [23:21:37] ==================== xe_bo_evict_kunit ==================== [23:21:37] =============== [SKIPPED] xe_bo_evict_kunit ================ [23:21:37] ===================== [SKIPPED] xe_bo ====================== [23:21:37] ==================== args (11 subtests) ==================== [23:21:37] [PASSED] count_args_test [23:21:37] [PASSED] call_args_example [23:21:37] [PASSED] call_args_test [23:21:37] [PASSED] drop_first_arg_example [23:21:37] [PASSED] drop_first_arg_test [23:21:37] [PASSED] first_arg_example [23:21:37] [PASSED] first_arg_test [23:21:37] [PASSED] last_arg_example [23:21:37] [PASSED] last_arg_test [23:21:37] [PASSED] pick_arg_example [23:21:37] [PASSED] sep_comma_example [23:21:37] ====================== [PASSED] args ======================= [23:21:37] =================== xe_pci (3 subtests) ==================== [23:21:37] ==================== check_graphics_ip ==================== [23:21:37] [PASSED] 12.00 Xe_LP [23:21:37] [PASSED] 12.10 Xe_LP+ [23:21:37] [PASSED] 12.55 Xe_HPG [23:21:37] [PASSED] 12.60 Xe_HPC [23:21:37] [PASSED] 12.70 Xe_LPG [23:21:37] [PASSED] 12.71 Xe_LPG [23:21:37] [PASSED] 12.74 Xe_LPG+ [23:21:37] [PASSED] 20.01 Xe2_HPG [23:21:37] [PASSED] 20.02 Xe2_HPG [23:21:37] [PASSED] 20.04 Xe2_LPG [23:21:37] [PASSED] 30.00 Xe3_LPG [23:21:37] [PASSED] 30.01 Xe3_LPG [23:21:37] [PASSED] 30.03 Xe3_LPG [23:21:37] ================ [PASSED] check_graphics_ip ================ [23:21:37] ===================== check_media_ip ====================== [23:21:37] [PASSED] 12.00 Xe_M [23:21:37] [PASSED] 12.55 Xe_HPM [23:21:37] [PASSED] 13.00 Xe_LPM+ [23:21:37] [PASSED] 13.01 Xe2_HPM [23:21:37] [PASSED] 20.00 Xe2_LPM [23:21:37] [PASSED] 30.00 Xe3_LPM [23:21:37] [PASSED] 30.02 Xe3_LPM [23:21:37] ================= [PASSED] check_media_ip ================== [23:21:37] ================= check_platform_gt_count ================= [23:21:37] [PASSED] 0x9A60 (TIGERLAKE) [23:21:37] [PASSED] 0x9A68 (TIGERLAKE) [23:21:37] [PASSED] 0x9A70 (TIGERLAKE) [23:21:37] [PASSED] 0x9A40 (TIGERLAKE) [23:21:37] [PASSED] 0x9A49 (TIGERLAKE) [23:21:37] [PASSED] 0x9A59 (TIGERLAKE) [23:21:37] [PASSED] 0x9A78 (TIGERLAKE) [23:21:37] [PASSED] 0x9AC0 (TIGERLAKE) [23:21:37] [PASSED] 0x9AC9 (TIGERLAKE) [23:21:37] [PASSED] 0x9AD9 (TIGERLAKE) [23:21:37] [PASSED] 0x9AF8 (TIGERLAKE) [23:21:37] [PASSED] 0x4C80 (ROCKETLAKE) [23:21:37] [PASSED] 0x4C8A (ROCKETLAKE) [23:21:37] [PASSED] 0x4C8B (ROCKETLAKE) [23:21:37] [PASSED] 0x4C8C (ROCKETLAKE) [23:21:37] [PASSED] 0x4C90 (ROCKETLAKE) [23:21:37] [PASSED] 0x4C9A (ROCKETLAKE) [23:21:37] [PASSED] 0x4680 (ALDERLAKE_S) [23:21:37] [PASSED] 0x4682 (ALDERLAKE_S) [23:21:37] [PASSED] 0x4688 (ALDERLAKE_S) [23:21:37] [PASSED] 0x468A (ALDERLAKE_S) [23:21:37] [PASSED] 0x468B (ALDERLAKE_S) [23:21:37] [PASSED] 0x4690 (ALDERLAKE_S) [23:21:37] [PASSED] 0x4692 (ALDERLAKE_S) [23:21:37] [PASSED] 0x4693 (ALDERLAKE_S) [23:21:37] [PASSED] 0x46A0 (ALDERLAKE_P) [23:21:37] [PASSED] 0x46A1 (ALDERLAKE_P) [23:21:37] [PASSED] 0x46A2 (ALDERLAKE_P) [23:21:37] [PASSED] 0x46A3 (ALDERLAKE_P) [23:21:37] [PASSED] 0x46A6 (ALDERLAKE_P) [23:21:37] [PASSED] 0x46A8 (ALDERLAKE_P) [23:21:37] [PASSED] 0x46AA (ALDERLAKE_P) [23:21:37] [PASSED] 0x462A (ALDERLAKE_P) [23:21:37] [PASSED] 0x4626 (ALDERLAKE_P) [23:21:37] [PASSED] 0x4628 (ALDERLAKE_P) [23:21:37] [PASSED] 0x46B0 (ALDERLAKE_P) [23:21:37] [PASSED] 0x46B1 (ALDERLAKE_P) [23:21:37] [PASSED] 0x46B2 (ALDERLAKE_P) [23:21:37] [PASSED] 0x46B3 (ALDERLAKE_P) [23:21:37] [PASSED] 0x46C0 (ALDERLAKE_P) [23:21:37] [PASSED] 0x46C1 (ALDERLAKE_P) [23:21:37] [PASSED] 0x46C2 (ALDERLAKE_P) [23:21:37] [PASSED] 0x46C3 (ALDERLAKE_P) [23:21:37] [PASSED] 0x46D0 (ALDERLAKE_N) [23:21:37] [PASSED] 0x46D1 (ALDERLAKE_N) [23:21:37] [PASSED] 0x46D2 (ALDERLAKE_N) [23:21:37] [PASSED] 0x46D3 (ALDERLAKE_N) [23:21:37] [PASSED] 0x46D4 (ALDERLAKE_N) [23:21:37] [PASSED] 0xA721 (ALDERLAKE_P) [23:21:37] [PASSED] 0xA7A1 (ALDERLAKE_P) [23:21:37] [PASSED] 0xA7A9 (ALDERLAKE_P) [23:21:37] [PASSED] 0xA7AC (ALDERLAKE_P) [23:21:37] [PASSED] 0xA7AD (ALDERLAKE_P) [23:21:37] [PASSED] 0xA720 (ALDERLAKE_P) [23:21:37] [PASSED] 0xA7A0 (ALDERLAKE_P) [23:21:37] [PASSED] 0xA7A8 (ALDERLAKE_P) [23:21:37] [PASSED] 0xA7AA (ALDERLAKE_P) [23:21:37] [PASSED] 0xA7AB (ALDERLAKE_P) [23:21:37] [PASSED] 0xA780 (ALDERLAKE_S) [23:21:37] [PASSED] 0xA781 (ALDERLAKE_S) [23:21:37] [PASSED] 0xA782 (ALDERLAKE_S) [23:21:37] [PASSED] 0xA783 (ALDERLAKE_S) [23:21:37] [PASSED] 0xA788 (ALDERLAKE_S) [23:21:37] [PASSED] 0xA789 (ALDERLAKE_S) [23:21:37] [PASSED] 0xA78A (ALDERLAKE_S) [23:21:37] [PASSED] 0xA78B (ALDERLAKE_S) [23:21:37] [PASSED] 0x4905 (DG1) [23:21:37] [PASSED] 0x4906 (DG1) [23:21:37] [PASSED] 0x4907 (DG1) [23:21:37] [PASSED] 0x4908 (DG1) [23:21:37] [PASSED] 0x4909 (DG1) [23:21:37] [PASSED] 0x56C0 (DG2) [23:21:37] [PASSED] 0x56C2 (DG2) [23:21:37] [PASSED] 0x56C1 (DG2) [23:21:37] [PASSED] 0x7D51 (METEORLAKE) [23:21:37] [PASSED] 0x7DD1 (METEORLAKE) [23:21:37] [PASSED] 0x7D41 (METEORLAKE) [23:21:37] [PASSED] 0x7D67 (METEORLAKE) [23:21:37] [PASSED] 0xB640 (METEORLAKE) [23:21:37] [PASSED] 0x56A0 (DG2) [23:21:37] [PASSED] 0x56A1 (DG2) [23:21:37] [PASSED] 0x56A2 (DG2) [23:21:37] [PASSED] 0x56BE (DG2) [23:21:37] [PASSED] 0x56BF (DG2) [23:21:37] [PASSED] 0x5690 (DG2) [23:21:37] [PASSED] 0x5691 (DG2) [23:21:37] [PASSED] 0x5692 (DG2) [23:21:37] [PASSED] 0x56A5 (DG2) [23:21:37] [PASSED] 0x56A6 (DG2) [23:21:37] [PASSED] 0x56B0 (DG2) [23:21:37] [PASSED] 0x56B1 (DG2) [23:21:37] [PASSED] 0x56BA (DG2) [23:21:37] [PASSED] 0x56BB (DG2) [23:21:37] [PASSED] 0x56BC (DG2) [23:21:37] [PASSED] 0x56BD (DG2) [23:21:37] [PASSED] 0x5693 (DG2) [23:21:37] [PASSED] 0x5694 (DG2) [23:21:37] [PASSED] 0x5695 (DG2) [23:21:37] [PASSED] 0x56A3 (DG2) [23:21:37] [PASSED] 0x56A4 (DG2) [23:21:37] [PASSED] 0x56B2 (DG2) [23:21:37] [PASSED] 0x56B3 (DG2) [23:21:37] [PASSED] 0x5696 (DG2) [23:21:37] [PASSED] 0x5697 (DG2) [23:21:37] [PASSED] 0xB69 (PVC) [23:21:37] [PASSED] 0xB6E (PVC) [23:21:37] [PASSED] 0xBD4 (PVC) [23:21:37] [PASSED] 0xBD5 (PVC) [23:21:37] [PASSED] 0xBD6 (PVC) [23:21:37] [PASSED] 0xBD7 (PVC) [23:21:37] [PASSED] 0xBD8 (PVC) [23:21:37] [PASSED] 0xBD9 (PVC) [23:21:37] [PASSED] 0xBDA (PVC) [23:21:37] [PASSED] 0xBDB (PVC) [23:21:37] [PASSED] 0xBE0 (PVC) [23:21:37] [PASSED] 0xBE1 (PVC) [23:21:37] [PASSED] 0xBE5 (PVC) [23:21:37] [PASSED] 0x7D40 (METEORLAKE) [23:21:37] [PASSED] 0x7D45 (METEORLAKE) [23:21:37] [PASSED] 0x7D55 (METEORLAKE) [23:21:37] [PASSED] 0x7D60 (METEORLAKE) [23:21:37] [PASSED] 0x7DD5 (METEORLAKE) [23:21:37] [PASSED] 0x6420 (LUNARLAKE) [23:21:37] [PASSED] 0x64A0 (LUNARLAKE) [23:21:37] [PASSED] 0x64B0 (LUNARLAKE) [23:21:37] [PASSED] 0xE202 (BATTLEMAGE) [23:21:37] [PASSED] 0xE209 (BATTLEMAGE) [23:21:37] [PASSED] 0xE20B (BATTLEMAGE) [23:21:37] [PASSED] 0xE20C (BATTLEMAGE) [23:21:37] [PASSED] 0xE20D (BATTLEMAGE) [23:21:37] [PASSED] 0xE210 (BATTLEMAGE) [23:21:37] [PASSED] 0xE211 (BATTLEMAGE) [23:21:37] [PASSED] 0xE212 (BATTLEMAGE) [23:21:37] [PASSED] 0xE216 (BATTLEMAGE) [23:21:37] [PASSED] 0xE220 (BATTLEMAGE) [23:21:37] [PASSED] 0xE221 (BATTLEMAGE) [23:21:37] [PASSED] 0xE222 (BATTLEMAGE) [23:21:37] [PASSED] 0xE223 (BATTLEMAGE) [23:21:37] [PASSED] 0xB080 (PANTHERLAKE) [23:21:37] [PASSED] 0xB081 (PANTHERLAKE) [23:21:37] [PASSED] 0xB082 (PANTHERLAKE) [23:21:37] [PASSED] 0xB083 (PANTHERLAKE) [23:21:37] [PASSED] 0xB084 (PANTHERLAKE) [23:21:37] [PASSED] 0xB085 (PANTHERLAKE) [23:21:37] [PASSED] 0xB086 (PANTHERLAKE) [23:21:37] [PASSED] 0xB087 (PANTHERLAKE) [23:21:37] [PASSED] 0xB08F (PANTHERLAKE) [23:21:37] [PASSED] 0xB090 (PANTHERLAKE) [23:21:37] [PASSED] 0xB0A0 (PANTHERLAKE) [23:21:37] [PASSED] 0xB0B0 (PANTHERLAKE) [23:21:37] [PASSED] 0xFD80 (PANTHERLAKE) [23:21:37] [PASSED] 0xFD81 (PANTHERLAKE) [23:21:37] ============= [PASSED] check_platform_gt_count ============= [23:21:37] ===================== [PASSED] xe_pci ====================== [23:21:37] =================== xe_rtp (2 subtests) ==================== [23:21:37] =============== xe_rtp_process_to_sr_tests ================ [23:21:37] [PASSED] coalesce-same-reg [23:21:37] [PASSED] no-match-no-add [23:21:37] [PASSED] match-or [23:21:37] [PASSED] match-or-xfail [23:21:37] [PASSED] no-match-no-add-multiple-rules [23:21:37] [PASSED] two-regs-two-entries [23:21:37] [PASSED] clr-one-set-other [23:21:37] [PASSED] set-field [23:21:37] [PASSED] conflict-duplicate [23:21:37] [PASSED] conflict-not-disjoint [23:21:37] [PASSED] conflict-reg-type [23:21:37] =========== [PASSED] xe_rtp_process_to_sr_tests ============ [23:21:37] ================== xe_rtp_process_tests =================== [23:21:37] [PASSED] active1 [23:21:37] [PASSED] active2 [23:21:37] [PASSED] active-inactive [23:21:37] [PASSED] inactive-active [23:21:37] [PASSED] inactive-1st_or_active-inactive [23:21:37] [PASSED] inactive-2nd_or_active-inactive [23:21:37] [PASSED] inactive-last_or_active-inactive [23:21:37] [PASSED] inactive-no_or_active-inactive [23:21:37] ============== [PASSED] xe_rtp_process_tests =============== [23:21:37] ===================== [PASSED] xe_rtp ====================== [23:21:37] ==================== xe_wa (1 subtest) ===================== [23:21:37] ======================== xe_wa_gt ========================= [23:21:37] [PASSED] TIGERLAKE B0 [23:21:37] [PASSED] DG1 A0 [23:21:37] [PASSED] DG1 B0 [23:21:37] [PASSED] ALDERLAKE_S A0 [23:21:37] [PASSED] ALDERLAKE_S B0 stty: 'standard input': Inappropriate ioctl for device [23:21:37] [PASSED] ALDERLAKE_S C0 [23:21:37] [PASSED] ALDERLAKE_S D0 [23:21:37] [PASSED] ALDERLAKE_P A0 [23:21:37] [PASSED] ALDERLAKE_P B0 [23:21:37] [PASSED] ALDERLAKE_P C0 [23:21:37] [PASSED] ALDERLAKE_S RPLS D0 [23:21:37] [PASSED] ALDERLAKE_P RPLU E0 [23:21:37] [PASSED] DG2 G10 C0 [23:21:37] [PASSED] DG2 G11 B1 [23:21:37] [PASSED] DG2 G12 A1 [23:21:37] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0 [23:21:37] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0 [23:21:37] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0 [23:21:37] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0 [23:21:37] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0 [23:21:37] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1 [23:21:37] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0 [23:21:37] ==================== [PASSED] xe_wa_gt ===================== [23:21:37] ====================== [PASSED] xe_wa ====================== [23:21:37] ============================================================ [23:21:37] Testing complete. Ran 306 tests: passed: 288, skipped: 18 [23:21:37] Elapsed time: 33.764s total, 4.350s configuring, 29.048s building, 0.329s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig [23:21:37] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [23:21:38] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [23:22:02] Starting KUnit Kernel (1/1)... [23:22:02] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [23:22:03] ============ drm_test_pick_cmdline (2 subtests) ============ [23:22:03] [PASSED] drm_test_pick_cmdline_res_1920_1080_60 [23:22:03] =============== drm_test_pick_cmdline_named =============== [23:22:03] [PASSED] NTSC [23:22:03] [PASSED] NTSC-J [23:22:03] [PASSED] PAL [23:22:03] [PASSED] PAL-M [23:22:03] =========== [PASSED] drm_test_pick_cmdline_named =========== [23:22:03] ============== [PASSED] drm_test_pick_cmdline ============== [23:22:03] == drm_test_atomic_get_connector_for_encoder (1 subtest) === [23:22:03] [PASSED] drm_test_drm_atomic_get_connector_for_encoder [23:22:03] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ==== [23:22:03] =========== drm_validate_clone_mode (2 subtests) =========== [23:22:03] ============== drm_test_check_in_clone_mode =============== [23:22:03] [PASSED] in_clone_mode [23:22:03] [PASSED] not_in_clone_mode [23:22:03] ========== [PASSED] drm_test_check_in_clone_mode =========== [23:22:03] =============== drm_test_check_valid_clones =============== [23:22:03] [PASSED] not_in_clone_mode [23:22:03] [PASSED] valid_clone [23:22:03] [PASSED] invalid_clone [23:22:03] =========== [PASSED] drm_test_check_valid_clones =========== [23:22:03] ============= [PASSED] drm_validate_clone_mode ============= [23:22:03] ============= drm_validate_modeset (1 subtest) ============= [23:22:03] [PASSED] drm_test_check_connector_changed_modeset [23:22:03] ============== [PASSED] drm_validate_modeset =============== [23:22:03] ====== drm_test_bridge_get_current_state (2 subtests) ====== [23:22:03] [PASSED] drm_test_drm_bridge_get_current_state_atomic [23:22:03] [PASSED] drm_test_drm_bridge_get_current_state_legacy [23:22:03] ======== [PASSED] drm_test_bridge_get_current_state ======== [23:22:03] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ====== [23:22:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic [23:22:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled [23:22:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy [23:22:03] ======== [PASSED] drm_test_bridge_helper_reset_crtc ======== [23:22:03] ============== drm_bridge_alloc (2 subtests) =============== [23:22:03] [PASSED] drm_test_drm_bridge_alloc_basic [23:22:03] [PASSED] drm_test_drm_bridge_alloc_get_put [23:22:03] ================ [PASSED] drm_bridge_alloc ================= [23:22:03] ================== drm_buddy (8 subtests) ================== [23:22:03] [PASSED] drm_test_buddy_alloc_limit [23:22:03] [PASSED] drm_test_buddy_alloc_optimistic [23:22:03] [PASSED] drm_test_buddy_alloc_pessimistic [23:22:03] [PASSED] drm_test_buddy_alloc_pathological [23:22:03] [PASSED] drm_test_buddy_alloc_contiguous [23:22:03] [PASSED] drm_test_buddy_alloc_clear [23:22:03] [PASSED] drm_test_buddy_alloc_range_bias [23:22:03] [PASSED] drm_test_buddy_fragmentation_performance [23:22:03] ==================== [PASSED] drm_buddy ==================== [23:22:03] ============= drm_cmdline_parser (40 subtests) ============= [23:22:03] [PASSED] drm_test_cmdline_force_d_only [23:22:03] [PASSED] drm_test_cmdline_force_D_only_dvi [23:22:03] [PASSED] drm_test_cmdline_force_D_only_hdmi [23:22:03] [PASSED] drm_test_cmdline_force_D_only_not_digital [23:22:03] [PASSED] drm_test_cmdline_force_e_only [23:22:03] [PASSED] drm_test_cmdline_res [23:22:03] [PASSED] drm_test_cmdline_res_vesa [23:22:03] [PASSED] drm_test_cmdline_res_vesa_rblank [23:22:03] [PASSED] drm_test_cmdline_res_rblank [23:22:03] [PASSED] drm_test_cmdline_res_bpp [23:22:03] [PASSED] drm_test_cmdline_res_refresh [23:22:03] [PASSED] drm_test_cmdline_res_bpp_refresh [23:22:03] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced [23:22:03] [PASSED] drm_test_cmdline_res_bpp_refresh_margins [23:22:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off [23:22:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on [23:22:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog [23:22:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital [23:22:03] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on [23:22:03] [PASSED] drm_test_cmdline_res_margins_force_on [23:22:03] [PASSED] drm_test_cmdline_res_vesa_margins [23:22:03] [PASSED] drm_test_cmdline_name [23:22:03] [PASSED] drm_test_cmdline_name_bpp [23:22:03] [PASSED] drm_test_cmdline_name_option [23:22:03] [PASSED] drm_test_cmdline_name_bpp_option [23:22:03] [PASSED] drm_test_cmdline_rotate_0 [23:22:03] [PASSED] drm_test_cmdline_rotate_90 [23:22:03] [PASSED] drm_test_cmdline_rotate_180 [23:22:03] [PASSED] drm_test_cmdline_rotate_270 [23:22:03] [PASSED] drm_test_cmdline_hmirror [23:22:03] [PASSED] drm_test_cmdline_vmirror [23:22:03] [PASSED] drm_test_cmdline_margin_options [23:22:03] [PASSED] drm_test_cmdline_multiple_options [23:22:03] [PASSED] drm_test_cmdline_bpp_extra_and_option [23:22:03] [PASSED] drm_test_cmdline_extra_and_option [23:22:03] [PASSED] drm_test_cmdline_freestanding_options [23:22:03] [PASSED] drm_test_cmdline_freestanding_force_e_and_options [23:22:03] [PASSED] drm_test_cmdline_panel_orientation [23:22:03] ================ drm_test_cmdline_invalid ================= [23:22:03] [PASSED] margin_only [23:22:03] [PASSED] interlace_only [23:22:03] [PASSED] res_missing_x [23:22:03] [PASSED] res_missing_y [23:22:03] [PASSED] res_bad_y [23:22:03] [PASSED] res_missing_y_bpp [23:22:03] [PASSED] res_bad_bpp [23:22:03] [PASSED] res_bad_refresh [23:22:03] [PASSED] res_bpp_refresh_force_on_off [23:22:03] [PASSED] res_invalid_mode [23:22:03] [PASSED] res_bpp_wrong_place_mode [23:22:03] [PASSED] name_bpp_refresh [23:22:03] [PASSED] name_refresh [23:22:03] [PASSED] name_refresh_wrong_mode [23:22:03] [PASSED] name_refresh_invalid_mode [23:22:03] [PASSED] rotate_multiple [23:22:03] [PASSED] rotate_invalid_val [23:22:03] [PASSED] rotate_truncated [23:22:03] [PASSED] invalid_option [23:22:03] [PASSED] invalid_tv_option [23:22:03] [PASSED] truncated_tv_option [23:22:03] ============ [PASSED] drm_test_cmdline_invalid ============= [23:22:03] =============== drm_test_cmdline_tv_options =============== [23:22:03] [PASSED] NTSC [23:22:03] [PASSED] NTSC_443 [23:22:03] [PASSED] NTSC_J [23:22:03] [PASSED] PAL [23:22:03] [PASSED] PAL_M [23:22:03] [PASSED] PAL_N [23:22:03] [PASSED] SECAM [23:22:03] [PASSED] MONO_525 [23:22:03] [PASSED] MONO_625 [23:22:03] =========== [PASSED] drm_test_cmdline_tv_options =========== [23:22:03] =============== [PASSED] drm_cmdline_parser ================ [23:22:03] ========== drmm_connector_hdmi_init (20 subtests) ========== [23:22:03] [PASSED] drm_test_connector_hdmi_init_valid [23:22:03] [PASSED] drm_test_connector_hdmi_init_bpc_8 [23:22:03] [PASSED] drm_test_connector_hdmi_init_bpc_10 [23:22:03] [PASSED] drm_test_connector_hdmi_init_bpc_12 [23:22:03] [PASSED] drm_test_connector_hdmi_init_bpc_invalid [23:22:03] [PASSED] drm_test_connector_hdmi_init_bpc_null [23:22:03] [PASSED] drm_test_connector_hdmi_init_formats_empty [23:22:03] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb [23:22:03] === drm_test_connector_hdmi_init_formats_yuv420_allowed === [23:22:03] [PASSED] supported_formats=0x9 yuv420_allowed=1 [23:22:03] [PASSED] supported_formats=0x9 yuv420_allowed=0 [23:22:03] [PASSED] supported_formats=0x3 yuv420_allowed=1 [23:22:03] [PASSED] supported_formats=0x3 yuv420_allowed=0 [23:22:03] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed === [23:22:03] [PASSED] drm_test_connector_hdmi_init_null_ddc [23:22:03] [PASSED] drm_test_connector_hdmi_init_null_product [23:22:03] [PASSED] drm_test_connector_hdmi_init_null_vendor [23:22:03] [PASSED] drm_test_connector_hdmi_init_product_length_exact [23:22:03] [PASSED] drm_test_connector_hdmi_init_product_length_too_long [23:22:03] [PASSED] drm_test_connector_hdmi_init_product_valid [23:22:03] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact [23:22:03] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long [23:22:03] [PASSED] drm_test_connector_hdmi_init_vendor_valid [23:22:03] ========= drm_test_connector_hdmi_init_type_valid ========= [23:22:03] [PASSED] HDMI-A [23:22:03] [PASSED] HDMI-B [23:22:03] ===== [PASSED] drm_test_connector_hdmi_init_type_valid ===== [23:22:03] ======== drm_test_connector_hdmi_init_type_invalid ======== [23:22:03] [PASSED] Unknown [23:22:03] [PASSED] VGA [23:22:03] [PASSED] DVI-I [23:22:03] [PASSED] DVI-D [23:22:03] [PASSED] DVI-A [23:22:03] [PASSED] Composite [23:22:03] [PASSED] SVIDEO [23:22:03] [PASSED] LVDS [23:22:03] [PASSED] Component [23:22:03] [PASSED] DIN [23:22:03] [PASSED] DP [23:22:03] [PASSED] TV [23:22:03] [PASSED] eDP [23:22:03] [PASSED] Virtual [23:22:03] [PASSED] DSI [23:22:03] [PASSED] DPI [23:22:03] [PASSED] Writeback [23:22:03] [PASSED] SPI [23:22:03] [PASSED] USB [23:22:03] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ==== [23:22:03] ============ [PASSED] drmm_connector_hdmi_init ============= [23:22:03] ============= drmm_connector_init (3 subtests) ============= [23:22:03] [PASSED] drm_test_drmm_connector_init [23:22:03] [PASSED] drm_test_drmm_connector_init_null_ddc [23:22:03] ========= drm_test_drmm_connector_init_type_valid ========= [23:22:03] [PASSED] Unknown [23:22:03] [PASSED] VGA [23:22:03] [PASSED] DVI-I [23:22:03] [PASSED] DVI-D [23:22:03] [PASSED] DVI-A [23:22:03] [PASSED] Composite [23:22:03] [PASSED] SVIDEO [23:22:03] [PASSED] LVDS [23:22:03] [PASSED] Component [23:22:03] [PASSED] DIN [23:22:03] [PASSED] DP [23:22:03] [PASSED] HDMI-A [23:22:03] [PASSED] HDMI-B [23:22:03] [PASSED] TV [23:22:03] [PASSED] eDP [23:22:03] [PASSED] Virtual [23:22:03] [PASSED] DSI [23:22:03] [PASSED] DPI [23:22:03] [PASSED] Writeback [23:22:03] [PASSED] SPI [23:22:03] [PASSED] USB [23:22:03] ===== [PASSED] drm_test_drmm_connector_init_type_valid ===== [23:22:03] =============== [PASSED] drmm_connector_init =============== [23:22:03] ========= drm_connector_dynamic_init (6 subtests) ========== [23:22:03] [PASSED] drm_test_drm_connector_dynamic_init [23:22:03] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc [23:22:03] [PASSED] drm_test_drm_connector_dynamic_init_not_added [23:22:03] [PASSED] drm_test_drm_connector_dynamic_init_properties [23:22:03] ===== drm_test_drm_connector_dynamic_init_type_valid ====== [23:22:03] [PASSED] Unknown [23:22:03] [PASSED] VGA [23:22:03] [PASSED] DVI-I [23:22:03] [PASSED] DVI-D [23:22:03] [PASSED] DVI-A [23:22:03] [PASSED] Composite [23:22:03] [PASSED] SVIDEO [23:22:03] [PASSED] LVDS [23:22:03] [PASSED] Component [23:22:03] [PASSED] DIN [23:22:03] [PASSED] DP [23:22:03] [PASSED] HDMI-A [23:22:03] [PASSED] HDMI-B [23:22:03] [PASSED] TV [23:22:03] [PASSED] eDP [23:22:03] [PASSED] Virtual [23:22:03] [PASSED] DSI [23:22:03] [PASSED] DPI [23:22:03] [PASSED] Writeback [23:22:03] [PASSED] SPI [23:22:03] [PASSED] USB [23:22:03] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid == [23:22:03] ======== drm_test_drm_connector_dynamic_init_name ========= [23:22:03] [PASSED] Unknown [23:22:03] [PASSED] VGA [23:22:03] [PASSED] DVI-I [23:22:03] [PASSED] DVI-D [23:22:03] [PASSED] DVI-A [23:22:03] [PASSED] Composite [23:22:03] [PASSED] SVIDEO [23:22:03] [PASSED] LVDS [23:22:03] [PASSED] Component [23:22:03] [PASSED] DIN [23:22:03] [PASSED] DP [23:22:03] [PASSED] HDMI-A [23:22:03] [PASSED] HDMI-B [23:22:03] [PASSED] TV [23:22:03] [PASSED] eDP [23:22:03] [PASSED] Virtual [23:22:03] [PASSED] DSI [23:22:03] [PASSED] DPI [23:22:03] [PASSED] Writeback [23:22:03] [PASSED] SPI [23:22:03] [PASSED] USB [23:22:03] ==== [PASSED] drm_test_drm_connector_dynamic_init_name ===== [23:22:03] =========== [PASSED] drm_connector_dynamic_init ============ [23:22:03] ==== drm_connector_dynamic_register_early (4 subtests) ===== [23:22:03] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list [23:22:03] [PASSED] drm_test_drm_connector_dynamic_register_early_defer [23:22:03] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init [23:22:03] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object [23:22:03] ====== [PASSED] drm_connector_dynamic_register_early ======= [23:22:03] ======= drm_connector_dynamic_register (7 subtests) ======== [23:22:03] [PASSED] drm_test_drm_connector_dynamic_register_on_list [23:22:03] [PASSED] drm_test_drm_connector_dynamic_register_no_defer [23:22:03] [PASSED] drm_test_drm_connector_dynamic_register_no_init [23:22:03] [PASSED] drm_test_drm_connector_dynamic_register_mode_object [23:22:03] [PASSED] drm_test_drm_connector_dynamic_register_sysfs [23:22:03] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name [23:22:03] [PASSED] drm_test_drm_connector_dynamic_register_debugfs [23:22:03] ========= [PASSED] drm_connector_dynamic_register ========== [23:22:03] = drm_connector_attach_broadcast_rgb_property (2 subtests) = [23:22:03] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property [23:22:03] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector [23:22:03] === [PASSED] drm_connector_attach_broadcast_rgb_property === [23:22:03] ========== drm_get_tv_mode_from_name (2 subtests) ========== [23:22:03] ========== drm_test_get_tv_mode_from_name_valid =========== [23:22:03] [PASSED] NTSC [23:22:03] [PASSED] NTSC-443 [23:22:03] [PASSED] NTSC-J [23:22:03] [PASSED] PAL [23:22:03] [PASSED] PAL-M [23:22:03] [PASSED] PAL-N [23:22:03] [PASSED] SECAM [23:22:03] [PASSED] Mono [23:22:03] ====== [PASSED] drm_test_get_tv_mode_from_name_valid ======= [23:22:03] [PASSED] drm_test_get_tv_mode_from_name_truncated [23:22:03] ============ [PASSED] drm_get_tv_mode_from_name ============ [23:22:03] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) = [23:22:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb [23:22:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc [23:22:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1 [23:22:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc [23:22:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1 [23:22:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double [23:22:03] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid = [23:22:03] [PASSED] VIC 96 [23:22:03] [PASSED] VIC 97 [23:22:03] [PASSED] VIC 101 [23:22:03] [PASSED] VIC 102 [23:22:03] [PASSED] VIC 106 [23:22:03] [PASSED] VIC 107 [23:22:03] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid === [23:22:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc [23:22:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc [23:22:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc [23:22:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc [23:22:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc [23:22:03] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ==== [23:22:03] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) == [23:22:03] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ==== [23:22:03] [PASSED] Automatic [23:22:03] [PASSED] Full [23:22:03] [PASSED] Limited 16:235 [23:22:03] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name === [23:22:03] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid [23:22:03] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ==== [23:22:03] == drm_hdmi_connector_get_output_format_name (2 subtests) == [23:22:03] === drm_test_drm_hdmi_connector_get_output_format_name ==== [23:22:03] [PASSED] RGB [23:22:03] [PASSED] YUV 4:2:0 [23:22:03] [PASSED] YUV 4:2:2 [23:22:03] [PASSED] YUV 4:4:4 [23:22:03] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name === [23:22:03] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid [23:22:03] ==== [PASSED] drm_hdmi_connector_get_output_format_name ==== [23:22:03] ============= drm_damage_helper (21 subtests) ============== [23:22:03] [PASSED] drm_test_damage_iter_no_damage [23:22:03] [PASSED] drm_test_damage_iter_no_damage_fractional_src [23:22:03] [PASSED] drm_test_damage_iter_no_damage_src_moved [23:22:03] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved [23:22:03] [PASSED] drm_test_damage_iter_no_damage_not_visible [23:22:03] [PASSED] drm_test_damage_iter_no_damage_no_crtc [23:22:03] [PASSED] drm_test_damage_iter_no_damage_no_fb [23:22:03] [PASSED] drm_test_damage_iter_simple_damage [23:22:03] [PASSED] drm_test_damage_iter_single_damage [23:22:03] [PASSED] drm_test_damage_iter_single_damage_intersect_src [23:22:03] [PASSED] drm_test_damage_iter_single_damage_outside_src [23:22:03] [PASSED] drm_test_damage_iter_single_damage_fractional_src [23:22:03] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src [23:22:03] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src [23:22:03] [PASSED] drm_test_damage_iter_single_damage_src_moved [23:22:03] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved [23:22:03] [PASSED] drm_test_damage_iter_damage [23:22:03] [PASSED] drm_test_damage_iter_damage_one_intersect [23:22:03] [PASSED] drm_test_damage_iter_damage_one_outside [23:22:03] [PASSED] drm_test_damage_iter_damage_src_moved [23:22:03] [PASSED] drm_test_damage_iter_damage_not_visible [23:22:03] ================ [PASSED] drm_damage_helper ================ [23:22:03] ============== drm_dp_mst_helper (3 subtests) ============== [23:22:03] ============== drm_test_dp_mst_calc_pbn_mode ============== [23:22:03] [PASSED] Clock 154000 BPP 30 DSC disabled [23:22:03] [PASSED] Clock 234000 BPP 30 DSC disabled [23:22:03] [PASSED] Clock 297000 BPP 24 DSC disabled [23:22:03] [PASSED] Clock 332880 BPP 24 DSC enabled [23:22:03] [PASSED] Clock 324540 BPP 24 DSC enabled [23:22:03] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ========== [23:22:03] ============== drm_test_dp_mst_calc_pbn_div =============== [23:22:03] [PASSED] Link rate 2000000 lane count 4 [23:22:03] [PASSED] Link rate 2000000 lane count 2 [23:22:03] [PASSED] Link rate 2000000 lane count 1 [23:22:03] [PASSED] Link rate 1350000 lane count 4 [23:22:03] [PASSED] Link rate 1350000 lane count 2 [23:22:03] [PASSED] Link rate 1350000 lane count 1 [23:22:03] [PASSED] Link rate 1000000 lane count 4 [23:22:03] [PASSED] Link rate 1000000 lane count 2 [23:22:03] [PASSED] Link rate 1000000 lane count 1 [23:22:03] [PASSED] Link rate 810000 lane count 4 [23:22:03] [PASSED] Link rate 810000 lane count 2 [23:22:03] [PASSED] Link rate 810000 lane count 1 [23:22:03] [PASSED] Link rate 540000 lane count 4 [23:22:03] [PASSED] Link rate 540000 lane count 2 [23:22:03] [PASSED] Link rate 540000 lane count 1 [23:22:03] [PASSED] Link rate 270000 lane count 4 [23:22:03] [PASSED] Link rate 270000 lane count 2 [23:22:03] [PASSED] Link rate 270000 lane count 1 [23:22:03] [PASSED] Link rate 162000 lane count 4 [23:22:03] [PASSED] Link rate 162000 lane count 2 [23:22:03] [PASSED] Link rate 162000 lane count 1 [23:22:03] ========== [PASSED] drm_test_dp_mst_calc_pbn_div =========== [23:22:03] ========= drm_test_dp_mst_sideband_msg_req_decode ========= [23:22:03] [PASSED] DP_ENUM_PATH_RESOURCES with port number [23:22:03] [PASSED] DP_POWER_UP_PHY with port number [23:22:03] [PASSED] DP_POWER_DOWN_PHY with port number [23:22:03] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks [23:22:03] [PASSED] DP_ALLOCATE_PAYLOAD with port number [23:22:03] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI [23:22:03] [PASSED] DP_ALLOCATE_PAYLOAD with PBN [23:22:03] [PASSED] DP_QUERY_PAYLOAD with port number [23:22:03] [PASSED] DP_QUERY_PAYLOAD with VCPI [23:22:03] [PASSED] DP_REMOTE_DPCD_READ with port number [23:22:03] [PASSED] DP_REMOTE_DPCD_READ with DPCD address [23:22:03] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes [23:22:03] [PASSED] DP_REMOTE_DPCD_WRITE with port number [23:22:03] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address [23:22:03] [PASSED] DP_REMOTE_DPCD_WRITE with data array [23:22:03] [PASSED] DP_REMOTE_I2C_READ with port number [23:22:03] [PASSED] DP_REMOTE_I2C_READ with I2C device ID [23:22:03] [PASSED] DP_REMOTE_I2C_READ with transactions array [23:22:03] [PASSED] DP_REMOTE_I2C_WRITE with port number [23:22:03] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID [23:22:03] [PASSED] DP_REMOTE_I2C_WRITE with data array [23:22:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID [23:22:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID [23:22:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event [23:22:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event [23:22:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior [23:22:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior [23:22:03] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode ===== [23:22:03] ================ [PASSED] drm_dp_mst_helper ================ [23:22:03] ================== drm_exec (7 subtests) =================== [23:22:03] [PASSED] sanitycheck [23:22:03] [PASSED] test_lock [23:22:03] [PASSED] test_lock_unlock [23:22:03] [PASSED] test_duplicates [23:22:03] [PASSED] test_prepare [23:22:03] [PASSED] test_prepare_array [23:22:03] [PASSED] test_multiple_loops [23:22:03] ==================== [PASSED] drm_exec ===================== [23:22:03] =========== drm_format_helper_test (17 subtests) =========== [23:22:03] ============== drm_test_fb_xrgb8888_to_gray8 ============== [23:22:03] [PASSED] single_pixel_source_buffer [23:22:03] [PASSED] single_pixel_clip_rectangle [23:22:03] [PASSED] well_known_colors [23:22:03] [PASSED] destination_pitch [23:22:03] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ========== [23:22:03] ============= drm_test_fb_xrgb8888_to_rgb332 ============== [23:22:03] [PASSED] single_pixel_source_buffer [23:22:03] [PASSED] single_pixel_clip_rectangle [23:22:03] [PASSED] well_known_colors [23:22:03] [PASSED] destination_pitch [23:22:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ========== [23:22:03] ============= drm_test_fb_xrgb8888_to_rgb565 ============== [23:22:03] [PASSED] single_pixel_source_buffer [23:22:03] [PASSED] single_pixel_clip_rectangle [23:22:03] [PASSED] well_known_colors [23:22:03] [PASSED] destination_pitch [23:22:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ========== [23:22:03] ============ drm_test_fb_xrgb8888_to_xrgb1555 ============= [23:22:03] [PASSED] single_pixel_source_buffer [23:22:03] [PASSED] single_pixel_clip_rectangle [23:22:03] [PASSED] well_known_colors [23:22:03] [PASSED] destination_pitch [23:22:03] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 ========= [23:22:03] ============ drm_test_fb_xrgb8888_to_argb1555 ============= [23:22:03] [PASSED] single_pixel_source_buffer [23:22:03] [PASSED] single_pixel_clip_rectangle [23:22:03] [PASSED] well_known_colors [23:22:03] [PASSED] destination_pitch [23:22:03] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 ========= [23:22:03] ============ drm_test_fb_xrgb8888_to_rgba5551 ============= [23:22:03] [PASSED] single_pixel_source_buffer [23:22:03] [PASSED] single_pixel_clip_rectangle [23:22:03] [PASSED] well_known_colors [23:22:03] [PASSED] destination_pitch [23:22:03] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 ========= [23:22:03] ============= drm_test_fb_xrgb8888_to_rgb888 ============== [23:22:03] [PASSED] single_pixel_source_buffer [23:22:03] [PASSED] single_pixel_clip_rectangle [23:22:03] [PASSED] well_known_colors [23:22:03] [PASSED] destination_pitch [23:22:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ========== [23:22:03] ============= drm_test_fb_xrgb8888_to_bgr888 ============== [23:22:03] [PASSED] single_pixel_source_buffer [23:22:03] [PASSED] single_pixel_clip_rectangle [23:22:03] [PASSED] well_known_colors [23:22:03] [PASSED] destination_pitch [23:22:03] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ========== [23:22:03] ============ drm_test_fb_xrgb8888_to_argb8888 ============= [23:22:03] [PASSED] single_pixel_source_buffer [23:22:03] [PASSED] single_pixel_clip_rectangle [23:22:03] [PASSED] well_known_colors [23:22:03] [PASSED] destination_pitch [23:22:03] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 ========= [23:22:03] =========== drm_test_fb_xrgb8888_to_xrgb2101010 =========== [23:22:03] [PASSED] single_pixel_source_buffer [23:22:03] [PASSED] single_pixel_clip_rectangle [23:22:03] [PASSED] well_known_colors [23:22:03] [PASSED] destination_pitch [23:22:03] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 ======= [23:22:03] =========== drm_test_fb_xrgb8888_to_argb2101010 =========== [23:22:03] [PASSED] single_pixel_source_buffer [23:22:03] [PASSED] single_pixel_clip_rectangle [23:22:03] [PASSED] well_known_colors [23:22:03] [PASSED] destination_pitch [23:22:03] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 ======= [23:22:03] ============== drm_test_fb_xrgb8888_to_mono =============== [23:22:03] [PASSED] single_pixel_source_buffer [23:22:03] [PASSED] single_pixel_clip_rectangle [23:22:03] [PASSED] well_known_colors [23:22:03] [PASSED] destination_pitch [23:22:03] ========== [PASSED] drm_test_fb_xrgb8888_to_mono =========== [23:22:03] ==================== drm_test_fb_swab ===================== [23:22:03] [PASSED] single_pixel_source_buffer [23:22:03] [PASSED] single_pixel_clip_rectangle [23:22:03] [PASSED] well_known_colors [23:22:03] [PASSED] destination_pitch [23:22:03] ================ [PASSED] drm_test_fb_swab ================= [23:22:03] ============ drm_test_fb_xrgb8888_to_xbgr8888 ============= [23:22:03] [PASSED] single_pixel_source_buffer [23:22:03] [PASSED] single_pixel_clip_rectangle [23:22:03] [PASSED] well_known_colors [23:22:03] [PASSED] destination_pitch [23:22:03] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 ========= [23:22:03] ============ drm_test_fb_xrgb8888_to_abgr8888 ============= [23:22:03] [PASSED] single_pixel_source_buffer [23:22:03] [PASSED] single_pixel_clip_rectangle [23:22:03] [PASSED] well_known_colors [23:22:03] [PASSED] destination_pitch [23:22:03] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 ========= [23:22:03] ================= drm_test_fb_clip_offset ================= [23:22:03] [PASSED] pass through [23:22:03] [PASSED] horizontal offset [23:22:03] [PASSED] vertical offset [23:22:03] [PASSED] horizontal and vertical offset [23:22:03] [PASSED] horizontal offset (custom pitch) [23:22:03] [PASSED] vertical offset (custom pitch) [23:22:03] [PASSED] horizontal and vertical offset (custom pitch) [23:22:03] ============= [PASSED] drm_test_fb_clip_offset ============= [23:22:03] =================== drm_test_fb_memcpy ==================== [23:22:03] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258) [23:22:03] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258) [23:22:03] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559) [23:22:03] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258) [23:22:03] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258) [23:22:03] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559) [23:22:03] [PASSED] well_known_colors: XB24 little-endian (0x34324258) [23:22:03] [PASSED] well_known_colors: XRA8 little-endian (0x38415258) [23:22:03] [PASSED] well_known_colors: YU24 little-endian (0x34325559) [23:22:03] [PASSED] destination_pitch: XB24 little-endian (0x34324258) [23:22:03] [PASSED] destination_pitch: XRA8 little-endian (0x38415258) [23:22:03] [PASSED] destination_pitch: YU24 little-endian (0x34325559) [23:22:03] =============== [PASSED] drm_test_fb_memcpy ================ [23:22:03] ============= [PASSED] drm_format_helper_test ============== [23:22:03] ================= drm_format (18 subtests) ================= [23:22:03] [PASSED] drm_test_format_block_width_invalid [23:22:03] [PASSED] drm_test_format_block_width_one_plane [23:22:03] [PASSED] drm_test_format_block_width_two_plane [23:22:03] [PASSED] drm_test_format_block_width_three_plane [23:22:03] [PASSED] drm_test_format_block_width_tiled [23:22:03] [PASSED] drm_test_format_block_height_invalid [23:22:03] [PASSED] drm_test_format_block_height_one_plane [23:22:03] [PASSED] drm_test_format_block_height_two_plane [23:22:03] [PASSED] drm_test_format_block_height_three_plane [23:22:03] [PASSED] drm_test_format_block_height_tiled [23:22:03] [PASSED] drm_test_format_min_pitch_invalid [23:22:03] [PASSED] drm_test_format_min_pitch_one_plane_8bpp [23:22:03] [PASSED] drm_test_format_min_pitch_one_plane_16bpp [23:22:03] [PASSED] drm_test_format_min_pitch_one_plane_24bpp [23:22:03] [PASSED] drm_test_format_min_pitch_one_plane_32bpp [23:22:03] [PASSED] drm_test_format_min_pitch_two_plane [23:22:03] [PASSED] drm_test_format_min_pitch_three_plane_8bpp [23:22:03] [PASSED] drm_test_format_min_pitch_tiled [23:22:03] =================== [PASSED] drm_format ==================== [23:22:03] ============== drm_framebuffer (10 subtests) =============== [23:22:03] ========== drm_test_framebuffer_check_src_coords ========== [23:22:03] [PASSED] Success: source fits into fb [23:22:03] [PASSED] Fail: overflowing fb with x-axis coordinate [23:22:03] [PASSED] Fail: overflowing fb with y-axis coordinate [23:22:03] [PASSED] Fail: overflowing fb with source width [23:22:03] [PASSED] Fail: overflowing fb with source height [23:22:03] ====== [PASSED] drm_test_framebuffer_check_src_coords ====== [23:22:03] [PASSED] drm_test_framebuffer_cleanup [23:22:03] =============== drm_test_framebuffer_create =============== [23:22:03] [PASSED] ABGR8888 normal sizes [23:22:03] [PASSED] ABGR8888 max sizes [23:22:03] [PASSED] ABGR8888 pitch greater than min required [23:22:03] [PASSED] ABGR8888 pitch less than min required [23:22:03] [PASSED] ABGR8888 Invalid width [23:22:03] [PASSED] ABGR8888 Invalid buffer handle [23:22:03] [PASSED] No pixel format [23:22:03] [PASSED] ABGR8888 Width 0 [23:22:03] [PASSED] ABGR8888 Height 0 [23:22:03] [PASSED] ABGR8888 Out of bound height * pitch combination [23:22:03] [PASSED] ABGR8888 Large buffer offset [23:22:03] [PASSED] ABGR8888 Buffer offset for inexistent plane [23:22:03] [PASSED] ABGR8888 Invalid flag [23:22:03] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers [23:22:03] [PASSED] ABGR8888 Valid buffer modifier [23:22:03] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) [23:22:03] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS [23:22:03] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS [23:22:03] [PASSED] NV12 Normal sizes [23:22:03] [PASSED] NV12 Max sizes [23:22:03] [PASSED] NV12 Invalid pitch [23:22:03] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag [23:22:03] [PASSED] NV12 different modifier per-plane [23:22:03] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE [23:22:03] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS [23:22:03] [PASSED] NV12 Modifier for inexistent plane [23:22:03] [PASSED] NV12 Handle for inexistent plane [23:22:03] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS [23:22:03] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier [23:22:03] [PASSED] YVU420 Normal sizes [23:22:03] [PASSED] YVU420 Max sizes [23:22:03] [PASSED] YVU420 Invalid pitch [23:22:03] [PASSED] YVU420 Different pitches [23:22:03] [PASSED] YVU420 Different buffer offsets/pitches [23:22:03] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS [23:22:03] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS [23:22:03] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS [23:22:03] [PASSED] YVU420 Valid modifier [23:22:03] [PASSED] YVU420 Different modifiers per plane [23:22:03] [PASSED] YVU420 Modifier for inexistent plane [23:22:03] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR) [23:22:03] [PASSED] X0L2 Normal sizes [23:22:03] [PASSED] X0L2 Max sizes [23:22:03] [PASSED] X0L2 Invalid pitch [23:22:03] [PASSED] X0L2 Pitch greater than minimum required [23:22:03] [PASSED] X0L2 Handle for inexistent plane [23:22:03] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set [23:22:03] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set [23:22:03] [PASSED] X0L2 Valid modifier [23:22:03] [PASSED] X0L2 Modifier for inexistent plane [23:22:03] =========== [PASSED] drm_test_framebuffer_create =========== [23:22:03] [PASSED] drm_test_framebuffer_free [23:22:03] [PASSED] drm_test_framebuffer_init [23:22:03] [PASSED] drm_test_framebuffer_init_bad_format [23:22:03] [PASSED] drm_test_framebuffer_init_dev_mismatch [23:22:03] [PASSED] drm_test_framebuffer_lookup [23:22:03] [PASSED] drm_test_framebuffer_lookup_inexistent [23:22:03] [PASSED] drm_test_framebuffer_modifiers_not_supported [23:22:03] ================= [PASSED] drm_framebuffer ================= [23:22:03] ================ drm_gem_shmem (8 subtests) ================ [23:22:03] [PASSED] drm_gem_shmem_test_obj_create [23:22:03] [PASSED] drm_gem_shmem_test_obj_create_private [23:22:03] [PASSED] drm_gem_shmem_test_pin_pages [23:22:03] [PASSED] drm_gem_shmem_test_vmap [23:22:03] [PASSED] drm_gem_shmem_test_get_pages_sgt [23:22:03] [PASSED] drm_gem_shmem_test_get_sg_table [23:22:03] [PASSED] drm_gem_shmem_test_madvise [23:22:03] [PASSED] drm_gem_shmem_test_purge [23:22:03] ================== [PASSED] drm_gem_shmem ================== [23:22:03] === drm_atomic_helper_connector_hdmi_check (27 subtests) === [23:22:03] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode [23:22:03] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1 [23:22:03] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode [23:22:03] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1 [23:22:03] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode [23:22:03] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1 [23:22:03] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 ======= [23:22:03] [PASSED] Automatic [23:22:03] [PASSED] Full [23:22:03] [PASSED] Limited 16:235 [23:22:03] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 === [23:22:03] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed [23:22:03] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed [23:22:03] [PASSED] drm_test_check_disable_connector [23:22:03] [PASSED] drm_test_check_hdmi_funcs_reject_rate [23:22:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb [23:22:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420 [23:22:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422 [23:22:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420 [23:22:03] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420 [23:22:03] [PASSED] drm_test_check_output_bpc_crtc_mode_changed [23:22:03] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed [23:22:03] [PASSED] drm_test_check_output_bpc_dvi [23:22:03] [PASSED] drm_test_check_output_bpc_format_vic_1 [23:22:03] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only [23:22:03] [PASSED] drm_test_check_output_bpc_format_display_rgb_only [23:22:03] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only [23:22:03] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only [23:22:03] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc [23:22:03] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc [23:22:03] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc [23:22:03] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ====== [23:22:03] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ==== [23:22:03] [PASSED] drm_test_check_broadcast_rgb_value [23:22:03] [PASSED] drm_test_check_bpc_8_value [23:22:03] [PASSED] drm_test_check_bpc_10_value [23:22:03] [PASSED] drm_test_check_bpc_12_value [23:22:03] [PASSED] drm_test_check_format_value [23:22:03] [PASSED] drm_test_check_tmds_char_value [23:22:03] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ====== [23:22:03] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) = [23:22:03] [PASSED] drm_test_check_mode_valid [23:22:03] [PASSED] drm_test_check_mode_valid_reject [23:22:03] [PASSED] drm_test_check_mode_valid_reject_rate [23:22:03] [PASSED] drm_test_check_mode_valid_reject_max_clock [23:22:03] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid === [23:22:03] ================= drm_managed (2 subtests) ================= [23:22:03] [PASSED] drm_test_managed_release_action [23:22:03] [PASSED] drm_test_managed_run_action [23:22:03] =================== [PASSED] drm_managed =================== [23:22:03] =================== drm_mm (6 subtests) ==================== [23:22:03] [PASSED] drm_test_mm_init [23:22:03] [PASSED] drm_test_mm_debug [23:22:03] [PASSED] drm_test_mm_align32 [23:22:03] [PASSED] drm_test_mm_align64 [23:22:03] [PASSED] drm_test_mm_lowest [23:22:03] [PASSED] drm_test_mm_highest [23:22:03] ===================== [PASSED] drm_mm ====================== [23:22:03] ============= drm_modes_analog_tv (5 subtests) ============= [23:22:03] [PASSED] drm_test_modes_analog_tv_mono_576i [23:22:03] [PASSED] drm_test_modes_analog_tv_ntsc_480i [23:22:03] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined [23:22:03] [PASSED] drm_test_modes_analog_tv_pal_576i [23:22:03] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined [23:22:03] =============== [PASSED] drm_modes_analog_tv =============== [23:22:03] ============== drm_plane_helper (2 subtests) =============== [23:22:03] =============== drm_test_check_plane_state ================ [23:22:03] [PASSED] clipping_simple [23:22:03] [PASSED] clipping_rotate_reflect [23:22:03] [PASSED] positioning_simple [23:22:03] [PASSED] upscaling [23:22:03] [PASSED] downscaling [23:22:03] [PASSED] rounding1 [23:22:03] [PASSED] rounding2 [23:22:03] [PASSED] rounding3 [23:22:03] [PASSED] rounding4 [23:22:03] =========== [PASSED] drm_test_check_plane_state ============ [23:22:03] =========== drm_test_check_invalid_plane_state ============ [23:22:03] [PASSED] positioning_invalid [23:22:03] [PASSED] upscaling_invalid [23:22:03] [PASSED] downscaling_invalid [23:22:03] ======= [PASSED] drm_test_check_invalid_plane_state ======== [23:22:03] ================ [PASSED] drm_plane_helper ================= [23:22:03] ====== drm_connector_helper_tv_get_modes (1 subtest) ======= [23:22:03] ====== drm_test_connector_helper_tv_get_modes_check ======= [23:22:03] [PASSED] None [23:22:03] [PASSED] PAL [23:22:03] [PASSED] NTSC [23:22:03] [PASSED] Both, NTSC Default [23:22:03] [PASSED] Both, PAL Default [23:22:03] [PASSED] Both, NTSC Default, with PAL on command-line [23:22:03] [PASSED] Both, PAL Default, with NTSC on command-line [23:22:03] == [PASSED] drm_test_connector_helper_tv_get_modes_check === [23:22:03] ======== [PASSED] drm_connector_helper_tv_get_modes ======== [23:22:03] ================== drm_rect (9 subtests) =================== [23:22:03] [PASSED] drm_test_rect_clip_scaled_div_by_zero [23:22:03] [PASSED] drm_test_rect_clip_scaled_not_clipped [23:22:03] [PASSED] drm_test_rect_clip_scaled_clipped [23:22:03] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned [23:22:03] ================= drm_test_rect_intersect ================= [23:22:03] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0 [23:22:03] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1 [23:22:03] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0 [23:22:03] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1 [23:22:03] [PASSED] right x left: 2x1+0+0 x 3x1+1+0 [23:22:03] [PASSED] left x right: 3x1+1+0 x 2x1+0+0 [23:22:03] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1 [23:22:03] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0 [23:22:03] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1 [23:22:03] [PASSED] touching side: 1x1+0+0 x 1x1+1+0 [23:22:03] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0 [23:22:03] [PASSED] inside another: 2x2+0+0 x 1x1+1+1 [23:22:03] [PASSED] far away: 1x1+0+0 x 1x1+3+6 [23:22:03] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10 [23:22:03] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10 [23:22:03] ============= [PASSED] drm_test_rect_intersect ============= [23:22:03] ================ drm_test_rect_calc_hscale ================ [23:22:03] [PASSED] normal use [23:22:03] [PASSED] out of max range [23:22:03] [PASSED] out of min range [23:22:03] [PASSED] zero dst [23:22:03] [PASSED] negative src [23:22:03] [PASSED] negative dst [23:22:03] ============ [PASSED] drm_test_rect_calc_hscale ============ [23:22:03] ================ drm_test_rect_calc_vscale ================ [23:22:03] [PASSED] normal use stty: 'standard input': Inappropriate ioctl for device [23:22:03] [PASSED] out of max range [23:22:03] [PASSED] out of min range [23:22:03] [PASSED] zero dst [23:22:03] [PASSED] negative src [23:22:03] [PASSED] negative dst [23:22:03] ============ [PASSED] drm_test_rect_calc_vscale ============ [23:22:03] ================== drm_test_rect_rotate =================== [23:22:03] [PASSED] reflect-x [23:22:03] [PASSED] reflect-y [23:22:03] [PASSED] rotate-0 [23:22:03] [PASSED] rotate-90 [23:22:03] [PASSED] rotate-180 [23:22:03] [PASSED] rotate-270 [23:22:03] ============== [PASSED] drm_test_rect_rotate =============== [23:22:03] ================ drm_test_rect_rotate_inv ================= [23:22:03] [PASSED] reflect-x [23:22:03] [PASSED] reflect-y [23:22:03] [PASSED] rotate-0 [23:22:03] [PASSED] rotate-90 [23:22:03] [PASSED] rotate-180 [23:22:03] [PASSED] rotate-270 [23:22:03] ============ [PASSED] drm_test_rect_rotate_inv ============= [23:22:03] ==================== [PASSED] drm_rect ===================== [23:22:03] ============ drm_sysfb_modeset_test (1 subtest) ============ [23:22:03] ============ drm_test_sysfb_build_fourcc_list ============= [23:22:03] [PASSED] no native formats [23:22:03] [PASSED] XRGB8888 as native format [23:22:03] [PASSED] remove duplicates [23:22:03] [PASSED] convert alpha formats [23:22:03] [PASSED] random formats [23:22:03] ======== [PASSED] drm_test_sysfb_build_fourcc_list ========= [23:22:03] ============= [PASSED] drm_sysfb_modeset_test ============== [23:22:03] ============================================================ [23:22:03] Testing complete. Ran 622 tests: passed: 622 [23:22:03] Elapsed time: 26.200s total, 1.786s configuring, 23.994s building, 0.389s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig [23:22:03] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [23:22:05] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [23:22:14] Starting KUnit Kernel (1/1)... [23:22:14] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [23:22:14] ================= ttm_device (5 subtests) ================== [23:22:14] [PASSED] ttm_device_init_basic [23:22:14] [PASSED] ttm_device_init_multiple [23:22:14] [PASSED] ttm_device_fini_basic [23:22:14] [PASSED] ttm_device_init_no_vma_man [23:22:14] ================== ttm_device_init_pools ================== [23:22:14] [PASSED] No DMA allocations, no DMA32 required [23:22:14] [PASSED] DMA allocations, DMA32 required [23:22:14] [PASSED] No DMA allocations, DMA32 required [23:22:14] [PASSED] DMA allocations, no DMA32 required [23:22:14] ============== [PASSED] ttm_device_init_pools ============== [23:22:14] =================== [PASSED] ttm_device ==================== [23:22:14] ================== ttm_pool (8 subtests) =================== [23:22:14] ================== ttm_pool_alloc_basic =================== [23:22:14] [PASSED] One page [23:22:14] [PASSED] More than one page [23:22:14] [PASSED] Above the allocation limit [23:22:14] [PASSED] One page, with coherent DMA mappings enabled [23:22:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [23:22:14] ============== [PASSED] ttm_pool_alloc_basic =============== [23:22:14] ============== ttm_pool_alloc_basic_dma_addr ============== [23:22:14] [PASSED] One page [23:22:14] [PASSED] More than one page [23:22:14] [PASSED] Above the allocation limit [23:22:14] [PASSED] One page, with coherent DMA mappings enabled [23:22:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [23:22:14] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ========== [23:22:14] [PASSED] ttm_pool_alloc_order_caching_match [23:22:14] [PASSED] ttm_pool_alloc_caching_mismatch [23:22:14] [PASSED] ttm_pool_alloc_order_mismatch [23:22:14] [PASSED] ttm_pool_free_dma_alloc [23:22:14] [PASSED] ttm_pool_free_no_dma_alloc [23:22:14] [PASSED] ttm_pool_fini_basic [23:22:14] ==================== [PASSED] ttm_pool ===================== [23:22:14] ================ ttm_resource (8 subtests) ================= [23:22:14] ================= ttm_resource_init_basic ================= [23:22:14] [PASSED] Init resource in TTM_PL_SYSTEM [23:22:14] [PASSED] Init resource in TTM_PL_VRAM [23:22:14] [PASSED] Init resource in a private placement [23:22:14] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags [23:22:14] ============= [PASSED] ttm_resource_init_basic ============= [23:22:14] [PASSED] ttm_resource_init_pinned [23:22:14] [PASSED] ttm_resource_fini_basic [23:22:14] [PASSED] ttm_resource_manager_init_basic [23:22:14] [PASSED] ttm_resource_manager_usage_basic [23:22:14] [PASSED] ttm_resource_manager_set_used_basic [23:22:14] [PASSED] ttm_sys_man_alloc_basic [23:22:14] [PASSED] ttm_sys_man_free_basic [23:22:14] ================== [PASSED] ttm_resource =================== [23:22:14] =================== ttm_tt (15 subtests) =================== [23:22:14] ==================== ttm_tt_init_basic ==================== [23:22:14] [PASSED] Page-aligned size [23:22:14] [PASSED] Extra pages requested [23:22:14] ================ [PASSED] ttm_tt_init_basic ================ [23:22:14] [PASSED] ttm_tt_init_misaligned [23:22:14] [PASSED] ttm_tt_fini_basic [23:22:14] [PASSED] ttm_tt_fini_sg [23:22:14] [PASSED] ttm_tt_fini_shmem [23:22:14] [PASSED] ttm_tt_create_basic [23:22:14] [PASSED] ttm_tt_create_invalid_bo_type [23:22:14] [PASSED] ttm_tt_create_ttm_exists [23:22:14] [PASSED] ttm_tt_create_failed [23:22:14] [PASSED] ttm_tt_destroy_basic [23:22:14] [PASSED] ttm_tt_populate_null_ttm [23:22:14] [PASSED] ttm_tt_populate_populated_ttm [23:22:14] [PASSED] ttm_tt_unpopulate_basic [23:22:14] [PASSED] ttm_tt_unpopulate_empty_ttm [23:22:14] [PASSED] ttm_tt_swapin_basic [23:22:14] ===================== [PASSED] ttm_tt ====================== [23:22:14] =================== ttm_bo (14 subtests) =================== [23:22:14] =========== ttm_bo_reserve_optimistic_no_ticket =========== [23:22:14] [PASSED] Cannot be interrupted and sleeps [23:22:14] [PASSED] Cannot be interrupted, locks straight away [23:22:14] [PASSED] Can be interrupted, sleeps [23:22:14] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket ======= [23:22:14] [PASSED] ttm_bo_reserve_locked_no_sleep [23:22:14] [PASSED] ttm_bo_reserve_no_wait_ticket [23:22:14] [PASSED] ttm_bo_reserve_double_resv [23:22:14] [PASSED] ttm_bo_reserve_interrupted [23:22:14] [PASSED] ttm_bo_reserve_deadlock [23:22:14] [PASSED] ttm_bo_unreserve_basic [23:22:14] [PASSED] ttm_bo_unreserve_pinned [23:22:14] [PASSED] ttm_bo_unreserve_bulk [23:22:14] [PASSED] ttm_bo_fini_basic [23:22:14] [PASSED] ttm_bo_fini_shared_resv [23:22:14] [PASSED] ttm_bo_pin_basic [23:22:14] [PASSED] ttm_bo_pin_unpin_resource [23:22:14] [PASSED] ttm_bo_multiple_pin_one_unpin [23:22:14] ===================== [PASSED] ttm_bo ====================== [23:22:14] ============== ttm_bo_validate (21 subtests) =============== [23:22:14] ============== ttm_bo_init_reserved_sys_man =============== [23:22:14] [PASSED] Buffer object for userspace [23:22:14] [PASSED] Kernel buffer object [23:22:14] [PASSED] Shared buffer object [23:22:14] ========== [PASSED] ttm_bo_init_reserved_sys_man =========== [23:22:14] ============== ttm_bo_init_reserved_mock_man ============== [23:22:14] [PASSED] Buffer object for userspace [23:22:14] [PASSED] Kernel buffer object [23:22:14] [PASSED] Shared buffer object [23:22:14] ========== [PASSED] ttm_bo_init_reserved_mock_man ========== [23:22:14] [PASSED] ttm_bo_init_reserved_resv [23:22:14] ================== ttm_bo_validate_basic ================== [23:22:14] [PASSED] Buffer object for userspace [23:22:14] [PASSED] Kernel buffer object [23:22:14] [PASSED] Shared buffer object [23:22:14] ============== [PASSED] ttm_bo_validate_basic ============== [23:22:14] [PASSED] ttm_bo_validate_invalid_placement [23:22:14] ============= ttm_bo_validate_same_placement ============== [23:22:14] [PASSED] System manager [23:22:14] [PASSED] VRAM manager [23:22:14] ========= [PASSED] ttm_bo_validate_same_placement ========== [23:22:14] [PASSED] ttm_bo_validate_failed_alloc [23:22:14] [PASSED] ttm_bo_validate_pinned [23:22:14] [PASSED] ttm_bo_validate_busy_placement [23:22:14] ================ ttm_bo_validate_multihop ================= [23:22:14] [PASSED] Buffer object for userspace [23:22:14] [PASSED] Kernel buffer object [23:22:14] [PASSED] Shared buffer object [23:22:14] ============ [PASSED] ttm_bo_validate_multihop ============= [23:22:14] ========== ttm_bo_validate_no_placement_signaled ========== [23:22:14] [PASSED] Buffer object in system domain, no page vector [23:22:14] [PASSED] Buffer object in system domain with an existing page vector [23:22:14] ====== [PASSED] ttm_bo_validate_no_placement_signaled ====== [23:22:14] ======== ttm_bo_validate_no_placement_not_signaled ======== [23:22:14] [PASSED] Buffer object for userspace [23:22:14] [PASSED] Kernel buffer object [23:22:14] [PASSED] Shared buffer object [23:22:14] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ==== [23:22:14] [PASSED] ttm_bo_validate_move_fence_signaled [23:22:14] ========= ttm_bo_validate_move_fence_not_signaled ========= [23:22:14] [PASSED] Waits for GPU [23:22:14] [PASSED] Tries to lock straight away [23:22:14] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled ===== [23:22:14] [PASSED] ttm_bo_validate_happy_evict [23:22:14] [PASSED] ttm_bo_validate_all_pinned_evict [23:22:14] [PASSED] ttm_bo_validate_allowed_only_evict [23:22:14] [PASSED] ttm_bo_validate_deleted_evict [23:22:14] [PASSED] ttm_bo_validate_busy_domain_evict [23:22:14] [PASSED] ttm_bo_validate_evict_gutting [23:22:14] [PASSED] ttm_bo_validate_recrusive_evict stty: 'standard input': Inappropriate ioctl for device [23:22:14] ================= [PASSED] ttm_bo_validate ================= [23:22:14] ============================================================ [23:22:14] Testing complete. Ran 101 tests: passed: 101 [23:22:14] Elapsed time: 11.320s total, 1.782s configuring, 9.323s building, 0.188s running + cleanup ++ stat -c %u:%g /kernel + chown -R 1003:1003 /kernel ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe/guc: Cleanup GuC log buffer macros and helpers (rev2) 2025-10-09 21:57 [PATCH v5 0/2] drm/xe/guc: Cleanup GuC log buffer macros and helpers Zhanjun Dong ` (2 preceding siblings ...) 2025-10-09 23:22 ` ✓ CI.KUnit: success for drm/xe/guc: Cleanup GuC log buffer macros and helpers (rev2) Patchwork @ 2025-10-10 0:17 ` Patchwork 2025-10-10 9:04 ` ✓ Xe.CI.Full: " Patchwork 4 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2025-10-10 0:17 UTC (permalink / raw) To: Zhanjun Dong; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 883 bytes --] == Series Details == Series: drm/xe/guc: Cleanup GuC log buffer macros and helpers (rev2) URL : https://patchwork.freedesktop.org/series/155338/ State : success == Summary == CI Bug Log - changes from xe-3893-23e7752f903fec07634c72b778a733cf4ed17656_BAT -> xe-pw-155338v2_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Changes ------- No changes found Build changes ------------- * Linux: xe-3893-23e7752f903fec07634c72b778a733cf4ed17656 -> xe-pw-155338v2 IGT_8581: 8581 xe-3893-23e7752f903fec07634c72b778a733cf4ed17656: 23e7752f903fec07634c72b778a733cf4ed17656 xe-pw-155338v2: 155338v2 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/index.html [-- Attachment #2: Type: text/html, Size: 1431 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ Xe.CI.Full: success for drm/xe/guc: Cleanup GuC log buffer macros and helpers (rev2) 2025-10-09 21:57 [PATCH v5 0/2] drm/xe/guc: Cleanup GuC log buffer macros and helpers Zhanjun Dong ` (3 preceding siblings ...) 2025-10-10 0:17 ` ✓ Xe.CI.BAT: " Patchwork @ 2025-10-10 9:04 ` Patchwork 4 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2025-10-10 9:04 UTC (permalink / raw) To: Zhanjun Dong; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 37755 bytes --] == Series Details == Series: drm/xe/guc: Cleanup GuC log buffer macros and helpers (rev2) URL : https://patchwork.freedesktop.org/series/155338/ State : success == Summary == CI Bug Log - changes from xe-3893-23e7752f903fec07634c72b778a733cf4ed17656_FULL -> xe-pw-155338v2_FULL ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (4 -> 4) ------------------------------ No changes in participating hosts Known issues ------------ Here are the changes found in xe-pw-155338v2_FULL that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_big_fb@linear-16bpp-rotate-270: - shard-dg2-set2: NOTRUN -> [SKIP][1] ([Intel XE#316]) [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@kms_big_fb@linear-16bpp-rotate-270.html * igt@kms_big_fb@y-tiled-16bpp-rotate-180: - shard-dg2-set2: NOTRUN -> [SKIP][2] ([Intel XE#1124]) +2 other tests skip [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html * igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p: - shard-bmg: [PASS][3] -> [SKIP][4] ([Intel XE#2314] / [Intel XE#2894]) [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-2/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html * igt@kms_bw@linear-tiling-3-displays-2560x1440p: - shard-dg2-set2: NOTRUN -> [SKIP][5] ([Intel XE#367]) +1 other test skip [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@kms_bw@linear-tiling-3-displays-2560x1440p.html * igt@kms_ccs@bad-pixel-format-yf-tiled-ccs: - shard-dg2-set2: NOTRUN -> [SKIP][6] ([Intel XE#455] / [Intel XE#787]) +5 other tests skip [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs.html * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs: - shard-dg2-set2: NOTRUN -> [SKIP][7] ([Intel XE#2907]) [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-a-dp-4: - shard-dg2-set2: NOTRUN -> [SKIP][8] ([Intel XE#787]) +20 other tests skip [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-a-dp-4.html * igt@kms_chamelium_edid@vga-edid-read: - shard-dg2-set2: NOTRUN -> [SKIP][9] ([Intel XE#373]) +1 other test skip [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@kms_chamelium_edid@vga-edid-read.html * igt@kms_cursor_crc@cursor-rapid-movement-512x170: - shard-dg2-set2: NOTRUN -> [SKIP][10] ([Intel XE#308]) [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size: - shard-bmg: [PASS][11] -> [SKIP][12] ([Intel XE#2291]) +3 other tests skip [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-2/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html * igt@kms_feature_discovery@chamelium: - shard-dg2-set2: NOTRUN -> [SKIP][13] ([Intel XE#701]) [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@kms_feature_discovery@chamelium.html * igt@kms_flip@2x-plain-flip-ts-check-interruptible: - shard-bmg: [PASS][14] -> [SKIP][15] ([Intel XE#2316]) +5 other tests skip [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-7/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-6/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html * igt@kms_flip@flip-vs-expired-vblank@a-edp1: - shard-lnl: [PASS][16] -> [FAIL][17] ([Intel XE#301]) +1 other test fail [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html * igt@kms_flip@flip-vs-rmfb: - shard-adlp: [PASS][18] -> [DMESG-WARN][19] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#5208]) [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-4/igt@kms_flip@flip-vs-rmfb.html [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-3/igt@kms_flip@flip-vs-rmfb.html * igt@kms_flip@flip-vs-suspend@b-hdmi-a1: - shard-adlp: [PASS][20] -> [DMESG-WARN][21] ([Intel XE#4543]) +6 other tests dmesg-warn [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-4/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-3/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html * igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a1: - shard-adlp: [PASS][22] -> [FAIL][23] ([Intel XE#3098]) [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-2/igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a1.html [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-2/igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a1.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling: - shard-dg2-set2: NOTRUN -> [SKIP][24] ([Intel XE#455]) +6 other tests skip [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-onoff: - shard-dg2-set2: NOTRUN -> [SKIP][25] ([Intel XE#651]) +12 other tests skip [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-463/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-onoff.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render: - shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#5390]) +1 other test skip [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-wc: - shard-dg2-set2: NOTRUN -> [SKIP][27] ([Intel XE#653]) +9 other tests skip [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-wc.html * igt@kms_multipipe_modeset@basic-max-pipe-crc-check: - shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#356]) [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-463/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html * igt@kms_plane@plane-panning-bottom-right-suspend: - shard-adlp: [PASS][29] -> [DMESG-WARN][30] ([Intel XE#2953] / [Intel XE#4173]) +5 other tests dmesg-warn [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-9/igt@kms_plane@plane-panning-bottom-right-suspend.html [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-1/igt@kms_plane@plane-panning-bottom-right-suspend.html * igt@kms_plane_multiple@2x-tiling-x: - shard-bmg: [PASS][31] -> [SKIP][32] ([Intel XE#4596]) [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-2/igt@kms_plane_multiple@2x-tiling-x.html [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-x.html * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf: - shard-dg2-set2: NOTRUN -> [SKIP][33] ([Intel XE#1406] / [Intel XE#1489]) +2 other tests skip [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html * igt@kms_psr@fbc-psr2-suspend: - shard-dg2-set2: NOTRUN -> [SKIP][34] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +4 other tests skip [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@kms_psr@fbc-psr2-suspend.html * igt@kms_setmode@invalid-clone-single-crtc: - shard-bmg: [PASS][35] -> [SKIP][36] ([Intel XE#1435]) [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-2/igt@kms_setmode@invalid-clone-single-crtc.html [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc.html * igt@xe_eudebug@vma-ufence-faultable: - shard-dg2-set2: NOTRUN -> [SKIP][37] ([Intel XE#4837]) +3 other tests skip [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@xe_eudebug@vma-ufence-faultable.html * igt@xe_exec_compute_mode@many-bindexecqueue-userptr: - shard-bmg: [PASS][38] -> [ABORT][39] ([Intel XE#3970]) [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-5/igt@xe_exec_compute_mode@many-bindexecqueue-userptr.html [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-2/igt@xe_exec_compute_mode@many-bindexecqueue-userptr.html * igt@xe_exec_fault_mode@once-bindexecqueue-rebind-prefetch: - shard-dg2-set2: NOTRUN -> [SKIP][40] ([Intel XE#288]) +8 other tests skip [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@xe_exec_fault_mode@once-bindexecqueue-rebind-prefetch.html * igt@xe_exec_reset@parallel-gt-reset: - shard-bmg: [PASS][41] -> [DMESG-WARN][42] ([Intel XE#3876]) [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-8/igt@xe_exec_reset@parallel-gt-reset.html [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-4/igt@xe_exec_reset@parallel-gt-reset.html * igt@xe_exec_system_allocator@many-execqueues-mmap-new-huge-nomemset: - shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#4943]) [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-5/igt@xe_exec_system_allocator@many-execqueues-mmap-new-huge-nomemset.html * igt@xe_exec_system_allocator@threads-many-large-mmap-shared-remap-dontunmap-eocheck: - shard-dg2-set2: NOTRUN -> [SKIP][44] ([Intel XE#4915]) +79 other tests skip [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@xe_exec_system_allocator@threads-many-large-mmap-shared-remap-dontunmap-eocheck.html * igt@xe_oa@invalid-oa-metric-set-id: - shard-dg2-set2: NOTRUN -> [SKIP][45] ([Intel XE#3573]) +1 other test skip [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@xe_oa@invalid-oa-metric-set-id.html * igt@xe_pm@d3hot-i2c: - shard-dg2-set2: NOTRUN -> [SKIP][46] ([Intel XE#5742]) [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-463/igt@xe_pm@d3hot-i2c.html * igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq: - shard-dg2-set2: NOTRUN -> [SKIP][47] ([Intel XE#4733]) [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq.html * igt@xe_query@multigpu-query-uc-fw-version-huc: - shard-dg2-set2: NOTRUN -> [SKIP][48] ([Intel XE#944]) [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@xe_query@multigpu-query-uc-fw-version-huc.html * igt@xe_render_copy@render-stress-4-copies: - shard-dg2-set2: NOTRUN -> [SKIP][49] ([Intel XE#4814]) [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@xe_render_copy@render-stress-4-copies.html #### Possible fixes #### * igt@kms_async_flips@crc-atomic@pipe-d-hdmi-a-1: - shard-adlp: [FAIL][50] ([Intel XE#3884]) -> [PASS][51] [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-1/igt@kms_async_flips@crc-atomic@pipe-d-hdmi-a-1.html [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-1/igt@kms_async_flips@crc-atomic@pipe-d-hdmi-a-1.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs: - shard-dg2-set2: [INCOMPLETE][52] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) -> [PASS][53] [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-d-dp-4: - shard-dg2-set2: [INCOMPLETE][54] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [PASS][55] [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-d-dp-4.html [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-d-dp-4.html * igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic: - shard-bmg: [SKIP][56] ([Intel XE#2291]) -> [PASS][57] +5 other tests pass [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-6/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-8/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible: - shard-bmg: [SKIP][58] ([Intel XE#2316]) -> [PASS][59] +2 other tests pass [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-8/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-dg2-set2: [INCOMPLETE][60] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][61] +1 other test pass [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-dg2-435/igt@kms_flip@flip-vs-suspend-interruptible.html [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-434/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_flip@plain-flip-interruptible@b-hdmi-a1: - shard-adlp: [DMESG-WARN][62] ([Intel XE#4543]) -> [PASS][63] +7 other tests pass [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-1/igt@kms_flip@plain-flip-interruptible@b-hdmi-a1.html [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-9/igt@kms_flip@plain-flip-interruptible@b-hdmi-a1.html * igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-y: - shard-adlp: [DMESG-FAIL][64] ([Intel XE#4543]) -> [PASS][65] +1 other test pass [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-6/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-y.html [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-2/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-y.html * igt@kms_hdr@static-swap: - shard-bmg: [SKIP][66] ([Intel XE#1503]) -> [PASS][67] [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-6/igt@kms_hdr@static-swap.html [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-5/igt@kms_hdr@static-swap.html * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1: - shard-adlp: [DMESG-WARN][68] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][69] +2 other tests pass [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-1/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1.html [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-9/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1.html * igt@kms_plane_multiple@2x-tiling-none: - shard-bmg: [SKIP][70] ([Intel XE#4596]) -> [PASS][71] [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-none.html [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-none.html * igt@xe_evict@evict-beng-mixed-many-threads-small: - shard-bmg: [INCOMPLETE][72] ([Intel XE#6321]) -> [PASS][73] [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-6/igt@xe_evict@evict-beng-mixed-many-threads-small.html [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-6/igt@xe_evict@evict-beng-mixed-many-threads-small.html * {igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma}: - shard-lnl: [FAIL][74] ([Intel XE#6267]) -> [PASS][75] [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-lnl-4/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-lnl-4/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html #### Warnings #### * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip: - shard-adlp: [DMESG-FAIL][76] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4543]) -> [DMESG-FAIL][77] ([Intel XE#4543]) [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-4/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html * igt@kms_flip@plain-flip-ts-check-interruptible: - shard-adlp: [DMESG-WARN][78] ([Intel XE#4543]) -> [DMESG-FAIL][79] ([Intel XE#4543]) [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-2/igt@kms_flip@plain-flip-ts-check-interruptible.html [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-2/igt@kms_flip@plain-flip-ts-check-interruptible.html * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render: - shard-bmg: [SKIP][80] ([Intel XE#2312]) -> [SKIP][81] ([Intel XE#2311]) +10 other tests skip [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt: - shard-adlp: [DMESG-FAIL][82] ([Intel XE#4543]) -> [DMESG-FAIL][83] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4543]) [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt: - shard-bmg: [SKIP][84] ([Intel XE#2312]) -> [SKIP][85] ([Intel XE#5390]) +3 other tests skip [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc: - shard-bmg: [SKIP][86] ([Intel XE#5390]) -> [SKIP][87] ([Intel XE#2312]) +3 other tests skip [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc.html [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-draw-blt: - shard-bmg: [SKIP][88] ([Intel XE#2311]) -> [SKIP][89] ([Intel XE#2312]) +9 other tests skip [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-draw-blt.html [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt: - shard-bmg: [SKIP][90] ([Intel XE#2312]) -> [SKIP][91] ([Intel XE#2313]) +11 other tests skip [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render: - shard-bmg: [SKIP][92] ([Intel XE#2313]) -> [SKIP][93] ([Intel XE#2312]) +9 other tests skip [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html * igt@kms_plane_multiple@2x-tiling-yf: - shard-bmg: [SKIP][94] ([Intel XE#4596]) -> [SKIP][95] ([Intel XE#5021]) [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-yf.html [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-yf.html * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv: - shard-adlp: [ABORT][96] ([Intel XE#5530]) -> [ABORT][97] ([Intel XE#4917] / [Intel XE#5530]) [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-9/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-4/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html - shard-bmg: [ABORT][98] ([Intel XE#5466] / [Intel XE#5530]) -> [ABORT][99] ([Intel XE#4917] / [Intel XE#5466] / [Intel XE#5530]) [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-bmg-4/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-bmg-2/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html * igt@xe_module_load@load: - shard-adlp: ([PASS][100], [SKIP][101], [PASS][102], [PASS][103], [PASS][104], [PASS][105], [PASS][106], [PASS][107], [PASS][108], [PASS][109], [PASS][110], [PASS][111], [PASS][112], [PASS][113], [PASS][114], [PASS][115], [PASS][116], [PASS][117], [PASS][118], [PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123], [PASS][124], [PASS][125]) ([Intel XE#378] / [Intel XE#5612]) -> ([PASS][126], [PASS][127], [PASS][128], [PASS][129], [PASS][130], [PASS][131], [PASS][132], [PASS][133], [PASS][134], [PASS][135], [PASS][136], [PASS][137], [PASS][138], [PASS][139], [DMESG-WARN][140], [PASS][141], [PASS][142], [PASS][143], [SKIP][144], [PASS][145], [PASS][146], [PASS][147], [PASS][148], [PASS][149], [PASS][150], [PASS][151]) ([Intel XE#2953] / [Intel XE#378] / [Intel XE#4173] / [Intel XE#5612]) [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-3/igt@xe_module_load@load.html [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-6/igt@xe_module_load@load.html [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-3/igt@xe_module_load@load.html [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-3/igt@xe_module_load@load.html [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-1/igt@xe_module_load@load.html [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-8/igt@xe_module_load@load.html [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-1/igt@xe_module_load@load.html [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-1/igt@xe_module_load@load.html [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-8/igt@xe_module_load@load.html [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-8/igt@xe_module_load@load.html [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-8/igt@xe_module_load@load.html [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-4/igt@xe_module_load@load.html [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-6/igt@xe_module_load@load.html [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-2/igt@xe_module_load@load.html [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-4/igt@xe_module_load@load.html [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-4/igt@xe_module_load@load.html [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-9/igt@xe_module_load@load.html [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-9/igt@xe_module_load@load.html [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-2/igt@xe_module_load@load.html [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-2/igt@xe_module_load@load.html [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-2/igt@xe_module_load@load.html [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-6/igt@xe_module_load@load.html [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-9/igt@xe_module_load@load.html [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-9/igt@xe_module_load@load.html [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-6/igt@xe_module_load@load.html [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-adlp-6/igt@xe_module_load@load.html [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-4/igt@xe_module_load@load.html [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-1/igt@xe_module_load@load.html [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-1/igt@xe_module_load@load.html [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-1/igt@xe_module_load@load.html [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-1/igt@xe_module_load@load.html [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-2/igt@xe_module_load@load.html [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-2/igt@xe_module_load@load.html [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-2/igt@xe_module_load@load.html [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-8/igt@xe_module_load@load.html [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-8/igt@xe_module_load@load.html [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-9/igt@xe_module_load@load.html [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-8/igt@xe_module_load@load.html [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-3/igt@xe_module_load@load.html [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-9/igt@xe_module_load@load.html [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-9/igt@xe_module_load@load.html [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-3/igt@xe_module_load@load.html [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-2/igt@xe_module_load@load.html [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-3/igt@xe_module_load@load.html [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-4/igt@xe_module_load@load.html [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-4/igt@xe_module_load@load.html [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-6/igt@xe_module_load@load.html [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-6/igt@xe_module_load@load.html [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-4/igt@xe_module_load@load.html [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-4/igt@xe_module_load@load.html [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-6/igt@xe_module_load@load.html [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-adlp-9/igt@xe_module_load@load.html * igt@xe_pm@s2idle-multiple-execs: - shard-dg2-set2: [TIMEOUT][152] -> [INCOMPLETE][153] ([Intel XE#4504]) [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3893-23e7752f903fec07634c72b778a733cf4ed17656/shard-dg2-464/igt@xe_pm@s2idle-multiple-execs.html [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/shard-dg2-435/igt@xe_pm@s2idle-multiple-execs.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124 [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406 [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435 [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489 [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503 [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727 [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049 [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291 [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311 [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312 [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313 [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314 [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316 [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597 [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705 [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850 [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288 [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894 [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907 [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953 [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301 [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308 [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098 [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113 [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316 [Intel XE#356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/356 [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573 [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367 [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373 [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378 [Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876 [Intel XE#3884]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3884 [Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970 [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173 [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212 [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345 [Intel XE#4504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4504 [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522 [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543 [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455 [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596 [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733 [Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814 [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837 [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915 [Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917 [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943 [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021 [Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208 [Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300 [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390 [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466 [Intel XE#5530]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5530 [Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612 [Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742 [Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786 [Intel XE#6267]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6267 [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312 [Intel XE#6320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6320 [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321 [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651 [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653 [Intel XE#701]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/701 [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787 [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929 [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944 Build changes ------------- * Linux: xe-3893-23e7752f903fec07634c72b778a733cf4ed17656 -> xe-pw-155338v2 IGT_8581: 8581 xe-3893-23e7752f903fec07634c72b778a733cf4ed17656: 23e7752f903fec07634c72b778a733cf4ed17656 xe-pw-155338v2: 155338v2 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155338v2/index.html [-- Attachment #2: Type: text/html, Size: 42860 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2025-10-21 21:25 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-10-09 21:57 [PATCH v5 0/2] drm/xe/guc: Cleanup GuC log buffer macros and helpers Zhanjun Dong 2025-10-09 21:57 ` [PATCH v5 1/2] drm/xe/guc: Update GuC log buffer type value Zhanjun Dong 2025-10-21 17:23 ` Michal Wajdeczko 2025-10-21 17:50 ` Dong, Zhanjun 2025-10-09 21:57 ` [PATCH v5 2/2] drm/xe/guc: Add prefix to guc log buffer macros Zhanjun Dong 2025-10-21 17:49 ` Michal Wajdeczko 2025-10-21 21:13 ` Dong, Zhanjun 2025-10-21 21:25 ` Michal Wajdeczko 2025-10-09 23:22 ` ✓ CI.KUnit: success for drm/xe/guc: Cleanup GuC log buffer macros and helpers (rev2) Patchwork 2025-10-10 0:17 ` ✓ Xe.CI.BAT: " Patchwork 2025-10-10 9:04 ` ✓ Xe.CI.Full: " Patchwork
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