[PATCH 9/9] drm/i915: Neuter cdclk_prefill_adjustment()

[Ville Syrjala <ville.syrjala@linux.intel.com>]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

cdclk_prefill_adjustment() currently uses a stale cdclk
value. And even if it was using the correct value it'd
still just 'return 1' because the ratio that it's
calculating is always <= 1.0, and it just rounds the ratio
into an integer (and clamps the result to a maximum of 1).
So for the moment, let's just 'return 1' since that's what
the code ends up doing anyway.

This is actually safe because 1.0 is the worst case (ie. slowest
prefill) and thus the actual prefill is always guaranteed to be
at least as fast as what we assumed during the check.

We'll replace this soon with something that gives more accurate
estimates.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 14 +-------------
 1 file changed, 1 insertion(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 9df9ee137bf9..1b062c6c0e03 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2148,19 +2148,7 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
 static int
 cdclk_prefill_adjustment(const struct intel_crtc_state *crtc_state)
 {
-	struct intel_display *display = to_intel_display(crtc_state);
-	struct intel_atomic_state *state =
-		to_intel_atomic_state(crtc_state->uapi.state);
-	const struct intel_cdclk_state *cdclk_state;
-
-	cdclk_state = intel_atomic_get_cdclk_state(state);
-	if (IS_ERR(cdclk_state)) {
-		drm_WARN_ON(display->drm, PTR_ERR(cdclk_state));
-		return 1;
-	}
-
-	return min(1, DIV_ROUND_UP(crtc_state->pixel_rate,
-				   2 * intel_cdclk_logical(cdclk_state)));
+	return 1;
 }
 
 static int
-- 
2.49.1