From: Maarten Lankhorst <dev@lankhorst.se>
To: intel-xe@lists.freedesktop.org
Cc: Maarten Lankhorst <dev@lankhorst.se>
Subject: [FOR CI 4/5] drm/xe/display: Disable preemption in the most critical section
Date: Wed, 22 Oct 2025 14:13:06 +0200 [thread overview]
Message-ID: <20251022121301.18166-11-dev@lankhorst.se> (raw)
In-Reply-To: <20251022121301.18166-7-dev@lankhorst.se>
Lets see what happens if we only disable preemption in the critical
section to ensure we do run as fast as possible without disabling
too much.
Second attempt: Disable preemption, but keep interrupts enabled.
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/i915/display/intel_crtc.c | 14 ++++++++++++++
drivers/gpu/drm/i915/display/intel_cursor.c | 18 +++++++++++++++++-
drivers/gpu/drm/i915/display/intel_vblank.c | 9 ++++++++-
3 files changed, 39 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index f34745b5ea497..939ef48859f16 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -569,6 +569,10 @@ void intel_pipe_update_start(struct intel_atomic_state *state,
if (!IS_ENABLED(CONFIG_PREEMPT_RT))
local_irq_disable();
+#ifndef I915
+ else
+ preempt_disable();
+#endif
crtc->debug.min_vbl = evade.min;
crtc->debug.max_vbl = evade.max;
@@ -588,6 +592,11 @@ void intel_pipe_update_start(struct intel_atomic_state *state,
irq_disable:
if (!IS_ENABLED(CONFIG_PREEMPT_RT))
local_irq_disable();
+#ifndef I915
+ else
+ preempt_disable();
+#endif
+
}
#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE)
@@ -686,6 +695,10 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI))
icl_dsi_frame_update(new_crtc_state);
+#if !defined(I915) && IS_ENABLED(CONFIG_PREEMPT_RT)
+ preempt_enable();
+#endif
+
/* We're still in the vblank-evade critical section, this can't race.
* Would be slightly nice to just grab the vblank count and arm the
* event outside of the critical section - the spinlock might spin for a
@@ -733,6 +746,7 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
if (!state->base.legacy_cursor_update)
intel_vrr_send_push(NULL, new_crtc_state);
+ /* Re-enable irqs here for !RT */
if (!IS_ENABLED(CONFIG_PREEMPT_RT))
local_irq_enable();
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 780fcae77a984..50ca39eb09145 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -912,6 +912,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
intel_psr_lock(crtc_state);
+ bool vblanked = false;
if (!drm_WARN_ON(display->drm, drm_crtc_vblank_get(&crtc->base))) {
/*
* TODO: maybe check if we're still in PSR
@@ -921,13 +922,21 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
if (!IS_ENABLED(CONFIG_PREEMPT_RT))
local_irq_disable();
+#ifndef I915
+ else
+ preempt_disable();
+#endif
intel_vblank_evade(&evade);
- drm_crtc_vblank_put(&crtc->base);
+ vblanked = true;
} else {
if (!IS_ENABLED(CONFIG_PREEMPT_RT))
local_irq_disable();
+#ifndef I915
+ else
+ preempt_disable();
+#endif
}
if (new_plane_state->uapi.visible) {
@@ -939,6 +948,10 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
if (!IS_ENABLED(CONFIG_PREEMPT_RT))
local_irq_enable();
+#ifndef I915
+ else
+ preempt_enable();
+#endif
intel_psr_unlock(crtc_state);
@@ -955,6 +968,9 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
intel_plane_unpin_fb(old_plane_state);
}
+ if (vblanked)
+ drm_crtc_vblank_put(&crtc->base);
+
out_free:
if (new_crtc_state)
intel_crtc_destroy_state(&crtc->base, &new_crtc_state->uapi);
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 7826f29619a14..1437a27ac5878 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -763,11 +763,18 @@ int intel_vblank_evade(struct intel_vblank_evade_ctx *evade)
if (!IS_ENABLED(CONFIG_PREEMPT_RT))
local_irq_enable();
+#ifndef I915
+ else
+ preempt_enable();
+#endif
timeout = schedule_timeout(timeout);
-
if (!IS_ENABLED(CONFIG_PREEMPT_RT))
local_irq_disable();
+#ifndef I915
+ else
+ preempt_disable();
+#endif
}
finish_wait(wq, &wait);
--
2.51.0
next prev parent reply other threads:[~2025-10-22 12:13 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-22 12:13 [FOR CI 0/5] drm/xe/display: Test series with PREEMPT_RT and preemption disable Maarten Lankhorst
2025-10-22 12:13 ` [FOR CI 1/5] drm/xe: Bump xe_device_l2_flush even higher Maarten Lankhorst
2025-10-22 12:13 ` [FOR CI 2/5] drm/i915: Use preempt_disable/enable_rt() where recommended Maarten Lankhorst
2025-10-22 12:13 ` [FOR CI 3/5] drm/i915: Don't disable interrupts on PREEMPT_RT during atomic updates Maarten Lankhorst
2025-10-22 12:13 ` Maarten Lankhorst [this message]
2025-10-22 12:13 ` [FOR CI 5/5] PREEMPT_RT injection Maarten Lankhorst
2025-10-22 18:45 ` ✗ CI.checkpatch: warning for drm/xe/display: Test series with PREEMPT_RT and preemption disable Patchwork
2025-10-22 18:47 ` ✓ CI.KUnit: success " Patchwork
2025-10-22 19:01 ` ✗ CI.checksparse: warning " Patchwork
2025-10-22 19:34 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-10-22 22:23 ` ✗ Xe.CI.Full: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2025-10-23 8:55 [FOR CI 0/5] Testing PREEMPT_RT with disabling interrupts in the most critical section Maarten Lankhorst
2025-10-23 8:56 ` [FOR CI 4/5] drm/xe/display: Disable preemption " Maarten Lankhorst
2025-10-23 15:34 [FOR CI 0/5] drm/xe/display: Test series with PREEMPT_RT and preemption disable Maarten Lankhorst
2025-10-23 15:34 ` [FOR CI 4/5] drm/xe/display: Disable preemption in the most critical section Maarten Lankhorst
2025-10-29 9:59 [FOR CI 0/5] Testing PREEMPT_RT with disabling " Maarten Lankhorst
2025-10-29 9:59 ` [FOR CI 4/5] drm/xe/display: Disable " Maarten Lankhorst
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