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From: Animesh Manna <animesh.manna@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org
Cc: jani.nikula@intel.com, "Animesh Manna" <animesh.manna@intel.com>,
	"Jouni Högander" <jouni.hogander@intel.com>
Subject: [PATCH v2 10/10] drm/i915/alpm: Introduce has_alpm to decouple from pr/psr2/lobf
Date: Tue,  4 Nov 2025 03:39:57 +0530	[thread overview]
Message-ID: <20251103220957.1229608-11-animesh.manna@intel.com> (raw)
In-Reply-To: <20251103220957.1229608-1-animesh.manna@intel.com>

For DP2.1, ALPM is optional and there can be scenario where panel replay
will be supported without ALPM. So decouple ALPM feaure by has_alpm flag
from related display features.

Cc: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c     |  7 +++---
 .../drm/i915/display/intel_display_types.h    |  2 ++
 drivers/gpu/drm/i915/display/intel_psr.c      | 23 ++++++++-----------
 drivers/gpu/drm/i915/display/intel_psr.h      |  1 -
 4 files changed, 15 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 16fe66a75f05..e1988f43cbb9 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -376,6 +376,8 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
 
 	crtc_state->has_lobf = (context_latency + guardband) >
 		(first_sdp_position + waketime_in_lines);
+
+	crtc_state->has_alpm = crtc_state->has_lobf;
 }
 
 static void lnl_alpm_configure(struct intel_dp *intel_dp,
@@ -385,8 +387,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 	u32 alpm_ctl;
 
-	if (DISPLAY_VER(display) < 20 || (!intel_psr_needs_alpm(intel_dp, crtc_state) &&
-					  !crtc_state->has_lobf))
+	if (!crtc_state->has_alpm)
 		return;
 
 	mutex_lock(&intel_dp->alpm.lock);
@@ -510,7 +511,7 @@ void intel_alpm_enable_sink(struct intel_dp *intel_dp,
 {
 	u8 val;
 
-	if (!intel_psr_needs_alpm(intel_dp, crtc_state) && !crtc_state->has_lobf)
+	if (!crtc_state->has_alpm)
 		return;
 
 	val = DP_ALPM_ENABLE | DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE;
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 00600134bda0..0b60ada4b972 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1392,6 +1392,8 @@ struct intel_crtc_state {
 		u8 silence_period_sym_clocks;
 		u8 lfps_half_cycle_num_of_syms;
 	} alpm_state;
+
+	bool has_alpm;
 };
 
 enum intel_pipe_crc_source {
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 05014ffe3ce1..eeb4255b5e5e 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1681,6 +1681,8 @@ static bool intel_sel_update_config_valid(struct intel_dp *intel_dp,
 	crtc_state->enable_psr2_su_region_et =
 		psr2_su_region_et_valid(intel_dp, crtc_state->has_panel_replay);
 
+	crtc_state->has_alpm = intel_alpm_is_possible(intel_dp);
+
 	return true;
 
 unsupported:
@@ -1750,11 +1752,17 @@ _panel_replay_compute_config(struct intel_dp *intel_dp,
 		return false;
 	}
 
+	if (intel_alpm_is_possible(intel_dp))
+		crtc_state->has_alpm = alpm_config_valid(intel_dp, crtc_state, true, true, false);
+
 	if (!intel_dp_is_edp(intel_dp))
 		return true;
 
 	/* Remaining checks are for eDP only */
 
+	if (!crtc_state->has_alpm)
+		return false;
+
 	if (to_intel_crtc(crtc_state->uapi.crtc)->pipe != PIPE_A &&
 	    to_intel_crtc(crtc_state->uapi.crtc)->pipe != PIPE_B)
 		return false;
@@ -1777,9 +1785,6 @@ _panel_replay_compute_config(struct intel_dp *intel_dp,
 		return false;
 	}
 
-	if (!alpm_config_valid(intel_dp, crtc_state, true, true, false))
-		return false;
-
 	return true;
 }
 
@@ -4445,16 +4450,6 @@ void intel_psr_connector_debugfs_add(struct intel_connector *connector)
 				    connector, &i915_psr_status_fops);
 }
 
-bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state)
-{
-	/*
-	 * eDP Panel Replay uses always ALPM
-	 * PSR2 uses ALPM but PSR1 doesn't
-	 */
-	return intel_dp_is_edp(intel_dp) && (crtc_state->has_sel_update ||
-					     crtc_state->has_panel_replay);
-}
-
 bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
 				   const struct intel_crtc_state *crtc_state)
 {
@@ -4470,7 +4465,7 @@ void intel_psr_compute_config_late(struct intel_dp *intel_dp,
 
 	if (intel_psr_needs_alpm_aux_less(intel_dp, crtc_state))
 		wake_lines = crtc_state->alpm_state.aux_less_wake_lines;
-	else if (intel_psr_needs_alpm(intel_dp, crtc_state))
+	else if (crtc_state->has_alpm)
 		wake_lines = DISPLAY_VER(display) < 20 ?
 			     psr2_block_count_lines(crtc_state->alpm_state.io_wake_lines,
 						    crtc_state->alpm_state.fast_wake_lines) :
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index 620b35928832..3cb4fa20e427 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -80,7 +80,6 @@ void intel_psr_trigger_frame_change_event(struct intel_dsb *dsb,
 int intel_psr_min_set_context_latency(const struct intel_crtc_state *crtc_state);
 void intel_psr_connector_debugfs_add(struct intel_connector *connector);
 void intel_psr_debugfs_register(struct intel_display *display);
-bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state);
 bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
 				   const struct intel_crtc_state *crtc_state);
 void intel_psr_compute_config_late(struct intel_dp *intel_dp,
-- 
2.29.0


  parent reply	other threads:[~2025-11-03 22:37 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-03 22:09 [PATCH v2 00/10] Enable DP2.1 alpm Animesh Manna
2025-11-03 22:09 ` [PATCH v2 01/10] drm/i915/alpm: Add dpcd definition for DP2.1 alpm capability Animesh Manna
2025-11-04  4:01   ` Kandpal, Suraj
2025-11-03 22:09 ` [PATCH v2 02/10] drm/i915/alpm: alpm_init() for DP2.1 Animesh Manna
2025-11-10  9:01   ` Jani Nikula
2025-11-03 22:09 ` [PATCH v2 03/10] drm/i915/alpm: Enable debugfs " Animesh Manna
2025-11-04  4:08   ` Kandpal, Suraj
2025-11-10  9:03   ` Jani Nikula
2025-11-03 22:09 ` [PATCH v2 04/10] drm/i915/alpm: Refactor Auxless wake time calculation Animesh Manna
2025-11-07  4:00   ` Kandpal, Suraj
2025-11-07  9:32     ` Manna, Animesh
2025-11-10  9:06       ` Jani Nikula
2025-11-03 22:09 ` [PATCH v2 05/10] drm/i915/alpm: Auxless wake time calculation for Xe3p Animesh Manna
2025-11-03 22:09 ` [PATCH v2 06/10] drm/i915/alpm: Half LFPS cycle calculation Animesh Manna
2025-11-03 22:09 ` [PATCH v2 07/10] drm/i915/alpm: Program lttpr count for DP 2.1 alpm Animesh Manna
2025-11-03 22:09 ` [PATCH v2 08/10] drm/i915/alpm: Enable MAC Transmitting LFPS for LT phy Animesh Manna
2025-11-04  5:02   ` Kandpal, Suraj
2025-11-03 22:09 ` [PATCH v2 09/10] drm/i915/alpm: Replace is_edp() with alpm_is_possible() Animesh Manna
2025-11-03 22:09 ` Animesh Manna [this message]
2025-11-07  3:49   ` [PATCH v2 10/10] drm/i915/alpm: Introduce has_alpm to decouple from pr/psr2/lobf Kandpal, Suraj
2025-11-10  7:50     ` Manna, Animesh
2025-11-03 23:48 ` ✓ CI.KUnit: success for Enable DP2.1 alpm (rev2) Patchwork
2025-11-04 13:55 ` ✗ Xe.CI.Full: failure " Patchwork

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