[PATCH v5 0/3] drm/xe: add VM_BIND DECOMPRESS support and on‑demand decompression

[PATCH v5 0/3] drm/xe: add VM_BIND DECOMPRESS support and on‑demand decompression

[Nitin Gote]

This series implements VM_BIND decompression support in the XE driver
for both non-fault mode and fault mode.

Tested with https://patchwork.freedesktop.org/series/154711/
which validates basic VM_BIND DECOMPRESS behavior for both
regular and FAULT_MODE VMs.

v5: (Matt)
   - Correct the condition check of xe_pat_index_get_comp_en

v4: (Matt)
  - Simplify xe_migrate_resolve(), use single BO/resource;
    remove copy_only_ccs argument as it's always false.
  - Introduce xe_pat_index_get_comp_en(), which checks
    XE2_COMP_EN for the pat_index
  - .interruptible should be true, everything else false

v3: (Matt)
   - s/xe_bo_schedule_decompress/xe_bo_decompress
   - skip the decrompress step if the BO isn't in VRAM
   - start/size not required in xe_bo_schedule_decompress
   - Use xe_bo_move_notify instead of xe_vm_invalidate_vma
     with respect to invalidation.
   - Nits

v2:
   - Add kernel doc (Matt)
   - Move decompression work out of vm_bind ioctl. (Matt)
   - Put that work in a small helper at the BO/migrate layer invoke it
     from vma_lock_and_validate which already runs under drm_exec.
   - Move lightweight checks to vm_bind_ioctl_check_args (Matthew Auld)


Nitin Gote (3):
  drm/xe: add VM_BIND DECOMPRESS uapi flag
  drm/xe: add xe_migrate_resolve wrapper and is_vram_resolve support
  drm/xe: implement VM_BIND decompression in vm_bind_ioctl

 drivers/gpu/drm/xe/xe_bo.c       | 52 ++++++++++++++++++++
 drivers/gpu/drm/xe/xe_bo.h       |  2 +
 drivers/gpu/drm/xe/xe_migrate.c  | 83 +++++++++++++++++++++-----------
 drivers/gpu/drm/xe/xe_migrate.h  |  4 ++
 drivers/gpu/drm/xe/xe_pat.c      |  6 +++
 drivers/gpu/drm/xe/xe_pat.h      | 10 ++++
 drivers/gpu/drm/xe/xe_vm.c       | 40 ++++++++++-----
 drivers/gpu/drm/xe/xe_vm_types.h |  2 +
 include/uapi/drm/xe_drm.h        |  8 +++
 9 files changed, 169 insertions(+), 38 deletions(-)

-- 
2.50.1

[PATCH v5 1/3] drm/xe: add VM_BIND DECOMPRESS uapi flag

[Nitin Gote]

Add a new VM_BIND flag, DRM_XE_VM_BIND_FLAG_DECOMPRESS, that lets userspace
express intent for the driver to perform on-device in-place decompression
for the GPU mapping created by a MAP bind operation.

This flag is used by subsequent driver changes to trigger scheduling of
GPU work that resolves compressed VRAM pages into an uncompressed PAT
VM mapping.

Behavior and semantics:
- Valid only for DRM_XE_VM_BIND_OP_MAP. IOCTLs using this flag on other ops
  are rejected (-EINVAL).
- The bind's pat_index must select the device "no-compression" PAT entry;
  otherwise the ioctl is rejected (-EINVAL).
- Only meaningful for VRAM-backed BOs on devices that support Flat CCS and
  the required hardware generation (driver will return -EOPNOTSUPP if not).
- On success the driver schedules a migrate/resolve and installs the
  returned dma_fence into the BO's kernel reservation
  (DMA_RESV_USAGE_KERNEL).

v2: Add kernel doc (Matt)

Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Michal Mrozek <michal.mrozek@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Nitin Gote <nitin.r.gote@intel.com>
---
 include/uapi/drm/xe_drm.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 47853659a705..e706f1512fd0 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -1031,6 +1031,13 @@ struct drm_xe_vm_destroy {
  *    not invoke autoreset. Neither will stack variables going out of scope.
  *    Therefore it's recommended to always explicitly reset the madvises when
  *    freeing the memory backing a region used in a &DRM_IOCTL_XE_MADVISE call.
+ *  - DRM_XE_VM_BIND_FLAG_DECOMPRESS - Request on-device decompression for a MAP.
+ *    When set on a MAP bind operation, request the driver schedule an on-device
+ *    in-place decompression (via the migrate/resolve path) for the GPU mapping
+ *    created by this bind. Only valid for DRM_XE_VM_BIND_OP_MAP; usage on
+ *    other ops is rejected. The bind's pat_index must select the device's
+ *    "no-compression" PAT. Only meaningful for VRAM-backed BOs on devices that
+ *    support Flat CCS and the required HW generation XE2+.
  *
  * The @prefetch_mem_region_instance for %DRM_XE_VM_BIND_OP_PREFETCH can also be:
  *  - %DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC, which ensures prefetching occurs in
@@ -1138,6 +1145,7 @@ struct drm_xe_vm_bind_op {
 #define DRM_XE_VM_BIND_FLAG_CHECK_PXP	(1 << 4)
 #define DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR	(1 << 5)
 #define DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET	(1 << 6)
+#define DRM_XE_VM_BIND_FLAG_DECOMPRESS (1 << 7)
 	/** @flags: Bind flags */
 	__u32 flags;
 
-- 
2.50.1

[PATCH v5 2/3] drm/xe: add xe_migrate_resolve wrapper and is_vram_resolve support

[Nitin Gote]

Introduce an internal __xe_migrate_copy(..., is_vram_resolve) path and
expose a small wrapper xe_migrate_resolve() that calls it with
is_vram_resolve=true.

For resolve/decompression operations we must ensure the copy code uses
the compression PAT index when appropriate; this change centralizes that
behavior and allows callers to schedule a resolve (decompress) operation
via the migrate API.

v2: (Matt)
  - Simplify xe_migrate_resolve(), use single BO/resource;
    remove copy_only_ccs argument as it's always false.

Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Nitin Gote <nitin.r.gote@intel.com>
---
 drivers/gpu/drm/xe/xe_migrate.c | 83 ++++++++++++++++++++++-----------
 drivers/gpu/drm/xe/xe_migrate.h |  4 ++
 2 files changed, 60 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 5003e3c4dd17..ffc8c10123fa 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -832,31 +832,13 @@ static u32 xe_migrate_ccs_copy(struct xe_migrate *m,
 	return flush_flags;
 }
 
-/**
- * xe_migrate_copy() - Copy content of TTM resources.
- * @m: The migration context.
- * @src_bo: The buffer object @src is currently bound to.
- * @dst_bo: If copying between resources created for the same bo, set this to
- * the same value as @src_bo. If copying between buffer objects, set it to
- * the buffer object @dst is currently bound to.
- * @src: The source TTM resource.
- * @dst: The dst TTM resource.
- * @copy_only_ccs: If true copy only CCS metadata
- *
- * Copies the contents of @src to @dst: On flat CCS devices,
- * the CCS metadata is copied as well if needed, or if not present,
- * the CCS metadata of @dst is cleared for security reasons.
- *
- * Return: Pointer to a dma_fence representing the last copy batch, or
- * an error pointer on failure. If there is a failure, any copy operation
- * started by the function call has been synced.
- */
-struct dma_fence *xe_migrate_copy(struct xe_migrate *m,
-				  struct xe_bo *src_bo,
-				  struct xe_bo *dst_bo,
-				  struct ttm_resource *src,
-				  struct ttm_resource *dst,
-				  bool copy_only_ccs)
+static struct dma_fence *__xe_migrate_copy(struct xe_migrate *m,
+					   struct xe_bo *src_bo,
+					   struct xe_bo *dst_bo,
+					   struct ttm_resource *src,
+					   struct ttm_resource *dst,
+					   bool copy_only_ccs,
+					   bool is_vram_resolve)
 {
 	struct xe_gt *gt = m->tile->primary_gt;
 	struct xe_device *xe = gt_to_xe(gt);
@@ -877,8 +859,15 @@ struct dma_fence *xe_migrate_copy(struct xe_migrate *m,
 	bool copy_ccs = xe_device_has_flat_ccs(xe) &&
 		xe_bo_needs_ccs_pages(src_bo) && xe_bo_needs_ccs_pages(dst_bo);
 	bool copy_system_ccs = copy_ccs && (!src_is_vram || !dst_is_vram);
-	bool use_comp_pat = type_device && xe_device_has_flat_ccs(xe) &&
-		GRAPHICS_VER(xe) >= 20 && src_is_vram && !dst_is_vram;
+
+	/*
+	 * For decompression operation, always use the compression PAT index.
+	 * Otherwise, only use the compression PAT index for device memory
+	 * when copying from VRAM to system memory.
+	 */
+	bool use_comp_pat = is_vram_resolve || (type_device &&
+			    xe_device_has_flat_ccs(xe) &&
+			    GRAPHICS_VER(xe) >= 20 && src_is_vram && !dst_is_vram);
 
 	/* Copying CCS between two different BOs is not supported yet. */
 	if (XE_WARN_ON(copy_ccs && src_bo != dst_bo))
@@ -1037,6 +1026,46 @@ struct dma_fence *xe_migrate_copy(struct xe_migrate *m,
 	return fence;
 }
 
+/**
+ * xe_migrate_copy() - Copy content of TTM resources.
+ * @m: The migration context.
+ * @src_bo: The buffer object @src is currently bound to.
+ * @dst_bo: If copying between resources created for the same bo, set this to
+ * the same value as @src_bo. If copying between buffer objects, set it to
+ * the buffer object @dst is currently bound to.
+ * @src: The source TTM resource.
+ * @dst: The dst TTM resource.
+ * @copy_only_ccs: If true copy only CCS metadata
+ *
+ * Copies the contents of @src to @dst: On flat CCS devices,
+ * the CCS metadata is copied as well if needed, or if not present,
+ * the CCS metadata of @dst is cleared for security reasons.
+ *
+ * Return: Pointer to a dma_fence representing the last copy batch, or
+ * an error pointer on failure. If there is a failure, any copy operation
+ * started by the function call has been synced.
+ */
+struct dma_fence *xe_migrate_copy(struct xe_migrate *m,
+				  struct xe_bo *src_bo,
+				  struct xe_bo *dst_bo,
+				  struct ttm_resource *src,
+				  struct ttm_resource *dst,
+				  bool copy_only_ccs)
+{
+	return __xe_migrate_copy(m, src_bo, dst_bo, src, dst, copy_only_ccs, false);
+}
+
+/**
+ * xe_migrate_resolve() - Resolve and decompress a buffer object if required.
+ * This wrapper forwards to __xe_migrate_copy() with is_vram_resolve=true.
+ */
+struct dma_fence *xe_migrate_resolve(struct xe_migrate *m,
+				     struct xe_bo *bo,
+				     struct ttm_resource *res)
+{
+	return __xe_migrate_copy(m, bo, bo, res, res, false, true);
+}
+
 /**
  * xe_migrate_lrc() - Get the LRC from migrate context.
  * @migrate: Migrate context.
diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
index 9b5791617f5e..633c89968af6 100644
--- a/drivers/gpu/drm/xe/xe_migrate.h
+++ b/drivers/gpu/drm/xe/xe_migrate.h
@@ -125,6 +125,10 @@ struct dma_fence *xe_migrate_copy(struct xe_migrate *m,
 				  struct ttm_resource *dst,
 				  bool copy_only_ccs);
 
+struct dma_fence *xe_migrate_resolve(struct xe_migrate *m,
+				     struct xe_bo *bo,
+				     struct ttm_resource *res);
+
 int xe_migrate_ccs_rw_copy(struct xe_tile *tile, struct xe_exec_queue *q,
 			   struct xe_bo *src_bo,
 			   enum xe_sriov_vf_ccs_rw_ctxs read_write);
-- 
2.50.1

[PATCH v5 3/3] drm/xe: implement VM_BIND decompression in vm_bind_ioctl

[Nitin Gote]

Implement handling of VM_BIND(..., DECOMPRESS) in xe_vm_bind_ioctl.

Key changes:
- Parse and record per-op intent (op->map.request_decompress) when the
  DECOMPRESS flag is present.
- Introduce xe_pat_index_get_comp_en() helper to check if a PAT index
  has compression enabled via the XE2_COMP_EN bit.
- Validate DECOMPRESS preconditions in the ioctl path:
  - Only valid for MAP ops.
  - The provided pat_index must select the device's "no-compression" PAT.
  - Only meaningful on devices with flat CCS and the required XE2+
    otherwise return -EOPNOTSUPP.
  - Use XE_IOCTL_DBG for uAPI sanity checks.
- Implement xe_bo_decompress():
  For VRAM BOs run xe_bo_move_notify(), reserve one fence slot,
  schedule xe_migrate_resolve(), and attach the returned fence
  with DMA_RESV_USAGE_KERNEL. Non-VRAM cases are silent no-ops.
- Wire scheduling into vma_lock_and_validate() so VM_BIND will schedule
  decompression when request_decompress is set.
- Handle fault-mode VMs by performing decompression synchronously during
  the bind process, ensuring that the resolve is completed before the bind
  finishes.

This schedules an in-place GPU resolve (xe_migrate_resolve) for
decompression.

v5: (Matt)
   - Correct the condition check of xe_pat_index_get_comp_en

v4: (Matt)
   - Introduce xe_pat_index_get_comp_en(), which checks
     XE2_COMP_EN for the pat_index
   - .interruptible should be true, everything else false

v3: (Matt)
   - s/xe_bo_schedule_decompress/xe_bo_decompress
   - skip the decrompress step if the BO isn't in VRAM
   - start/size not required in xe_bo_schedule_decompress
   - Use xe_bo_move_notify instead of xe_vm_invalidate_vma
     with respect to invalidation.
   - Nits

v2:
   - Move decompression work out of vm_bind ioctl. (Matt)
   - Put that work in a small helper at the BO/migrate layer invoke it
     from vma_lock_and_validate which already runs under drm_exec.
   - Move lightweight checks to vm_bind_ioctl_check_args (Matthew Auld)

Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Acked-by: Michal Mrozek <michal.mrozek@intel.com>
Signed-off-by: Nitin Gote <nitin.r.gote@intel.com>
---
Hi Matt,

You're correct. The polarity of the xe_pat_index_get_comp_en
check was wrong. I misread it, sorry for the confusion.
Corrected it in this version.

Thank you,
-Nitin


 drivers/gpu/drm/xe/xe_bo.c       | 52 ++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_bo.h       |  2 ++
 drivers/gpu/drm/xe/xe_pat.c      |  6 ++++
 drivers/gpu/drm/xe/xe_pat.h      | 10 ++++++
 drivers/gpu/drm/xe/xe_vm.c       | 40 +++++++++++++++++-------
 drivers/gpu/drm/xe/xe_vm_types.h |  2 ++
 6 files changed, 101 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index b0bd31d14bb9..95331285c418 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -3330,6 +3330,58 @@ int xe_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
 	return 0;
 }
 
+/**
+ * xe_bo_decompress - schedule in-place decompress and install fence
+ * @bo:   buffer object (caller should hold drm_exec reservations for VM+BO)
+ * @vm:   VM containing the VMA range
+ *
+ * Schedules an in-place resolve via the migrate layer and installs the
+ * returned dma_fence into the BO kernel reservation slot (DMA_RESV_USAGE_KERNEL).
+ * In preempt fence mode, this operation interrupts hardware execution
+ * which is expensive. Page fault mode is recommended for better performance.
+ *
+ * Returns 0 on success, negative errno on error.
+ */
+int xe_bo_decompress(struct xe_bo *bo, struct xe_vm *vm)
+{
+	struct xe_tile *tile = xe_device_get_root_tile(vm->xe);
+	struct dma_fence *decomp_fence = NULL;
+	int err = 0;
+	struct ttm_operation_ctx op_ctx = {
+		.interruptible = true,
+		.no_wait_gpu = false,
+		.gfp_retry_mayfail = false,
+	};
+
+	/* Silently skip decompression for non-VRAM buffers */
+	if (!bo->ttm.resource || !mem_type_is_vram(bo->ttm.resource->mem_type))
+		return 0;
+
+	/* Notify before scheduling resolve */
+	err = xe_bo_move_notify(bo, &op_ctx);
+	if (err)
+		return err;
+
+	/* Reserve fence slot before scheduling */
+	err = dma_resv_reserve_fences(bo->ttm.base.resv, 1);
+	if (err)
+		return err;
+
+	/* Schedule the in-place decompression */
+	decomp_fence = xe_migrate_resolve(tile->migrate,
+					  bo,
+					  bo->ttm.resource);
+
+	if (IS_ERR(decomp_fence))
+		return PTR_ERR(decomp_fence);
+
+	/* Install kernel-usage fence */
+	dma_resv_add_fence(bo->ttm.base.resv, decomp_fence, DMA_RESV_USAGE_KERNEL);
+	dma_fence_put(decomp_fence);
+
+	return 0;
+}
+
 /**
  * xe_bo_lock() - Lock the buffer object's dma_resv object
  * @bo: The struct xe_bo whose lock is to be taken
diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
index 911d5b90461a..346b50a1247c 100644
--- a/drivers/gpu/drm/xe/xe_bo.h
+++ b/drivers/gpu/drm/xe/xe_bo.h
@@ -309,6 +309,8 @@ int xe_bo_dumb_create(struct drm_file *file_priv,
 
 bool xe_bo_needs_ccs_pages(struct xe_bo *bo);
 
+int xe_bo_decompress(struct xe_bo *bo, struct xe_vm *vm);
+
 static inline size_t xe_bo_ccs_pages_start(struct xe_bo *bo)
 {
 	return PAGE_ALIGN(xe_bo_size(bo));
diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c
index 68171cceea18..1b4d5d3def0f 100644
--- a/drivers/gpu/drm/xe/xe_pat.c
+++ b/drivers/gpu/drm/xe/xe_pat.c
@@ -196,6 +196,12 @@ u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index)
 	return xe->pat.table[pat_index].coh_mode;
 }
 
+bool xe_pat_index_get_comp_en(struct xe_device *xe, u16 pat_index)
+{
+	WARN_ON(pat_index >= xe->pat.n_entries);
+	return !!(xe->pat.table[pat_index].value & XE2_COMP_EN);
+}
+
 static void program_pat(struct xe_gt *gt, const struct xe_pat_table_entry table[],
 			int n_entries)
 {
diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h
index 05dae03a5f54..b8559120989e 100644
--- a/drivers/gpu/drm/xe/xe_pat.h
+++ b/drivers/gpu/drm/xe/xe_pat.h
@@ -58,4 +58,14 @@ int xe_pat_dump(struct xe_gt *gt, struct drm_printer *p);
  */
 u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index);
 
+/**
+ * xe_pat_index_get_comp_en - Extract the compression enable flag for
+ * the given pat_index.
+ * @xe: xe device
+ * @pat_index: The pat_index to query
+ *
+ * Return: true if compression is enabled for this pat_index, false otherwise.
+ */
+bool xe_pat_index_get_comp_en(struct xe_device *xe, u16 pat_index);
+
 #endif
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 8fb5cc6a69ec..a9927e665ad0 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -2302,6 +2302,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_vma_ops *vops,
 				op->map.vma_flags |= XE_VMA_DUMPABLE;
 			if (flags & DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET)
 				op->map.vma_flags |= XE_VMA_MADV_AUTORESET;
+			op->map.request_decompress = flags & DRM_XE_VM_BIND_FLAG_DECOMPRESS;
 			op->map.pat_index = pat_index;
 			op->map.invalidate_on_bind =
 				__xe_vm_needs_clear_scratch_pages(vm, flags);
@@ -2838,7 +2839,7 @@ static void vm_bind_ioctl_ops_unwind(struct xe_vm *vm,
 }
 
 static int vma_lock_and_validate(struct drm_exec *exec, struct xe_vma *vma,
-				 bool res_evict, bool validate)
+				 bool res_evict, bool validate, bool request_decompress)
 {
 	struct xe_bo *bo = xe_vma_bo(vma);
 	struct xe_vm *vm = xe_vma_vm(vma);
@@ -2851,6 +2852,12 @@ static int vma_lock_and_validate(struct drm_exec *exec, struct xe_vma *vma,
 			err = xe_bo_validate(bo, vm,
 					     !xe_vm_in_preempt_fence_mode(vm) &&
 					     res_evict, exec);
+
+		if (err)
+			return err;
+
+		if (request_decompress)
+			err = xe_bo_decompress(bo, vm);
 	}
 
 	return err;
@@ -2938,7 +2945,8 @@ static int op_lock_and_prep(struct drm_exec *exec, struct xe_vm *vm,
 			err = vma_lock_and_validate(exec, op->map.vma,
 						    res_evict,
 						    !xe_vm_in_fault_mode(vm) ||
-						    op->map.immediate);
+						    op->map.immediate,
+						    op->map.request_decompress);
 		break;
 	case DRM_GPUVA_OP_REMAP:
 		err = check_ufence(gpuva_to_vma(op->base.remap.unmap->va));
@@ -2947,13 +2955,13 @@ static int op_lock_and_prep(struct drm_exec *exec, struct xe_vm *vm,
 
 		err = vma_lock_and_validate(exec,
 					    gpuva_to_vma(op->base.remap.unmap->va),
-					    res_evict, false);
+					    res_evict, false, false);
 		if (!err && op->remap.prev)
 			err = vma_lock_and_validate(exec, op->remap.prev,
-						    res_evict, true);
+						    res_evict, true, false);
 		if (!err && op->remap.next)
 			err = vma_lock_and_validate(exec, op->remap.next,
-						    res_evict, true);
+						    res_evict, true, false);
 		break;
 	case DRM_GPUVA_OP_UNMAP:
 		err = check_ufence(gpuva_to_vma(op->base.unmap.va));
@@ -2962,7 +2970,7 @@ static int op_lock_and_prep(struct drm_exec *exec, struct xe_vm *vm,
 
 		err = vma_lock_and_validate(exec,
 					    gpuva_to_vma(op->base.unmap.va),
-					    res_evict, false);
+					    res_evict, false, false);
 		break;
 	case DRM_GPUVA_OP_PREFETCH:
 	{
@@ -2977,7 +2985,7 @@ static int op_lock_and_prep(struct drm_exec *exec, struct xe_vm *vm,
 
 		err = vma_lock_and_validate(exec,
 					    gpuva_to_vma(op->base.prefetch.va),
-					    res_evict, false);
+					    res_evict, false, false);
 		if (!err && !xe_vma_has_no_bo(vma))
 			err = xe_bo_migrate(xe_vma_bo(vma),
 					    region_to_mem_type[region],
@@ -3299,7 +3307,8 @@ ALLOW_ERROR_INJECTION(vm_bind_ioctl_ops_execute, ERRNO);
 	 DRM_XE_VM_BIND_FLAG_DUMPABLE | \
 	 DRM_XE_VM_BIND_FLAG_CHECK_PXP | \
 	 DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR | \
-	 DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET)
+	 DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET | \
+	 DRM_XE_VM_BIND_FLAG_DECOMPRESS)
 
 #ifdef TEST_VM_OPS_ERROR
 #define SUPPORTED_FLAGS	(SUPPORTED_FLAGS_STUB | FORCE_OP_ERROR)
@@ -3357,6 +3366,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
 		bool is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
 		bool is_cpu_addr_mirror = flags &
 			DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR;
+		bool is_decompress = flags & DRM_XE_VM_BIND_FLAG_DECOMPRESS;
 		u16 pat_index = (*bind_ops)[i].pat_index;
 		u16 coh_mode;
 
@@ -3391,7 +3401,9 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
 		    XE_IOCTL_DBG(xe, obj_offset && (is_null ||
 						    is_cpu_addr_mirror)) ||
 		    XE_IOCTL_DBG(xe, op != DRM_XE_VM_BIND_OP_MAP &&
-				 (is_null || is_cpu_addr_mirror)) ||
+				 (is_decompress || is_null || is_cpu_addr_mirror)) ||
+		    XE_IOCTL_DBG(xe, is_decompress &&
+				 xe_pat_index_get_comp_en(xe, pat_index)) ||
 		    XE_IOCTL_DBG(xe, !obj &&
 				 op == DRM_XE_VM_BIND_OP_MAP &&
 				 !is_null && !is_cpu_addr_mirror) ||
@@ -3411,8 +3423,8 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
 				 op == DRM_XE_VM_BIND_OP_PREFETCH) ||
 		    XE_IOCTL_DBG(xe, prefetch_region &&
 				 op != DRM_XE_VM_BIND_OP_PREFETCH) ||
-		    XE_IOCTL_DBG(xe,  (prefetch_region != DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC &&
-				       !(BIT(prefetch_region) & xe->info.mem_region_mask))) ||
+		    XE_IOCTL_DBG(xe, (prefetch_region != DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC &&
+				      !(BIT(prefetch_region) & xe->info.mem_region_mask))) ||
 		    XE_IOCTL_DBG(xe, obj &&
 				 op == DRM_XE_VM_BIND_OP_UNMAP) ||
 		    XE_IOCTL_DBG(xe, (flags & DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET) &&
@@ -3429,6 +3441,12 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
 			err = -EINVAL;
 			goto free_bind_ops;
 		}
+
+		if (is_decompress && (XE_IOCTL_DBG(xe, !xe_device_has_flat_ccs(xe)) ||
+				      XE_IOCTL_DBG(xe, GRAPHICS_VER(xe) < 20))) {
+			err = -EOPNOTSUPP;
+			goto free_bind_ops;
+		}
 	}
 
 	return 0;
diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h
index ccd6cc090309..f4962ca0df09 100644
--- a/drivers/gpu/drm/xe/xe_vm_types.h
+++ b/drivers/gpu/drm/xe/xe_vm_types.h
@@ -346,6 +346,8 @@ struct xe_vma_op_map {
 	bool immediate;
 	/** @read_only: Read only */
 	bool invalidate_on_bind;
+	/** @request_decompress: schedule decompression for GPU map */
+	bool request_decompress;
 	/** @pat_index: The pat index to use for this operation. */
 	u16 pat_index;
 };
-- 
2.50.1

Re: [PATCH v5 3/3] drm/xe: implement VM_BIND decompression in vm_bind_ioctl

[Matthew Auld]

On 07/11/2025 11:48, Nitin Gote wrote:
> Implement handling of VM_BIND(..., DECOMPRESS) in xe_vm_bind_ioctl.
> 
> Key changes:
> - Parse and record per-op intent (op->map.request_decompress) when the
>    DECOMPRESS flag is present.
> - Introduce xe_pat_index_get_comp_en() helper to check if a PAT index
>    has compression enabled via the XE2_COMP_EN bit.
> - Validate DECOMPRESS preconditions in the ioctl path:
>    - Only valid for MAP ops.
>    - The provided pat_index must select the device's "no-compression" PAT.
>    - Only meaningful on devices with flat CCS and the required XE2+
>      otherwise return -EOPNOTSUPP.
>    - Use XE_IOCTL_DBG for uAPI sanity checks.
> - Implement xe_bo_decompress():
>    For VRAM BOs run xe_bo_move_notify(), reserve one fence slot,
>    schedule xe_migrate_resolve(), and attach the returned fence
>    with DMA_RESV_USAGE_KERNEL. Non-VRAM cases are silent no-ops.
> - Wire scheduling into vma_lock_and_validate() so VM_BIND will schedule
>    decompression when request_decompress is set.
> - Handle fault-mode VMs by performing decompression synchronously during
>    the bind process, ensuring that the resolve is completed before the bind
>    finishes.
> 
> This schedules an in-place GPU resolve (xe_migrate_resolve) for
> decompression.
> 
> v5: (Matt)
>     - Correct the condition check of xe_pat_index_get_comp_en
> 
> v4: (Matt)
>     - Introduce xe_pat_index_get_comp_en(), which checks
>       XE2_COMP_EN for the pat_index
>     - .interruptible should be true, everything else false
> 
> v3: (Matt)
>     - s/xe_bo_schedule_decompress/xe_bo_decompress
>     - skip the decrompress step if the BO isn't in VRAM
>     - start/size not required in xe_bo_schedule_decompress
>     - Use xe_bo_move_notify instead of xe_vm_invalidate_vma
>       with respect to invalidation.
>     - Nits
> 
> v2:
>     - Move decompression work out of vm_bind ioctl. (Matt)
>     - Put that work in a small helper at the BO/migrate layer invoke it
>       from vma_lock_and_validate which already runs under drm_exec.
>     - Move lightweight checks to vm_bind_ioctl_check_args (Matthew Auld)
> 
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Matthew Auld <matthew.auld@intel.com>
> Acked-by: Michal Mrozek <michal.mrozek@intel.com>
> Signed-off-by: Nitin Gote <nitin.r.gote@intel.com>
> ---
> Hi Matt,
> 
> You're correct. The polarity of the xe_pat_index_get_comp_en
> check was wrong. I misread it, sorry for the confusion.
> Corrected it in this version.
> 
> Thank you,
> -Nitin
> 
> 
>   drivers/gpu/drm/xe/xe_bo.c       | 52 ++++++++++++++++++++++++++++++++
>   drivers/gpu/drm/xe/xe_bo.h       |  2 ++
>   drivers/gpu/drm/xe/xe_pat.c      |  6 ++++
>   drivers/gpu/drm/xe/xe_pat.h      | 10 ++++++
>   drivers/gpu/drm/xe/xe_vm.c       | 40 +++++++++++++++++-------
>   drivers/gpu/drm/xe/xe_vm_types.h |  2 ++
>   6 files changed, 101 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index b0bd31d14bb9..95331285c418 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -3330,6 +3330,58 @@ int xe_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
>   	return 0;
>   }
>   
> +/**
> + * xe_bo_decompress - schedule in-place decompress and install fence
> + * @bo:   buffer object (caller should hold drm_exec reservations for VM+BO)
> + * @vm:   VM containing the VMA range
> + *
> + * Schedules an in-place resolve via the migrate layer and installs the
> + * returned dma_fence into the BO kernel reservation slot (DMA_RESV_USAGE_KERNEL).
> + * In preempt fence mode, this operation interrupts hardware execution
> + * which is expensive. Page fault mode is recommended for better performance.

Maybe add a comment somewhere here that this only currently works on 
dgpu? In case someone tries to use this on igpu also, which below will 
silently skip.

> + *
> + * Returns 0 on success, negative errno on error.
> + */
> +int xe_bo_decompress(struct xe_bo *bo, struct xe_vm *vm)
> +{
> +	struct xe_tile *tile = xe_device_get_root_tile(vm->xe);

Look like we could extract this from the bo instead:

xe = xe_bo_device(bo);
xe_device_get_root_tile(xe);

And we can then drop the vm arg?

> +	struct dma_fence *decomp_fence = NULL;
> +	int err = 0;

Nit: Please put err at the end of the block. Reverse Christmas tree.

> +	struct ttm_operation_ctx op_ctx = {
> +		.interruptible = true,
> +		.no_wait_gpu = false,
> +		.gfp_retry_mayfail = false,
> +	};
> +
> +	/* Silently skip decompression for non-VRAM buffers */
> +	if (!bo->ttm.resource || !mem_type_is_vram(bo->ttm.resource->mem_type))
> +		return 0;
> +
> +	/* Notify before scheduling resolve */
> +	err = xe_bo_move_notify(bo, &op_ctx);
> +	if (err)
> +		return err;
> +
> +	/* Reserve fence slot before scheduling */
> +	err = dma_resv_reserve_fences(bo->ttm.base.resv, 1);
> +	if (err)
> +		return err;
> +
> +	/* Schedule the in-place decompression */
> +	decomp_fence = xe_migrate_resolve(tile->migrate,
> +					  bo,
> +					  bo->ttm.resource);
> +
> +	if (IS_ERR(decomp_fence))
> +		return PTR_ERR(decomp_fence);
> +
> +	/* Install kernel-usage fence */
> +	dma_resv_add_fence(bo->ttm.base.resv, decomp_fence, DMA_RESV_USAGE_KERNEL);
> +	dma_fence_put(decomp_fence);
> +
> +	return 0;
> +}
> +
>   /**
>    * xe_bo_lock() - Lock the buffer object's dma_resv object
>    * @bo: The struct xe_bo whose lock is to be taken
> diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
> index 911d5b90461a..346b50a1247c 100644
> --- a/drivers/gpu/drm/xe/xe_bo.h
> +++ b/drivers/gpu/drm/xe/xe_bo.h
> @@ -309,6 +309,8 @@ int xe_bo_dumb_create(struct drm_file *file_priv,
>   
>   bool xe_bo_needs_ccs_pages(struct xe_bo *bo);
>   
> +int xe_bo_decompress(struct xe_bo *bo, struct xe_vm *vm);
> +
>   static inline size_t xe_bo_ccs_pages_start(struct xe_bo *bo)
>   {
>   	return PAGE_ALIGN(xe_bo_size(bo));
> diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c
> index 68171cceea18..1b4d5d3def0f 100644
> --- a/drivers/gpu/drm/xe/xe_pat.c
> +++ b/drivers/gpu/drm/xe/xe_pat.c
> @@ -196,6 +196,12 @@ u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index)
>   	return xe->pat.table[pat_index].coh_mode;
>   }
>   
> +bool xe_pat_index_get_comp_en(struct xe_device *xe, u16 pat_index)
> +{
> +	WARN_ON(pat_index >= xe->pat.n_entries);
> +	return !!(xe->pat.table[pat_index].value & XE2_COMP_EN);
> +}

Looks like there no now three in-flight series each implementing a 
helper like this. But all slightly different. Also not sure which is 
going be be merged first. I personally prefer making this the same as 
coh_mode above, and have a comp_en field, but either works.

https://patchwork.freedesktop.org/series/156658/
https://patchwork.freedesktop.org/series/157036/

Wondering if it would make sense to split this helper into a separate 
patch and merge that first, and then have all three series converge on 
that? Also hopefully prevents accidently merging multiple helpers for 
this, depending on the merge order?

+ Sanjay & Xin

> +
>   static void program_pat(struct xe_gt *gt, const struct xe_pat_table_entry table[],
>   			int n_entries)
>   {
> diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h
> index 05dae03a5f54..b8559120989e 100644
> --- a/drivers/gpu/drm/xe/xe_pat.h
> +++ b/drivers/gpu/drm/xe/xe_pat.h
> @@ -58,4 +58,14 @@ int xe_pat_dump(struct xe_gt *gt, struct drm_printer *p);
>    */
>   u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index);
>   
> +/**
> + * xe_pat_index_get_comp_en - Extract the compression enable flag for
> + * the given pat_index.
> + * @xe: xe device
> + * @pat_index: The pat_index to query
> + *
> + * Return: true if compression is enabled for this pat_index, false otherwise.
> + */
> +bool xe_pat_index_get_comp_en(struct xe_device *xe, u16 pat_index);
> +
>   #endif
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index 8fb5cc6a69ec..a9927e665ad0 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -2302,6 +2302,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_vma_ops *vops,
>   				op->map.vma_flags |= XE_VMA_DUMPABLE;
>   			if (flags & DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET)
>   				op->map.vma_flags |= XE_VMA_MADV_AUTORESET;
> +			op->map.request_decompress = flags & DRM_XE_VM_BIND_FLAG_DECOMPRESS;
>   			op->map.pat_index = pat_index;
>   			op->map.invalidate_on_bind =
>   				__xe_vm_needs_clear_scratch_pages(vm, flags);
> @@ -2838,7 +2839,7 @@ static void vm_bind_ioctl_ops_unwind(struct xe_vm *vm,
>   }
>   
>   static int vma_lock_and_validate(struct drm_exec *exec, struct xe_vma *vma,
> -				 bool res_evict, bool validate)
> +				 bool res_evict, bool validate, bool request_decompress)
>   {
>   	struct xe_bo *bo = xe_vma_bo(vma);
>   	struct xe_vm *vm = xe_vma_vm(vma);
> @@ -2851,6 +2852,12 @@ static int vma_lock_and_validate(struct drm_exec *exec, struct xe_vma *vma,
>   			err = xe_bo_validate(bo, vm,
>   					     !xe_vm_in_preempt_fence_mode(vm) &&
>   					     res_evict, exec);
> +
> +		if (err)
> +			return err;
> +
> +		if (request_decompress)
> +			err = xe_bo_decompress(bo, vm);
>   	}
>   
>   	return err;
> @@ -2938,7 +2945,8 @@ static int op_lock_and_prep(struct drm_exec *exec, struct xe_vm *vm,
>   			err = vma_lock_and_validate(exec, op->map.vma,
>   						    res_evict,
>   						    !xe_vm_in_fault_mode(vm) ||
> -						    op->map.immediate);
> +						    op->map.immediate,
> +						    op->map.request_decompress);
>   		break;
>   	case DRM_GPUVA_OP_REMAP:
>   		err = check_ufence(gpuva_to_vma(op->base.remap.unmap->va));
> @@ -2947,13 +2955,13 @@ static int op_lock_and_prep(struct drm_exec *exec, struct xe_vm *vm,
>   
>   		err = vma_lock_and_validate(exec,
>   					    gpuva_to_vma(op->base.remap.unmap->va),
> -					    res_evict, false);
> +					    res_evict, false, false);
>   		if (!err && op->remap.prev)
>   			err = vma_lock_and_validate(exec, op->remap.prev,
> -						    res_evict, true);
> +						    res_evict, true, false);
>   		if (!err && op->remap.next)
>   			err = vma_lock_and_validate(exec, op->remap.next,
> -						    res_evict, true);
> +						    res_evict, true, false);
>   		break;
>   	case DRM_GPUVA_OP_UNMAP:
>   		err = check_ufence(gpuva_to_vma(op->base.unmap.va));
> @@ -2962,7 +2970,7 @@ static int op_lock_and_prep(struct drm_exec *exec, struct xe_vm *vm,
>   
>   		err = vma_lock_and_validate(exec,
>   					    gpuva_to_vma(op->base.unmap.va),
> -					    res_evict, false);
> +					    res_evict, false, false);
>   		break;
>   	case DRM_GPUVA_OP_PREFETCH:
>   	{
> @@ -2977,7 +2985,7 @@ static int op_lock_and_prep(struct drm_exec *exec, struct xe_vm *vm,
>   
>   		err = vma_lock_and_validate(exec,
>   					    gpuva_to_vma(op->base.prefetch.va),
> -					    res_evict, false);
> +					    res_evict, false, false);
>   		if (!err && !xe_vma_has_no_bo(vma))
>   			err = xe_bo_migrate(xe_vma_bo(vma),
>   					    region_to_mem_type[region],
> @@ -3299,7 +3307,8 @@ ALLOW_ERROR_INJECTION(vm_bind_ioctl_ops_execute, ERRNO);
>   	 DRM_XE_VM_BIND_FLAG_DUMPABLE | \
>   	 DRM_XE_VM_BIND_FLAG_CHECK_PXP | \
>   	 DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR | \
> -	 DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET)
> +	 DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET | \
> +	 DRM_XE_VM_BIND_FLAG_DECOMPRESS)
>   
>   #ifdef TEST_VM_OPS_ERROR
>   #define SUPPORTED_FLAGS	(SUPPORTED_FLAGS_STUB | FORCE_OP_ERROR)
> @@ -3357,6 +3366,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
>   		bool is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
>   		bool is_cpu_addr_mirror = flags &
>   			DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR;
> +		bool is_decompress = flags & DRM_XE_VM_BIND_FLAG_DECOMPRESS;
>   		u16 pat_index = (*bind_ops)[i].pat_index;
>   		u16 coh_mode;
>   
> @@ -3391,7 +3401,9 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
>   		    XE_IOCTL_DBG(xe, obj_offset && (is_null ||
>   						    is_cpu_addr_mirror)) ||
>   		    XE_IOCTL_DBG(xe, op != DRM_XE_VM_BIND_OP_MAP &&
> -				 (is_null || is_cpu_addr_mirror)) ||
> +				 (is_decompress || is_null || is_cpu_addr_mirror)) ||
> +		    XE_IOCTL_DBG(xe, is_decompress &&
> +				 xe_pat_index_get_comp_en(xe, pat_index)) ||
>   		    XE_IOCTL_DBG(xe, !obj &&
>   				 op == DRM_XE_VM_BIND_OP_MAP &&
>   				 !is_null && !is_cpu_addr_mirror) ||
> @@ -3411,8 +3423,8 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
>   				 op == DRM_XE_VM_BIND_OP_PREFETCH) ||
>   		    XE_IOCTL_DBG(xe, prefetch_region &&
>   				 op != DRM_XE_VM_BIND_OP_PREFETCH) ||
> -		    XE_IOCTL_DBG(xe,  (prefetch_region != DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC &&
> -				       !(BIT(prefetch_region) & xe->info.mem_region_mask))) ||
> +		    XE_IOCTL_DBG(xe, (prefetch_region != DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC &&
> +				      !(BIT(prefetch_region) & xe->info.mem_region_mask))) ||

Is this just fixing whitespace? If so, please consider splitting 
unrelated styling/cosmetic fixes into a separate patch.

Otherwise lgtm,
Reviewed-by: Matthew Auld <matthew.auld@intel.com>

>   		    XE_IOCTL_DBG(xe, obj &&
>   				 op == DRM_XE_VM_BIND_OP_UNMAP) ||
>   		    XE_IOCTL_DBG(xe, (flags & DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET) &&
> @@ -3429,6 +3441,12 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
>   			err = -EINVAL;
>   			goto free_bind_ops;
>   		}
> +
> +		if (is_decompress && (XE_IOCTL_DBG(xe, !xe_device_has_flat_ccs(xe)) ||
> +				      XE_IOCTL_DBG(xe, GRAPHICS_VER(xe) < 20))) {
> +			err = -EOPNOTSUPP;
> +			goto free_bind_ops;
> +		}
>   	}
>   
>   	return 0;
> diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h
> index ccd6cc090309..f4962ca0df09 100644
> --- a/drivers/gpu/drm/xe/xe_vm_types.h
> +++ b/drivers/gpu/drm/xe/xe_vm_types.h
> @@ -346,6 +346,8 @@ struct xe_vma_op_map {
>   	bool immediate;
>   	/** @read_only: Read only */
>   	bool invalidate_on_bind;
> +	/** @request_decompress: schedule decompression for GPU map */
> +	bool request_decompress;
>   	/** @pat_index: The pat index to use for this operation. */
>   	u16 pat_index;
>   };

Re: [PATCH v5 3/3] drm/xe: implement VM_BIND decompression in vm_bind_ioctl

[Matthew Auld]

On 10/11/2025 11:46, Matthew Auld wrote:
> On 07/11/2025 11:48, Nitin Gote wrote:
>> Implement handling of VM_BIND(..., DECOMPRESS) in xe_vm_bind_ioctl.
>>
>> Key changes:
>> - Parse and record per-op intent (op->map.request_decompress) when the
>>    DECOMPRESS flag is present.
>> - Introduce xe_pat_index_get_comp_en() helper to check if a PAT index
>>    has compression enabled via the XE2_COMP_EN bit.
>> - Validate DECOMPRESS preconditions in the ioctl path:
>>    - Only valid for MAP ops.
>>    - The provided pat_index must select the device's "no-compression" 
>> PAT.
>>    - Only meaningful on devices with flat CCS and the required XE2+
>>      otherwise return -EOPNOTSUPP.
>>    - Use XE_IOCTL_DBG for uAPI sanity checks.
>> - Implement xe_bo_decompress():
>>    For VRAM BOs run xe_bo_move_notify(), reserve one fence slot,
>>    schedule xe_migrate_resolve(), and attach the returned fence
>>    with DMA_RESV_USAGE_KERNEL. Non-VRAM cases are silent no-ops.
>> - Wire scheduling into vma_lock_and_validate() so VM_BIND will schedule
>>    decompression when request_decompress is set.
>> - Handle fault-mode VMs by performing decompression synchronously during
>>    the bind process, ensuring that the resolve is completed before the 
>> bind
>>    finishes.
>>
>> This schedules an in-place GPU resolve (xe_migrate_resolve) for
>> decompression.
>>
>> v5: (Matt)
>>     - Correct the condition check of xe_pat_index_get_comp_en
>>
>> v4: (Matt)
>>     - Introduce xe_pat_index_get_comp_en(), which checks
>>       XE2_COMP_EN for the pat_index
>>     - .interruptible should be true, everything else false
>>
>> v3: (Matt)
>>     - s/xe_bo_schedule_decompress/xe_bo_decompress
>>     - skip the decrompress step if the BO isn't in VRAM
>>     - start/size not required in xe_bo_schedule_decompress
>>     - Use xe_bo_move_notify instead of xe_vm_invalidate_vma
>>       with respect to invalidation.
>>     - Nits
>>
>> v2:
>>     - Move decompression work out of vm_bind ioctl. (Matt)
>>     - Put that work in a small helper at the BO/migrate layer invoke it
>>       from vma_lock_and_validate which already runs under drm_exec.
>>     - Move lightweight checks to vm_bind_ioctl_check_args (Matthew Auld)
>>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> Cc: Matthew Auld <matthew.auld@intel.com>
>> Acked-by: Michal Mrozek <michal.mrozek@intel.com>
>> Signed-off-by: Nitin Gote <nitin.r.gote@intel.com>
>> ---
>> Hi Matt,
>>
>> You're correct. The polarity of the xe_pat_index_get_comp_en
>> check was wrong. I misread it, sorry for the confusion.
>> Corrected it in this version.
>>
>> Thank you,
>> -Nitin
>>
>>
>>   drivers/gpu/drm/xe/xe_bo.c       | 52 ++++++++++++++++++++++++++++++++
>>   drivers/gpu/drm/xe/xe_bo.h       |  2 ++
>>   drivers/gpu/drm/xe/xe_pat.c      |  6 ++++
>>   drivers/gpu/drm/xe/xe_pat.h      | 10 ++++++
>>   drivers/gpu/drm/xe/xe_vm.c       | 40 +++++++++++++++++-------
>>   drivers/gpu/drm/xe/xe_vm_types.h |  2 ++
>>   6 files changed, 101 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
>> index b0bd31d14bb9..95331285c418 100644
>> --- a/drivers/gpu/drm/xe/xe_bo.c
>> +++ b/drivers/gpu/drm/xe/xe_bo.c
>> @@ -3330,6 +3330,58 @@ int xe_gem_mmap_offset_ioctl(struct drm_device 
>> *dev, void *data,
>>       return 0;
>>   }
>> +/**
>> + * xe_bo_decompress - schedule in-place decompress and install fence
>> + * @bo:   buffer object (caller should hold drm_exec reservations for 
>> VM+BO)
>> + * @vm:   VM containing the VMA range
>> + *
>> + * Schedules an in-place resolve via the migrate layer and installs the
>> + * returned dma_fence into the BO kernel reservation slot 
>> (DMA_RESV_USAGE_KERNEL).
>> + * In preempt fence mode, this operation interrupts hardware execution
>> + * which is expensive. Page fault mode is recommended for better 
>> performance.
> 
> Maybe add a comment somewhere here that this only currently works on 
> dgpu? In case someone tries to use this on igpu also, which below will 
> silently skip.
> 
>> + *
>> + * Returns 0 on success, negative errno on error.
>> + */
>> +int xe_bo_decompress(struct xe_bo *bo, struct xe_vm *vm)
>> +{
>> +    struct xe_tile *tile = xe_device_get_root_tile(vm->xe);
> 
> Look like we could extract this from the bo instead:
> 
> xe = xe_bo_device(bo);
> xe_device_get_root_tile(xe);
> 
> And we can then drop the vm arg?
> 
>> +    struct dma_fence *decomp_fence = NULL;
>> +    int err = 0;
> 
> Nit: Please put err at the end of the block. Reverse Christmas tree.
> 
>> +    struct ttm_operation_ctx op_ctx = {
>> +        .interruptible = true,
>> +        .no_wait_gpu = false,
>> +        .gfp_retry_mayfail = false,
>> +    };
>> +
>> +    /* Silently skip decompression for non-VRAM buffers */
>> +    if (!bo->ttm.resource || !mem_type_is_vram(bo->ttm.resource- 
>> >mem_type))
>> +        return 0;
>> +
>> +    /* Notify before scheduling resolve */
>> +    err = xe_bo_move_notify(bo, &op_ctx);
>> +    if (err)
>> +        return err;
>> +
>> +    /* Reserve fence slot before scheduling */
>> +    err = dma_resv_reserve_fences(bo->ttm.base.resv, 1);
>> +    if (err)
>> +        return err;
>> +
>> +    /* Schedule the in-place decompression */
>> +    decomp_fence = xe_migrate_resolve(tile->migrate,
>> +                      bo,
>> +                      bo->ttm.resource);
>> +
>> +    if (IS_ERR(decomp_fence))
>> +        return PTR_ERR(decomp_fence);
>> +
>> +    /* Install kernel-usage fence */
>> +    dma_resv_add_fence(bo->ttm.base.resv, decomp_fence, 
>> DMA_RESV_USAGE_KERNEL);
>> +    dma_fence_put(decomp_fence);
>> +
>> +    return 0;
>> +}
>> +
>>   /**
>>    * xe_bo_lock() - Lock the buffer object's dma_resv object
>>    * @bo: The struct xe_bo whose lock is to be taken
>> diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
>> index 911d5b90461a..346b50a1247c 100644
>> --- a/drivers/gpu/drm/xe/xe_bo.h
>> +++ b/drivers/gpu/drm/xe/xe_bo.h
>> @@ -309,6 +309,8 @@ int xe_bo_dumb_create(struct drm_file *file_priv,
>>   bool xe_bo_needs_ccs_pages(struct xe_bo *bo);
>> +int xe_bo_decompress(struct xe_bo *bo, struct xe_vm *vm);
>> +
>>   static inline size_t xe_bo_ccs_pages_start(struct xe_bo *bo)
>>   {
>>       return PAGE_ALIGN(xe_bo_size(bo));
>> diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c
>> index 68171cceea18..1b4d5d3def0f 100644
>> --- a/drivers/gpu/drm/xe/xe_pat.c
>> +++ b/drivers/gpu/drm/xe/xe_pat.c
>> @@ -196,6 +196,12 @@ u16 xe_pat_index_get_coh_mode(struct xe_device 
>> *xe, u16 pat_index)
>>       return xe->pat.table[pat_index].coh_mode;
>>   }
>> +bool xe_pat_index_get_comp_en(struct xe_device *xe, u16 pat_index)
>> +{
>> +    WARN_ON(pat_index >= xe->pat.n_entries);
>> +    return !!(xe->pat.table[pat_index].value & XE2_COMP_EN);
>> +}
> 
> Looks like there no now three in-flight series each implementing a 
> helper like this. But all slightly different. Also not sure which is 
> going be be merged first. I personally prefer making this the same as 
> coh_mode above, and have a comp_en field, but either works.
> 
> https://patchwork.freedesktop.org/series/156658/
> https://patchwork.freedesktop.org/series/157036/
> 
> Wondering if it would make sense to split this helper into a separate 
> patch and merge that first, and then have all three series converge on 
> that? Also hopefully prevents accidently merging multiple helpers for 
> this, depending on the merge order?
> 
> + Sanjay & Xin
> 
>> +
>>   static void program_pat(struct xe_gt *gt, const struct 
>> xe_pat_table_entry table[],
>>               int n_entries)
>>   {
>> diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h
>> index 05dae03a5f54..b8559120989e 100644
>> --- a/drivers/gpu/drm/xe/xe_pat.h
>> +++ b/drivers/gpu/drm/xe/xe_pat.h
>> @@ -58,4 +58,14 @@ int xe_pat_dump(struct xe_gt *gt, struct 
>> drm_printer *p);
>>    */
>>   u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index);
>> +/**
>> + * xe_pat_index_get_comp_en - Extract the compression enable flag for
>> + * the given pat_index.
>> + * @xe: xe device
>> + * @pat_index: The pat_index to query
>> + *
>> + * Return: true if compression is enabled for this pat_index, false 
>> otherwise.
>> + */
>> +bool xe_pat_index_get_comp_en(struct xe_device *xe, u16 pat_index);
>> +
>>   #endif
>> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
>> index 8fb5cc6a69ec..a9927e665ad0 100644
>> --- a/drivers/gpu/drm/xe/xe_vm.c
>> +++ b/drivers/gpu/drm/xe/xe_vm.c
>> @@ -2302,6 +2302,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, 
>> struct xe_vma_ops *vops,
>>                   op->map.vma_flags |= XE_VMA_DUMPABLE;
>>               if (flags & DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET)
>>                   op->map.vma_flags |= XE_VMA_MADV_AUTORESET;
>> +            op->map.request_decompress = flags & 
>> DRM_XE_VM_BIND_FLAG_DECOMPRESS;
>>               op->map.pat_index = pat_index;
>>               op->map.invalidate_on_bind =
>>                   __xe_vm_needs_clear_scratch_pages(vm, flags);
>> @@ -2838,7 +2839,7 @@ static void vm_bind_ioctl_ops_unwind(struct 
>> xe_vm *vm,
>>   }
>>   static int vma_lock_and_validate(struct drm_exec *exec, struct 
>> xe_vma *vma,
>> -                 bool res_evict, bool validate)
>> +                 bool res_evict, bool validate, bool request_decompress)
>>   {
>>       struct xe_bo *bo = xe_vma_bo(vma);
>>       struct xe_vm *vm = xe_vma_vm(vma);
>> @@ -2851,6 +2852,12 @@ static int vma_lock_and_validate(struct 
>> drm_exec *exec, struct xe_vma *vma,
>>               err = xe_bo_validate(bo, vm,
>>                            !xe_vm_in_preempt_fence_mode(vm) &&
>>                            res_evict, exec);
>> +
>> +        if (err)
>> +            return err;
>> +
>> +        if (request_decompress)
>> +            err = xe_bo_decompress(bo, vm);
>>       }
>>       return err;
>> @@ -2938,7 +2945,8 @@ static int op_lock_and_prep(struct drm_exec 
>> *exec, struct xe_vm *vm,
>>               err = vma_lock_and_validate(exec, op->map.vma,
>>                               res_evict,
>>                               !xe_vm_in_fault_mode(vm) ||
>> -                            op->map.immediate);
>> +                            op->map.immediate,
>> +                            op->map.request_decompress);
>>           break;
>>       case DRM_GPUVA_OP_REMAP:
>>           err = check_ufence(gpuva_to_vma(op->base.remap.unmap->va));
>> @@ -2947,13 +2955,13 @@ static int op_lock_and_prep(struct drm_exec 
>> *exec, struct xe_vm *vm,
>>           err = vma_lock_and_validate(exec,
>>                           gpuva_to_vma(op->base.remap.unmap->va),
>> -                        res_evict, false);
>> +                        res_evict, false, false);
>>           if (!err && op->remap.prev)
>>               err = vma_lock_and_validate(exec, op->remap.prev,
>> -                            res_evict, true);
>> +                            res_evict, true, false);
>>           if (!err && op->remap.next)
>>               err = vma_lock_and_validate(exec, op->remap.next,
>> -                            res_evict, true);
>> +                            res_evict, true, false);
>>           break;
>>       case DRM_GPUVA_OP_UNMAP:
>>           err = check_ufence(gpuva_to_vma(op->base.unmap.va));
>> @@ -2962,7 +2970,7 @@ static int op_lock_and_prep(struct drm_exec 
>> *exec, struct xe_vm *vm,
>>           err = vma_lock_and_validate(exec,
>>                           gpuva_to_vma(op->base.unmap.va),
>> -                        res_evict, false);
>> +                        res_evict, false, false);
>>           break;
>>       case DRM_GPUVA_OP_PREFETCH:
>>       {
>> @@ -2977,7 +2985,7 @@ static int op_lock_and_prep(struct drm_exec 
>> *exec, struct xe_vm *vm,
>>           err = vma_lock_and_validate(exec,
>>                           gpuva_to_vma(op->base.prefetch.va),
>> -                        res_evict, false);
>> +                        res_evict, false, false);
>>           if (!err && !xe_vma_has_no_bo(vma))
>>               err = xe_bo_migrate(xe_vma_bo(vma),
>>                           region_to_mem_type[region],
>> @@ -3299,7 +3307,8 @@ ALLOW_ERROR_INJECTION(vm_bind_ioctl_ops_execute, 
>> ERRNO);
>>        DRM_XE_VM_BIND_FLAG_DUMPABLE | \
>>        DRM_XE_VM_BIND_FLAG_CHECK_PXP | \
>>        DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR | \
>> -     DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET)
>> +     DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET | \
>> +     DRM_XE_VM_BIND_FLAG_DECOMPRESS)
>>   #ifdef TEST_VM_OPS_ERROR
>>   #define SUPPORTED_FLAGS    (SUPPORTED_FLAGS_STUB | FORCE_OP_ERROR)
>> @@ -3357,6 +3366,7 @@ static int vm_bind_ioctl_check_args(struct 
>> xe_device *xe, struct xe_vm *vm,
>>           bool is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
>>           bool is_cpu_addr_mirror = flags &
>>               DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR;
>> +        bool is_decompress = flags & DRM_XE_VM_BIND_FLAG_DECOMPRESS;
>>           u16 pat_index = (*bind_ops)[i].pat_index;
>>           u16 coh_mode;
>> @@ -3391,7 +3401,9 @@ static int vm_bind_ioctl_check_args(struct 
>> xe_device *xe, struct xe_vm *vm,
>>               XE_IOCTL_DBG(xe, obj_offset && (is_null ||
>>                               is_cpu_addr_mirror)) ||
>>               XE_IOCTL_DBG(xe, op != DRM_XE_VM_BIND_OP_MAP &&
>> -                 (is_null || is_cpu_addr_mirror)) ||
>> +                 (is_decompress || is_null || is_cpu_addr_mirror)) ||
>> +            XE_IOCTL_DBG(xe, is_decompress &&
>> +                 xe_pat_index_get_comp_en(xe, pat_index)) ||
>>               XE_IOCTL_DBG(xe, !obj &&
>>                    op == DRM_XE_VM_BIND_OP_MAP &&
>>                    !is_null && !is_cpu_addr_mirror) ||
>> @@ -3411,8 +3423,8 @@ static int vm_bind_ioctl_check_args(struct 
>> xe_device *xe, struct xe_vm *vm,
>>                    op == DRM_XE_VM_BIND_OP_PREFETCH) ||
>>               XE_IOCTL_DBG(xe, prefetch_region &&
>>                    op != DRM_XE_VM_BIND_OP_PREFETCH) ||
>> -            XE_IOCTL_DBG(xe,  (prefetch_region != 
>> DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC &&
>> -                       !(BIT(prefetch_region) & xe- 
>> >info.mem_region_mask))) ||
>> +            XE_IOCTL_DBG(xe, (prefetch_region != 
>> DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC &&
>> +                      !(BIT(prefetch_region) & xe- 
>> >info.mem_region_mask))) ||
> 
> Is this just fixing whitespace? If so, please consider splitting 
> unrelated styling/cosmetic fixes into a separate patch.
> 
> Otherwise lgtm,
> Reviewed-by: Matthew Auld <matthew.auld@intel.com>
> 
>>               XE_IOCTL_DBG(xe, obj &&
>>                    op == DRM_XE_VM_BIND_OP_UNMAP) ||
>>               XE_IOCTL_DBG(xe, (flags & 
>> DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET) &&
>> @@ -3429,6 +3441,12 @@ static int vm_bind_ioctl_check_args(struct 
>> xe_device *xe, struct xe_vm *vm,
>>               err = -EINVAL;
>>               goto free_bind_ops;
>>           }
>> +
>> +        if (is_decompress && (XE_IOCTL_DBG(xe, ! 
>> xe_device_has_flat_ccs(xe)) ||
>> +                      XE_IOCTL_DBG(xe, GRAPHICS_VER(xe) < 20))) {

Hmm, reading the IGT, wondering if maybe we should rather reject this on 
igpu, instead of silently skipping? It gives the impression that it 
"worked", but it actually did nothing.

Also xe_device_has_flat_ccs() can sometimes be false on igpu due some 
setting in the BIOS to turn off compression on igpu, but I don't think 
UMD has a way to know that, and they might be surprised with this 
suddenly failing on xe2+ igpu, on some configurations. On the other hand 
if we always reject on igpu there are no surprises?

>> +            err = -EOPNOTSUPP;
>> +            goto free_bind_ops;
>> +        }
>>       }
>>       return 0;
>> diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/ 
>> xe_vm_types.h
>> index ccd6cc090309..f4962ca0df09 100644
>> --- a/drivers/gpu/drm/xe/xe_vm_types.h
>> +++ b/drivers/gpu/drm/xe/xe_vm_types.h
>> @@ -346,6 +346,8 @@ struct xe_vma_op_map {
>>       bool immediate;
>>       /** @read_only: Read only */
>>       bool invalidate_on_bind;
>> +    /** @request_decompress: schedule decompression for GPU map */
>> +    bool request_decompress;
>>       /** @pat_index: The pat index to use for this operation. */
>>       u16 pat_index;
>>   };
> 

RE: [PATCH v5 3/3] drm/xe: implement VM_BIND decompression in vm_bind_ioctl

[Wang, X]

> -----Original Message-----
> From: Auld, Matthew <matthew.auld@intel.com>
> Sent: Monday, November 10, 2025 03:46
> To: Gote, Nitin R <nitin.r.gote@intel.com>; Brost, Matthew
> <matthew.brost@intel.com>
> Cc: intel-xe@lists.freedesktop.org; Mrozek, Michal
> <michal.mrozek@intel.com>; Yadav, Sanjay Kumar
> <sanjay.kumar.yadav@intel.com>; Wang, X <x.wang@intel.com>
> Subject: Re: [PATCH v5 3/3] drm/xe: implement VM_BIND decompression in
> vm_bind_ioctl
> 
> On 07/11/2025 11:48, Nitin Gote wrote:
> > Implement handling of VM_BIND(..., DECOMPRESS) in xe_vm_bind_ioctl.
> >
> > Key changes:
> > - Parse and record per-op intent (op->map.request_decompress) when the
> >    DECOMPRESS flag is present.
> > - Introduce xe_pat_index_get_comp_en() helper to check if a PAT index
> >    has compression enabled via the XE2_COMP_EN bit.
> > - Validate DECOMPRESS preconditions in the ioctl path:
> >    - Only valid for MAP ops.
> >    - The provided pat_index must select the device's "no-compression" PAT.
> >    - Only meaningful on devices with flat CCS and the required XE2+
> >      otherwise return -EOPNOTSUPP.
> >    - Use XE_IOCTL_DBG for uAPI sanity checks.
> > - Implement xe_bo_decompress():
> >    For VRAM BOs run xe_bo_move_notify(), reserve one fence slot,
> >    schedule xe_migrate_resolve(), and attach the returned fence
> >    with DMA_RESV_USAGE_KERNEL. Non-VRAM cases are silent no-ops.
> > - Wire scheduling into vma_lock_and_validate() so VM_BIND will schedule
> >    decompression when request_decompress is set.
> > - Handle fault-mode VMs by performing decompression synchronously
> during
> >    the bind process, ensuring that the resolve is completed before the bind
> >    finishes.
> >
> > This schedules an in-place GPU resolve (xe_migrate_resolve) for
> > decompression.
> >
> > v5: (Matt)
> >     - Correct the condition check of xe_pat_index_get_comp_en
> >
> > v4: (Matt)
> >     - Introduce xe_pat_index_get_comp_en(), which checks
> >       XE2_COMP_EN for the pat_index
> >     - .interruptible should be true, everything else false
> >
> > v3: (Matt)
> >     - s/xe_bo_schedule_decompress/xe_bo_decompress
> >     - skip the decrompress step if the BO isn't in VRAM
> >     - start/size not required in xe_bo_schedule_decompress
> >     - Use xe_bo_move_notify instead of xe_vm_invalidate_vma
> >       with respect to invalidation.
> >     - Nits
> >
> > v2:
> >     - Move decompression work out of vm_bind ioctl. (Matt)
> >     - Put that work in a small helper at the BO/migrate layer invoke it
> >       from vma_lock_and_validate which already runs under drm_exec.
> >     - Move lightweight checks to vm_bind_ioctl_check_args (Matthew
> > Auld)
> >
> > Cc: Matthew Brost <matthew.brost@intel.com>
> > Cc: Matthew Auld <matthew.auld@intel.com>
> > Acked-by: Michal Mrozek <michal.mrozek@intel.com>
> > Signed-off-by: Nitin Gote <nitin.r.gote@intel.com>
> > ---
> > Hi Matt,
> >
> > You're correct. The polarity of the xe_pat_index_get_comp_en check was
> > wrong. I misread it, sorry for the confusion.
> > Corrected it in this version.
> >
> > Thank you,
> > -Nitin
> >
> >
> >   drivers/gpu/drm/xe/xe_bo.c       | 52
> ++++++++++++++++++++++++++++++++
> >   drivers/gpu/drm/xe/xe_bo.h       |  2 ++
> >   drivers/gpu/drm/xe/xe_pat.c      |  6 ++++
> >   drivers/gpu/drm/xe/xe_pat.h      | 10 ++++++
> >   drivers/gpu/drm/xe/xe_vm.c       | 40 +++++++++++++++++-------
> >   drivers/gpu/drm/xe/xe_vm_types.h |  2 ++
> >   6 files changed, 101 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> > index b0bd31d14bb9..95331285c418 100644
> > --- a/drivers/gpu/drm/xe/xe_bo.c
> > +++ b/drivers/gpu/drm/xe/xe_bo.c
> > @@ -3330,6 +3330,58 @@ int xe_gem_mmap_offset_ioctl(struct
> drm_device *dev, void *data,
> >   	return 0;
> >   }
> >
> > +/**
> > + * xe_bo_decompress - schedule in-place decompress and install fence
> > + * @bo:   buffer object (caller should hold drm_exec reservations for
> VM+BO)
> > + * @vm:   VM containing the VMA range
> > + *
> > + * Schedules an in-place resolve via the migrate layer and installs
> > +the
> > + * returned dma_fence into the BO kernel reservation slot
> (DMA_RESV_USAGE_KERNEL).
> > + * In preempt fence mode, this operation interrupts hardware
> > +execution
> > + * which is expensive. Page fault mode is recommended for better
> performance.
> 
> Maybe add a comment somewhere here that this only currently works on
> dgpu? In case someone tries to use this on igpu also, which below will silently
> skip.
> 
> > + *
> > + * Returns 0 on success, negative errno on error.
> > + */
> > +int xe_bo_decompress(struct xe_bo *bo, struct xe_vm *vm) {
> > +	struct xe_tile *tile = xe_device_get_root_tile(vm->xe);
> 
> Look like we could extract this from the bo instead:
> 
> xe = xe_bo_device(bo);
> xe_device_get_root_tile(xe);
> 
> And we can then drop the vm arg?
> 
> > +	struct dma_fence *decomp_fence = NULL;
> > +	int err = 0;
> 
> Nit: Please put err at the end of the block. Reverse Christmas tree.
> 
> > +	struct ttm_operation_ctx op_ctx = {
> > +		.interruptible = true,
> > +		.no_wait_gpu = false,
> > +		.gfp_retry_mayfail = false,
> > +	};
> > +
> > +	/* Silently skip decompression for non-VRAM buffers */
> > +	if (!bo->ttm.resource || !mem_type_is_vram(bo->ttm.resource-
> >mem_type))
> > +		return 0;
> > +
> > +	/* Notify before scheduling resolve */
> > +	err = xe_bo_move_notify(bo, &op_ctx);
> > +	if (err)
> > +		return err;
> > +
> > +	/* Reserve fence slot before scheduling */
> > +	err = dma_resv_reserve_fences(bo->ttm.base.resv, 1);
> > +	if (err)
> > +		return err;
> > +
> > +	/* Schedule the in-place decompression */
> > +	decomp_fence = xe_migrate_resolve(tile->migrate,
> > +					  bo,
> > +					  bo->ttm.resource);
> > +
> > +	if (IS_ERR(decomp_fence))
> > +		return PTR_ERR(decomp_fence);
> > +
> > +	/* Install kernel-usage fence */
> > +	dma_resv_add_fence(bo->ttm.base.resv, decomp_fence,
> DMA_RESV_USAGE_KERNEL);
> > +	dma_fence_put(decomp_fence);
> > +
> > +	return 0;
> > +}
> > +
> >   /**
> >    * xe_bo_lock() - Lock the buffer object's dma_resv object
> >    * @bo: The struct xe_bo whose lock is to be taken diff --git
> > a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h index
> > 911d5b90461a..346b50a1247c 100644
> > --- a/drivers/gpu/drm/xe/xe_bo.h
> > +++ b/drivers/gpu/drm/xe/xe_bo.h
> > @@ -309,6 +309,8 @@ int xe_bo_dumb_create(struct drm_file *file_priv,
> >
> >   bool xe_bo_needs_ccs_pages(struct xe_bo *bo);
> >
> > +int xe_bo_decompress(struct xe_bo *bo, struct xe_vm *vm);
> > +
> >   static inline size_t xe_bo_ccs_pages_start(struct xe_bo *bo)
> >   {
> >   	return PAGE_ALIGN(xe_bo_size(bo));
> > diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c
> > index 68171cceea18..1b4d5d3def0f 100644
> > --- a/drivers/gpu/drm/xe/xe_pat.c
> > +++ b/drivers/gpu/drm/xe/xe_pat.c
> > @@ -196,6 +196,12 @@ u16 xe_pat_index_get_coh_mode(struct xe_device
> *xe, u16 pat_index)
> >   	return xe->pat.table[pat_index].coh_mode;
> >   }
> >
> > +bool xe_pat_index_get_comp_en(struct xe_device *xe, u16 pat_index) {
> > +	WARN_ON(pat_index >= xe->pat.n_entries);
> > +	return !!(xe->pat.table[pat_index].value & XE2_COMP_EN); }
> 
> Looks like there no now three in-flight series each implementing a helper like
> this. But all slightly different. Also not sure which is going be be merged first. I
> personally prefer making this the same as coh_mode above, and have a
> comp_en field, but either works.
> 
> https://patchwork.freedesktop.org/series/156658/
> https://patchwork.freedesktop.org/series/157036/
> 
> Wondering if it would make sense to split this helper into a separate patch and
> merge that first, and then have all three series converge on that? Also
> hopefully prevents accidently merging multiple helpers for this, depending on
> the merge order?
> 
> + Sanjay & Xin

I prefer to use the current code !!(value & XE2_COMP_EN) to get the compression information. Since it's compatible with the pre-xe2 also.
I have created the separate patch :  https://patchwork.freedesktop.org/series/157352/

> 
> > +
> >   static void program_pat(struct xe_gt *gt, const struct xe_pat_table_entry
> table[],
> >   			int n_entries)
> >   {
> > diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h
> > index 05dae03a5f54..b8559120989e 100644
> > --- a/drivers/gpu/drm/xe/xe_pat.h
> > +++ b/drivers/gpu/drm/xe/xe_pat.h
> > @@ -58,4 +58,14 @@ int xe_pat_dump(struct xe_gt *gt, struct drm_printer
> *p);
> >    */
> >   u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index);
> >
> > +/**
> > + * xe_pat_index_get_comp_en - Extract the compression enable flag for
> > + * the given pat_index.
> > + * @xe: xe device
> > + * @pat_index: The pat_index to query
> > + *
> > + * Return: true if compression is enabled for this pat_index, false otherwise.
> > + */
> > +bool xe_pat_index_get_comp_en(struct xe_device *xe, u16 pat_index);
> > +
> >   #endif
> > diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> > index 8fb5cc6a69ec..a9927e665ad0 100644
> > --- a/drivers/gpu/drm/xe/xe_vm.c
> > +++ b/drivers/gpu/drm/xe/xe_vm.c
> > @@ -2302,6 +2302,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm,
> struct xe_vma_ops *vops,
> >   				op->map.vma_flags |= XE_VMA_DUMPABLE;
> >   			if (flags &
> DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET)
> >   				op->map.vma_flags |=
> XE_VMA_MADV_AUTORESET;
> > +			op->map.request_decompress = flags &
> > +DRM_XE_VM_BIND_FLAG_DECOMPRESS;
> >   			op->map.pat_index = pat_index;
> >   			op->map.invalidate_on_bind =
> >   				__xe_vm_needs_clear_scratch_pages(vm,
> flags); @@ -2838,7 +2839,7
> > @@ static void vm_bind_ioctl_ops_unwind(struct xe_vm *vm,
> >   }
> >
> >   static int vma_lock_and_validate(struct drm_exec *exec, struct xe_vma
> *vma,
> > -				 bool res_evict, bool validate)
> > +				 bool res_evict, bool validate, bool
> request_decompress)
> >   {
> >   	struct xe_bo *bo = xe_vma_bo(vma);
> >   	struct xe_vm *vm = xe_vma_vm(vma);
> > @@ -2851,6 +2852,12 @@ static int vma_lock_and_validate(struct
> drm_exec *exec, struct xe_vma *vma,
> >   			err = xe_bo_validate(bo, vm,
> >
> 	     !xe_vm_in_preempt_fence_mode(vm) &&
> >   					     res_evict, exec);
> > +
> > +		if (err)
> > +			return err;
> > +
> > +		if (request_decompress)
> > +			err = xe_bo_decompress(bo, vm);
> >   	}
> >
> >   	return err;
> > @@ -2938,7 +2945,8 @@ static int op_lock_and_prep(struct drm_exec
> *exec, struct xe_vm *vm,
> >   			err = vma_lock_and_validate(exec, op->map.vma,
> >   						    res_evict,
> >   						    !xe_vm_in_fault_mode(vm)
> ||
> > -						    op->map.immediate);
> > +						    op->map.immediate,
> > +						    op-
> >map.request_decompress);
> >   		break;
> >   	case DRM_GPUVA_OP_REMAP:
> >   		err = check_ufence(gpuva_to_vma(op->base.remap.unmap-
> >va));
> > @@ -2947,13 +2955,13 @@ static int op_lock_and_prep(struct drm_exec
> > *exec, struct xe_vm *vm,
> >
> >   		err = vma_lock_and_validate(exec,
> >   					    gpuva_to_vma(op-
> >base.remap.unmap->va),
> > -					    res_evict, false);
> > +					    res_evict, false, false);
> >   		if (!err && op->remap.prev)
> >   			err = vma_lock_and_validate(exec, op->remap.prev,
> > -						    res_evict, true);
> > +						    res_evict, true, false);
> >   		if (!err && op->remap.next)
> >   			err = vma_lock_and_validate(exec, op->remap.next,
> > -						    res_evict, true);
> > +						    res_evict, true, false);
> >   		break;
> >   	case DRM_GPUVA_OP_UNMAP:
> >   		err = check_ufence(gpuva_to_vma(op->base.unmap.va));
> > @@ -2962,7 +2970,7 @@ static int op_lock_and_prep(struct drm_exec
> > *exec, struct xe_vm *vm,
> >
> >   		err = vma_lock_and_validate(exec,
> >   					    gpuva_to_vma(op-
> >base.unmap.va),
> > -					    res_evict, false);
> > +					    res_evict, false, false);
> >   		break;
> >   	case DRM_GPUVA_OP_PREFETCH:
> >   	{
> > @@ -2977,7 +2985,7 @@ static int op_lock_and_prep(struct drm_exec
> > *exec, struct xe_vm *vm,
> >
> >   		err = vma_lock_and_validate(exec,
> >   					    gpuva_to_vma(op-
> >base.prefetch.va),
> > -					    res_evict, false);
> > +					    res_evict, false, false);
> >   		if (!err && !xe_vma_has_no_bo(vma))
> >   			err = xe_bo_migrate(xe_vma_bo(vma),
> >   					    region_to_mem_type[region], @@
> -3299,7 +3307,8 @@
> > ALLOW_ERROR_INJECTION(vm_bind_ioctl_ops_execute, ERRNO);
> >   	 DRM_XE_VM_BIND_FLAG_DUMPABLE | \
> >   	 DRM_XE_VM_BIND_FLAG_CHECK_PXP | \
> >   	 DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR | \
> > -	 DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET)
> > +	 DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET | \
> > +	 DRM_XE_VM_BIND_FLAG_DECOMPRESS)
> >
> >   #ifdef TEST_VM_OPS_ERROR
> >   #define SUPPORTED_FLAGS	(SUPPORTED_FLAGS_STUB |
> FORCE_OP_ERROR)
> > @@ -3357,6 +3366,7 @@ static int vm_bind_ioctl_check_args(struct
> xe_device *xe, struct xe_vm *vm,
> >   		bool is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
> >   		bool is_cpu_addr_mirror = flags &
> >   			DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR;
> > +		bool is_decompress = flags &
> DRM_XE_VM_BIND_FLAG_DECOMPRESS;
> >   		u16 pat_index = (*bind_ops)[i].pat_index;
> >   		u16 coh_mode;
> >
> > @@ -3391,7 +3401,9 @@ static int vm_bind_ioctl_check_args(struct
> xe_device *xe, struct xe_vm *vm,
> >   		    XE_IOCTL_DBG(xe, obj_offset && (is_null ||
> >   						    is_cpu_addr_mirror)) ||
> >   		    XE_IOCTL_DBG(xe, op != DRM_XE_VM_BIND_OP_MAP &&
> > -				 (is_null || is_cpu_addr_mirror)) ||
> > +				 (is_decompress || is_null ||
> is_cpu_addr_mirror)) ||
> > +		    XE_IOCTL_DBG(xe, is_decompress &&
> > +				 xe_pat_index_get_comp_en(xe, pat_index))
> ||
> >   		    XE_IOCTL_DBG(xe, !obj &&
> >   				 op == DRM_XE_VM_BIND_OP_MAP &&
> >   				 !is_null && !is_cpu_addr_mirror) || @@ -
> 3411,8 +3423,8 @@
> > static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
> >   				 op == DRM_XE_VM_BIND_OP_PREFETCH) ||
> >   		    XE_IOCTL_DBG(xe, prefetch_region &&
> >   				 op != DRM_XE_VM_BIND_OP_PREFETCH) ||
> > -		    XE_IOCTL_DBG(xe,  (prefetch_region !=
> DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC &&
> > -				       !(BIT(prefetch_region) & xe-
> >info.mem_region_mask))) ||
> > +		    XE_IOCTL_DBG(xe, (prefetch_region !=
> DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC &&
> > +				      !(BIT(prefetch_region) & xe-
> >info.mem_region_mask))) ||
> 
> Is this just fixing whitespace? If so, please consider splitting unrelated
> styling/cosmetic fixes into a separate patch.
> 
> Otherwise lgtm,
> Reviewed-by: Matthew Auld <matthew.auld@intel.com>
> 
> >   		    XE_IOCTL_DBG(xe, obj &&
> >   				 op == DRM_XE_VM_BIND_OP_UNMAP) ||
> >   		    XE_IOCTL_DBG(xe, (flags &
> > DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET) && @@ -3429,6
> +3441,12 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct
> xe_vm *vm,
> >   			err = -EINVAL;
> >   			goto free_bind_ops;
> >   		}
> > +
> > +		if (is_decompress &&
> (XE_IOCTL_DBG(xe, !xe_device_has_flat_ccs(xe)) ||
> > +				      XE_IOCTL_DBG(xe, GRAPHICS_VER(xe) <
> 20))) {
> > +			err = -EOPNOTSUPP;
> > +			goto free_bind_ops;
> > +		}
> >   	}
> >
> >   	return 0;
> > diff --git a/drivers/gpu/drm/xe/xe_vm_types.h
> > b/drivers/gpu/drm/xe/xe_vm_types.h
> > index ccd6cc090309..f4962ca0df09 100644
> > --- a/drivers/gpu/drm/xe/xe_vm_types.h
> > +++ b/drivers/gpu/drm/xe/xe_vm_types.h
> > @@ -346,6 +346,8 @@ struct xe_vma_op_map {
> >   	bool immediate;
> >   	/** @read_only: Read only */
> >   	bool invalidate_on_bind;
> > +	/** @request_decompress: schedule decompression for GPU map */
> > +	bool request_decompress;
> >   	/** @pat_index: The pat index to use for this operation. */
> >   	u16 pat_index;
> >   };

✓ CI.KUnit: success for drm/xe: add VM_BIND DECOMPRESS support and on‑demand decompression (rev5)

[Patchwork]

== Series Details ==

Series: drm/xe: add VM_BIND DECOMPRESS support and on‑demand decompression (rev5)
URL   : https://patchwork.freedesktop.org/series/154714/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:40:18] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:40:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:41:30] Starting KUnit Kernel (1/1)...
[12:41:30] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:41:31] ================== guc_buf (11 subtests) ===================
[12:41:31] [PASSED] test_smallest
[12:41:31] [PASSED] test_largest
[12:41:31] [PASSED] test_granular
[12:41:31] [PASSED] test_unique
[12:41:31] [PASSED] test_overlap
[12:41:31] [PASSED] test_reusable
[12:41:31] [PASSED] test_too_big
[12:41:31] [PASSED] test_flush
[12:41:31] [PASSED] test_lookup
[12:41:31] [PASSED] test_data
[12:41:31] [PASSED] test_class
[12:41:31] ===================== [PASSED] guc_buf =====================
[12:41:31] =================== guc_dbm (7 subtests) ===================
[12:41:31] [PASSED] test_empty
[12:41:31] [PASSED] test_default
[12:41:31] ======================== test_size  ========================
[12:41:31] [PASSED] 4
[12:41:31] [PASSED] 8
[12:41:31] [PASSED] 32
[12:41:31] [PASSED] 256
[12:41:31] ==================== [PASSED] test_size ====================
[12:41:31] ======================= test_reuse  ========================
[12:41:31] [PASSED] 4
[12:41:31] [PASSED] 8
[12:41:31] [PASSED] 32
[12:41:31] [PASSED] 256
[12:41:31] =================== [PASSED] test_reuse ====================
[12:41:31] =================== test_range_overlap  ====================
[12:41:31] [PASSED] 4
[12:41:31] [PASSED] 8
[12:41:31] [PASSED] 32
[12:41:31] [PASSED] 256
[12:41:31] =============== [PASSED] test_range_overlap ================
[12:41:31] =================== test_range_compact  ====================
[12:41:31] [PASSED] 4
[12:41:31] [PASSED] 8
[12:41:31] [PASSED] 32
[12:41:31] [PASSED] 256
[12:41:31] =============== [PASSED] test_range_compact ================
[12:41:31] ==================== test_range_spare  =====================
[12:41:31] [PASSED] 4
[12:41:31] [PASSED] 8
[12:41:31] [PASSED] 32
[12:41:31] [PASSED] 256
[12:41:31] ================ [PASSED] test_range_spare =================
[12:41:31] ===================== [PASSED] guc_dbm =====================
[12:41:31] =================== guc_idm (6 subtests) ===================
[12:41:31] [PASSED] bad_init
[12:41:31] [PASSED] no_init
[12:41:31] [PASSED] init_fini
[12:41:31] [PASSED] check_used
[12:41:31] [PASSED] check_quota
[12:41:31] [PASSED] check_all
[12:41:31] ===================== [PASSED] guc_idm =====================
[12:41:31] ================== no_relay (3 subtests) ===================
[12:41:31] [PASSED] xe_drops_guc2pf_if_not_ready
[12:41:31] [PASSED] xe_drops_guc2vf_if_not_ready
[12:41:31] [PASSED] xe_rejects_send_if_not_ready
[12:41:31] ==================== [PASSED] no_relay =====================
[12:41:31] ================== pf_relay (14 subtests) ==================
[12:41:31] [PASSED] pf_rejects_guc2pf_too_short
[12:41:31] [PASSED] pf_rejects_guc2pf_too_long
[12:41:31] [PASSED] pf_rejects_guc2pf_no_payload
[12:41:31] [PASSED] pf_fails_no_payload
[12:41:31] [PASSED] pf_fails_bad_origin
[12:41:31] [PASSED] pf_fails_bad_type
[12:41:31] [PASSED] pf_txn_reports_error
[12:41:31] [PASSED] pf_txn_sends_pf2guc
[12:41:31] [PASSED] pf_sends_pf2guc
[12:41:31] [SKIPPED] pf_loopback_nop
[12:41:31] [SKIPPED] pf_loopback_echo
[12:41:31] [SKIPPED] pf_loopback_fail
[12:41:31] [SKIPPED] pf_loopback_busy
[12:41:31] [SKIPPED] pf_loopback_retry
[12:41:31] ==================== [PASSED] pf_relay =====================
[12:41:31] ================== vf_relay (3 subtests) ===================
[12:41:31] [PASSED] vf_rejects_guc2vf_too_short
[12:41:31] [PASSED] vf_rejects_guc2vf_too_long
[12:41:31] [PASSED] vf_rejects_guc2vf_no_payload
[12:41:31] ==================== [PASSED] vf_relay =====================
[12:41:31] ===================== lmtt (1 subtest) =====================
[12:41:31] ======================== test_ops  =========================
[12:41:31] [PASSED] 2-level
[12:41:31] [PASSED] multi-level
[12:41:31] ==================== [PASSED] test_ops =====================
[12:41:31] ====================== [PASSED] lmtt =======================
[12:41:31] ================= pf_service (11 subtests) =================
[12:41:31] [PASSED] pf_negotiate_any
[12:41:31] [PASSED] pf_negotiate_base_match
[12:41:31] [PASSED] pf_negotiate_base_newer
[12:41:31] [PASSED] pf_negotiate_base_next
[12:41:31] [SKIPPED] pf_negotiate_base_older
[12:41:31] [PASSED] pf_negotiate_base_prev
[12:41:31] [PASSED] pf_negotiate_latest_match
[12:41:31] [PASSED] pf_negotiate_latest_newer
[12:41:31] [PASSED] pf_negotiate_latest_next
[12:41:31] [SKIPPED] pf_negotiate_latest_older
[12:41:31] [SKIPPED] pf_negotiate_latest_prev
[12:41:31] =================== [PASSED] pf_service ====================
[12:41:31] ================= xe_guc_g2g (2 subtests) ==================
[12:41:31] ============== xe_live_guc_g2g_kunit_default  ==============
[12:41:31] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:41:31] ============== xe_live_guc_g2g_kunit_allmem  ===============
[12:41:31] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:41:31] =================== [SKIPPED] xe_guc_g2g ===================
[12:41:31] =================== xe_mocs (2 subtests) ===================
[12:41:31] ================ xe_live_mocs_kernel_kunit  ================
[12:41:31] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:41:31] ================ xe_live_mocs_reset_kunit  =================
[12:41:31] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:41:31] ==================== [SKIPPED] xe_mocs =====================
[12:41:31] ================= xe_migrate (2 subtests) ==================
[12:41:31] ================= xe_migrate_sanity_kunit  =================
[12:41:31] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:41:31] ================== xe_validate_ccs_kunit  ==================
[12:41:31] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:41:31] =================== [SKIPPED] xe_migrate ===================
[12:41:31] ================== xe_dma_buf (1 subtest) ==================
[12:41:31] ==================== xe_dma_buf_kunit  =====================
[12:41:31] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:41:31] =================== [SKIPPED] xe_dma_buf ===================
[12:41:31] ================= xe_bo_shrink (1 subtest) =================
[12:41:31] =================== xe_bo_shrink_kunit  ====================
[12:41:31] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:41:31] ================== [SKIPPED] xe_bo_shrink ==================
[12:41:31] ==================== xe_bo (2 subtests) ====================
[12:41:31] ================== xe_ccs_migrate_kunit  ===================
[12:41:31] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:41:31] ==================== xe_bo_evict_kunit  ====================
[12:41:31] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:41:31] ===================== [SKIPPED] xe_bo ======================
[12:41:31] ==================== args (11 subtests) ====================
[12:41:31] [PASSED] count_args_test
[12:41:31] [PASSED] call_args_example
[12:41:31] [PASSED] call_args_test
[12:41:31] [PASSED] drop_first_arg_example
[12:41:31] [PASSED] drop_first_arg_test
[12:41:31] [PASSED] first_arg_example
[12:41:31] [PASSED] first_arg_test
[12:41:31] [PASSED] last_arg_example
[12:41:31] [PASSED] last_arg_test
[12:41:31] [PASSED] pick_arg_example
[12:41:31] [PASSED] sep_comma_example
[12:41:31] ====================== [PASSED] args =======================
[12:41:31] =================== xe_pci (3 subtests) ====================
[12:41:31] ==================== check_graphics_ip  ====================
[12:41:31] [PASSED] 12.00 Xe_LP
[12:41:31] [PASSED] 12.10 Xe_LP+
[12:41:31] [PASSED] 12.55 Xe_HPG
[12:41:31] [PASSED] 12.60 Xe_HPC
[12:41:31] [PASSED] 12.70 Xe_LPG
[12:41:31] [PASSED] 12.71 Xe_LPG
[12:41:31] [PASSED] 12.74 Xe_LPG+
[12:41:31] [PASSED] 20.01 Xe2_HPG
[12:41:31] [PASSED] 20.02 Xe2_HPG
[12:41:31] [PASSED] 20.04 Xe2_LPG
[12:41:31] [PASSED] 30.00 Xe3_LPG
[12:41:31] [PASSED] 30.01 Xe3_LPG
[12:41:31] [PASSED] 30.03 Xe3_LPG
[12:41:31] [PASSED] 30.04 Xe3_LPG
[12:41:31] [PASSED] 30.05 Xe3_LPG
[12:41:31] [PASSED] 35.11 Xe3p_XPC
[12:41:31] ================ [PASSED] check_graphics_ip ================
[12:41:31] ===================== check_media_ip  ======================
[12:41:31] [PASSED] 12.00 Xe_M
[12:41:31] [PASSED] 12.55 Xe_HPM
[12:41:31] [PASSED] 13.00 Xe_LPM+
[12:41:31] [PASSED] 13.01 Xe2_HPM
[12:41:31] [PASSED] 20.00 Xe2_LPM
[12:41:31] [PASSED] 30.00 Xe3_LPM
[12:41:31] [PASSED] 30.02 Xe3_LPM
[12:41:31] [PASSED] 35.00 Xe3p_LPM
[12:41:31] [PASSED] 35.03 Xe3p_HPM
[12:41:31] ================= [PASSED] check_media_ip ==================
[12:41:31] =================== check_platform_desc  ===================
[12:41:31] [PASSED] 0x9A60 (TIGERLAKE)
[12:41:31] [PASSED] 0x9A68 (TIGERLAKE)
[12:41:31] [PASSED] 0x9A70 (TIGERLAKE)
[12:41:31] [PASSED] 0x9A40 (TIGERLAKE)
[12:41:31] [PASSED] 0x9A49 (TIGERLAKE)
[12:41:31] [PASSED] 0x9A59 (TIGERLAKE)
[12:41:31] [PASSED] 0x9A78 (TIGERLAKE)
[12:41:31] [PASSED] 0x9AC0 (TIGERLAKE)
[12:41:31] [PASSED] 0x9AC9 (TIGERLAKE)
[12:41:31] [PASSED] 0x9AD9 (TIGERLAKE)
[12:41:31] [PASSED] 0x9AF8 (TIGERLAKE)
[12:41:31] [PASSED] 0x4C80 (ROCKETLAKE)
[12:41:31] [PASSED] 0x4C8A (ROCKETLAKE)
[12:41:31] [PASSED] 0x4C8B (ROCKETLAKE)
[12:41:31] [PASSED] 0x4C8C (ROCKETLAKE)
[12:41:31] [PASSED] 0x4C90 (ROCKETLAKE)
[12:41:31] [PASSED] 0x4C9A (ROCKETLAKE)
[12:41:31] [PASSED] 0x4680 (ALDERLAKE_S)
[12:41:31] [PASSED] 0x4682 (ALDERLAKE_S)
[12:41:31] [PASSED] 0x4688 (ALDERLAKE_S)
[12:41:31] [PASSED] 0x468A (ALDERLAKE_S)
[12:41:31] [PASSED] 0x468B (ALDERLAKE_S)
[12:41:31] [PASSED] 0x4690 (ALDERLAKE_S)
[12:41:31] [PASSED] 0x4692 (ALDERLAKE_S)
[12:41:31] [PASSED] 0x4693 (ALDERLAKE_S)
[12:41:31] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x46AA (ALDERLAKE_P)
[12:41:31] [PASSED] 0x462A (ALDERLAKE_P)
[12:41:31] [PASSED] 0x4626 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x4628 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x46B0 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:41:31] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:41:31] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:41:31] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:41:31] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:41:31] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:41:31] [PASSED] 0xA721 (ALDERLAKE_P)
[12:41:31] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:41:31] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:41:31] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:41:31] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:41:31] [PASSED] 0xA720 (ALDERLAKE_P)
[12:41:31] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:41:31] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:41:31] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:41:31] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:41:31] [PASSED] 0xA780 (ALDERLAKE_S)
[12:41:31] [PASSED] 0xA781 (ALDERLAKE_S)
[12:41:31] [PASSED] 0xA782 (ALDERLAKE_S)
[12:41:31] [PASSED] 0xA783 (ALDERLAKE_S)
[12:41:31] [PASSED] 0xA788 (ALDERLAKE_S)
[12:41:31] [PASSED] 0xA789 (ALDERLAKE_S)
[12:41:31] [PASSED] 0xA78A (ALDERLAKE_S)
[12:41:31] [PASSED] 0xA78B (ALDERLAKE_S)
[12:41:31] [PASSED] 0x4905 (DG1)
[12:41:31] [PASSED] 0x4906 (DG1)
[12:41:31] [PASSED] 0x4907 (DG1)
[12:41:31] [PASSED] 0x4908 (DG1)
[12:41:31] [PASSED] 0x4909 (DG1)
[12:41:31] [PASSED] 0x56C0 (DG2)
[12:41:31] [PASSED] 0x56C2 (DG2)
[12:41:31] [PASSED] 0x56C1 (DG2)
[12:41:31] [PASSED] 0x7D51 (METEORLAKE)
[12:41:31] [PASSED] 0x7DD1 (METEORLAKE)
[12:41:31] [PASSED] 0x7D41 (METEORLAKE)
[12:41:31] [PASSED] 0x7D67 (METEORLAKE)
[12:41:31] [PASSED] 0xB640 (METEORLAKE)
[12:41:31] [PASSED] 0x56A0 (DG2)
[12:41:31] [PASSED] 0x56A1 (DG2)
[12:41:31] [PASSED] 0x56A2 (DG2)
[12:41:31] [PASSED] 0x56BE (DG2)
[12:41:31] [PASSED] 0x56BF (DG2)
[12:41:31] [PASSED] 0x5690 (DG2)
[12:41:31] [PASSED] 0x5691 (DG2)
[12:41:31] [PASSED] 0x5692 (DG2)
[12:41:31] [PASSED] 0x56A5 (DG2)
[12:41:31] [PASSED] 0x56A6 (DG2)
[12:41:31] [PASSED] 0x56B0 (DG2)
[12:41:31] [PASSED] 0x56B1 (DG2)
[12:41:31] [PASSED] 0x56BA (DG2)
[12:41:31] [PASSED] 0x56BB (DG2)
[12:41:31] [PASSED] 0x56BC (DG2)
[12:41:31] [PASSED] 0x56BD (DG2)
[12:41:31] [PASSED] 0x5693 (DG2)
[12:41:31] [PASSED] 0x5694 (DG2)
[12:41:31] [PASSED] 0x5695 (DG2)
[12:41:31] [PASSED] 0x56A3 (DG2)
[12:41:31] [PASSED] 0x56A4 (DG2)
[12:41:31] [PASSED] 0x56B2 (DG2)
[12:41:31] [PASSED] 0x56B3 (DG2)
[12:41:31] [PASSED] 0x5696 (DG2)
[12:41:31] [PASSED] 0x5697 (DG2)
[12:41:31] [PASSED] 0xB69 (PVC)
[12:41:31] [PASSED] 0xB6E (PVC)
[12:41:31] [PASSED] 0xBD4 (PVC)
[12:41:31] [PASSED] 0xBD5 (PVC)
[12:41:31] [PASSED] 0xBD6 (PVC)
[12:41:31] [PASSED] 0xBD7 (PVC)
[12:41:31] [PASSED] 0xBD8 (PVC)
[12:41:31] [PASSED] 0xBD9 (PVC)
[12:41:31] [PASSED] 0xBDA (PVC)
[12:41:31] [PASSED] 0xBDB (PVC)
[12:41:31] [PASSED] 0xBE0 (PVC)
[12:41:31] [PASSED] 0xBE1 (PVC)
[12:41:31] [PASSED] 0xBE5 (PVC)
[12:41:31] [PASSED] 0x7D40 (METEORLAKE)
[12:41:31] [PASSED] 0x7D45 (METEORLAKE)
[12:41:31] [PASSED] 0x7D55 (METEORLAKE)
[12:41:31] [PASSED] 0x7D60 (METEORLAKE)
[12:41:31] [PASSED] 0x7DD5 (METEORLAKE)
[12:41:31] [PASSED] 0x6420 (LUNARLAKE)
[12:41:31] [PASSED] 0x64A0 (LUNARLAKE)
[12:41:31] [PASSED] 0x64B0 (LUNARLAKE)
[12:41:31] [PASSED] 0xE202 (BATTLEMAGE)
[12:41:31] [PASSED] 0xE209 (BATTLEMAGE)
[12:41:31] [PASSED] 0xE20B (BATTLEMAGE)
[12:41:31] [PASSED] 0xE20C (BATTLEMAGE)
[12:41:31] [PASSED] 0xE20D (BATTLEMAGE)
[12:41:31] [PASSED] 0xE210 (BATTLEMAGE)
[12:41:31] [PASSED] 0xE211 (BATTLEMAGE)
[12:41:31] [PASSED] 0xE212 (BATTLEMAGE)
[12:41:31] [PASSED] 0xE216 (BATTLEMAGE)
[12:41:31] [PASSED] 0xE220 (BATTLEMAGE)
[12:41:31] [PASSED] 0xE221 (BATTLEMAGE)
[12:41:31] [PASSED] 0xE222 (BATTLEMAGE)
[12:41:31] [PASSED] 0xE223 (BATTLEMAGE)
[12:41:31] [PASSED] 0xB080 (PANTHERLAKE)
[12:41:31] [PASSED] 0xB081 (PANTHERLAKE)
[12:41:31] [PASSED] 0xB082 (PANTHERLAKE)
[12:41:31] [PASSED] 0xB083 (PANTHERLAKE)
[12:41:31] [PASSED] 0xB084 (PANTHERLAKE)
[12:41:31] [PASSED] 0xB085 (PANTHERLAKE)
[12:41:31] [PASSED] 0xB086 (PANTHERLAKE)
[12:41:31] [PASSED] 0xB087 (PANTHERLAKE)
[12:41:31] [PASSED] 0xB08F (PANTHERLAKE)
[12:41:31] [PASSED] 0xB090 (PANTHERLAKE)
[12:41:31] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:41:31] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:41:31] [PASSED] 0xD740 (NOVALAKE_S)
[12:41:31] [PASSED] 0xD741 (NOVALAKE_S)
[12:41:31] [PASSED] 0xD742 (NOVALAKE_S)
[12:41:31] [PASSED] 0xD743 (NOVALAKE_S)
[12:41:31] [PASSED] 0xD744 (NOVALAKE_S)
[12:41:31] [PASSED] 0xD745 (NOVALAKE_S)
[12:41:31] [PASSED] 0x674C (CRESCENTISLAND)
[12:41:31] [PASSED] 0xFD80 (PANTHERLAKE)
[12:41:31] [PASSED] 0xFD81 (PANTHERLAKE)
[12:41:31] =============== [PASSED] check_platform_desc ===============
[12:41:31] ===================== [PASSED] xe_pci ======================
[12:41:31] =================== xe_rtp (2 subtests) ====================
[12:41:31] =============== xe_rtp_process_to_sr_tests  ================
[12:41:31] [PASSED] coalesce-same-reg
[12:41:31] [PASSED] no-match-no-add
[12:41:31] [PASSED] match-or
[12:41:31] [PASSED] match-or-xfail
[12:41:31] [PASSED] no-match-no-add-multiple-rules
[12:41:31] [PASSED] two-regs-two-entries
[12:41:31] [PASSED] clr-one-set-other
[12:41:31] [PASSED] set-field
[12:41:31] [PASSED] conflict-duplicate
[12:41:31] [PASSED] conflict-not-disjoint
[12:41:31] [PASSED] conflict-reg-type
[12:41:31] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:41:31] ================== xe_rtp_process_tests  ===================
[12:41:31] [PASSED] active1
[12:41:31] [PASSED] active2
[12:41:31] [PASSED] active-inactive
[12:41:31] [PASSED] inactive-active
[12:41:31] [PASSED] inactive-1st_or_active-inactive
[12:41:31] [PASSED] inactive-2nd_or_active-inactive
[12:41:31] [PASSED] inactive-last_or_active-inactive
stty: 'standard input': Inappropriate ioctl for device
[12:41:31] [PASSED] inactive-no_or_active-inactive
[12:41:31] ============== [PASSED] xe_rtp_process_tests ===============
[12:41:31] ===================== [PASSED] xe_rtp ======================
[12:41:31] ==================== xe_wa (1 subtest) =====================
[12:41:31] ======================== xe_wa_gt  =========================
[12:41:31] [PASSED] TIGERLAKE B0
[12:41:31] [PASSED] DG1 A0
[12:41:31] [PASSED] DG1 B0
[12:41:31] [PASSED] ALDERLAKE_S A0
[12:41:31] [PASSED] ALDERLAKE_S B0
[12:41:31] [PASSED] ALDERLAKE_S C0
[12:41:31] [PASSED] ALDERLAKE_S D0
[12:41:31] [PASSED] ALDERLAKE_P A0
[12:41:31] [PASSED] ALDERLAKE_P B0
[12:41:31] [PASSED] ALDERLAKE_P C0
[12:41:31] [PASSED] ALDERLAKE_S RPLS D0
[12:41:31] [PASSED] ALDERLAKE_P RPLU E0
[12:41:31] [PASSED] DG2 G10 C0
[12:41:31] [PASSED] DG2 G11 B1
[12:41:31] [PASSED] DG2 G12 A1
[12:41:31] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:41:31] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:41:31] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:41:31] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:41:31] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:41:31] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:41:31] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:41:31] ==================== [PASSED] xe_wa_gt =====================
[12:41:31] ====================== [PASSED] xe_wa ======================
[12:41:31] ============================================================
[12:41:31] Testing complete. Ran 318 tests: passed: 300, skipped: 18
[12:41:31] Elapsed time: 72.420s total, 7.274s configuring, 64.570s building, 0.550s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:41:31] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:41:34] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:42:22] Starting KUnit Kernel (1/1)...
[12:42:22] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:42:22] ============ drm_test_pick_cmdline (2 subtests) ============
[12:42:22] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:42:22] =============== drm_test_pick_cmdline_named  ===============
[12:42:22] [PASSED] NTSC
[12:42:22] [PASSED] NTSC-J
[12:42:22] [PASSED] PAL
[12:42:22] [PASSED] PAL-M
[12:42:22] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:42:22] ============== [PASSED] drm_test_pick_cmdline ==============
[12:42:22] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:42:22] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:42:22] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:42:22] =========== drm_validate_clone_mode (2 subtests) ===========
[12:42:22] ============== drm_test_check_in_clone_mode  ===============
[12:42:22] [PASSED] in_clone_mode
[12:42:22] [PASSED] not_in_clone_mode
[12:42:22] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:42:22] =============== drm_test_check_valid_clones  ===============
[12:42:22] [PASSED] not_in_clone_mode
[12:42:22] [PASSED] valid_clone
[12:42:22] [PASSED] invalid_clone
[12:42:22] =========== [PASSED] drm_test_check_valid_clones ===========
[12:42:22] ============= [PASSED] drm_validate_clone_mode =============
[12:42:22] ============= drm_validate_modeset (1 subtest) =============
[12:42:22] [PASSED] drm_test_check_connector_changed_modeset
[12:42:22] ============== [PASSED] drm_validate_modeset ===============
[12:42:22] ====== drm_test_bridge_get_current_state (2 subtests) ======
[12:42:22] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:42:22] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[12:42:22] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:42:22] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[12:42:22] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:42:22] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:42:22] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[12:42:22] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:42:22] ============== drm_bridge_alloc (2 subtests) ===============
[12:42:22] [PASSED] drm_test_drm_bridge_alloc_basic
[12:42:22] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:42:22] ================ [PASSED] drm_bridge_alloc =================
[12:42:22] ================== drm_buddy (8 subtests) ==================
[12:42:22] [PASSED] drm_test_buddy_alloc_limit
[12:42:22] [PASSED] drm_test_buddy_alloc_optimistic
[12:42:22] [PASSED] drm_test_buddy_alloc_pessimistic
[12:42:22] [PASSED] drm_test_buddy_alloc_pathological
[12:42:22] [PASSED] drm_test_buddy_alloc_contiguous
[12:42:22] [PASSED] drm_test_buddy_alloc_clear
[12:42:22] [PASSED] drm_test_buddy_alloc_range_bias
[12:42:22] [PASSED] drm_test_buddy_fragmentation_performance
[12:42:22] ==================== [PASSED] drm_buddy ====================
[12:42:22] ============= drm_cmdline_parser (40 subtests) =============
[12:42:22] [PASSED] drm_test_cmdline_force_d_only
[12:42:22] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:42:22] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:42:22] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:42:22] [PASSED] drm_test_cmdline_force_e_only
[12:42:22] [PASSED] drm_test_cmdline_res
[12:42:22] [PASSED] drm_test_cmdline_res_vesa
[12:42:22] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:42:22] [PASSED] drm_test_cmdline_res_rblank
[12:42:22] [PASSED] drm_test_cmdline_res_bpp
[12:42:22] [PASSED] drm_test_cmdline_res_refresh
[12:42:22] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:42:22] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:42:22] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:42:22] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:42:22] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:42:22] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:42:22] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:42:22] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:42:22] [PASSED] drm_test_cmdline_res_margins_force_on
[12:42:22] [PASSED] drm_test_cmdline_res_vesa_margins
[12:42:22] [PASSED] drm_test_cmdline_name
[12:42:22] [PASSED] drm_test_cmdline_name_bpp
[12:42:22] [PASSED] drm_test_cmdline_name_option
[12:42:22] [PASSED] drm_test_cmdline_name_bpp_option
[12:42:22] [PASSED] drm_test_cmdline_rotate_0
[12:42:22] [PASSED] drm_test_cmdline_rotate_90
[12:42:22] [PASSED] drm_test_cmdline_rotate_180
[12:42:22] [PASSED] drm_test_cmdline_rotate_270
[12:42:22] [PASSED] drm_test_cmdline_hmirror
[12:42:22] [PASSED] drm_test_cmdline_vmirror
[12:42:22] [PASSED] drm_test_cmdline_margin_options
[12:42:22] [PASSED] drm_test_cmdline_multiple_options
[12:42:22] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:42:22] [PASSED] drm_test_cmdline_extra_and_option
[12:42:22] [PASSED] drm_test_cmdline_freestanding_options
[12:42:22] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:42:22] [PASSED] drm_test_cmdline_panel_orientation
[12:42:22] ================ drm_test_cmdline_invalid  =================
[12:42:22] [PASSED] margin_only
[12:42:22] [PASSED] interlace_only
[12:42:22] [PASSED] res_missing_x
[12:42:22] [PASSED] res_missing_y
[12:42:22] [PASSED] res_bad_y
[12:42:22] [PASSED] res_missing_y_bpp
[12:42:22] [PASSED] res_bad_bpp
[12:42:22] [PASSED] res_bad_refresh
[12:42:22] [PASSED] res_bpp_refresh_force_on_off
[12:42:22] [PASSED] res_invalid_mode
[12:42:22] [PASSED] res_bpp_wrong_place_mode
[12:42:22] [PASSED] name_bpp_refresh
[12:42:22] [PASSED] name_refresh
[12:42:22] [PASSED] name_refresh_wrong_mode
[12:42:22] [PASSED] name_refresh_invalid_mode
[12:42:22] [PASSED] rotate_multiple
[12:42:22] [PASSED] rotate_invalid_val
[12:42:22] [PASSED] rotate_truncated
[12:42:22] [PASSED] invalid_option
[12:42:22] [PASSED] invalid_tv_option
[12:42:22] [PASSED] truncated_tv_option
[12:42:22] ============ [PASSED] drm_test_cmdline_invalid =============
[12:42:22] =============== drm_test_cmdline_tv_options  ===============
[12:42:22] [PASSED] NTSC
[12:42:22] [PASSED] NTSC_443
[12:42:22] [PASSED] NTSC_J
[12:42:22] [PASSED] PAL
[12:42:22] [PASSED] PAL_M
[12:42:22] [PASSED] PAL_N
[12:42:22] [PASSED] SECAM
[12:42:22] [PASSED] MONO_525
[12:42:22] [PASSED] MONO_625
[12:42:22] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:42:22] =============== [PASSED] drm_cmdline_parser ================
[12:42:22] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:42:22] [PASSED] drm_test_connector_hdmi_init_valid
[12:42:22] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:42:22] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:42:22] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:42:22] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:42:22] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:42:22] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:42:22] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:42:22] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[12:42:22] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:42:22] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:42:22] [PASSED] supported_formats=0x3 yuv420_allowed=1
[12:42:22] [PASSED] supported_formats=0x3 yuv420_allowed=0
[12:42:22] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:42:22] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:42:22] [PASSED] drm_test_connector_hdmi_init_null_product
[12:42:22] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:42:22] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:42:22] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:42:22] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:42:22] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:42:22] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:42:22] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:42:22] ========= drm_test_connector_hdmi_init_type_valid  =========
[12:42:22] [PASSED] HDMI-A
[12:42:22] [PASSED] HDMI-B
[12:42:22] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:42:22] ======== drm_test_connector_hdmi_init_type_invalid  ========
[12:42:22] [PASSED] Unknown
[12:42:22] [PASSED] VGA
[12:42:22] [PASSED] DVI-I
[12:42:22] [PASSED] DVI-D
[12:42:22] [PASSED] DVI-A
[12:42:22] [PASSED] Composite
[12:42:22] [PASSED] SVIDEO
[12:42:22] [PASSED] LVDS
[12:42:22] [PASSED] Component
[12:42:22] [PASSED] DIN
[12:42:22] [PASSED] DP
[12:42:22] [PASSED] TV
[12:42:22] [PASSED] eDP
[12:42:22] [PASSED] Virtual
[12:42:22] [PASSED] DSI
[12:42:22] [PASSED] DPI
[12:42:22] [PASSED] Writeback
[12:42:22] [PASSED] SPI
[12:42:22] [PASSED] USB
[12:42:22] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:42:22] ============ [PASSED] drmm_connector_hdmi_init =============
[12:42:22] ============= drmm_connector_init (3 subtests) =============
[12:42:22] [PASSED] drm_test_drmm_connector_init
[12:42:22] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:42:22] ========= drm_test_drmm_connector_init_type_valid  =========
[12:42:22] [PASSED] Unknown
[12:42:22] [PASSED] VGA
[12:42:22] [PASSED] DVI-I
[12:42:22] [PASSED] DVI-D
[12:42:22] [PASSED] DVI-A
[12:42:22] [PASSED] Composite
[12:42:22] [PASSED] SVIDEO
[12:42:22] [PASSED] LVDS
[12:42:22] [PASSED] Component
[12:42:22] [PASSED] DIN
[12:42:22] [PASSED] DP
[12:42:22] [PASSED] HDMI-A
[12:42:22] [PASSED] HDMI-B
[12:42:22] [PASSED] TV
[12:42:22] [PASSED] eDP
[12:42:22] [PASSED] Virtual
[12:42:22] [PASSED] DSI
[12:42:22] [PASSED] DPI
[12:42:22] [PASSED] Writeback
[12:42:22] [PASSED] SPI
[12:42:22] [PASSED] USB
[12:42:22] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:42:22] =============== [PASSED] drmm_connector_init ===============
[12:42:22] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:42:22] [PASSED] drm_test_drm_connector_dynamic_init
[12:42:22] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:42:22] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:42:22] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:42:22] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[12:42:22] [PASSED] Unknown
[12:42:22] [PASSED] VGA
[12:42:22] [PASSED] DVI-I
[12:42:22] [PASSED] DVI-D
[12:42:22] [PASSED] DVI-A
[12:42:22] [PASSED] Composite
[12:42:22] [PASSED] SVIDEO
[12:42:22] [PASSED] LVDS
[12:42:22] [PASSED] Component
[12:42:22] [PASSED] DIN
[12:42:22] [PASSED] DP
[12:42:22] [PASSED] HDMI-A
[12:42:22] [PASSED] HDMI-B
[12:42:22] [PASSED] TV
[12:42:22] [PASSED] eDP
[12:42:22] [PASSED] Virtual
[12:42:22] [PASSED] DSI
[12:42:22] [PASSED] DPI
[12:42:22] [PASSED] Writeback
[12:42:22] [PASSED] SPI
[12:42:22] [PASSED] USB
[12:42:22] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:42:22] ======== drm_test_drm_connector_dynamic_init_name  =========
[12:42:22] [PASSED] Unknown
[12:42:22] [PASSED] VGA
[12:42:22] [PASSED] DVI-I
[12:42:22] [PASSED] DVI-D
[12:42:22] [PASSED] DVI-A
[12:42:22] [PASSED] Composite
[12:42:22] [PASSED] SVIDEO
[12:42:22] [PASSED] LVDS
[12:42:22] [PASSED] Component
[12:42:22] [PASSED] DIN
[12:42:22] [PASSED] DP
[12:42:22] [PASSED] HDMI-A
[12:42:22] [PASSED] HDMI-B
[12:42:22] [PASSED] TV
[12:42:22] [PASSED] eDP
[12:42:22] [PASSED] Virtual
[12:42:22] [PASSED] DSI
[12:42:22] [PASSED] DPI
[12:42:22] [PASSED] Writeback
[12:42:22] [PASSED] SPI
[12:42:22] [PASSED] USB
[12:42:22] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:42:22] =========== [PASSED] drm_connector_dynamic_init ============
[12:42:22] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:42:22] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:42:22] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:42:22] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:42:22] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:42:22] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:42:22] ======= drm_connector_dynamic_register (7 subtests) ========
[12:42:22] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:42:22] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:42:22] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:42:22] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:42:22] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:42:22] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:42:22] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:42:22] ========= [PASSED] drm_connector_dynamic_register ==========
[12:42:22] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:42:22] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:42:22] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:42:22] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:42:22] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:42:22] ========== drm_test_get_tv_mode_from_name_valid  ===========
[12:42:22] [PASSED] NTSC
[12:42:22] [PASSED] NTSC-443
[12:42:22] [PASSED] NTSC-J
[12:42:22] [PASSED] PAL
[12:42:22] [PASSED] PAL-M
[12:42:22] [PASSED] PAL-N
[12:42:22] [PASSED] SECAM
[12:42:22] [PASSED] Mono
[12:42:22] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:42:22] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:42:22] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:42:22] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:42:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:42:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:42:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:42:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:42:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:42:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:42:22] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[12:42:22] [PASSED] VIC 96
[12:42:22] [PASSED] VIC 97
[12:42:22] [PASSED] VIC 101
[12:42:22] [PASSED] VIC 102
[12:42:22] [PASSED] VIC 106
[12:42:22] [PASSED] VIC 107
[12:42:22] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:42:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:42:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:42:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:42:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:42:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:42:22] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:42:22] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:42:22] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[12:42:22] [PASSED] Automatic
[12:42:22] [PASSED] Full
[12:42:22] [PASSED] Limited 16:235
[12:42:22] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:42:22] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:42:22] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:42:22] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:42:22] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[12:42:22] [PASSED] RGB
[12:42:22] [PASSED] YUV 4:2:0
[12:42:22] [PASSED] YUV 4:2:2
[12:42:22] [PASSED] YUV 4:4:4
[12:42:22] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:42:22] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:42:22] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:42:22] ============= drm_damage_helper (21 subtests) ==============
[12:42:22] [PASSED] drm_test_damage_iter_no_damage
[12:42:22] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:42:22] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:42:22] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:42:22] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:42:22] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:42:22] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:42:22] [PASSED] drm_test_damage_iter_simple_damage
[12:42:22] [PASSED] drm_test_damage_iter_single_damage
[12:42:22] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:42:22] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:42:22] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:42:22] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:42:22] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:42:22] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:42:22] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:42:22] [PASSED] drm_test_damage_iter_damage
[12:42:22] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:42:22] [PASSED] drm_test_damage_iter_damage_one_outside
[12:42:22] [PASSED] drm_test_damage_iter_damage_src_moved
[12:42:22] [PASSED] drm_test_damage_iter_damage_not_visible
[12:42:22] ================ [PASSED] drm_damage_helper ================
[12:42:22] ============== drm_dp_mst_helper (3 subtests) ==============
[12:42:22] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[12:42:22] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:42:22] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:42:22] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:42:22] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:42:22] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:42:22] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:42:22] ============== drm_test_dp_mst_calc_pbn_div  ===============
[12:42:22] [PASSED] Link rate 2000000 lane count 4
[12:42:22] [PASSED] Link rate 2000000 lane count 2
[12:42:22] [PASSED] Link rate 2000000 lane count 1
[12:42:22] [PASSED] Link rate 1350000 lane count 4
[12:42:22] [PASSED] Link rate 1350000 lane count 2
[12:42:22] [PASSED] Link rate 1350000 lane count 1
[12:42:22] [PASSED] Link rate 1000000 lane count 4
[12:42:22] [PASSED] Link rate 1000000 lane count 2
[12:42:22] [PASSED] Link rate 1000000 lane count 1
[12:42:22] [PASSED] Link rate 810000 lane count 4
[12:42:22] [PASSED] Link rate 810000 lane count 2
[12:42:22] [PASSED] Link rate 810000 lane count 1
[12:42:22] [PASSED] Link rate 540000 lane count 4
[12:42:22] [PASSED] Link rate 540000 lane count 2
[12:42:22] [PASSED] Link rate 540000 lane count 1
[12:42:22] [PASSED] Link rate 270000 lane count 4
[12:42:22] [PASSED] Link rate 270000 lane count 2
[12:42:22] [PASSED] Link rate 270000 lane count 1
[12:42:22] [PASSED] Link rate 162000 lane count 4
[12:42:22] [PASSED] Link rate 162000 lane count 2
[12:42:22] [PASSED] Link rate 162000 lane count 1
[12:42:22] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:42:22] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[12:42:22] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:42:22] [PASSED] DP_POWER_UP_PHY with port number
[12:42:22] [PASSED] DP_POWER_DOWN_PHY with port number
[12:42:22] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:42:22] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:42:22] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:42:22] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:42:22] [PASSED] DP_QUERY_PAYLOAD with port number
[12:42:22] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:42:22] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:42:22] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:42:22] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:42:22] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:42:22] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:42:22] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:42:22] [PASSED] DP_REMOTE_I2C_READ with port number
[12:42:22] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:42:22] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:42:22] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:42:22] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:42:22] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:42:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:42:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:42:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:42:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:42:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:42:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:42:22] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:42:22] ================ [PASSED] drm_dp_mst_helper ================
[12:42:22] ================== drm_exec (7 subtests) ===================
[12:42:22] [PASSED] sanitycheck
[12:42:22] [PASSED] test_lock
[12:42:22] [PASSED] test_lock_unlock
[12:42:22] [PASSED] test_duplicates
[12:42:22] [PASSED] test_prepare
[12:42:22] [PASSED] test_prepare_array
[12:42:22] [PASSED] test_multiple_loops
[12:42:22] ==================== [PASSED] drm_exec =====================
[12:42:22] =========== drm_format_helper_test (17 subtests) ===========
[12:42:22] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[12:42:22] [PASSED] single_pixel_source_buffer
[12:42:22] [PASSED] single_pixel_clip_rectangle
[12:42:22] [PASSED] well_known_colors
[12:42:22] [PASSED] destination_pitch
[12:42:22] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:42:22] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[12:42:22] [PASSED] single_pixel_source_buffer
[12:42:22] [PASSED] single_pixel_clip_rectangle
[12:42:22] [PASSED] well_known_colors
[12:42:22] [PASSED] destination_pitch
[12:42:22] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:42:22] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[12:42:22] [PASSED] single_pixel_source_buffer
[12:42:22] [PASSED] single_pixel_clip_rectangle
[12:42:22] [PASSED] well_known_colors
[12:42:22] [PASSED] destination_pitch
[12:42:22] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:42:22] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[12:42:22] [PASSED] single_pixel_source_buffer
[12:42:22] [PASSED] single_pixel_clip_rectangle
[12:42:22] [PASSED] well_known_colors
[12:42:22] [PASSED] destination_pitch
[12:42:22] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:42:22] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[12:42:22] [PASSED] single_pixel_source_buffer
[12:42:22] [PASSED] single_pixel_clip_rectangle
[12:42:22] [PASSED] well_known_colors
[12:42:22] [PASSED] destination_pitch
[12:42:22] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:42:22] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[12:42:22] [PASSED] single_pixel_source_buffer
[12:42:22] [PASSED] single_pixel_clip_rectangle
[12:42:22] [PASSED] well_known_colors
[12:42:22] [PASSED] destination_pitch
[12:42:22] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:42:22] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[12:42:22] [PASSED] single_pixel_source_buffer
[12:42:22] [PASSED] single_pixel_clip_rectangle
[12:42:22] [PASSED] well_known_colors
[12:42:22] [PASSED] destination_pitch
[12:42:22] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:42:22] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[12:42:22] [PASSED] single_pixel_source_buffer
[12:42:22] [PASSED] single_pixel_clip_rectangle
[12:42:22] [PASSED] well_known_colors
[12:42:22] [PASSED] destination_pitch
[12:42:22] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:42:22] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[12:42:22] [PASSED] single_pixel_source_buffer
[12:42:22] [PASSED] single_pixel_clip_rectangle
[12:42:22] [PASSED] well_known_colors
[12:42:22] [PASSED] destination_pitch
[12:42:22] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:42:22] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[12:42:22] [PASSED] single_pixel_source_buffer
[12:42:22] [PASSED] single_pixel_clip_rectangle
[12:42:22] [PASSED] well_known_colors
[12:42:22] [PASSED] destination_pitch
[12:42:22] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:42:22] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[12:42:22] [PASSED] single_pixel_source_buffer
[12:42:22] [PASSED] single_pixel_clip_rectangle
[12:42:22] [PASSED] well_known_colors
[12:42:22] [PASSED] destination_pitch
[12:42:22] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:42:22] ============== drm_test_fb_xrgb8888_to_mono  ===============
[12:42:22] [PASSED] single_pixel_source_buffer
[12:42:22] [PASSED] single_pixel_clip_rectangle
[12:42:22] [PASSED] well_known_colors
[12:42:22] [PASSED] destination_pitch
[12:42:22] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:42:22] ==================== drm_test_fb_swab  =====================
[12:42:22] [PASSED] single_pixel_source_buffer
[12:42:22] [PASSED] single_pixel_clip_rectangle
[12:42:22] [PASSED] well_known_colors
[12:42:22] [PASSED] destination_pitch
[12:42:22] ================ [PASSED] drm_test_fb_swab =================
[12:42:22] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[12:42:22] [PASSED] single_pixel_source_buffer
[12:42:22] [PASSED] single_pixel_clip_rectangle
[12:42:22] [PASSED] well_known_colors
[12:42:22] [PASSED] destination_pitch
[12:42:22] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:42:22] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[12:42:22] [PASSED] single_pixel_source_buffer
[12:42:22] [PASSED] single_pixel_clip_rectangle
[12:42:22] [PASSED] well_known_colors
[12:42:22] [PASSED] destination_pitch
[12:42:22] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:42:22] ================= drm_test_fb_clip_offset  =================
[12:42:22] [PASSED] pass through
[12:42:22] [PASSED] horizontal offset
[12:42:22] [PASSED] vertical offset
[12:42:22] [PASSED] horizontal and vertical offset
[12:42:22] [PASSED] horizontal offset (custom pitch)
[12:42:22] [PASSED] vertical offset (custom pitch)
[12:42:22] [PASSED] horizontal and vertical offset (custom pitch)
[12:42:22] ============= [PASSED] drm_test_fb_clip_offset =============
[12:42:22] =================== drm_test_fb_memcpy  ====================
[12:42:22] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:42:22] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:42:22] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:42:22] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:42:22] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:42:22] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:42:22] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:42:22] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:42:22] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:42:22] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:42:22] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:42:22] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:42:22] =============== [PASSED] drm_test_fb_memcpy ================
[12:42:22] ============= [PASSED] drm_format_helper_test ==============
[12:42:22] ================= drm_format (18 subtests) =================
[12:42:22] [PASSED] drm_test_format_block_width_invalid
[12:42:22] [PASSED] drm_test_format_block_width_one_plane
[12:42:22] [PASSED] drm_test_format_block_width_two_plane
[12:42:22] [PASSED] drm_test_format_block_width_three_plane
[12:42:22] [PASSED] drm_test_format_block_width_tiled
[12:42:22] [PASSED] drm_test_format_block_height_invalid
[12:42:22] [PASSED] drm_test_format_block_height_one_plane
[12:42:22] [PASSED] drm_test_format_block_height_two_plane
[12:42:22] [PASSED] drm_test_format_block_height_three_plane
[12:42:22] [PASSED] drm_test_format_block_height_tiled
[12:42:22] [PASSED] drm_test_format_min_pitch_invalid
[12:42:22] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:42:22] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:42:22] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:42:22] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:42:22] [PASSED] drm_test_format_min_pitch_two_plane
[12:42:22] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:42:22] [PASSED] drm_test_format_min_pitch_tiled
[12:42:22] =================== [PASSED] drm_format ====================
[12:42:22] ============== drm_framebuffer (10 subtests) ===============
[12:42:22] ========== drm_test_framebuffer_check_src_coords  ==========
[12:42:22] [PASSED] Success: source fits into fb
[12:42:22] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:42:22] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:42:22] [PASSED] Fail: overflowing fb with source width
[12:42:22] [PASSED] Fail: overflowing fb with source height
[12:42:22] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:42:22] [PASSED] drm_test_framebuffer_cleanup
[12:42:22] =============== drm_test_framebuffer_create  ===============
[12:42:22] [PASSED] ABGR8888 normal sizes
[12:42:22] [PASSED] ABGR8888 max sizes
[12:42:22] [PASSED] ABGR8888 pitch greater than min required
[12:42:22] [PASSED] ABGR8888 pitch less than min required
[12:42:22] [PASSED] ABGR8888 Invalid width
[12:42:22] [PASSED] ABGR8888 Invalid buffer handle
[12:42:22] [PASSED] No pixel format
[12:42:22] [PASSED] ABGR8888 Width 0
[12:42:22] [PASSED] ABGR8888 Height 0
[12:42:22] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:42:22] [PASSED] ABGR8888 Large buffer offset
[12:42:22] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:42:22] [PASSED] ABGR8888 Invalid flag
[12:42:22] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:42:22] [PASSED] ABGR8888 Valid buffer modifier
[12:42:22] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:42:22] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:42:22] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:42:22] [PASSED] NV12 Normal sizes
[12:42:22] [PASSED] NV12 Max sizes
[12:42:22] [PASSED] NV12 Invalid pitch
[12:42:22] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:42:22] [PASSED] NV12 different  modifier per-plane
[12:42:22] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:42:22] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:42:22] [PASSED] NV12 Modifier for inexistent plane
[12:42:22] [PASSED] NV12 Handle for inexistent plane
[12:42:22] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:42:22] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:42:22] [PASSED] YVU420 Normal sizes
[12:42:22] [PASSED] YVU420 Max sizes
[12:42:22] [PASSED] YVU420 Invalid pitch
[12:42:22] [PASSED] YVU420 Different pitches
[12:42:22] [PASSED] YVU420 Different buffer offsets/pitches
[12:42:22] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:42:22] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:42:22] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:42:22] [PASSED] YVU420 Valid modifier
[12:42:22] [PASSED] YVU420 Different modifiers per plane
[12:42:22] [PASSED] YVU420 Modifier for inexistent plane
[12:42:22] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:42:22] [PASSED] X0L2 Normal sizes
[12:42:22] [PASSED] X0L2 Max sizes
[12:42:22] [PASSED] X0L2 Invalid pitch
[12:42:22] [PASSED] X0L2 Pitch greater than minimum required
[12:42:22] [PASSED] X0L2 Handle for inexistent plane
[12:42:22] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:42:22] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:42:22] [PASSED] X0L2 Valid modifier
[12:42:22] [PASSED] X0L2 Modifier for inexistent plane
[12:42:22] =========== [PASSED] drm_test_framebuffer_create ===========
[12:42:22] [PASSED] drm_test_framebuffer_free
[12:42:22] [PASSED] drm_test_framebuffer_init
[12:42:22] [PASSED] drm_test_framebuffer_init_bad_format
[12:42:22] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:42:22] [PASSED] drm_test_framebuffer_lookup
[12:42:22] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:42:22] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:42:22] ================= [PASSED] drm_framebuffer =================
[12:42:22] ================ drm_gem_shmem (8 subtests) ================
[12:42:22] [PASSED] drm_gem_shmem_test_obj_create
[12:42:22] [PASSED] drm_gem_shmem_test_obj_create_private
[12:42:22] [PASSED] drm_gem_shmem_test_pin_pages
[12:42:22] [PASSED] drm_gem_shmem_test_vmap
[12:42:22] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:42:22] [PASSED] drm_gem_shmem_test_get_sg_table
[12:42:22] [PASSED] drm_gem_shmem_test_madvise
[12:42:22] [PASSED] drm_gem_shmem_test_purge
[12:42:22] ================== [PASSED] drm_gem_shmem ==================
[12:42:22] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[12:42:22] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:42:22] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:42:22] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:42:22] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:42:22] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:42:22] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:42:22] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[12:42:22] [PASSED] Automatic
[12:42:22] [PASSED] Full
[12:42:22] [PASSED] Limited 16:235
[12:42:22] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:42:22] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:42:22] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:42:22] [PASSED] drm_test_check_disable_connector
[12:42:22] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:42:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:42:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:42:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:42:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:42:22] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:42:22] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:42:22] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:42:22] [PASSED] drm_test_check_output_bpc_dvi
[12:42:22] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:42:22] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:42:22] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:42:22] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:42:22] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:42:22] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:42:22] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:42:22] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:42:22] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:42:22] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:42:22] [PASSED] drm_test_check_broadcast_rgb_value
[12:42:22] [PASSED] drm_test_check_bpc_8_value
[12:42:22] [PASSED] drm_test_check_bpc_10_value
[12:42:22] [PASSED] drm_test_check_bpc_12_value
[12:42:22] [PASSED] drm_test_check_format_value
[12:42:22] [PASSED] drm_test_check_tmds_char_value
[12:42:22] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:42:22] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[12:42:22] [PASSED] drm_test_check_mode_valid
[12:42:22] [PASSED] drm_test_check_mode_valid_reject
[12:42:22] [PASSED] drm_test_check_mode_valid_reject_rate
[12:42:22] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:42:22] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:42:22] ================= drm_managed (2 subtests) =================
[12:42:22] [PASSED] drm_test_managed_release_action
[12:42:22] [PASSED] drm_test_managed_run_action
[12:42:22] =================== [PASSED] drm_managed ===================
[12:42:22] =================== drm_mm (6 subtests) ====================
[12:42:22] [PASSED] drm_test_mm_init
[12:42:22] [PASSED] drm_test_mm_debug
[12:42:22] [PASSED] drm_test_mm_align32
[12:42:22] [PASSED] drm_test_mm_align64
[12:42:22] [PASSED] drm_test_mm_lowest
[12:42:22] [PASSED] drm_test_mm_highest
[12:42:22] ===================== [PASSED] drm_mm ======================
[12:42:22] ============= drm_modes_analog_tv (5 subtests) =============
[12:42:22] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:42:22] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:42:22] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:42:22] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:42:22] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:42:22] =============== [PASSED] drm_modes_analog_tv ===============
[12:42:22] ============== drm_plane_helper (2 subtests) ===============
[12:42:22] =============== drm_test_check_plane_state  ================
[12:42:22] [PASSED] clipping_simple
[12:42:22] [PASSED] clipping_rotate_reflect
[12:42:22] [PASSED] positioning_simple
[12:42:22] [PASSED] upscaling
[12:42:22] [PASSED] downscaling
[12:42:22] [PASSED] rounding1
[12:42:22] [PASSED] rounding2
[12:42:22] [PASSED] rounding3
[12:42:22] [PASSED] rounding4
[12:42:22] =========== [PASSED] drm_test_check_plane_state ============
[12:42:22] =========== drm_test_check_invalid_plane_state  ============
[12:42:22] [PASSED] positioning_invalid
[12:42:22] [PASSED] upscaling_invalid
[12:42:22] [PASSED] downscaling_invalid
[12:42:22] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:42:22] ================ [PASSED] drm_plane_helper =================
[12:42:22] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:42:22] ====== drm_test_connector_helper_tv_get_modes_check  =======
[12:42:22] [PASSED] None
[12:42:22] [PASSED] PAL
[12:42:22] [PASSED] NTSC
[12:42:22] [PASSED] Both, NTSC Default
[12:42:22] [PASSED] Both, PAL Default
[12:42:22] [PASSED] Both, NTSC Default, with PAL on command-line
[12:42:22] [PASSED] Both, PAL Default, with NTSC on command-line
[12:42:22] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:42:22] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:42:22] ================== drm_rect (9 subtests) ===================
[12:42:22] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:42:22] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:42:22] [PASSED] drm_test_rect_clip_scaled_clipped
[12:42:22] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:42:22] ================= drm_test_rect_intersect  =================
[12:42:22] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:42:22] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:42:22] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:42:22] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:42:22] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:42:22] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:42:22] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:42:22] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:42:22] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:42:22] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:42:22] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:42:22] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:42:22] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:42:22] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:42:22] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:42:22] ============= [PASSED] drm_test_rect_intersect =============
[12:42:22] ================ drm_test_rect_calc_hscale  ================
[12:42:22] [PASSED] normal use
[12:42:22] [PASSED] out of max range
[12:42:22] [PASSED] out of min range
[12:42:22] [PASSED] zero dst
[12:42:22] [PASSED] negative src
[12:42:22] [PASSED] negative dst
[12:42:22] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:42:22] ================ drm_test_rect_calc_vscale  ================
[12:42:22] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[12:42:22] [PASSED] out of max range
[12:42:22] [PASSED] out of min range
[12:42:22] [PASSED] zero dst
[12:42:22] [PASSED] negative src
[12:42:22] [PASSED] negative dst
[12:42:22] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:42:22] ================== drm_test_rect_rotate  ===================
[12:42:22] [PASSED] reflect-x
[12:42:22] [PASSED] reflect-y
[12:42:22] [PASSED] rotate-0
[12:42:22] [PASSED] rotate-90
[12:42:22] [PASSED] rotate-180
[12:42:22] [PASSED] rotate-270
[12:42:22] ============== [PASSED] drm_test_rect_rotate ===============
[12:42:22] ================ drm_test_rect_rotate_inv  =================
[12:42:22] [PASSED] reflect-x
[12:42:22] [PASSED] reflect-y
[12:42:22] [PASSED] rotate-0
[12:42:22] [PASSED] rotate-90
[12:42:22] [PASSED] rotate-180
[12:42:22] [PASSED] rotate-270
[12:42:22] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:42:22] ==================== [PASSED] drm_rect =====================
[12:42:22] ============ drm_sysfb_modeset_test (1 subtest) ============
[12:42:22] ============ drm_test_sysfb_build_fourcc_list  =============
[12:42:22] [PASSED] no native formats
[12:42:22] [PASSED] XRGB8888 as native format
[12:42:22] [PASSED] remove duplicates
[12:42:22] [PASSED] convert alpha formats
[12:42:22] [PASSED] random formats
[12:42:22] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[12:42:22] ============= [PASSED] drm_sysfb_modeset_test ==============
[12:42:22] ============================================================
[12:42:22] Testing complete. Ran 622 tests: passed: 622
[12:42:22] Elapsed time: 51.426s total, 2.804s configuring, 47.845s building, 0.744s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:42:23] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:42:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:42:42] Starting KUnit Kernel (1/1)...
[12:42:42] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:42:42] ================= ttm_device (5 subtests) ==================
[12:42:42] [PASSED] ttm_device_init_basic
[12:42:42] [PASSED] ttm_device_init_multiple
[12:42:42] [PASSED] ttm_device_fini_basic
[12:42:42] [PASSED] ttm_device_init_no_vma_man
[12:42:42] ================== ttm_device_init_pools  ==================
[12:42:42] [PASSED] No DMA allocations, no DMA32 required
[12:42:42] [PASSED] DMA allocations, DMA32 required
[12:42:42] [PASSED] No DMA allocations, DMA32 required
[12:42:42] [PASSED] DMA allocations, no DMA32 required
[12:42:42] ============== [PASSED] ttm_device_init_pools ==============
[12:42:42] =================== [PASSED] ttm_device ====================
[12:42:42] ================== ttm_pool (8 subtests) ===================
[12:42:42] ================== ttm_pool_alloc_basic  ===================
[12:42:42] [PASSED] One page
[12:42:42] [PASSED] More than one page
[12:42:42] [PASSED] Above the allocation limit
[12:42:42] [PASSED] One page, with coherent DMA mappings enabled
[12:42:42] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:42:42] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:42:42] ============== ttm_pool_alloc_basic_dma_addr  ==============
[12:42:42] [PASSED] One page
[12:42:42] [PASSED] More than one page
[12:42:42] [PASSED] Above the allocation limit
[12:42:42] [PASSED] One page, with coherent DMA mappings enabled
[12:42:42] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:42:42] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:42:42] [PASSED] ttm_pool_alloc_order_caching_match
[12:42:42] [PASSED] ttm_pool_alloc_caching_mismatch
[12:42:42] [PASSED] ttm_pool_alloc_order_mismatch
[12:42:42] [PASSED] ttm_pool_free_dma_alloc
[12:42:42] [PASSED] ttm_pool_free_no_dma_alloc
[12:42:42] [PASSED] ttm_pool_fini_basic
[12:42:42] ==================== [PASSED] ttm_pool =====================
[12:42:42] ================ ttm_resource (8 subtests) =================
[12:42:42] ================= ttm_resource_init_basic  =================
[12:42:42] [PASSED] Init resource in TTM_PL_SYSTEM
[12:42:42] [PASSED] Init resource in TTM_PL_VRAM
[12:42:42] [PASSED] Init resource in a private placement
[12:42:42] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:42:42] ============= [PASSED] ttm_resource_init_basic =============
[12:42:42] [PASSED] ttm_resource_init_pinned
[12:42:42] [PASSED] ttm_resource_fini_basic
[12:42:42] [PASSED] ttm_resource_manager_init_basic
[12:42:42] [PASSED] ttm_resource_manager_usage_basic
[12:42:42] [PASSED] ttm_resource_manager_set_used_basic
[12:42:42] [PASSED] ttm_sys_man_alloc_basic
[12:42:42] [PASSED] ttm_sys_man_free_basic
[12:42:42] ================== [PASSED] ttm_resource ===================
[12:42:42] =================== ttm_tt (15 subtests) ===================
[12:42:42] ==================== ttm_tt_init_basic  ====================
[12:42:42] [PASSED] Page-aligned size
[12:42:42] [PASSED] Extra pages requested
[12:42:42] ================ [PASSED] ttm_tt_init_basic ================
[12:42:42] [PASSED] ttm_tt_init_misaligned
[12:42:42] [PASSED] ttm_tt_fini_basic
[12:42:42] [PASSED] ttm_tt_fini_sg
[12:42:42] [PASSED] ttm_tt_fini_shmem
[12:42:42] [PASSED] ttm_tt_create_basic
[12:42:42] [PASSED] ttm_tt_create_invalid_bo_type
[12:42:42] [PASSED] ttm_tt_create_ttm_exists
[12:42:42] [PASSED] ttm_tt_create_failed
[12:42:42] [PASSED] ttm_tt_destroy_basic
[12:42:42] [PASSED] ttm_tt_populate_null_ttm
[12:42:42] [PASSED] ttm_tt_populate_populated_ttm
[12:42:42] [PASSED] ttm_tt_unpopulate_basic
[12:42:42] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:42:42] [PASSED] ttm_tt_swapin_basic
[12:42:42] ===================== [PASSED] ttm_tt ======================
[12:42:42] =================== ttm_bo (14 subtests) ===================
[12:42:42] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[12:42:42] [PASSED] Cannot be interrupted and sleeps
[12:42:42] [PASSED] Cannot be interrupted, locks straight away
[12:42:42] [PASSED] Can be interrupted, sleeps
[12:42:42] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:42:42] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:42:42] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:42:42] [PASSED] ttm_bo_reserve_double_resv
[12:42:42] [PASSED] ttm_bo_reserve_interrupted
[12:42:42] [PASSED] ttm_bo_reserve_deadlock
[12:42:42] [PASSED] ttm_bo_unreserve_basic
[12:42:42] [PASSED] ttm_bo_unreserve_pinned
[12:42:42] [PASSED] ttm_bo_unreserve_bulk
[12:42:42] [PASSED] ttm_bo_fini_basic
[12:42:42] [PASSED] ttm_bo_fini_shared_resv
[12:42:42] [PASSED] ttm_bo_pin_basic
[12:42:42] [PASSED] ttm_bo_pin_unpin_resource
[12:42:42] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:42:42] ===================== [PASSED] ttm_bo ======================
[12:42:42] ============== ttm_bo_validate (21 subtests) ===============
[12:42:42] ============== ttm_bo_init_reserved_sys_man  ===============
[12:42:42] [PASSED] Buffer object for userspace
[12:42:42] [PASSED] Kernel buffer object
[12:42:42] [PASSED] Shared buffer object
[12:42:42] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:42:42] ============== ttm_bo_init_reserved_mock_man  ==============
[12:42:42] [PASSED] Buffer object for userspace
[12:42:42] [PASSED] Kernel buffer object
[12:42:42] [PASSED] Shared buffer object
[12:42:42] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:42:42] [PASSED] ttm_bo_init_reserved_resv
[12:42:42] ================== ttm_bo_validate_basic  ==================
[12:42:42] [PASSED] Buffer object for userspace
[12:42:42] [PASSED] Kernel buffer object
[12:42:42] [PASSED] Shared buffer object
[12:42:42] ============== [PASSED] ttm_bo_validate_basic ==============
[12:42:42] [PASSED] ttm_bo_validate_invalid_placement
[12:42:42] ============= ttm_bo_validate_same_placement  ==============
[12:42:42] [PASSED] System manager
[12:42:42] [PASSED] VRAM manager
[12:42:42] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:42:42] [PASSED] ttm_bo_validate_failed_alloc
[12:42:42] [PASSED] ttm_bo_validate_pinned
[12:42:42] [PASSED] ttm_bo_validate_busy_placement
[12:42:42] ================ ttm_bo_validate_multihop  =================
[12:42:42] [PASSED] Buffer object for userspace
[12:42:42] [PASSED] Kernel buffer object
[12:42:42] [PASSED] Shared buffer object
[12:42:42] ============ [PASSED] ttm_bo_validate_multihop =============
[12:42:42] ========== ttm_bo_validate_no_placement_signaled  ==========
[12:42:42] [PASSED] Buffer object in system domain, no page vector
[12:42:42] [PASSED] Buffer object in system domain with an existing page vector
[12:42:42] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:42:42] ======== ttm_bo_validate_no_placement_not_signaled  ========
[12:42:42] [PASSED] Buffer object for userspace
[12:42:42] [PASSED] Kernel buffer object
[12:42:42] [PASSED] Shared buffer object
[12:42:42] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:42:42] [PASSED] ttm_bo_validate_move_fence_signaled
[12:42:42] ========= ttm_bo_validate_move_fence_not_signaled  =========
[12:42:42] [PASSED] Waits for GPU
[12:42:42] [PASSED] Tries to lock straight away
[12:42:42] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:42:42] [PASSED] ttm_bo_validate_happy_evict
[12:42:42] [PASSED] ttm_bo_validate_all_pinned_evict
[12:42:42] [PASSED] ttm_bo_validate_allowed_only_evict
[12:42:42] [PASSED] ttm_bo_validate_deleted_evict
[12:42:42] [PASSED] ttm_bo_validate_busy_domain_evict
[12:42:42] [PASSED] ttm_bo_validate_evict_gutting
[12:42:42] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[12:42:42] ================= [PASSED] ttm_bo_validate =================
[12:42:42] ============================================================
[12:42:42] Testing complete. Ran 101 tests: passed: 101
[12:42:42] Elapsed time: 19.454s total, 2.788s configuring, 16.396s building, 0.225s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ Xe.CI.BAT: failure for drm/xe: add VM_BIND DECOMPRESS support and on‑demand decompression (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 7272 bytes --]

== Series Details ==

Series: drm/xe: add VM_BIND DECOMPRESS support and on‑demand decompression (rev5)
URL   : https://patchwork.freedesktop.org/series/154714/
State : failure

== Summary ==

CI Bug Log - changes from xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4_BAT -> xe-pw-154714v5_BAT
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-154714v5_BAT absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-154714v5_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-154714v5_BAT:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
    - bat-dg2-oem2:       [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-dg2-oem2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-dg2-oem2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
    - bat-bmg-1:          [PASS][3] -> [ABORT][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-bmg-1/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-bmg-1/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html

  * igt@kms_flip@basic-flip-vs-dpms:
    - bat-adlp-7:         [PASS][5] -> [ABORT][6] +1 other test abort
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-adlp-7/igt@kms_flip@basic-flip-vs-dpms.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-adlp-7/igt@kms_flip@basic-flip-vs-dpms.html
    - bat-ptl-2:          [PASS][7] -> [ABORT][8] +1 other test abort
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-ptl-2/igt@kms_flip@basic-flip-vs-dpms.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-ptl-2/igt@kms_flip@basic-flip-vs-dpms.html

  * igt@kms_flip@basic-flip-vs-dpms@a-edp1:
    - bat-lnl-1:          [PASS][9] -> [ABORT][10] +1 other test abort
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-lnl-1/igt@kms_flip@basic-flip-vs-dpms@a-edp1.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-lnl-1/igt@kms_flip@basic-flip-vs-dpms@a-edp1.html

  * igt@kms_flip@basic-flip-vs-dpms@b-edp1:
    - bat-lnl-1:          [PASS][11] -> [DMESG-WARN][12] +1 other test dmesg-warn
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-lnl-1/igt@kms_flip@basic-flip-vs-dpms@b-edp1.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-lnl-1/igt@kms_flip@basic-flip-vs-dpms@b-edp1.html

  * igt@kms_flip@basic-flip-vs-dpms@c-edp1:
    - bat-ptl-2:          [PASS][13] -> [DMESG-WARN][14] +2 other tests dmesg-warn
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-ptl-2/igt@kms_flip@basic-flip-vs-dpms@c-edp1.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-ptl-2/igt@kms_flip@basic-flip-vs-dpms@c-edp1.html

  * igt@kms_flip@basic-flip-vs-dpms@d-edp1:
    - bat-adlp-7:         [PASS][15] -> [DMESG-WARN][16] +2 other tests dmesg-warn
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-adlp-7/igt@kms_flip@basic-flip-vs-dpms@d-edp1.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-adlp-7/igt@kms_flip@basic-flip-vs-dpms@d-edp1.html

  * igt@xe_compute@compute-square:
    - bat-ptl-1:          [PASS][17] -> [ABORT][18]
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-ptl-1/igt@xe_compute@compute-square.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-ptl-1/igt@xe_compute@compute-square.html

  * igt@xe_create@create-execqueues-noleak:
    - bat-pvc-2:          [PASS][19] -> [ABORT][20]
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-pvc-2/igt@xe_create@create-execqueues-noleak.html
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-pvc-2/igt@xe_create@create-execqueues-noleak.html
    - bat-ptl-vm:         [PASS][21] -> [ABORT][22]
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-ptl-vm/igt@xe_create@create-execqueues-noleak.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-ptl-vm/igt@xe_create@create-execqueues-noleak.html
    - bat-bmg-2:          [PASS][23] -> [ABORT][24]
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-bmg-2/igt@xe_create@create-execqueues-noleak.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-bmg-2/igt@xe_create@create-execqueues-noleak.html
    - bat-lnl-2:          [PASS][25] -> [ABORT][26]
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-lnl-2/igt@xe_create@create-execqueues-noleak.html
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-lnl-2/igt@xe_create@create-execqueues-noleak.html
    - bat-atsm-2:         [PASS][27] -> [ABORT][28]
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-atsm-2/igt@xe_create@create-execqueues-noleak.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-atsm-2/igt@xe_create@create-execqueues-noleak.html
    - bat-adlp-vm:        [PASS][29] -> [ABORT][30]
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-adlp-vm/igt@xe_create@create-execqueues-noleak.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-adlp-vm/igt@xe_create@create-execqueues-noleak.html

  * igt@xe_create@multigpu-create-massive-size:
    - bat-bmg-3:          [PASS][31] -> [ABORT][32]
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/bat-bmg-3/igt@xe_create@multigpu-create-massive-size.html
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/bat-bmg-3/igt@xe_create@multigpu-create-massive-size.html

  


Build changes
-------------

  * Linux: xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4 -> xe-pw-154714v5

  IGT_8613: b542242f5b116e3b554b4068ef5dfa4451075b2b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4: 1f25afd37c14352cd24ada205fe16ff022784bd4
  xe-pw-154714v5: 154714v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/index.html

[-- Attachment #2: Type: text/html, Size: 8132 bytes --]

✗ Xe.CI.Full: failure for drm/xe: add VM_BIND DECOMPRESS support and on‑demand decompression (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 32380 bytes --]

== Series Details ==

Series: drm/xe: add VM_BIND DECOMPRESS support and on‑demand decompression (rev5)
URL   : https://patchwork.freedesktop.org/series/154714/
State : failure

== Summary ==

CI Bug Log - changes from xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4_FULL -> xe-pw-154714v5_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-154714v5_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-154714v5_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-154714v5_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_big_fb@y-tiled-16bpp-rotate-0:
    - shard-adlp:         [PASS][1] -> [ABORT][2] +24 other tests abort
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-3/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-1/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html

  * igt@kms_flip@blocking-absolute-wf_vblank:
    - shard-lnl:          [PASS][3] -> [ABORT][4] +24 other tests abort
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-4/igt@kms_flip@blocking-absolute-wf_vblank.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-4/igt@kms_flip@blocking-absolute-wf_vblank.html

  * igt@kms_flip@blocking-absolute-wf_vblank@b-edp1:
    - shard-lnl:          [PASS][5] -> [DMESG-WARN][6] +1 other test dmesg-warn
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-4/igt@kms_flip@blocking-absolute-wf_vblank@b-edp1.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-4/igt@kms_flip@blocking-absolute-wf_vblank@b-edp1.html

  * igt@kms_flip@blocking-absolute-wf_vblank@c-hdmi-a3:
    - shard-bmg:          [PASS][7] -> [DMESG-WARN][8] +6 other tests dmesg-warn
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-bmg-1/igt@kms_flip@blocking-absolute-wf_vblank@c-hdmi-a3.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-bmg-7/igt@kms_flip@blocking-absolute-wf_vblank@c-hdmi-a3.html

  * igt@kms_flip@nonexisting-fb-interruptible@b-hdmi-a1:
    - shard-adlp:         [PASS][9] -> [DMESG-WARN][10] +8 other tests dmesg-warn
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-1/igt@kms_flip@nonexisting-fb-interruptible@b-hdmi-a1.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-3/igt@kms_flip@nonexisting-fb-interruptible@b-hdmi-a1.html

  * igt@kms_hdr@static-toggle-dpms:
    - shard-dg2-set2:     [PASS][11] -> [ABORT][12] +25 other tests abort
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-436/igt@kms_hdr@static-toggle-dpms.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-466/igt@kms_hdr@static-toggle-dpms.html

  * igt@kms_hdr@static-toggle-dpms@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [ABORT][13] +5 other tests abort
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-bmg-2/igt@kms_hdr@static-toggle-dpms@pipe-a-dp-2.html

  * igt@kms_plane_multiple@2x-tiling-4@pipe-b-hdmi-a-6-pipe-d-dp-4:
    - shard-dg2-set2:     [PASS][14] -> [DMESG-WARN][15] +40 other tests dmesg-warn
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-435/igt@kms_plane_multiple@2x-tiling-4@pipe-b-hdmi-a-6-pipe-d-dp-4.html
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-433/igt@kms_plane_multiple@2x-tiling-4@pipe-b-hdmi-a-6-pipe-d-dp-4.html

  * igt@xe_intel_bb@intel-bb-blit-none:
    - shard-bmg:          [PASS][16] -> [ABORT][17] +17 other tests abort
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-bmg-2/igt@xe_intel_bb@intel-bb-blit-none.html
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-bmg-7/igt@xe_intel_bb@intel-bb-blit-none.html

  
#### Warnings ####

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180:
    - shard-adlp:         [DMESG-FAIL][18] ([Intel XE#4543]) -> [ABORT][19]
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-9/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-3/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180.html

  * igt@kms_bw@linear-tiling-3-displays-2160x1440p:
    - shard-dg2-set2:     [SKIP][20] ([Intel XE#367]) -> [ABORT][21]
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-436/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-463/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html
    - shard-bmg:          [SKIP][22] ([Intel XE#367]) -> [ABORT][23]
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-bmg-4/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-bmg-1/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-draw-render:
    - shard-dg2-set2:     [SKIP][24] ([Intel XE#651]) -> [ABORT][25]
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-draw-render.html
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-slowdraw:
    - shard-adlp:         [SKIP][26] ([Intel XE#653]) -> [ABORT][27]
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-9/igt@kms_frontbuffer_tracking@psr-slowdraw.html
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-2/igt@kms_frontbuffer_tracking@psr-slowdraw.html

  * igt@xe_eudebug@multiple-sessions:
    - shard-lnl:          [SKIP][28] ([Intel XE#4837]) -> [ABORT][29]
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-3/igt@xe_eudebug@multiple-sessions.html
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-8/igt@xe_eudebug@multiple-sessions.html

  * igt@xe_exec_system_allocator@threads-many-large-malloc-busy:
    - shard-adlp:         [SKIP][30] ([Intel XE#4915]) -> [ABORT][31]
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-6/igt@xe_exec_system_allocator@threads-many-large-malloc-busy.html
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-4/igt@xe_exec_system_allocator@threads-many-large-malloc-busy.html

  * igt@xe_pm@d3cold-i2c:
    - shard-dg2-set2:     [SKIP][32] ([Intel XE#5694]) -> [ABORT][33]
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-463/igt@xe_pm@d3cold-i2c.html
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-433/igt@xe_pm@d3cold-i2c.html
    - shard-adlp:         [SKIP][34] ([Intel XE#5694]) -> [ABORT][35]
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-6/igt@xe_pm@d3cold-i2c.html
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-3/igt@xe_pm@d3cold-i2c.html

  
Known issues
------------

  Here are the changes found in xe-pw-154714v5_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_chamelium_hpd@vga-hpd-after-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2252])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-bmg-4/igt@kms_chamelium_hpd@vga-hpd-after-suspend.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-dg2-set2:     [PASS][37] -> [ABORT][38] ([Intel XE#5175])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-435/igt@kms_plane_multiple@2x-tiling-4.html
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-433/igt@kms_plane_multiple@2x-tiling-4.html

  
#### Possible fixes ####

  * igt@xe_module_load@load:
    - shard-lnl:          ([PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [SKIP][62], [PASS][63], [PASS][64]) ([Intel XE#378]) -> ([PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77], [PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-4/igt@xe_module_load@load.html
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-4/igt@xe_module_load@load.html
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-5/igt@xe_module_load@load.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-7/igt@xe_module_load@load.html
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-7/igt@xe_module_load@load.html
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-1/igt@xe_module_load@load.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-5/igt@xe_module_load@load.html
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-1/igt@xe_module_load@load.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-4/igt@xe_module_load@load.html
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-8/igt@xe_module_load@load.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-8/igt@xe_module_load@load.html
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-2/igt@xe_module_load@load.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-5/igt@xe_module_load@load.html
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-2/igt@xe_module_load@load.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-7/igt@xe_module_load@load.html
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-7/igt@xe_module_load@load.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-3/igt@xe_module_load@load.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-3/igt@xe_module_load@load.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-8/igt@xe_module_load@load.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-3/igt@xe_module_load@load.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-1/igt@xe_module_load@load.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-5/igt@xe_module_load@load.html
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-3/igt@xe_module_load@load.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-5/igt@xe_module_load@load.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-2/igt@xe_module_load@load.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-lnl-1/igt@xe_module_load@load.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-2/igt@xe_module_load@load.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-4/igt@xe_module_load@load.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-2/igt@xe_module_load@load.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-2/igt@xe_module_load@load.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-4/igt@xe_module_load@load.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-4/igt@xe_module_load@load.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-4/igt@xe_module_load@load.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-8/igt@xe_module_load@load.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-8/igt@xe_module_load@load.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-8/igt@xe_module_load@load.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-3/igt@xe_module_load@load.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-3/igt@xe_module_load@load.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-3/igt@xe_module_load@load.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-8/igt@xe_module_load@load.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-1/igt@xe_module_load@load.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-7/igt@xe_module_load@load.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-7/igt@xe_module_load@load.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-7/igt@xe_module_load@load.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-1/igt@xe_module_load@load.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-1/igt@xe_module_load@load.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-5/igt@xe_module_load@load.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-5/igt@xe_module_load@load.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-5/igt@xe_module_load@load.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-5/igt@xe_module_load@load.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-lnl-2/igt@xe_module_load@load.html
    - shard-adlp:         ([SKIP][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [PASS][97], [PASS][98], [PASS][99], [PASS][100], [PASS][101], [PASS][102], [PASS][103], [PASS][104], [PASS][105], [PASS][106], [PASS][107], [PASS][108], [PASS][109], [PASS][110], [PASS][111], [PASS][112], [PASS][113], [PASS][114], [PASS][115]) ([Intel XE#378] / [Intel XE#5612]) -> ([PASS][116], [PASS][117], [PASS][118], [PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123], [PASS][124], [PASS][125], [PASS][126], [PASS][127], [PASS][128], [PASS][129], [PASS][130], [PASS][131], [PASS][132], [PASS][133], [PASS][134], [PASS][135], [PASS][136], [PASS][137], [PASS][138], [PASS][139], [PASS][140])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-3/igt@xe_module_load@load.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-6/igt@xe_module_load@load.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-9/igt@xe_module_load@load.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-9/igt@xe_module_load@load.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-4/igt@xe_module_load@load.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-3/igt@xe_module_load@load.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-2/igt@xe_module_load@load.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-8/igt@xe_module_load@load.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-6/igt@xe_module_load@load.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-1/igt@xe_module_load@load.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-3/igt@xe_module_load@load.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-9/igt@xe_module_load@load.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-8/igt@xe_module_load@load.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-8/igt@xe_module_load@load.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-8/igt@xe_module_load@load.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-3/igt@xe_module_load@load.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-2/igt@xe_module_load@load.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-6/igt@xe_module_load@load.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-3/igt@xe_module_load@load.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-2/igt@xe_module_load@load.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-2/igt@xe_module_load@load.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-1/igt@xe_module_load@load.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-1/igt@xe_module_load@load.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-1/igt@xe_module_load@load.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-4/igt@xe_module_load@load.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-adlp-4/igt@xe_module_load@load.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-4/igt@xe_module_load@load.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-4/igt@xe_module_load@load.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-4/igt@xe_module_load@load.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-4/igt@xe_module_load@load.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-9/igt@xe_module_load@load.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-9/igt@xe_module_load@load.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-9/igt@xe_module_load@load.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-3/igt@xe_module_load@load.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-3/igt@xe_module_load@load.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-3/igt@xe_module_load@load.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-3/igt@xe_module_load@load.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-3/igt@xe_module_load@load.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-2/igt@xe_module_load@load.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-2/igt@xe_module_load@load.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-6/igt@xe_module_load@load.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-6/igt@xe_module_load@load.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-8/igt@xe_module_load@load.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-8/igt@xe_module_load@load.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-1/igt@xe_module_load@load.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-1/igt@xe_module_load@load.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-1/igt@xe_module_load@load.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-1/igt@xe_module_load@load.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-8/igt@xe_module_load@load.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-6/igt@xe_module_load@load.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-adlp-6/igt@xe_module_load@load.html
    - shard-dg2-set2:     ([PASS][141], [PASS][142], [PASS][143], [PASS][144], [PASS][145], [PASS][146], [PASS][147], [PASS][148], [PASS][149], [PASS][150], [PASS][151], [PASS][152], [PASS][153], [PASS][154], [PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [PASS][162], [PASS][163], [PASS][164], [PASS][165], [SKIP][166]) ([Intel XE#378]) -> ([PASS][167], [PASS][168], [PASS][169], [PASS][170], [PASS][171], [PASS][172], [PASS][173], [PASS][174], [PASS][175], [PASS][176], [PASS][177], [PASS][178], [PASS][179], [PASS][180], [PASS][181], [PASS][182], [PASS][183], [PASS][184], [PASS][185], [PASS][186], [PASS][187], [PASS][188], [PASS][189], [PASS][190], [PASS][191])
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-433/igt@xe_module_load@load.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-464/igt@xe_module_load@load.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-435/igt@xe_module_load@load.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-436/igt@xe_module_load@load.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-435/igt@xe_module_load@load.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-432/igt@xe_module_load@load.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-432/igt@xe_module_load@load.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-434/igt@xe_module_load@load.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-434/igt@xe_module_load@load.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-434/igt@xe_module_load@load.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-434/igt@xe_module_load@load.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-433/igt@xe_module_load@load.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-464/igt@xe_module_load@load.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-466/igt@xe_module_load@load.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-466/igt@xe_module_load@load.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-466/igt@xe_module_load@load.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-463/igt@xe_module_load@load.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-463/igt@xe_module_load@load.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-436/igt@xe_module_load@load.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-436/igt@xe_module_load@load.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-463/igt@xe_module_load@load.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-463/igt@xe_module_load@load.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-435/igt@xe_module_load@load.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-464/igt@xe_module_load@load.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-432/igt@xe_module_load@load.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-dg2-466/igt@xe_module_load@load.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-463/igt@xe_module_load@load.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-463/igt@xe_module_load@load.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-463/igt@xe_module_load@load.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-466/igt@xe_module_load@load.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-466/igt@xe_module_load@load.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-466/igt@xe_module_load@load.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-466/igt@xe_module_load@load.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-435/igt@xe_module_load@load.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-435/igt@xe_module_load@load.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-435/igt@xe_module_load@load.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-436/igt@xe_module_load@load.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-436/igt@xe_module_load@load.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-432/igt@xe_module_load@load.html
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-436/igt@xe_module_load@load.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-432/igt@xe_module_load@load.html
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-433/igt@xe_module_load@load.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-433/igt@xe_module_load@load.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-432/igt@xe_module_load@load.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-433/igt@xe_module_load@load.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-464/igt@xe_module_load@load.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-464/igt@xe_module_load@load.html
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-464/igt@xe_module_load@load.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-434/igt@xe_module_load@load.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-434/igt@xe_module_load@load.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-dg2-434/igt@xe_module_load@load.html

  
#### Warnings ####

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move:
    - shard-bmg:          [SKIP][192] ([Intel XE#5390]) -> [SKIP][193] ([Intel XE#2312])
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move.html

  
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#5175]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5175
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612
  [Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653


Build changes
-------------

  * Linux: xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4 -> xe-pw-154714v5

  IGT_8613: b542242f5b116e3b554b4068ef5dfa4451075b2b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4067-1f25afd37c14352cd24ada205fe16ff022784bd4: 1f25afd37c14352cd24ada205fe16ff022784bd4
  xe-pw-154714v5: 154714v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154714v5/index.html

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