* [PATCH 0/6] Fix performance when pagefaults and 3d/display share resources
@ 2025-12-11 21:00 Matthew Brost
2025-12-11 21:00 ` [PATCH 1/6] drm/xe: Adjust long-running workload timeslices to reasonable values Matthew Brost
` (8 more replies)
0 siblings, 9 replies; 17+ messages in thread
From: Matthew Brost @ 2025-12-11 21:00 UTC (permalink / raw)
To: intel-xe; +Cc: francois.dugast, thomas.hellstrom, michal.mrozek
xello_raytracer [1] showed a significant performance regression (~40×
slowdown) when the compute UMD enabled page faults. The issue was traced
to the implementation that allows page-fault workloads and dma-fence
workloads (3D/display) to coexist.
This series fixes several issues, bringing page-fault performance in
this benchmark to within 6% of preempt-fence mode (no page faults).
Matt
[1] https://github.com/intel-sandbox/xello_raytracer
Matthew Brost (6):
drm/xe: Adjust long-running workload timeslices to reasonable values
drm/xe: Use usleep_range for accurate long-running workload
timeslicing
drm/xe: Add debugfs knobs to control long running workload timeslicing
drm/xe: Skip exec queue schedule toggle if queue is idle during
suspend
drm/xe: Wait on in-syncs when swicthing to dma-fence mode
drm/xe: Add more GT stats around pagefault mode switch flows
drivers/gpu/drm/xe/xe_debugfs.c | 74 +++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_device.c | 1 +
drivers/gpu/drm/xe/xe_device_types.h | 6 ++
drivers/gpu/drm/xe/xe_exec.c | 3 +-
drivers/gpu/drm/xe/xe_exec_queue.h | 17 ++++++
drivers/gpu/drm/xe/xe_gt_stats.c | 6 ++
drivers/gpu/drm/xe/xe_gt_stats_types.h | 3 +
drivers/gpu/drm/xe/xe_guc_submit.c | 46 +++++++++++++--
drivers/gpu/drm/xe/xe_hw_engine_group.c | 66 +++++++++++++++++++---
drivers/gpu/drm/xe/xe_hw_engine_group.h | 4 +-
drivers/gpu/drm/xe/xe_sync.c | 14 +++++
drivers/gpu/drm/xe/xe_sync.h | 1 +
drivers/gpu/drm/xe/xe_vm.c | 5 +-
drivers/gpu/drm/xe/xe_vm_types.h | 2 +-
14 files changed, 232 insertions(+), 16 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 1/6] drm/xe: Adjust long-running workload timeslices to reasonable values
2025-12-11 21:00 [PATCH 0/6] Fix performance when pagefaults and 3d/display share resources Matthew Brost
@ 2025-12-11 21:00 ` Matthew Brost
2025-12-11 21:00 ` [PATCH 2/6] drm/xe: Use usleep_range for accurate long-running workload timeslicing Matthew Brost
` (7 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Matthew Brost @ 2025-12-11 21:00 UTC (permalink / raw)
To: intel-xe; +Cc: francois.dugast, thomas.hellstrom, michal.mrozek
A 10ms timeslice for long-running workloads is far too long and causes
significant jitter in benchmarks when the system is shared. Adjust the
value to 5ms for preempt-fencing VMs, as the resume step there is quite
costly as memory is moved around, and set it to zero for pagefault VMs,
since switching back to pagefault mode after dma-fence mode is
relatively fast.
Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_vm.c | 5 ++++-
drivers/gpu/drm/xe/xe_vm_types.h | 2 +-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index c2012d20faa6..4648f8a458cf 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -1508,7 +1508,10 @@ struct xe_vm *xe_vm_create(struct xe_device *xe, u32 flags, struct xe_file *xef)
INIT_WORK(&vm->destroy_work, vm_destroy_work_func);
INIT_LIST_HEAD(&vm->preempt.exec_queues);
- vm->preempt.min_run_period_ms = 10; /* FIXME: Wire up to uAPI */
+ if (flags & XE_VM_FLAG_FAULT_MODE)
+ vm->preempt.min_run_period_ms = 0;
+ else
+ vm->preempt.min_run_period_ms = 5;
for_each_tile(tile, xe, id)
xe_range_fence_tree_init(&vm->rftree[id]);
diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h
index 3bf912bfbdcc..18bad1dd08e6 100644
--- a/drivers/gpu/drm/xe/xe_vm_types.h
+++ b/drivers/gpu/drm/xe/xe_vm_types.h
@@ -263,7 +263,7 @@ struct xe_vm {
* @min_run_period_ms: The minimum run period before preempting
* an engine again
*/
- s64 min_run_period_ms;
+ unsigned int min_run_period_ms;
/** @exec_queues: list of exec queues attached to this VM */
struct list_head exec_queues;
/** @num_exec_queues: number exec queues attached to this VM */
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 2/6] drm/xe: Use usleep_range for accurate long-running workload timeslicing
2025-12-11 21:00 [PATCH 0/6] Fix performance when pagefaults and 3d/display share resources Matthew Brost
2025-12-11 21:00 ` [PATCH 1/6] drm/xe: Adjust long-running workload timeslices to reasonable values Matthew Brost
@ 2025-12-11 21:00 ` Matthew Brost
2025-12-11 21:00 ` [PATCH 3/6] drm/xe: Add debugfs knobs to control long running " Matthew Brost
` (6 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Matthew Brost @ 2025-12-11 21:00 UTC (permalink / raw)
To: intel-xe; +Cc: francois.dugast, thomas.hellstrom, michal.mrozek
msleep is not very accurate in terms of how long it actually sleeps,
whereas usleep_range is precise. Replace the timeslice sleep for
long-running workloads with the more accurate usleep_range to avoid
jitter if the sleep period is less than 20ms.
Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_guc_submit.c | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index ff6fda84bf0f..92c703888cff 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -717,6 +717,24 @@ static bool vf_recovery(struct xe_guc *guc)
return xe_gt_recovery_pending(guc_to_gt(guc));
}
+static inline void relaxed_ms_sleep(unsigned int delay_ms)
+{
+ unsigned long min_us, max_us;
+
+ if (!delay_ms)
+ return;
+
+ if (delay_ms > 20) {
+ msleep(delay_ms);
+ return;
+ }
+
+ min_us = mul_u32_u32(delay_ms, 1000);
+ max_us = min_us + 500;
+
+ usleep_range(min_us, max_us);
+}
+
static int wq_wait_for_space(struct xe_exec_queue *q, u32 wqi_size)
{
struct xe_guc *guc = exec_queue_to_guc(q);
@@ -1582,7 +1600,7 @@ static void __guc_exec_queue_process_msg_suspend(struct xe_sched_msg *msg)
since_resume_ms;
if (wait_ms > 0 && q->guc->resume_time)
- msleep(wait_ms);
+ relaxed_ms_sleep(wait_ms);
set_exec_queue_suspended(q);
disable_scheduling(q, false);
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 3/6] drm/xe: Add debugfs knobs to control long running workload timeslicing
2025-12-11 21:00 [PATCH 0/6] Fix performance when pagefaults and 3d/display share resources Matthew Brost
2025-12-11 21:00 ` [PATCH 1/6] drm/xe: Adjust long-running workload timeslices to reasonable values Matthew Brost
2025-12-11 21:00 ` [PATCH 2/6] drm/xe: Use usleep_range for accurate long-running workload timeslicing Matthew Brost
@ 2025-12-11 21:00 ` Matthew Brost
2025-12-11 21:00 ` [PATCH 4/6] drm/xe: Skip exec queue schedule toggle if queue is idle during suspend Matthew Brost
` (5 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Matthew Brost @ 2025-12-11 21:00 UTC (permalink / raw)
To: intel-xe; +Cc: francois.dugast, thomas.hellstrom, michal.mrozek
Add debugfs knobs to control timeslicing for long-running workloads,
allowing quick tuning of values when running benchmarks.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_debugfs.c | 74 ++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_device.c | 1 +
drivers/gpu/drm/xe/xe_device_types.h | 6 +++
drivers/gpu/drm/xe/xe_vm.c | 4 +-
4 files changed, 83 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index 0f8a96a05a8e..25237f6610c8 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -326,6 +326,74 @@ static const struct file_operations atomic_svm_timeslice_ms_fops = {
.write = atomic_svm_timeslice_ms_set,
};
+static ssize_t min_run_period_lr_ms_show(struct file *f, char __user *ubuf,
+ size_t size, loff_t *pos)
+{
+ struct xe_device *xe = file_inode(f)->i_private;
+ char buf[32];
+ int len = 0;
+
+ len = scnprintf(buf, sizeof(buf), "%d\n", xe->min_run_period_lr_ms);
+
+ return simple_read_from_buffer(ubuf, size, pos, buf, len);
+}
+
+static ssize_t min_run_period_lr_ms_set(struct file *f, const char __user *ubuf,
+ size_t size, loff_t *pos)
+{
+ struct xe_device *xe = file_inode(f)->i_private;
+ u32 min_run_period_lr_ms;
+ ssize_t ret;
+
+ ret = kstrtouint_from_user(ubuf, size, 0, &min_run_period_lr_ms);
+ if (ret)
+ return ret;
+
+ xe->min_run_period_lr_ms = min_run_period_lr_ms;
+
+ return size;
+}
+
+static const struct file_operations min_run_period_lr_ms_fops = {
+ .owner = THIS_MODULE,
+ .read = min_run_period_lr_ms_show,
+ .write = min_run_period_lr_ms_set,
+};
+
+static ssize_t min_run_period_pf_ms_show(struct file *f, char __user *ubuf,
+ size_t size, loff_t *pos)
+{
+ struct xe_device *xe = file_inode(f)->i_private;
+ char buf[32];
+ int len = 0;
+
+ len = scnprintf(buf, sizeof(buf), "%d\n", xe->min_run_period_pf_ms);
+
+ return simple_read_from_buffer(ubuf, size, pos, buf, len);
+}
+
+static ssize_t min_run_period_pf_ms_set(struct file *f, const char __user *ubuf,
+ size_t size, loff_t *pos)
+{
+ struct xe_device *xe = file_inode(f)->i_private;
+ u32 min_run_period_pf_ms;
+ ssize_t ret;
+
+ ret = kstrtouint_from_user(ubuf, size, 0, &min_run_period_pf_ms);
+ if (ret)
+ return ret;
+
+ xe->min_run_period_pf_ms = min_run_period_pf_ms;
+
+ return size;
+}
+
+static const struct file_operations min_run_period_pf_ms_fops = {
+ .owner = THIS_MODULE,
+ .read = min_run_period_pf_ms_show,
+ .write = min_run_period_pf_ms_set,
+};
+
static ssize_t disable_late_binding_show(struct file *f, char __user *ubuf,
size_t size, loff_t *pos)
{
@@ -393,6 +461,12 @@ void xe_debugfs_register(struct xe_device *xe)
debugfs_create_file("atomic_svm_timeslice_ms", 0600, root, xe,
&atomic_svm_timeslice_ms_fops);
+ debugfs_create_file("min_run_period_lr_ms", 0600, root, xe,
+ &min_run_period_lr_ms_fops);
+
+ debugfs_create_file("min_run_period_pf_ms", 0600, root, xe,
+ &min_run_period_pf_ms_fops);
+
debugfs_create_file("disable_late_binding", 0600, root, xe,
&disable_late_binding_fops);
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 1197f914ef77..00e179f0703f 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -453,6 +453,7 @@ struct xe_device *xe_device_create(struct pci_dev *pdev,
xe->info.revid = pdev->revision;
xe->info.force_execlist = xe_modparam.force_execlist;
xe->atomic_svm_timeslice_ms = 5;
+ xe->min_run_period_lr_ms = 5;
err = xe_irq_init(xe);
if (err)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 9de73353223f..682b1815d33e 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -613,6 +613,12 @@ struct xe_device {
/** @atomic_svm_timeslice_ms: Atomic SVM fault timeslice MS */
u32 atomic_svm_timeslice_ms;
+ /** @min_run_period_lr_ms: LR VM (preempt fence mode) timeslice */
+ u32 min_run_period_lr_ms;
+
+ /** @min_run_period_pf_ms: LR VM (page fault mode) timeslice */
+ u32 min_run_period_pf_ms;
+
#ifdef TEST_VM_OPS_ERROR
/**
* @vm_inject_error_position: inject errors at different places in VM
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 4648f8a458cf..a1363f675b51 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -1509,9 +1509,9 @@ struct xe_vm *xe_vm_create(struct xe_device *xe, u32 flags, struct xe_file *xef)
INIT_LIST_HEAD(&vm->preempt.exec_queues);
if (flags & XE_VM_FLAG_FAULT_MODE)
- vm->preempt.min_run_period_ms = 0;
+ vm->preempt.min_run_period_ms = xe->min_run_period_pf_ms;
else
- vm->preempt.min_run_period_ms = 5;
+ vm->preempt.min_run_period_ms = xe->min_run_period_lr_ms;
for_each_tile(tile, xe, id)
xe_range_fence_tree_init(&vm->rftree[id]);
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 4/6] drm/xe: Skip exec queue schedule toggle if queue is idle during suspend
2025-12-11 21:00 [PATCH 0/6] Fix performance when pagefaults and 3d/display share resources Matthew Brost
` (2 preceding siblings ...)
2025-12-11 21:00 ` [PATCH 3/6] drm/xe: Add debugfs knobs to control long running " Matthew Brost
@ 2025-12-11 21:00 ` Matthew Brost
2025-12-11 21:00 ` [PATCH 5/6] drm/xe: Wait on in-syncs when swicthing to dma-fence mode Matthew Brost
` (4 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Matthew Brost @ 2025-12-11 21:00 UTC (permalink / raw)
To: intel-xe; +Cc: francois.dugast, thomas.hellstrom, michal.mrozek
If an exec queue is idle, there is no need to issue a schedule disable
to the GuC when suspending the queue’s execution. Opportunistically skip
this step if the queue is idle and not a parallel queue. Parallel queues
must have their scheduling state flipped in the GuC due to limitations
in how submission is implemented in run_job().
Also if all pagefault queues can skip the schedule disable during a
switch to dma-fence mode, do not schedule a resume for the pagefault
queues after the next submission.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_exec_queue.h | 17 ++++++++++++++++
drivers/gpu/drm/xe/xe_guc_submit.c | 26 ++++++++++++++++++++++---
drivers/gpu/drm/xe/xe_hw_engine_group.c | 2 +-
3 files changed, 41 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index fda4d4f9bda8..ae16b9b39ced 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -111,4 +111,21 @@ int xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch);
struct xe_lrc *xe_exec_queue_lrc(struct xe_exec_queue *q);
+/**
+ * xe_exec_queue_idle_skip_suspend() - Can exec queue skip suspend
+ * @q: The exec_queue
+ *
+ * If an exec queue is not parallel and is idle, the suspend steps can be
+ * skipped in the submission backend immediatley signaling the suspend fence.
+ * Parallel queues cannot skip this step due to limitations in the submission
+ * backend.
+ *
+ * Return: True if exec queue is idle and can skip suspend steps, False
+ * otherwise
+ */
+static inline bool xe_exec_queue_idle_skip_suspend(struct xe_exec_queue *q)
+{
+ return !xe_exec_queue_is_parallel(q) && xe_exec_queue_is_idle(q);
+}
+
#endif
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 92c703888cff..c4eb845628c4 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -72,6 +72,7 @@ exec_queue_to_guc(struct xe_exec_queue *q)
#define EXEC_QUEUE_STATE_EXTRA_REF (1 << 11)
#define EXEC_QUEUE_STATE_PENDING_RESUME (1 << 12)
#define EXEC_QUEUE_STATE_PENDING_TDR_EXIT (1 << 13)
+#define EXEC_QUEUE_STATE_IDLE_SKIP_SUSPEND (1 << 14)
static bool exec_queue_registered(struct xe_exec_queue *q)
{
@@ -263,6 +264,21 @@ static void clear_exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
atomic_and(~EXEC_QUEUE_STATE_PENDING_TDR_EXIT, &q->guc->state);
}
+static bool exec_queue_idle_skip_suspend(struct xe_exec_queue *q)
+{
+ return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_IDLE_SKIP_SUSPEND;
+}
+
+static void set_exec_queue_idle_skip_suspend(struct xe_exec_queue *q)
+{
+ atomic_or(EXEC_QUEUE_STATE_IDLE_SKIP_SUSPEND, &q->guc->state);
+}
+
+static void clear_exec_queue_idle_skip_suspend(struct xe_exec_queue *q)
+{
+ atomic_and(~EXEC_QUEUE_STATE_IDLE_SKIP_SUSPEND, &q->guc->state);
+}
+
static bool exec_queue_killed_or_banned_or_wedged(struct xe_exec_queue *q)
{
return (atomic_read(&q->guc->state) &
@@ -1585,9 +1601,10 @@ static void __guc_exec_queue_process_msg_suspend(struct xe_sched_msg *msg)
{
struct xe_exec_queue *q = msg->private_data;
struct xe_guc *guc = exec_queue_to_guc(q);
+ bool idle_skip_suspend = xe_exec_queue_idle_skip_suspend(q);
- if (guc_exec_queue_allowed_to_change_state(q) && !exec_queue_suspended(q) &&
- exec_queue_enabled(q)) {
+ if (!idle_skip_suspend && guc_exec_queue_allowed_to_change_state(q) &&
+ !exec_queue_suspended(q) && exec_queue_enabled(q)) {
wait_event(guc->ct.wq, vf_recovery(guc) ||
((q->guc->resume_time != RESUME_PENDING ||
xe_guc_read_stopped(guc)) && !exec_queue_pending_disable(q)));
@@ -1606,6 +1623,8 @@ static void __guc_exec_queue_process_msg_suspend(struct xe_sched_msg *msg)
disable_scheduling(q, false);
}
} else if (q->guc->suspend_pending) {
+ if (idle_skip_suspend)
+ set_exec_queue_idle_skip_suspend(q);
set_exec_queue_suspended(q);
suspend_fence_signal(q);
}
@@ -1617,8 +1636,9 @@ static void __guc_exec_queue_process_msg_resume(struct xe_sched_msg *msg)
if (guc_exec_queue_allowed_to_change_state(q)) {
clear_exec_queue_suspended(q);
- if (!exec_queue_enabled(q)) {
+ if (!exec_queue_enabled(q) || exec_queue_idle_skip_suspend(q)) {
q->guc->resume_time = RESUME_PENDING;
+ clear_exec_queue_idle_skip_suspend(q);
set_exec_queue_pending_resume(q);
enable_scheduling(q);
}
diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.c b/drivers/gpu/drm/xe/xe_hw_engine_group.c
index 290205a266b8..4d9263a1a208 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine_group.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine_group.c
@@ -205,7 +205,7 @@ static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group
continue;
xe_gt_stats_incr(q->gt, XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT, 1);
- need_resume = true;
+ need_resume |= !xe_exec_queue_idle_skip_suspend(q);
q->ops->suspend(q);
}
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 5/6] drm/xe: Wait on in-syncs when swicthing to dma-fence mode
2025-12-11 21:00 [PATCH 0/6] Fix performance when pagefaults and 3d/display share resources Matthew Brost
` (3 preceding siblings ...)
2025-12-11 21:00 ` [PATCH 4/6] drm/xe: Skip exec queue schedule toggle if queue is idle during suspend Matthew Brost
@ 2025-12-11 21:00 ` Matthew Brost
2025-12-12 9:22 ` Thomas Hellström
2025-12-11 21:00 ` [PATCH 6/6] drm/xe: Add more GT stats around pagefault mode switch flows Matthew Brost
` (3 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Matthew Brost @ 2025-12-11 21:00 UTC (permalink / raw)
To: intel-xe; +Cc: francois.dugast, thomas.hellstrom, michal.mrozek
If a dma-fence submission has in-fences and pagefault queues are running
work, there is little incentive to kick the pagefault queues off the
hardware until the dma-fence submission is ready to run. Therefore, wait
on the in-fences of the dma-fence submission before removing the
pagefault queues from the hardware.
Suggested-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_exec.c | 3 ++-
drivers/gpu/drm/xe/xe_hw_engine_group.c | 34 +++++++++++++++++++------
drivers/gpu/drm/xe/xe_hw_engine_group.h | 4 ++-
drivers/gpu/drm/xe/xe_sync.c | 14 ++++++++++
drivers/gpu/drm/xe/xe_sync.h | 1 +
5 files changed, 46 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_exec.c b/drivers/gpu/drm/xe/xe_exec.c
index 4d81210e41f5..5bc598ba6afa 100644
--- a/drivers/gpu/drm/xe/xe_exec.c
+++ b/drivers/gpu/drm/xe/xe_exec.c
@@ -202,7 +202,8 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
mode = xe_hw_engine_group_find_exec_mode(q);
if (mode == EXEC_MODE_DMA_FENCE) {
- err = xe_hw_engine_group_get_mode(group, mode, &previous_mode);
+ err = xe_hw_engine_group_get_mode(group, mode, &previous_mode,
+ syncs, num_syncs);
if (err)
goto err_syncs;
}
diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.c b/drivers/gpu/drm/xe/xe_hw_engine_group.c
index 4d9263a1a208..35966889c776 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine_group.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine_group.c
@@ -11,6 +11,7 @@
#include "xe_gt.h"
#include "xe_gt_stats.h"
#include "xe_hw_engine_group.h"
+#include "xe_sync.h"
#include "xe_vm.h"
static void
@@ -21,7 +22,8 @@ hw_engine_group_resume_lr_jobs_func(struct work_struct *w)
int err;
enum xe_hw_engine_group_execution_mode previous_mode;
- err = xe_hw_engine_group_get_mode(group, EXEC_MODE_LR, &previous_mode);
+ err = xe_hw_engine_group_get_mode(group, EXEC_MODE_LR, &previous_mode,
+ NULL, 0);
if (err)
return;
@@ -192,20 +194,32 @@ void xe_hw_engine_group_resume_faulting_lr_jobs(struct xe_hw_engine_group *group
*
* Return: 0 on success, negative error code on error.
*/
-static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group *group)
+static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group *group,
+ struct xe_sync_entry *syncs,
+ int num_syncs)
{
- int err;
+ int err, i;
struct xe_exec_queue *q;
bool need_resume = false;
lockdep_assert_held_write(&group->mode_sem);
list_for_each_entry(q, &group->exec_queue_list, hw_engine_group_link) {
+ bool idle_skip_suspend;
+
if (!xe_vm_in_fault_mode(q->vm))
continue;
xe_gt_stats_incr(q->gt, XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT, 1);
- need_resume |= !xe_exec_queue_idle_skip_suspend(q);
+
+ idle_skip_suspend = xe_exec_queue_idle_skip_suspend(q);
+
+ if (!need_resume && !idle_skip_suspend && num_syncs) {
+ for (i = 0; i < num_syncs; ++i)
+ xe_sync_entry_wait(syncs + i);
+ }
+
+ need_resume |= !idle_skip_suspend;
q->ops->suspend(q);
}
@@ -258,7 +272,8 @@ static int xe_hw_engine_group_wait_for_dma_fence_jobs(struct xe_hw_engine_group
return 0;
}
-static int switch_mode(struct xe_hw_engine_group *group)
+static int switch_mode(struct xe_hw_engine_group *group,
+ struct xe_sync_entry *syncs, int num_syncs)
{
int err = 0;
enum xe_hw_engine_group_execution_mode new_mode;
@@ -268,7 +283,9 @@ static int switch_mode(struct xe_hw_engine_group *group)
switch (group->cur_mode) {
case EXEC_MODE_LR:
new_mode = EXEC_MODE_DMA_FENCE;
- err = xe_hw_engine_group_suspend_faulting_lr_jobs(group);
+ err = xe_hw_engine_group_suspend_faulting_lr_jobs(group,
+ syncs,
+ num_syncs);
break;
case EXEC_MODE_DMA_FENCE:
new_mode = EXEC_MODE_LR;
@@ -294,7 +311,8 @@ static int switch_mode(struct xe_hw_engine_group *group)
*/
int xe_hw_engine_group_get_mode(struct xe_hw_engine_group *group,
enum xe_hw_engine_group_execution_mode new_mode,
- enum xe_hw_engine_group_execution_mode *previous_mode)
+ enum xe_hw_engine_group_execution_mode *previous_mode,
+ struct xe_sync_entry *syncs, int num_syncs)
__acquires(&group->mode_sem)
{
int err = down_read_interruptible(&group->mode_sem);
@@ -311,7 +329,7 @@ __acquires(&group->mode_sem)
return err;
if (new_mode != group->cur_mode) {
- err = switch_mode(group);
+ err = switch_mode(group, syncs, num_syncs);
if (err) {
up_write(&group->mode_sem);
return err;
diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.h b/drivers/gpu/drm/xe/xe_hw_engine_group.h
index 797ee81acbf2..8b17ccd30b70 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine_group.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine_group.h
@@ -11,6 +11,7 @@
struct drm_device;
struct xe_exec_queue;
struct xe_gt;
+struct xe_sync_entry;
int xe_hw_engine_setup_groups(struct xe_gt *gt);
@@ -19,7 +20,8 @@ void xe_hw_engine_group_del_exec_queue(struct xe_hw_engine_group *group, struct
int xe_hw_engine_group_get_mode(struct xe_hw_engine_group *group,
enum xe_hw_engine_group_execution_mode new_mode,
- enum xe_hw_engine_group_execution_mode *previous_mode);
+ enum xe_hw_engine_group_execution_mode *previous_mode,
+ struct xe_sync_entry *syncs, int num_syncs);
void xe_hw_engine_group_put(struct xe_hw_engine_group *group);
enum xe_hw_engine_group_execution_mode
diff --git a/drivers/gpu/drm/xe/xe_sync.c b/drivers/gpu/drm/xe/xe_sync.c
index 1fc4fa278b78..127e26129933 100644
--- a/drivers/gpu/drm/xe/xe_sync.c
+++ b/drivers/gpu/drm/xe/xe_sync.c
@@ -228,6 +228,20 @@ int xe_sync_entry_add_deps(struct xe_sync_entry *sync, struct xe_sched_job *job)
return 0;
}
+/**
+ * xe_sync_entry_wait() - Wait on in-sync
+ * @sync: Sync object
+ *
+ * If the sync is in an in-sync, wait on the sync to signal.
+ */
+void xe_sync_entry_wait(struct xe_sync_entry *sync)
+{
+ if (sync->flags & DRM_XE_SYNC_FLAG_SIGNAL)
+ return;
+
+ dma_fence_wait(sync->fence, false);
+}
+
void xe_sync_entry_signal(struct xe_sync_entry *sync, struct dma_fence *fence)
{
if (!(sync->flags & DRM_XE_SYNC_FLAG_SIGNAL))
diff --git a/drivers/gpu/drm/xe/xe_sync.h b/drivers/gpu/drm/xe/xe_sync.h
index 51f2d803e977..1c08f9ed9001 100644
--- a/drivers/gpu/drm/xe/xe_sync.h
+++ b/drivers/gpu/drm/xe/xe_sync.h
@@ -29,6 +29,7 @@ int xe_sync_entry_add_deps(struct xe_sync_entry *sync,
struct xe_sched_job *job);
void xe_sync_entry_signal(struct xe_sync_entry *sync,
struct dma_fence *fence);
+void xe_sync_entry_wait(struct xe_sync_entry *sync);
void xe_sync_entry_cleanup(struct xe_sync_entry *sync);
struct dma_fence *
xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync,
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 6/6] drm/xe: Add more GT stats around pagefault mode switch flows
2025-12-11 21:00 [PATCH 0/6] Fix performance when pagefaults and 3d/display share resources Matthew Brost
` (4 preceding siblings ...)
2025-12-11 21:00 ` [PATCH 5/6] drm/xe: Wait on in-syncs when swicthing to dma-fence mode Matthew Brost
@ 2025-12-11 21:00 ` Matthew Brost
2025-12-12 16:07 ` Francois Dugast
2025-12-11 21:29 ` ✓ CI.KUnit: success for Fix performance when pagefaults and 3d/display share resources Patchwork
` (2 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Matthew Brost @ 2025-12-11 21:00 UTC (permalink / raw)
To: intel-xe; +Cc: francois.dugast, thomas.hellstrom, michal.mrozek
Add GT stats to measure the time spent switching between pagefault mode
and dma-fence mode. Also add a GT stat to indicate when pagefault
suspend is skipped because the system is idle. These metrics will help
profile pagefault workloads while 3D and display are enabled.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_gt_stats.c | 6 +++++
drivers/gpu/drm/xe/xe_gt_stats_types.h | 3 +++
drivers/gpu/drm/xe/xe_hw_engine_group.c | 32 +++++++++++++++++++++++++
3 files changed, 41 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_gt_stats.c b/drivers/gpu/drm/xe/xe_gt_stats.c
index 714045ad9354..fb2904bd0abd 100644
--- a/drivers/gpu/drm/xe/xe_gt_stats.c
+++ b/drivers/gpu/drm/xe/xe_gt_stats.c
@@ -68,8 +68,14 @@ static const char *const stat_description[__XE_GT_STATS_NUM_IDS] = {
DEF_STAT_STR(SVM_2M_BIND_US, "svm_2M_bind_us"),
DEF_STAT_STR(HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT,
"hw_engine_group_suspend_lr_queue_count"),
+ DEF_STAT_STR(HW_ENGINE_GROUP_SKIP_LR_QUEUE_COUNT,
+ "hw_engine_group_skip_lr_queue_count"),
DEF_STAT_STR(HW_ENGINE_GROUP_WAIT_DMA_QUEUE_COUNT,
"hw_engine_group_wait_dma_queue_count"),
+ DEF_STAT_STR(HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_US,
+ "hw_engine_group_suspend_lr_queue_us"),
+ DEF_STAT_STR(HW_ENGINE_GROUP_WAIT_DMA_QUEUE_US,
+ "hw_engine_group_wait_dma_queue_us"),
};
/**
diff --git a/drivers/gpu/drm/xe/xe_gt_stats_types.h b/drivers/gpu/drm/xe/xe_gt_stats_types.h
index aada5df421e5..b92d013091d5 100644
--- a/drivers/gpu/drm/xe/xe_gt_stats_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_stats_types.h
@@ -45,7 +45,10 @@ enum xe_gt_stats_id {
XE_GT_STATS_ID_SVM_64K_BIND_US,
XE_GT_STATS_ID_SVM_2M_BIND_US,
XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT,
+ XE_GT_STATS_ID_HW_ENGINE_GROUP_SKIP_LR_QUEUE_COUNT,
XE_GT_STATS_ID_HW_ENGINE_GROUP_WAIT_DMA_QUEUE_COUNT,
+ XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_US,
+ XE_GT_STATS_ID_HW_ENGINE_GROUP_WAIT_DMA_QUEUE_US,
/* must be the last entry */
__XE_GT_STATS_NUM_IDS,
};
diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.c b/drivers/gpu/drm/xe/xe_hw_engine_group.c
index 35966889c776..8236fdee0901 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine_group.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine_group.c
@@ -14,6 +14,17 @@
#include "xe_sync.h"
#include "xe_vm.h"
+static s64 xe_hw_engine_group_stats_ktime_us_delta(ktime_t start)
+{
+ return IS_ENABLED(CONFIG_DEBUG_FS) ?
+ ktime_us_delta(ktime_get(), start) : 0;
+}
+
+static ktime_t xe_hw_engine_group_stats_ktime_get(void)
+{
+ return IS_ENABLED(CONFIG_DEBUG_FS) ? ktime_get() : 0;
+}
+
static void
hw_engine_group_resume_lr_jobs_func(struct work_struct *w)
{
@@ -200,7 +211,9 @@ static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group
{
int err, i;
struct xe_exec_queue *q;
+ struct xe_gt *gt = NULL;
bool need_resume = false;
+ ktime_t start = xe_hw_engine_group_stats_ktime_get();
lockdep_assert_held_write(&group->mode_sem);
@@ -213,6 +226,9 @@ static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group
xe_gt_stats_incr(q->gt, XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT, 1);
idle_skip_suspend = xe_exec_queue_idle_skip_suspend(q);
+ if (idle_skip_suspend)
+ xe_gt_stats_incr(q->gt,
+ XE_GT_STATS_ID_HW_ENGINE_GROUP_SKIP_LR_QUEUE_COUNT, 1);
if (!need_resume && !idle_skip_suspend && num_syncs) {
for (i = 0; i < num_syncs; ++i)
@@ -221,6 +237,7 @@ static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group
need_resume |= !idle_skip_suspend;
q->ops->suspend(q);
+ gt = q->gt;
}
list_for_each_entry(q, &group->exec_queue_list, hw_engine_group_link) {
@@ -232,6 +249,12 @@ static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group
return err;
}
+ if (gt) {
+ xe_gt_stats_incr(gt,
+ XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_US,
+ xe_hw_engine_group_stats_ktime_us_delta(start));
+ }
+
if (need_resume)
xe_hw_engine_group_resume_faulting_lr_jobs(group);
@@ -252,7 +275,9 @@ static int xe_hw_engine_group_wait_for_dma_fence_jobs(struct xe_hw_engine_group
{
long timeout;
struct xe_exec_queue *q;
+ struct xe_gt *gt = NULL;
struct dma_fence *fence;
+ ktime_t start = xe_hw_engine_group_stats_ktime_get();
lockdep_assert_held_write(&group->mode_sem);
@@ -264,11 +289,18 @@ static int xe_hw_engine_group_wait_for_dma_fence_jobs(struct xe_hw_engine_group
fence = xe_exec_queue_last_fence_get_for_resume(q, q->vm);
timeout = dma_fence_wait(fence, false);
dma_fence_put(fence);
+ gt = q->gt;
if (timeout < 0)
return -ETIME;
}
+ if (gt) {
+ xe_gt_stats_incr(gt,
+ XE_GT_STATS_ID_HW_ENGINE_GROUP_WAIT_DMA_QUEUE_US,
+ xe_hw_engine_group_stats_ktime_us_delta(start));
+ }
+
return 0;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* ✓ CI.KUnit: success for Fix performance when pagefaults and 3d/display share resources
2025-12-11 21:00 [PATCH 0/6] Fix performance when pagefaults and 3d/display share resources Matthew Brost
` (5 preceding siblings ...)
2025-12-11 21:00 ` [PATCH 6/6] drm/xe: Add more GT stats around pagefault mode switch flows Matthew Brost
@ 2025-12-11 21:29 ` Patchwork
2025-12-11 22:34 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-12-12 13:46 ` ✗ Xe.CI.Full: " Patchwork
8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2025-12-11 21:29 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
== Series Details ==
Series: Fix performance when pagefaults and 3d/display share resources
URL : https://patchwork.freedesktop.org/series/158833/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[21:27:50] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:27:54] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[21:28:31] Starting KUnit Kernel (1/1)...
[21:28:31] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:28:31] ================== guc_buf (11 subtests) ===================
[21:28:31] [PASSED] test_smallest
[21:28:31] [PASSED] test_largest
[21:28:31] [PASSED] test_granular
[21:28:31] [PASSED] test_unique
[21:28:31] [PASSED] test_overlap
[21:28:31] [PASSED] test_reusable
[21:28:31] [PASSED] test_too_big
[21:28:31] [PASSED] test_flush
[21:28:31] [PASSED] test_lookup
[21:28:31] [PASSED] test_data
[21:28:31] [PASSED] test_class
[21:28:31] ===================== [PASSED] guc_buf =====================
[21:28:31] =================== guc_dbm (7 subtests) ===================
[21:28:31] [PASSED] test_empty
[21:28:31] [PASSED] test_default
[21:28:31] ======================== test_size ========================
[21:28:31] [PASSED] 4
[21:28:31] [PASSED] 8
[21:28:31] [PASSED] 32
[21:28:31] [PASSED] 256
[21:28:31] ==================== [PASSED] test_size ====================
[21:28:31] ======================= test_reuse ========================
[21:28:31] [PASSED] 4
[21:28:31] [PASSED] 8
[21:28:31] [PASSED] 32
[21:28:31] [PASSED] 256
[21:28:31] =================== [PASSED] test_reuse ====================
[21:28:31] =================== test_range_overlap ====================
[21:28:31] [PASSED] 4
[21:28:31] [PASSED] 8
[21:28:31] [PASSED] 32
[21:28:31] [PASSED] 256
[21:28:31] =============== [PASSED] test_range_overlap ================
[21:28:31] =================== test_range_compact ====================
[21:28:31] [PASSED] 4
[21:28:31] [PASSED] 8
[21:28:31] [PASSED] 32
[21:28:31] [PASSED] 256
[21:28:31] =============== [PASSED] test_range_compact ================
[21:28:31] ==================== test_range_spare =====================
[21:28:31] [PASSED] 4
[21:28:31] [PASSED] 8
[21:28:31] [PASSED] 32
[21:28:31] [PASSED] 256
[21:28:31] ================ [PASSED] test_range_spare =================
[21:28:31] ===================== [PASSED] guc_dbm =====================
[21:28:31] =================== guc_idm (6 subtests) ===================
[21:28:31] [PASSED] bad_init
[21:28:31] [PASSED] no_init
[21:28:31] [PASSED] init_fini
[21:28:31] [PASSED] check_used
[21:28:31] [PASSED] check_quota
[21:28:31] [PASSED] check_all
[21:28:31] ===================== [PASSED] guc_idm =====================
[21:28:31] ================== no_relay (3 subtests) ===================
[21:28:31] [PASSED] xe_drops_guc2pf_if_not_ready
[21:28:31] [PASSED] xe_drops_guc2vf_if_not_ready
[21:28:31] [PASSED] xe_rejects_send_if_not_ready
[21:28:31] ==================== [PASSED] no_relay =====================
[21:28:31] ================== pf_relay (14 subtests) ==================
[21:28:31] [PASSED] pf_rejects_guc2pf_too_short
[21:28:31] [PASSED] pf_rejects_guc2pf_too_long
[21:28:31] [PASSED] pf_rejects_guc2pf_no_payload
[21:28:31] [PASSED] pf_fails_no_payload
[21:28:31] [PASSED] pf_fails_bad_origin
[21:28:31] [PASSED] pf_fails_bad_type
[21:28:31] [PASSED] pf_txn_reports_error
[21:28:31] [PASSED] pf_txn_sends_pf2guc
[21:28:31] [PASSED] pf_sends_pf2guc
[21:28:31] [SKIPPED] pf_loopback_nop
[21:28:31] [SKIPPED] pf_loopback_echo
[21:28:31] [SKIPPED] pf_loopback_fail
[21:28:31] [SKIPPED] pf_loopback_busy
[21:28:31] [SKIPPED] pf_loopback_retry
[21:28:31] ==================== [PASSED] pf_relay =====================
[21:28:31] ================== vf_relay (3 subtests) ===================
[21:28:31] [PASSED] vf_rejects_guc2vf_too_short
[21:28:31] [PASSED] vf_rejects_guc2vf_too_long
[21:28:31] [PASSED] vf_rejects_guc2vf_no_payload
[21:28:31] ==================== [PASSED] vf_relay =====================
[21:28:31] ================ pf_gt_config (6 subtests) =================
[21:28:31] [PASSED] fair_contexts_1vf
[21:28:31] [PASSED] fair_doorbells_1vf
[21:28:31] [PASSED] fair_ggtt_1vf
[21:28:31] ====================== fair_contexts ======================
[21:28:31] [PASSED] 1 VF
[21:28:31] [PASSED] 2 VFs
[21:28:31] [PASSED] 3 VFs
[21:28:31] [PASSED] 4 VFs
[21:28:31] [PASSED] 5 VFs
[21:28:31] [PASSED] 6 VFs
[21:28:31] [PASSED] 7 VFs
[21:28:31] [PASSED] 8 VFs
[21:28:31] [PASSED] 9 VFs
[21:28:31] [PASSED] 10 VFs
[21:28:31] [PASSED] 11 VFs
[21:28:31] [PASSED] 12 VFs
[21:28:31] [PASSED] 13 VFs
[21:28:31] [PASSED] 14 VFs
[21:28:31] [PASSED] 15 VFs
[21:28:31] [PASSED] 16 VFs
[21:28:31] [PASSED] 17 VFs
[21:28:31] [PASSED] 18 VFs
[21:28:31] [PASSED] 19 VFs
[21:28:31] [PASSED] 20 VFs
[21:28:31] [PASSED] 21 VFs
[21:28:31] [PASSED] 22 VFs
[21:28:31] [PASSED] 23 VFs
[21:28:31] [PASSED] 24 VFs
[21:28:31] [PASSED] 25 VFs
[21:28:31] [PASSED] 26 VFs
[21:28:31] [PASSED] 27 VFs
[21:28:31] [PASSED] 28 VFs
[21:28:31] [PASSED] 29 VFs
[21:28:31] [PASSED] 30 VFs
[21:28:31] [PASSED] 31 VFs
[21:28:31] [PASSED] 32 VFs
[21:28:31] [PASSED] 33 VFs
[21:28:31] [PASSED] 34 VFs
[21:28:31] [PASSED] 35 VFs
[21:28:31] [PASSED] 36 VFs
[21:28:31] [PASSED] 37 VFs
[21:28:31] [PASSED] 38 VFs
[21:28:31] [PASSED] 39 VFs
[21:28:31] [PASSED] 40 VFs
[21:28:31] [PASSED] 41 VFs
[21:28:31] [PASSED] 42 VFs
[21:28:31] [PASSED] 43 VFs
[21:28:31] [PASSED] 44 VFs
[21:28:31] [PASSED] 45 VFs
[21:28:31] [PASSED] 46 VFs
[21:28:31] [PASSED] 47 VFs
[21:28:31] [PASSED] 48 VFs
[21:28:31] [PASSED] 49 VFs
[21:28:31] [PASSED] 50 VFs
[21:28:31] [PASSED] 51 VFs
[21:28:31] [PASSED] 52 VFs
[21:28:31] [PASSED] 53 VFs
[21:28:31] [PASSED] 54 VFs
[21:28:31] [PASSED] 55 VFs
[21:28:31] [PASSED] 56 VFs
[21:28:31] [PASSED] 57 VFs
[21:28:31] [PASSED] 58 VFs
[21:28:31] [PASSED] 59 VFs
[21:28:31] [PASSED] 60 VFs
[21:28:31] [PASSED] 61 VFs
[21:28:31] [PASSED] 62 VFs
[21:28:31] [PASSED] 63 VFs
[21:28:31] ================== [PASSED] fair_contexts ==================
[21:28:31] ===================== fair_doorbells ======================
[21:28:31] [PASSED] 1 VF
[21:28:31] [PASSED] 2 VFs
[21:28:31] [PASSED] 3 VFs
[21:28:31] [PASSED] 4 VFs
[21:28:31] [PASSED] 5 VFs
[21:28:31] [PASSED] 6 VFs
[21:28:31] [PASSED] 7 VFs
[21:28:31] [PASSED] 8 VFs
[21:28:31] [PASSED] 9 VFs
[21:28:31] [PASSED] 10 VFs
[21:28:31] [PASSED] 11 VFs
[21:28:31] [PASSED] 12 VFs
[21:28:31] [PASSED] 13 VFs
[21:28:31] [PASSED] 14 VFs
[21:28:31] [PASSED] 15 VFs
[21:28:31] [PASSED] 16 VFs
[21:28:31] [PASSED] 17 VFs
[21:28:31] [PASSED] 18 VFs
[21:28:31] [PASSED] 19 VFs
[21:28:31] [PASSED] 20 VFs
[21:28:31] [PASSED] 21 VFs
[21:28:31] [PASSED] 22 VFs
[21:28:31] [PASSED] 23 VFs
[21:28:31] [PASSED] 24 VFs
[21:28:31] [PASSED] 25 VFs
[21:28:31] [PASSED] 26 VFs
[21:28:31] [PASSED] 27 VFs
[21:28:31] [PASSED] 28 VFs
[21:28:31] [PASSED] 29 VFs
[21:28:31] [PASSED] 30 VFs
[21:28:31] [PASSED] 31 VFs
[21:28:31] [PASSED] 32 VFs
[21:28:31] [PASSED] 33 VFs
[21:28:31] [PASSED] 34 VFs
[21:28:31] [PASSED] 35 VFs
[21:28:31] [PASSED] 36 VFs
[21:28:31] [PASSED] 37 VFs
[21:28:31] [PASSED] 38 VFs
[21:28:31] [PASSED] 39 VFs
[21:28:31] [PASSED] 40 VFs
[21:28:31] [PASSED] 41 VFs
[21:28:31] [PASSED] 42 VFs
[21:28:31] [PASSED] 43 VFs
[21:28:31] [PASSED] 44 VFs
[21:28:31] [PASSED] 45 VFs
[21:28:31] [PASSED] 46 VFs
[21:28:31] [PASSED] 47 VFs
[21:28:31] [PASSED] 48 VFs
[21:28:31] [PASSED] 49 VFs
[21:28:31] [PASSED] 50 VFs
[21:28:31] [PASSED] 51 VFs
[21:28:31] [PASSED] 52 VFs
[21:28:31] [PASSED] 53 VFs
[21:28:31] [PASSED] 54 VFs
[21:28:31] [PASSED] 55 VFs
[21:28:31] [PASSED] 56 VFs
[21:28:31] [PASSED] 57 VFs
[21:28:31] [PASSED] 58 VFs
[21:28:31] [PASSED] 59 VFs
[21:28:31] [PASSED] 60 VFs
[21:28:31] [PASSED] 61 VFs
[21:28:31] [PASSED] 62 VFs
[21:28:31] [PASSED] 63 VFs
[21:28:31] ================= [PASSED] fair_doorbells ==================
[21:28:31] ======================== fair_ggtt ========================
[21:28:31] [PASSED] 1 VF
[21:28:31] [PASSED] 2 VFs
[21:28:31] [PASSED] 3 VFs
[21:28:31] [PASSED] 4 VFs
[21:28:31] [PASSED] 5 VFs
[21:28:31] [PASSED] 6 VFs
[21:28:31] [PASSED] 7 VFs
[21:28:31] [PASSED] 8 VFs
[21:28:31] [PASSED] 9 VFs
[21:28:31] [PASSED] 10 VFs
[21:28:31] [PASSED] 11 VFs
[21:28:31] [PASSED] 12 VFs
[21:28:31] [PASSED] 13 VFs
[21:28:31] [PASSED] 14 VFs
[21:28:31] [PASSED] 15 VFs
[21:28:31] [PASSED] 16 VFs
[21:28:31] [PASSED] 17 VFs
[21:28:31] [PASSED] 18 VFs
[21:28:31] [PASSED] 19 VFs
[21:28:31] [PASSED] 20 VFs
[21:28:31] [PASSED] 21 VFs
[21:28:31] [PASSED] 22 VFs
[21:28:31] [PASSED] 23 VFs
[21:28:31] [PASSED] 24 VFs
[21:28:31] [PASSED] 25 VFs
[21:28:31] [PASSED] 26 VFs
[21:28:31] [PASSED] 27 VFs
[21:28:31] [PASSED] 28 VFs
[21:28:31] [PASSED] 29 VFs
[21:28:31] [PASSED] 30 VFs
[21:28:31] [PASSED] 31 VFs
[21:28:31] [PASSED] 32 VFs
[21:28:31] [PASSED] 33 VFs
[21:28:31] [PASSED] 34 VFs
[21:28:31] [PASSED] 35 VFs
[21:28:31] [PASSED] 36 VFs
[21:28:31] [PASSED] 37 VFs
[21:28:31] [PASSED] 38 VFs
[21:28:31] [PASSED] 39 VFs
[21:28:31] [PASSED] 40 VFs
[21:28:31] [PASSED] 41 VFs
[21:28:31] [PASSED] 42 VFs
[21:28:31] [PASSED] 43 VFs
[21:28:31] [PASSED] 44 VFs
[21:28:31] [PASSED] 45 VFs
[21:28:31] [PASSED] 46 VFs
[21:28:31] [PASSED] 47 VFs
[21:28:31] [PASSED] 48 VFs
[21:28:31] [PASSED] 49 VFs
[21:28:31] [PASSED] 50 VFs
[21:28:31] [PASSED] 51 VFs
[21:28:31] [PASSED] 52 VFs
[21:28:31] [PASSED] 53 VFs
[21:28:31] [PASSED] 54 VFs
[21:28:31] [PASSED] 55 VFs
[21:28:31] [PASSED] 56 VFs
[21:28:31] [PASSED] 57 VFs
[21:28:31] [PASSED] 58 VFs
[21:28:31] [PASSED] 59 VFs
[21:28:31] [PASSED] 60 VFs
[21:28:31] [PASSED] 61 VFs
[21:28:31] [PASSED] 62 VFs
[21:28:31] [PASSED] 63 VFs
[21:28:31] ==================== [PASSED] fair_ggtt ====================
[21:28:31] ================== [PASSED] pf_gt_config ===================
[21:28:31] ===================== lmtt (1 subtest) =====================
[21:28:31] ======================== test_ops =========================
[21:28:31] [PASSED] 2-level
[21:28:31] [PASSED] multi-level
[21:28:31] ==================== [PASSED] test_ops =====================
[21:28:31] ====================== [PASSED] lmtt =======================
[21:28:31] ================= pf_service (11 subtests) =================
[21:28:31] [PASSED] pf_negotiate_any
[21:28:31] [PASSED] pf_negotiate_base_match
[21:28:31] [PASSED] pf_negotiate_base_newer
[21:28:31] [PASSED] pf_negotiate_base_next
[21:28:31] [SKIPPED] pf_negotiate_base_older
[21:28:31] [PASSED] pf_negotiate_base_prev
[21:28:31] [PASSED] pf_negotiate_latest_match
[21:28:31] [PASSED] pf_negotiate_latest_newer
[21:28:31] [PASSED] pf_negotiate_latest_next
[21:28:31] [SKIPPED] pf_negotiate_latest_older
[21:28:31] [SKIPPED] pf_negotiate_latest_prev
[21:28:31] =================== [PASSED] pf_service ====================
[21:28:31] ================= xe_guc_g2g (2 subtests) ==================
[21:28:31] ============== xe_live_guc_g2g_kunit_default ==============
[21:28:31] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[21:28:31] ============== xe_live_guc_g2g_kunit_allmem ===============
[21:28:31] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[21:28:31] =================== [SKIPPED] xe_guc_g2g ===================
[21:28:31] =================== xe_mocs (2 subtests) ===================
[21:28:31] ================ xe_live_mocs_kernel_kunit ================
[21:28:31] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[21:28:31] ================ xe_live_mocs_reset_kunit =================
[21:28:31] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[21:28:31] ==================== [SKIPPED] xe_mocs =====================
[21:28:31] ================= xe_migrate (2 subtests) ==================
[21:28:31] ================= xe_migrate_sanity_kunit =================
[21:28:31] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[21:28:31] ================== xe_validate_ccs_kunit ==================
[21:28:31] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[21:28:31] =================== [SKIPPED] xe_migrate ===================
[21:28:31] ================== xe_dma_buf (1 subtest) ==================
[21:28:31] ==================== xe_dma_buf_kunit =====================
[21:28:31] ================ [SKIPPED] xe_dma_buf_kunit ================
[21:28:31] =================== [SKIPPED] xe_dma_buf ===================
[21:28:31] ================= xe_bo_shrink (1 subtest) =================
[21:28:31] =================== xe_bo_shrink_kunit ====================
[21:28:31] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[21:28:31] ================== [SKIPPED] xe_bo_shrink ==================
[21:28:31] ==================== xe_bo (2 subtests) ====================
[21:28:31] ================== xe_ccs_migrate_kunit ===================
[21:28:31] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[21:28:31] ==================== xe_bo_evict_kunit ====================
[21:28:31] =============== [SKIPPED] xe_bo_evict_kunit ================
[21:28:31] ===================== [SKIPPED] xe_bo ======================
[21:28:31] ==================== args (11 subtests) ====================
[21:28:31] [PASSED] count_args_test
[21:28:31] [PASSED] call_args_example
[21:28:31] [PASSED] call_args_test
[21:28:31] [PASSED] drop_first_arg_example
[21:28:31] [PASSED] drop_first_arg_test
[21:28:31] [PASSED] first_arg_example
[21:28:31] [PASSED] first_arg_test
[21:28:31] [PASSED] last_arg_example
[21:28:31] [PASSED] last_arg_test
[21:28:31] [PASSED] pick_arg_example
[21:28:31] [PASSED] sep_comma_example
[21:28:31] ====================== [PASSED] args =======================
[21:28:31] =================== xe_pci (3 subtests) ====================
[21:28:31] ==================== check_graphics_ip ====================
[21:28:31] [PASSED] 12.00 Xe_LP
[21:28:31] [PASSED] 12.10 Xe_LP+
[21:28:31] [PASSED] 12.55 Xe_HPG
[21:28:31] [PASSED] 12.60 Xe_HPC
[21:28:31] [PASSED] 12.70 Xe_LPG
[21:28:31] [PASSED] 12.71 Xe_LPG
[21:28:31] [PASSED] 12.74 Xe_LPG+
[21:28:31] [PASSED] 20.01 Xe2_HPG
[21:28:31] [PASSED] 20.02 Xe2_HPG
[21:28:31] [PASSED] 20.04 Xe2_LPG
[21:28:31] [PASSED] 30.00 Xe3_LPG
[21:28:31] [PASSED] 30.01 Xe3_LPG
[21:28:31] [PASSED] 30.03 Xe3_LPG
[21:28:31] [PASSED] 30.04 Xe3_LPG
[21:28:31] [PASSED] 30.05 Xe3_LPG
[21:28:31] [PASSED] 35.11 Xe3p_XPC
[21:28:31] ================ [PASSED] check_graphics_ip ================
[21:28:31] ===================== check_media_ip ======================
[21:28:31] [PASSED] 12.00 Xe_M
[21:28:31] [PASSED] 12.55 Xe_HPM
[21:28:31] [PASSED] 13.00 Xe_LPM+
[21:28:31] [PASSED] 13.01 Xe2_HPM
[21:28:31] [PASSED] 20.00 Xe2_LPM
[21:28:31] [PASSED] 30.00 Xe3_LPM
[21:28:31] [PASSED] 30.02 Xe3_LPM
[21:28:31] [PASSED] 35.00 Xe3p_LPM
[21:28:31] [PASSED] 35.03 Xe3p_HPM
[21:28:31] ================= [PASSED] check_media_ip ==================
[21:28:31] =================== check_platform_desc ===================
[21:28:31] [PASSED] 0x9A60 (TIGERLAKE)
[21:28:31] [PASSED] 0x9A68 (TIGERLAKE)
[21:28:31] [PASSED] 0x9A70 (TIGERLAKE)
[21:28:31] [PASSED] 0x9A40 (TIGERLAKE)
[21:28:31] [PASSED] 0x9A49 (TIGERLAKE)
[21:28:31] [PASSED] 0x9A59 (TIGERLAKE)
[21:28:31] [PASSED] 0x9A78 (TIGERLAKE)
[21:28:31] [PASSED] 0x9AC0 (TIGERLAKE)
[21:28:31] [PASSED] 0x9AC9 (TIGERLAKE)
[21:28:31] [PASSED] 0x9AD9 (TIGERLAKE)
[21:28:31] [PASSED] 0x9AF8 (TIGERLAKE)
[21:28:31] [PASSED] 0x4C80 (ROCKETLAKE)
[21:28:31] [PASSED] 0x4C8A (ROCKETLAKE)
[21:28:31] [PASSED] 0x4C8B (ROCKETLAKE)
[21:28:31] [PASSED] 0x4C8C (ROCKETLAKE)
[21:28:31] [PASSED] 0x4C90 (ROCKETLAKE)
[21:28:31] [PASSED] 0x4C9A (ROCKETLAKE)
[21:28:31] [PASSED] 0x4680 (ALDERLAKE_S)
[21:28:31] [PASSED] 0x4682 (ALDERLAKE_S)
[21:28:31] [PASSED] 0x4688 (ALDERLAKE_S)
[21:28:31] [PASSED] 0x468A (ALDERLAKE_S)
[21:28:31] [PASSED] 0x468B (ALDERLAKE_S)
[21:28:31] [PASSED] 0x4690 (ALDERLAKE_S)
[21:28:31] [PASSED] 0x4692 (ALDERLAKE_S)
[21:28:31] [PASSED] 0x4693 (ALDERLAKE_S)
[21:28:31] [PASSED] 0x46A0 (ALDERLAKE_P)
[21:28:31] [PASSED] 0x46A1 (ALDERLAKE_P)
[21:28:31] [PASSED] 0x46A2 (ALDERLAKE_P)
[21:28:31] [PASSED] 0x46A3 (ALDERLAKE_P)
[21:28:31] [PASSED] 0x46A6 (ALDERLAKE_P)
[21:28:31] [PASSED] 0x46A8 (ALDERLAKE_P)
[21:28:31] [PASSED] 0x46AA (ALDERLAKE_P)
[21:28:31] [PASSED] 0x462A (ALDERLAKE_P)
[21:28:31] [PASSED] 0x4626 (ALDERLAKE_P)
[21:28:31] [PASSED] 0x4628 (ALDERLAKE_P)
[21:28:31] [PASSED] 0x46B0 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[21:28:31] [PASSED] 0x46B1 (ALDERLAKE_P)
[21:28:31] [PASSED] 0x46B2 (ALDERLAKE_P)
[21:28:31] [PASSED] 0x46B3 (ALDERLAKE_P)
[21:28:31] [PASSED] 0x46C0 (ALDERLAKE_P)
[21:28:31] [PASSED] 0x46C1 (ALDERLAKE_P)
[21:28:31] [PASSED] 0x46C2 (ALDERLAKE_P)
[21:28:31] [PASSED] 0x46C3 (ALDERLAKE_P)
[21:28:31] [PASSED] 0x46D0 (ALDERLAKE_N)
[21:28:31] [PASSED] 0x46D1 (ALDERLAKE_N)
[21:28:31] [PASSED] 0x46D2 (ALDERLAKE_N)
[21:28:31] [PASSED] 0x46D3 (ALDERLAKE_N)
[21:28:31] [PASSED] 0x46D4 (ALDERLAKE_N)
[21:28:31] [PASSED] 0xA721 (ALDERLAKE_P)
[21:28:31] [PASSED] 0xA7A1 (ALDERLAKE_P)
[21:28:31] [PASSED] 0xA7A9 (ALDERLAKE_P)
[21:28:31] [PASSED] 0xA7AC (ALDERLAKE_P)
[21:28:31] [PASSED] 0xA7AD (ALDERLAKE_P)
[21:28:31] [PASSED] 0xA720 (ALDERLAKE_P)
[21:28:31] [PASSED] 0xA7A0 (ALDERLAKE_P)
[21:28:31] [PASSED] 0xA7A8 (ALDERLAKE_P)
[21:28:31] [PASSED] 0xA7AA (ALDERLAKE_P)
[21:28:31] [PASSED] 0xA7AB (ALDERLAKE_P)
[21:28:31] [PASSED] 0xA780 (ALDERLAKE_S)
[21:28:31] [PASSED] 0xA781 (ALDERLAKE_S)
[21:28:31] [PASSED] 0xA782 (ALDERLAKE_S)
[21:28:31] [PASSED] 0xA783 (ALDERLAKE_S)
[21:28:31] [PASSED] 0xA788 (ALDERLAKE_S)
[21:28:31] [PASSED] 0xA789 (ALDERLAKE_S)
[21:28:31] [PASSED] 0xA78A (ALDERLAKE_S)
[21:28:31] [PASSED] 0xA78B (ALDERLAKE_S)
[21:28:31] [PASSED] 0x4905 (DG1)
[21:28:31] [PASSED] 0x4906 (DG1)
[21:28:31] [PASSED] 0x4907 (DG1)
[21:28:31] [PASSED] 0x4908 (DG1)
[21:28:31] [PASSED] 0x4909 (DG1)
[21:28:31] [PASSED] 0x56C0 (DG2)
[21:28:32] [PASSED] 0x56C2 (DG2)
[21:28:32] [PASSED] 0x56C1 (DG2)
[21:28:32] [PASSED] 0x7D51 (METEORLAKE)
[21:28:32] [PASSED] 0x7DD1 (METEORLAKE)
[21:28:32] [PASSED] 0x7D41 (METEORLAKE)
[21:28:32] [PASSED] 0x7D67 (METEORLAKE)
[21:28:32] [PASSED] 0xB640 (METEORLAKE)
[21:28:32] [PASSED] 0x56A0 (DG2)
[21:28:32] [PASSED] 0x56A1 (DG2)
[21:28:32] [PASSED] 0x56A2 (DG2)
[21:28:32] [PASSED] 0x56BE (DG2)
[21:28:32] [PASSED] 0x56BF (DG2)
[21:28:32] [PASSED] 0x5690 (DG2)
[21:28:32] [PASSED] 0x5691 (DG2)
[21:28:32] [PASSED] 0x5692 (DG2)
[21:28:32] [PASSED] 0x56A5 (DG2)
[21:28:32] [PASSED] 0x56A6 (DG2)
[21:28:32] [PASSED] 0x56B0 (DG2)
[21:28:32] [PASSED] 0x56B1 (DG2)
[21:28:32] [PASSED] 0x56BA (DG2)
[21:28:32] [PASSED] 0x56BB (DG2)
[21:28:32] [PASSED] 0x56BC (DG2)
[21:28:32] [PASSED] 0x56BD (DG2)
[21:28:32] [PASSED] 0x5693 (DG2)
[21:28:32] [PASSED] 0x5694 (DG2)
[21:28:32] [PASSED] 0x5695 (DG2)
[21:28:32] [PASSED] 0x56A3 (DG2)
[21:28:32] [PASSED] 0x56A4 (DG2)
[21:28:32] [PASSED] 0x56B2 (DG2)
[21:28:32] [PASSED] 0x56B3 (DG2)
[21:28:32] [PASSED] 0x5696 (DG2)
[21:28:32] [PASSED] 0x5697 (DG2)
[21:28:32] [PASSED] 0xB69 (PVC)
[21:28:32] [PASSED] 0xB6E (PVC)
[21:28:32] [PASSED] 0xBD4 (PVC)
[21:28:32] [PASSED] 0xBD5 (PVC)
[21:28:32] [PASSED] 0xBD6 (PVC)
[21:28:32] [PASSED] 0xBD7 (PVC)
[21:28:32] [PASSED] 0xBD8 (PVC)
[21:28:32] [PASSED] 0xBD9 (PVC)
[21:28:32] [PASSED] 0xBDA (PVC)
[21:28:32] [PASSED] 0xBDB (PVC)
[21:28:32] [PASSED] 0xBE0 (PVC)
[21:28:32] [PASSED] 0xBE1 (PVC)
[21:28:32] [PASSED] 0xBE5 (PVC)
[21:28:32] [PASSED] 0x7D40 (METEORLAKE)
[21:28:32] [PASSED] 0x7D45 (METEORLAKE)
[21:28:32] [PASSED] 0x7D55 (METEORLAKE)
[21:28:32] [PASSED] 0x7D60 (METEORLAKE)
[21:28:32] [PASSED] 0x7DD5 (METEORLAKE)
[21:28:32] [PASSED] 0x6420 (LUNARLAKE)
[21:28:32] [PASSED] 0x64A0 (LUNARLAKE)
[21:28:32] [PASSED] 0x64B0 (LUNARLAKE)
[21:28:32] [PASSED] 0xE202 (BATTLEMAGE)
[21:28:32] [PASSED] 0xE209 (BATTLEMAGE)
[21:28:32] [PASSED] 0xE20B (BATTLEMAGE)
[21:28:32] [PASSED] 0xE20C (BATTLEMAGE)
[21:28:32] [PASSED] 0xE20D (BATTLEMAGE)
[21:28:32] [PASSED] 0xE210 (BATTLEMAGE)
[21:28:32] [PASSED] 0xE211 (BATTLEMAGE)
[21:28:32] [PASSED] 0xE212 (BATTLEMAGE)
[21:28:32] [PASSED] 0xE216 (BATTLEMAGE)
[21:28:32] [PASSED] 0xE220 (BATTLEMAGE)
[21:28:32] [PASSED] 0xE221 (BATTLEMAGE)
[21:28:32] [PASSED] 0xE222 (BATTLEMAGE)
[21:28:32] [PASSED] 0xE223 (BATTLEMAGE)
[21:28:32] [PASSED] 0xB080 (PANTHERLAKE)
[21:28:32] [PASSED] 0xB081 (PANTHERLAKE)
[21:28:32] [PASSED] 0xB082 (PANTHERLAKE)
[21:28:32] [PASSED] 0xB083 (PANTHERLAKE)
[21:28:32] [PASSED] 0xB084 (PANTHERLAKE)
[21:28:32] [PASSED] 0xB085 (PANTHERLAKE)
[21:28:32] [PASSED] 0xB086 (PANTHERLAKE)
[21:28:32] [PASSED] 0xB087 (PANTHERLAKE)
[21:28:32] [PASSED] 0xB08F (PANTHERLAKE)
[21:28:32] [PASSED] 0xB090 (PANTHERLAKE)
[21:28:32] [PASSED] 0xB0A0 (PANTHERLAKE)
[21:28:32] [PASSED] 0xB0B0 (PANTHERLAKE)
[21:28:32] [PASSED] 0xD740 (NOVALAKE_S)
[21:28:32] [PASSED] 0xD741 (NOVALAKE_S)
[21:28:32] [PASSED] 0xD742 (NOVALAKE_S)
[21:28:32] [PASSED] 0xD743 (NOVALAKE_S)
[21:28:32] [PASSED] 0xD744 (NOVALAKE_S)
[21:28:32] [PASSED] 0xD745 (NOVALAKE_S)
[21:28:32] [PASSED] 0x674C (CRESCENTISLAND)
[21:28:32] [PASSED] 0xFD80 (PANTHERLAKE)
[21:28:32] [PASSED] 0xFD81 (PANTHERLAKE)
[21:28:32] =============== [PASSED] check_platform_desc ===============
[21:28:32] ===================== [PASSED] xe_pci ======================
[21:28:32] =================== xe_rtp (2 subtests) ====================
[21:28:32] =============== xe_rtp_process_to_sr_tests ================
[21:28:32] [PASSED] coalesce-same-reg
[21:28:32] [PASSED] no-match-no-add
[21:28:32] [PASSED] match-or
[21:28:32] [PASSED] match-or-xfail
[21:28:32] [PASSED] no-match-no-add-multiple-rules
[21:28:32] [PASSED] two-regs-two-entries
[21:28:32] [PASSED] clr-one-set-other
[21:28:32] [PASSED] set-field
[21:28:32] [PASSED] conflict-duplicate
[21:28:32] [PASSED] conflict-not-disjoint
[21:28:32] [PASSED] conflict-reg-type
[21:28:32] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[21:28:32] ================== xe_rtp_process_tests ===================
[21:28:32] [PASSED] active1
[21:28:32] [PASSED] active2
[21:28:32] [PASSED] active-inactive
[21:28:32] [PASSED] inactive-active
[21:28:32] [PASSED] inactive-1st_or_active-inactive
[21:28:32] [PASSED] inactive-2nd_or_active-inactive
[21:28:32] [PASSED] inactive-last_or_active-inactive
[21:28:32] [PASSED] inactive-no_or_active-inactive
[21:28:32] ============== [PASSED] xe_rtp_process_tests ===============
[21:28:32] ===================== [PASSED] xe_rtp ======================
[21:28:32] ==================== xe_wa (1 subtest) =====================
[21:28:32] ======================== xe_wa_gt =========================
[21:28:32] [PASSED] TIGERLAKE B0
[21:28:32] [PASSED] DG1 A0
[21:28:32] [PASSED] DG1 B0
[21:28:32] [PASSED] ALDERLAKE_S A0
[21:28:32] [PASSED] ALDERLAKE_S B0
[21:28:32] [PASSED] ALDERLAKE_S C0
[21:28:32] [PASSED] ALDERLAKE_S D0
[21:28:32] [PASSED] ALDERLAKE_P A0
[21:28:32] [PASSED] ALDERLAKE_P B0
[21:28:32] [PASSED] ALDERLAKE_P C0
[21:28:32] [PASSED] ALDERLAKE_S RPLS D0
[21:28:32] [PASSED] ALDERLAKE_P RPLU E0
[21:28:32] [PASSED] DG2 G10 C0
[21:28:32] [PASSED] DG2 G11 B1
[21:28:32] [PASSED] DG2 G12 A1
[21:28:32] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[21:28:32] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[21:28:32] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[21:28:32] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[21:28:32] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[21:28:32] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[21:28:32] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[21:28:32] ==================== [PASSED] xe_wa_gt =====================
[21:28:32] ====================== [PASSED] xe_wa ======================
[21:28:32] ============================================================
[21:28:32] Testing complete. Ran 510 tests: passed: 492, skipped: 18
[21:28:32] Elapsed time: 42.016s total, 4.264s configuring, 37.235s building, 0.487s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[21:28:32] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:28:33] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[21:29:03] Starting KUnit Kernel (1/1)...
[21:29:03] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:29:03] ============ drm_test_pick_cmdline (2 subtests) ============
[21:29:03] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[21:29:03] =============== drm_test_pick_cmdline_named ===============
[21:29:03] [PASSED] NTSC
[21:29:03] [PASSED] NTSC-J
[21:29:03] [PASSED] PAL
[21:29:03] [PASSED] PAL-M
[21:29:03] =========== [PASSED] drm_test_pick_cmdline_named ===========
[21:29:03] ============== [PASSED] drm_test_pick_cmdline ==============
[21:29:03] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[21:29:03] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[21:29:03] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[21:29:03] =========== drm_validate_clone_mode (2 subtests) ===========
[21:29:03] ============== drm_test_check_in_clone_mode ===============
[21:29:03] [PASSED] in_clone_mode
[21:29:03] [PASSED] not_in_clone_mode
[21:29:03] ========== [PASSED] drm_test_check_in_clone_mode ===========
[21:29:03] =============== drm_test_check_valid_clones ===============
[21:29:03] [PASSED] not_in_clone_mode
[21:29:03] [PASSED] valid_clone
[21:29:03] [PASSED] invalid_clone
[21:29:03] =========== [PASSED] drm_test_check_valid_clones ===========
[21:29:03] ============= [PASSED] drm_validate_clone_mode =============
[21:29:03] ============= drm_validate_modeset (1 subtest) =============
[21:29:03] [PASSED] drm_test_check_connector_changed_modeset
[21:29:03] ============== [PASSED] drm_validate_modeset ===============
[21:29:03] ====== drm_test_bridge_get_current_state (2 subtests) ======
[21:29:03] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[21:29:03] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[21:29:03] ======== [PASSED] drm_test_bridge_get_current_state ========
[21:29:03] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[21:29:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[21:29:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[21:29:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[21:29:03] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[21:29:03] ============== drm_bridge_alloc (2 subtests) ===============
[21:29:03] [PASSED] drm_test_drm_bridge_alloc_basic
[21:29:03] [PASSED] drm_test_drm_bridge_alloc_get_put
[21:29:03] ================ [PASSED] drm_bridge_alloc =================
[21:29:03] ================== drm_buddy (8 subtests) ==================
[21:29:03] [PASSED] drm_test_buddy_alloc_limit
[21:29:03] [PASSED] drm_test_buddy_alloc_optimistic
[21:29:03] [PASSED] drm_test_buddy_alloc_pessimistic
[21:29:03] [PASSED] drm_test_buddy_alloc_pathological
[21:29:03] [PASSED] drm_test_buddy_alloc_contiguous
[21:29:03] [PASSED] drm_test_buddy_alloc_clear
[21:29:03] [PASSED] drm_test_buddy_alloc_range_bias
[21:29:03] [PASSED] drm_test_buddy_fragmentation_performance
[21:29:03] ==================== [PASSED] drm_buddy ====================
[21:29:03] ============= drm_cmdline_parser (40 subtests) =============
[21:29:03] [PASSED] drm_test_cmdline_force_d_only
[21:29:03] [PASSED] drm_test_cmdline_force_D_only_dvi
[21:29:03] [PASSED] drm_test_cmdline_force_D_only_hdmi
[21:29:03] [PASSED] drm_test_cmdline_force_D_only_not_digital
[21:29:03] [PASSED] drm_test_cmdline_force_e_only
[21:29:03] [PASSED] drm_test_cmdline_res
[21:29:03] [PASSED] drm_test_cmdline_res_vesa
[21:29:03] [PASSED] drm_test_cmdline_res_vesa_rblank
[21:29:03] [PASSED] drm_test_cmdline_res_rblank
[21:29:03] [PASSED] drm_test_cmdline_res_bpp
[21:29:03] [PASSED] drm_test_cmdline_res_refresh
[21:29:03] [PASSED] drm_test_cmdline_res_bpp_refresh
[21:29:03] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[21:29:03] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[21:29:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[21:29:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[21:29:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[21:29:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[21:29:03] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[21:29:03] [PASSED] drm_test_cmdline_res_margins_force_on
[21:29:03] [PASSED] drm_test_cmdline_res_vesa_margins
[21:29:03] [PASSED] drm_test_cmdline_name
[21:29:03] [PASSED] drm_test_cmdline_name_bpp
[21:29:03] [PASSED] drm_test_cmdline_name_option
[21:29:03] [PASSED] drm_test_cmdline_name_bpp_option
[21:29:03] [PASSED] drm_test_cmdline_rotate_0
[21:29:03] [PASSED] drm_test_cmdline_rotate_90
[21:29:03] [PASSED] drm_test_cmdline_rotate_180
[21:29:03] [PASSED] drm_test_cmdline_rotate_270
[21:29:03] [PASSED] drm_test_cmdline_hmirror
[21:29:03] [PASSED] drm_test_cmdline_vmirror
[21:29:03] [PASSED] drm_test_cmdline_margin_options
[21:29:03] [PASSED] drm_test_cmdline_multiple_options
[21:29:03] [PASSED] drm_test_cmdline_bpp_extra_and_option
[21:29:03] [PASSED] drm_test_cmdline_extra_and_option
[21:29:03] [PASSED] drm_test_cmdline_freestanding_options
[21:29:03] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[21:29:03] [PASSED] drm_test_cmdline_panel_orientation
[21:29:03] ================ drm_test_cmdline_invalid =================
[21:29:03] [PASSED] margin_only
[21:29:03] [PASSED] interlace_only
[21:29:03] [PASSED] res_missing_x
[21:29:03] [PASSED] res_missing_y
[21:29:03] [PASSED] res_bad_y
[21:29:03] [PASSED] res_missing_y_bpp
[21:29:03] [PASSED] res_bad_bpp
[21:29:03] [PASSED] res_bad_refresh
[21:29:03] [PASSED] res_bpp_refresh_force_on_off
[21:29:03] [PASSED] res_invalid_mode
[21:29:03] [PASSED] res_bpp_wrong_place_mode
[21:29:03] [PASSED] name_bpp_refresh
[21:29:03] [PASSED] name_refresh
[21:29:03] [PASSED] name_refresh_wrong_mode
[21:29:03] [PASSED] name_refresh_invalid_mode
[21:29:03] [PASSED] rotate_multiple
[21:29:03] [PASSED] rotate_invalid_val
[21:29:03] [PASSED] rotate_truncated
[21:29:03] [PASSED] invalid_option
[21:29:03] [PASSED] invalid_tv_option
[21:29:03] [PASSED] truncated_tv_option
[21:29:03] ============ [PASSED] drm_test_cmdline_invalid =============
[21:29:03] =============== drm_test_cmdline_tv_options ===============
[21:29:03] [PASSED] NTSC
[21:29:03] [PASSED] NTSC_443
[21:29:03] [PASSED] NTSC_J
[21:29:03] [PASSED] PAL
[21:29:03] [PASSED] PAL_M
[21:29:03] [PASSED] PAL_N
[21:29:03] [PASSED] SECAM
[21:29:03] [PASSED] MONO_525
[21:29:03] [PASSED] MONO_625
[21:29:03] =========== [PASSED] drm_test_cmdline_tv_options ===========
[21:29:03] =============== [PASSED] drm_cmdline_parser ================
[21:29:03] ========== drmm_connector_hdmi_init (20 subtests) ==========
[21:29:03] [PASSED] drm_test_connector_hdmi_init_valid
[21:29:03] [PASSED] drm_test_connector_hdmi_init_bpc_8
[21:29:03] [PASSED] drm_test_connector_hdmi_init_bpc_10
[21:29:03] [PASSED] drm_test_connector_hdmi_init_bpc_12
[21:29:03] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[21:29:03] [PASSED] drm_test_connector_hdmi_init_bpc_null
[21:29:03] [PASSED] drm_test_connector_hdmi_init_formats_empty
[21:29:03] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[21:29:03] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:29:03] [PASSED] supported_formats=0x9 yuv420_allowed=1
[21:29:03] [PASSED] supported_formats=0x9 yuv420_allowed=0
[21:29:03] [PASSED] supported_formats=0x3 yuv420_allowed=1
[21:29:03] [PASSED] supported_formats=0x3 yuv420_allowed=0
[21:29:03] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:29:03] [PASSED] drm_test_connector_hdmi_init_null_ddc
[21:29:03] [PASSED] drm_test_connector_hdmi_init_null_product
[21:29:03] [PASSED] drm_test_connector_hdmi_init_null_vendor
[21:29:03] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[21:29:03] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[21:29:03] [PASSED] drm_test_connector_hdmi_init_product_valid
[21:29:03] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[21:29:03] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[21:29:03] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[21:29:03] ========= drm_test_connector_hdmi_init_type_valid =========
[21:29:03] [PASSED] HDMI-A
[21:29:03] [PASSED] HDMI-B
[21:29:03] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[21:29:03] ======== drm_test_connector_hdmi_init_type_invalid ========
[21:29:03] [PASSED] Unknown
[21:29:03] [PASSED] VGA
[21:29:03] [PASSED] DVI-I
[21:29:03] [PASSED] DVI-D
[21:29:03] [PASSED] DVI-A
[21:29:03] [PASSED] Composite
[21:29:03] [PASSED] SVIDEO
[21:29:03] [PASSED] LVDS
[21:29:03] [PASSED] Component
[21:29:03] [PASSED] DIN
[21:29:03] [PASSED] DP
[21:29:03] [PASSED] TV
[21:29:03] [PASSED] eDP
[21:29:03] [PASSED] Virtual
[21:29:03] [PASSED] DSI
[21:29:03] [PASSED] DPI
[21:29:03] [PASSED] Writeback
[21:29:03] [PASSED] SPI
[21:29:03] [PASSED] USB
[21:29:03] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[21:29:03] ============ [PASSED] drmm_connector_hdmi_init =============
[21:29:03] ============= drmm_connector_init (3 subtests) =============
[21:29:03] [PASSED] drm_test_drmm_connector_init
[21:29:03] [PASSED] drm_test_drmm_connector_init_null_ddc
[21:29:03] ========= drm_test_drmm_connector_init_type_valid =========
[21:29:03] [PASSED] Unknown
[21:29:03] [PASSED] VGA
[21:29:03] [PASSED] DVI-I
[21:29:03] [PASSED] DVI-D
[21:29:03] [PASSED] DVI-A
[21:29:03] [PASSED] Composite
[21:29:03] [PASSED] SVIDEO
[21:29:03] [PASSED] LVDS
[21:29:03] [PASSED] Component
[21:29:03] [PASSED] DIN
[21:29:03] [PASSED] DP
[21:29:03] [PASSED] HDMI-A
[21:29:03] [PASSED] HDMI-B
[21:29:03] [PASSED] TV
[21:29:03] [PASSED] eDP
[21:29:03] [PASSED] Virtual
[21:29:03] [PASSED] DSI
[21:29:03] [PASSED] DPI
[21:29:03] [PASSED] Writeback
[21:29:03] [PASSED] SPI
[21:29:03] [PASSED] USB
[21:29:03] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[21:29:03] =============== [PASSED] drmm_connector_init ===============
[21:29:03] ========= drm_connector_dynamic_init (6 subtests) ==========
[21:29:03] [PASSED] drm_test_drm_connector_dynamic_init
[21:29:03] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[21:29:03] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[21:29:03] [PASSED] drm_test_drm_connector_dynamic_init_properties
[21:29:03] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[21:29:03] [PASSED] Unknown
[21:29:03] [PASSED] VGA
[21:29:03] [PASSED] DVI-I
[21:29:03] [PASSED] DVI-D
[21:29:03] [PASSED] DVI-A
[21:29:03] [PASSED] Composite
[21:29:03] [PASSED] SVIDEO
[21:29:03] [PASSED] LVDS
[21:29:03] [PASSED] Component
[21:29:03] [PASSED] DIN
[21:29:03] [PASSED] DP
[21:29:03] [PASSED] HDMI-A
[21:29:03] [PASSED] HDMI-B
[21:29:03] [PASSED] TV
[21:29:03] [PASSED] eDP
[21:29:03] [PASSED] Virtual
[21:29:03] [PASSED] DSI
[21:29:03] [PASSED] DPI
[21:29:03] [PASSED] Writeback
[21:29:03] [PASSED] SPI
[21:29:03] [PASSED] USB
[21:29:03] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[21:29:03] ======== drm_test_drm_connector_dynamic_init_name =========
[21:29:03] [PASSED] Unknown
[21:29:03] [PASSED] VGA
[21:29:03] [PASSED] DVI-I
[21:29:03] [PASSED] DVI-D
[21:29:03] [PASSED] DVI-A
[21:29:03] [PASSED] Composite
[21:29:03] [PASSED] SVIDEO
[21:29:03] [PASSED] LVDS
[21:29:03] [PASSED] Component
[21:29:03] [PASSED] DIN
[21:29:03] [PASSED] DP
[21:29:03] [PASSED] HDMI-A
[21:29:03] [PASSED] HDMI-B
[21:29:03] [PASSED] TV
[21:29:03] [PASSED] eDP
[21:29:03] [PASSED] Virtual
[21:29:03] [PASSED] DSI
[21:29:03] [PASSED] DPI
[21:29:03] [PASSED] Writeback
[21:29:03] [PASSED] SPI
[21:29:03] [PASSED] USB
[21:29:03] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[21:29:03] =========== [PASSED] drm_connector_dynamic_init ============
[21:29:03] ==== drm_connector_dynamic_register_early (4 subtests) =====
[21:29:03] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[21:29:03] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[21:29:03] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[21:29:03] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[21:29:03] ====== [PASSED] drm_connector_dynamic_register_early =======
[21:29:03] ======= drm_connector_dynamic_register (7 subtests) ========
[21:29:03] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[21:29:03] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[21:29:03] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[21:29:03] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[21:29:03] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[21:29:03] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[21:29:03] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[21:29:03] ========= [PASSED] drm_connector_dynamic_register ==========
[21:29:03] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[21:29:03] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[21:29:03] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[21:29:03] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[21:29:03] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[21:29:03] ========== drm_test_get_tv_mode_from_name_valid ===========
[21:29:03] [PASSED] NTSC
[21:29:03] [PASSED] NTSC-443
[21:29:03] [PASSED] NTSC-J
[21:29:03] [PASSED] PAL
[21:29:03] [PASSED] PAL-M
[21:29:03] [PASSED] PAL-N
[21:29:03] [PASSED] SECAM
[21:29:03] [PASSED] Mono
[21:29:03] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[21:29:03] [PASSED] drm_test_get_tv_mode_from_name_truncated
[21:29:03] ============ [PASSED] drm_get_tv_mode_from_name ============
[21:29:03] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[21:29:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[21:29:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[21:29:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[21:29:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[21:29:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[21:29:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[21:29:03] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[21:29:03] [PASSED] VIC 96
[21:29:03] [PASSED] VIC 97
[21:29:03] [PASSED] VIC 101
[21:29:03] [PASSED] VIC 102
[21:29:03] [PASSED] VIC 106
[21:29:03] [PASSED] VIC 107
[21:29:03] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[21:29:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[21:29:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[21:29:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[21:29:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[21:29:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[21:29:03] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[21:29:03] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[21:29:03] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[21:29:03] [PASSED] Automatic
[21:29:03] [PASSED] Full
[21:29:03] [PASSED] Limited 16:235
[21:29:03] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[21:29:03] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[21:29:03] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[21:29:03] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[21:29:03] === drm_test_drm_hdmi_connector_get_output_format_name ====
[21:29:03] [PASSED] RGB
[21:29:03] [PASSED] YUV 4:2:0
[21:29:03] [PASSED] YUV 4:2:2
[21:29:03] [PASSED] YUV 4:4:4
[21:29:03] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[21:29:03] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[21:29:03] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[21:29:03] ============= drm_damage_helper (21 subtests) ==============
[21:29:03] [PASSED] drm_test_damage_iter_no_damage
[21:29:03] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[21:29:03] [PASSED] drm_test_damage_iter_no_damage_src_moved
[21:29:03] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[21:29:03] [PASSED] drm_test_damage_iter_no_damage_not_visible
[21:29:03] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[21:29:03] [PASSED] drm_test_damage_iter_no_damage_no_fb
[21:29:03] [PASSED] drm_test_damage_iter_simple_damage
[21:29:03] [PASSED] drm_test_damage_iter_single_damage
[21:29:03] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[21:29:03] [PASSED] drm_test_damage_iter_single_damage_outside_src
[21:29:03] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[21:29:03] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[21:29:03] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[21:29:03] [PASSED] drm_test_damage_iter_single_damage_src_moved
[21:29:03] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[21:29:03] [PASSED] drm_test_damage_iter_damage
[21:29:03] [PASSED] drm_test_damage_iter_damage_one_intersect
[21:29:03] [PASSED] drm_test_damage_iter_damage_one_outside
[21:29:03] [PASSED] drm_test_damage_iter_damage_src_moved
[21:29:03] [PASSED] drm_test_damage_iter_damage_not_visible
[21:29:03] ================ [PASSED] drm_damage_helper ================
[21:29:03] ============== drm_dp_mst_helper (3 subtests) ==============
[21:29:03] ============== drm_test_dp_mst_calc_pbn_mode ==============
[21:29:03] [PASSED] Clock 154000 BPP 30 DSC disabled
[21:29:03] [PASSED] Clock 234000 BPP 30 DSC disabled
[21:29:03] [PASSED] Clock 297000 BPP 24 DSC disabled
[21:29:03] [PASSED] Clock 332880 BPP 24 DSC enabled
[21:29:03] [PASSED] Clock 324540 BPP 24 DSC enabled
[21:29:03] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[21:29:03] ============== drm_test_dp_mst_calc_pbn_div ===============
[21:29:03] [PASSED] Link rate 2000000 lane count 4
[21:29:03] [PASSED] Link rate 2000000 lane count 2
[21:29:03] [PASSED] Link rate 2000000 lane count 1
[21:29:03] [PASSED] Link rate 1350000 lane count 4
[21:29:03] [PASSED] Link rate 1350000 lane count 2
[21:29:03] [PASSED] Link rate 1350000 lane count 1
[21:29:03] [PASSED] Link rate 1000000 lane count 4
[21:29:03] [PASSED] Link rate 1000000 lane count 2
[21:29:03] [PASSED] Link rate 1000000 lane count 1
[21:29:03] [PASSED] Link rate 810000 lane count 4
[21:29:03] [PASSED] Link rate 810000 lane count 2
[21:29:03] [PASSED] Link rate 810000 lane count 1
[21:29:03] [PASSED] Link rate 540000 lane count 4
[21:29:03] [PASSED] Link rate 540000 lane count 2
[21:29:03] [PASSED] Link rate 540000 lane count 1
[21:29:03] [PASSED] Link rate 270000 lane count 4
[21:29:03] [PASSED] Link rate 270000 lane count 2
[21:29:03] [PASSED] Link rate 270000 lane count 1
[21:29:03] [PASSED] Link rate 162000 lane count 4
[21:29:03] [PASSED] Link rate 162000 lane count 2
[21:29:03] [PASSED] Link rate 162000 lane count 1
[21:29:03] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[21:29:03] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[21:29:03] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[21:29:03] [PASSED] DP_POWER_UP_PHY with port number
[21:29:03] [PASSED] DP_POWER_DOWN_PHY with port number
[21:29:03] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[21:29:03] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[21:29:03] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[21:29:03] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[21:29:03] [PASSED] DP_QUERY_PAYLOAD with port number
[21:29:03] [PASSED] DP_QUERY_PAYLOAD with VCPI
[21:29:03] [PASSED] DP_REMOTE_DPCD_READ with port number
[21:29:03] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[21:29:03] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[21:29:03] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[21:29:03] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[21:29:03] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[21:29:03] [PASSED] DP_REMOTE_I2C_READ with port number
[21:29:03] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[21:29:03] [PASSED] DP_REMOTE_I2C_READ with transactions array
[21:29:03] [PASSED] DP_REMOTE_I2C_WRITE with port number
[21:29:03] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[21:29:03] [PASSED] DP_REMOTE_I2C_WRITE with data array
[21:29:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[21:29:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[21:29:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[21:29:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[21:29:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[21:29:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[21:29:03] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[21:29:03] ================ [PASSED] drm_dp_mst_helper ================
[21:29:03] ================== drm_exec (7 subtests) ===================
[21:29:03] [PASSED] sanitycheck
[21:29:03] [PASSED] test_lock
[21:29:03] [PASSED] test_lock_unlock
[21:29:03] [PASSED] test_duplicates
[21:29:03] [PASSED] test_prepare
[21:29:03] [PASSED] test_prepare_array
[21:29:03] [PASSED] test_multiple_loops
[21:29:03] ==================== [PASSED] drm_exec =====================
[21:29:03] =========== drm_format_helper_test (17 subtests) ===========
[21:29:03] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[21:29:03] [PASSED] single_pixel_source_buffer
[21:29:03] [PASSED] single_pixel_clip_rectangle
[21:29:03] [PASSED] well_known_colors
[21:29:03] [PASSED] destination_pitch
[21:29:03] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[21:29:03] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[21:29:03] [PASSED] single_pixel_source_buffer
[21:29:03] [PASSED] single_pixel_clip_rectangle
[21:29:03] [PASSED] well_known_colors
[21:29:03] [PASSED] destination_pitch
[21:29:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[21:29:03] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[21:29:03] [PASSED] single_pixel_source_buffer
[21:29:03] [PASSED] single_pixel_clip_rectangle
[21:29:03] [PASSED] well_known_colors
[21:29:03] [PASSED] destination_pitch
[21:29:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[21:29:03] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[21:29:03] [PASSED] single_pixel_source_buffer
[21:29:03] [PASSED] single_pixel_clip_rectangle
[21:29:03] [PASSED] well_known_colors
[21:29:03] [PASSED] destination_pitch
[21:29:03] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[21:29:03] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[21:29:03] [PASSED] single_pixel_source_buffer
[21:29:03] [PASSED] single_pixel_clip_rectangle
[21:29:03] [PASSED] well_known_colors
[21:29:03] [PASSED] destination_pitch
[21:29:03] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[21:29:03] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[21:29:03] [PASSED] single_pixel_source_buffer
[21:29:03] [PASSED] single_pixel_clip_rectangle
[21:29:03] [PASSED] well_known_colors
[21:29:03] [PASSED] destination_pitch
[21:29:03] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[21:29:03] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[21:29:03] [PASSED] single_pixel_source_buffer
[21:29:03] [PASSED] single_pixel_clip_rectangle
[21:29:03] [PASSED] well_known_colors
[21:29:03] [PASSED] destination_pitch
[21:29:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[21:29:03] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[21:29:03] [PASSED] single_pixel_source_buffer
[21:29:03] [PASSED] single_pixel_clip_rectangle
[21:29:03] [PASSED] well_known_colors
[21:29:03] [PASSED] destination_pitch
[21:29:03] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[21:29:03] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[21:29:03] [PASSED] single_pixel_source_buffer
[21:29:03] [PASSED] single_pixel_clip_rectangle
[21:29:03] [PASSED] well_known_colors
[21:29:03] [PASSED] destination_pitch
[21:29:03] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[21:29:03] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[21:29:03] [PASSED] single_pixel_source_buffer
[21:29:03] [PASSED] single_pixel_clip_rectangle
[21:29:03] [PASSED] well_known_colors
[21:29:03] [PASSED] destination_pitch
[21:29:03] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[21:29:03] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[21:29:03] [PASSED] single_pixel_source_buffer
[21:29:03] [PASSED] single_pixel_clip_rectangle
[21:29:03] [PASSED] well_known_colors
[21:29:03] [PASSED] destination_pitch
[21:29:03] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[21:29:03] ============== drm_test_fb_xrgb8888_to_mono ===============
[21:29:03] [PASSED] single_pixel_source_buffer
[21:29:03] [PASSED] single_pixel_clip_rectangle
[21:29:03] [PASSED] well_known_colors
[21:29:03] [PASSED] destination_pitch
[21:29:03] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[21:29:03] ==================== drm_test_fb_swab =====================
[21:29:03] [PASSED] single_pixel_source_buffer
[21:29:03] [PASSED] single_pixel_clip_rectangle
[21:29:03] [PASSED] well_known_colors
[21:29:03] [PASSED] destination_pitch
[21:29:03] ================ [PASSED] drm_test_fb_swab =================
[21:29:03] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[21:29:03] [PASSED] single_pixel_source_buffer
[21:29:03] [PASSED] single_pixel_clip_rectangle
[21:29:03] [PASSED] well_known_colors
[21:29:03] [PASSED] destination_pitch
[21:29:03] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[21:29:03] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[21:29:03] [PASSED] single_pixel_source_buffer
[21:29:03] [PASSED] single_pixel_clip_rectangle
[21:29:03] [PASSED] well_known_colors
[21:29:03] [PASSED] destination_pitch
[21:29:03] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[21:29:03] ================= drm_test_fb_clip_offset =================
[21:29:03] [PASSED] pass through
[21:29:03] [PASSED] horizontal offset
[21:29:03] [PASSED] vertical offset
[21:29:03] [PASSED] horizontal and vertical offset
[21:29:03] [PASSED] horizontal offset (custom pitch)
[21:29:03] [PASSED] vertical offset (custom pitch)
[21:29:03] [PASSED] horizontal and vertical offset (custom pitch)
[21:29:03] ============= [PASSED] drm_test_fb_clip_offset =============
[21:29:03] =================== drm_test_fb_memcpy ====================
[21:29:03] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[21:29:03] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[21:29:03] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[21:29:03] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[21:29:03] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[21:29:03] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[21:29:03] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[21:29:03] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[21:29:03] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[21:29:03] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[21:29:03] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[21:29:03] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[21:29:03] =============== [PASSED] drm_test_fb_memcpy ================
[21:29:03] ============= [PASSED] drm_format_helper_test ==============
[21:29:03] ================= drm_format (18 subtests) =================
[21:29:03] [PASSED] drm_test_format_block_width_invalid
[21:29:03] [PASSED] drm_test_format_block_width_one_plane
[21:29:03] [PASSED] drm_test_format_block_width_two_plane
[21:29:03] [PASSED] drm_test_format_block_width_three_plane
[21:29:03] [PASSED] drm_test_format_block_width_tiled
[21:29:03] [PASSED] drm_test_format_block_height_invalid
[21:29:03] [PASSED] drm_test_format_block_height_one_plane
[21:29:03] [PASSED] drm_test_format_block_height_two_plane
[21:29:03] [PASSED] drm_test_format_block_height_three_plane
[21:29:03] [PASSED] drm_test_format_block_height_tiled
[21:29:03] [PASSED] drm_test_format_min_pitch_invalid
[21:29:03] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[21:29:03] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[21:29:03] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[21:29:03] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[21:29:03] [PASSED] drm_test_format_min_pitch_two_plane
[21:29:03] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[21:29:03] [PASSED] drm_test_format_min_pitch_tiled
[21:29:03] =================== [PASSED] drm_format ====================
[21:29:03] ============== drm_framebuffer (10 subtests) ===============
[21:29:03] ========== drm_test_framebuffer_check_src_coords ==========
[21:29:03] [PASSED] Success: source fits into fb
[21:29:03] [PASSED] Fail: overflowing fb with x-axis coordinate
[21:29:03] [PASSED] Fail: overflowing fb with y-axis coordinate
[21:29:03] [PASSED] Fail: overflowing fb with source width
[21:29:03] [PASSED] Fail: overflowing fb with source height
[21:29:03] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[21:29:03] [PASSED] drm_test_framebuffer_cleanup
[21:29:03] =============== drm_test_framebuffer_create ===============
[21:29:03] [PASSED] ABGR8888 normal sizes
[21:29:03] [PASSED] ABGR8888 max sizes
[21:29:03] [PASSED] ABGR8888 pitch greater than min required
[21:29:03] [PASSED] ABGR8888 pitch less than min required
[21:29:03] [PASSED] ABGR8888 Invalid width
[21:29:03] [PASSED] ABGR8888 Invalid buffer handle
[21:29:03] [PASSED] No pixel format
[21:29:03] [PASSED] ABGR8888 Width 0
[21:29:03] [PASSED] ABGR8888 Height 0
[21:29:03] [PASSED] ABGR8888 Out of bound height * pitch combination
[21:29:03] [PASSED] ABGR8888 Large buffer offset
[21:29:03] [PASSED] ABGR8888 Buffer offset for inexistent plane
[21:29:03] [PASSED] ABGR8888 Invalid flag
[21:29:03] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[21:29:03] [PASSED] ABGR8888 Valid buffer modifier
[21:29:03] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[21:29:03] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[21:29:03] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[21:29:03] [PASSED] NV12 Normal sizes
[21:29:03] [PASSED] NV12 Max sizes
[21:29:03] [PASSED] NV12 Invalid pitch
[21:29:03] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[21:29:03] [PASSED] NV12 different modifier per-plane
[21:29:03] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[21:29:03] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[21:29:03] [PASSED] NV12 Modifier for inexistent plane
[21:29:03] [PASSED] NV12 Handle for inexistent plane
[21:29:03] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[21:29:03] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[21:29:03] [PASSED] YVU420 Normal sizes
[21:29:03] [PASSED] YVU420 Max sizes
[21:29:03] [PASSED] YVU420 Invalid pitch
[21:29:03] [PASSED] YVU420 Different pitches
[21:29:03] [PASSED] YVU420 Different buffer offsets/pitches
[21:29:03] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[21:29:03] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[21:29:03] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[21:29:03] [PASSED] YVU420 Valid modifier
[21:29:03] [PASSED] YVU420 Different modifiers per plane
[21:29:03] [PASSED] YVU420 Modifier for inexistent plane
[21:29:03] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[21:29:03] [PASSED] X0L2 Normal sizes
[21:29:03] [PASSED] X0L2 Max sizes
[21:29:03] [PASSED] X0L2 Invalid pitch
[21:29:03] [PASSED] X0L2 Pitch greater than minimum required
[21:29:03] [PASSED] X0L2 Handle for inexistent plane
[21:29:03] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[21:29:03] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[21:29:03] [PASSED] X0L2 Valid modifier
[21:29:03] [PASSED] X0L2 Modifier for inexistent plane
[21:29:03] =========== [PASSED] drm_test_framebuffer_create ===========
[21:29:03] [PASSED] drm_test_framebuffer_free
[21:29:03] [PASSED] drm_test_framebuffer_init
[21:29:03] [PASSED] drm_test_framebuffer_init_bad_format
[21:29:03] [PASSED] drm_test_framebuffer_init_dev_mismatch
[21:29:03] [PASSED] drm_test_framebuffer_lookup
[21:29:03] [PASSED] drm_test_framebuffer_lookup_inexistent
[21:29:03] [PASSED] drm_test_framebuffer_modifiers_not_supported
[21:29:03] ================= [PASSED] drm_framebuffer =================
[21:29:03] ================ drm_gem_shmem (8 subtests) ================
[21:29:03] [PASSED] drm_gem_shmem_test_obj_create
[21:29:03] [PASSED] drm_gem_shmem_test_obj_create_private
[21:29:03] [PASSED] drm_gem_shmem_test_pin_pages
[21:29:03] [PASSED] drm_gem_shmem_test_vmap
[21:29:03] [PASSED] drm_gem_shmem_test_get_pages_sgt
[21:29:03] [PASSED] drm_gem_shmem_test_get_sg_table
[21:29:03] [PASSED] drm_gem_shmem_test_madvise
[21:29:03] [PASSED] drm_gem_shmem_test_purge
[21:29:03] ================== [PASSED] drm_gem_shmem ==================
[21:29:03] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[21:29:03] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[21:29:03] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[21:29:03] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[21:29:03] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[21:29:03] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[21:29:03] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[21:29:03] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[21:29:03] [PASSED] Automatic
[21:29:03] [PASSED] Full
[21:29:03] [PASSED] Limited 16:235
[21:29:03] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[21:29:03] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[21:29:03] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[21:29:03] [PASSED] drm_test_check_disable_connector
[21:29:03] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[21:29:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[21:29:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[21:29:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[21:29:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[21:29:03] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[21:29:03] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[21:29:03] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[21:29:03] [PASSED] drm_test_check_output_bpc_dvi
[21:29:03] [PASSED] drm_test_check_output_bpc_format_vic_1
[21:29:03] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[21:29:03] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[21:29:03] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[21:29:03] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[21:29:03] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[21:29:03] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[21:29:03] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[21:29:03] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[21:29:03] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[21:29:03] [PASSED] drm_test_check_broadcast_rgb_value
[21:29:03] [PASSED] drm_test_check_bpc_8_value
[21:29:03] [PASSED] drm_test_check_bpc_10_value
[21:29:03] [PASSED] drm_test_check_bpc_12_value
[21:29:03] [PASSED] drm_test_check_format_value
[21:29:03] [PASSED] drm_test_check_tmds_char_value
[21:29:03] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[21:29:03] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[21:29:03] [PASSED] drm_test_check_mode_valid
[21:29:03] [PASSED] drm_test_check_mode_valid_reject
[21:29:03] [PASSED] drm_test_check_mode_valid_reject_rate
[21:29:03] [PASSED] drm_test_check_mode_valid_reject_max_clock
[21:29:03] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[21:29:03] ================= drm_managed (2 subtests) =================
[21:29:03] [PASSED] drm_test_managed_release_action
[21:29:03] [PASSED] drm_test_managed_run_action
[21:29:03] =================== [PASSED] drm_managed ===================
[21:29:03] =================== drm_mm (6 subtests) ====================
[21:29:03] [PASSED] drm_test_mm_init
[21:29:03] [PASSED] drm_test_mm_debug
[21:29:03] [PASSED] drm_test_mm_align32
[21:29:03] [PASSED] drm_test_mm_align64
[21:29:03] [PASSED] drm_test_mm_lowest
[21:29:03] [PASSED] drm_test_mm_highest
[21:29:03] ===================== [PASSED] drm_mm ======================
[21:29:03] ============= drm_modes_analog_tv (5 subtests) =============
[21:29:03] [PASSED] drm_test_modes_analog_tv_mono_576i
[21:29:03] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[21:29:03] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[21:29:03] [PASSED] drm_test_modes_analog_tv_pal_576i
[21:29:03] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[21:29:03] =============== [PASSED] drm_modes_analog_tv ===============
[21:29:03] ============== drm_plane_helper (2 subtests) ===============
[21:29:03] =============== drm_test_check_plane_state ================
[21:29:03] [PASSED] clipping_simple
[21:29:03] [PASSED] clipping_rotate_reflect
[21:29:03] [PASSED] positioning_simple
[21:29:03] [PASSED] upscaling
[21:29:03] [PASSED] downscaling
[21:29:03] [PASSED] rounding1
[21:29:03] [PASSED] rounding2
[21:29:03] [PASSED] rounding3
[21:29:03] [PASSED] rounding4
[21:29:03] =========== [PASSED] drm_test_check_plane_state ============
[21:29:03] =========== drm_test_check_invalid_plane_state ============
[21:29:03] [PASSED] positioning_invalid
[21:29:03] [PASSED] upscaling_invalid
[21:29:03] [PASSED] downscaling_invalid
[21:29:03] ======= [PASSED] drm_test_check_invalid_plane_state ========
[21:29:03] ================ [PASSED] drm_plane_helper =================
[21:29:03] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[21:29:03] ====== drm_test_connector_helper_tv_get_modes_check =======
[21:29:03] [PASSED] None
[21:29:03] [PASSED] PAL
[21:29:03] [PASSED] NTSC
[21:29:03] [PASSED] Both, NTSC Default
[21:29:03] [PASSED] Both, PAL Default
[21:29:03] [PASSED] Both, NTSC Default, with PAL on command-line
[21:29:03] [PASSED] Both, PAL Default, with NTSC on command-line
[21:29:03] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[21:29:03] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[21:29:03] ================== drm_rect (9 subtests) ===================
[21:29:03] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[21:29:03] [PASSED] drm_test_rect_clip_scaled_not_clipped
[21:29:03] [PASSED] drm_test_rect_clip_scaled_clipped
[21:29:03] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[21:29:03] ================= drm_test_rect_intersect =================
[21:29:03] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[21:29:03] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[21:29:03] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[21:29:03] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[21:29:03] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[21:29:03] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[21:29:03] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[21:29:03] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[21:29:03] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[21:29:03] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[21:29:03] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[21:29:03] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[21:29:03] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[21:29:03] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[21:29:03] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[21:29:03] ============= [PASSED] drm_test_rect_intersect =============
[21:29:03] ================ drm_test_rect_calc_hscale ================
[21:29:03] [PASSED] normal use
[21:29:03] [PASSED] out of max range
[21:29:03] [PASSED] out of min range
[21:29:03] [PASSED] zero dst
[21:29:03] [PASSED] negative src
[21:29:03] [PASSED] negative dst
[21:29:03] ============ [PASSED] drm_test_rect_calc_hscale ============
[21:29:03] ================ drm_test_rect_calc_vscale ================
[21:29:03] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[21:29:03] [PASSED] out of max range
[21:29:03] [PASSED] out of min range
[21:29:03] [PASSED] zero dst
[21:29:03] [PASSED] negative src
[21:29:03] [PASSED] negative dst
[21:29:03] ============ [PASSED] drm_test_rect_calc_vscale ============
[21:29:03] ================== drm_test_rect_rotate ===================
[21:29:03] [PASSED] reflect-x
[21:29:03] [PASSED] reflect-y
[21:29:03] [PASSED] rotate-0
[21:29:03] [PASSED] rotate-90
[21:29:03] [PASSED] rotate-180
[21:29:03] [PASSED] rotate-270
[21:29:03] ============== [PASSED] drm_test_rect_rotate ===============
[21:29:03] ================ drm_test_rect_rotate_inv =================
[21:29:03] [PASSED] reflect-x
[21:29:03] [PASSED] reflect-y
[21:29:03] [PASSED] rotate-0
[21:29:03] [PASSED] rotate-90
[21:29:03] [PASSED] rotate-180
[21:29:03] [PASSED] rotate-270
[21:29:03] ============ [PASSED] drm_test_rect_rotate_inv =============
[21:29:03] ==================== [PASSED] drm_rect =====================
[21:29:03] ============ drm_sysfb_modeset_test (1 subtest) ============
[21:29:03] ============ drm_test_sysfb_build_fourcc_list =============
[21:29:03] [PASSED] no native formats
[21:29:03] [PASSED] XRGB8888 as native format
[21:29:03] [PASSED] remove duplicates
[21:29:03] [PASSED] convert alpha formats
[21:29:03] [PASSED] random formats
[21:29:03] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[21:29:03] ============= [PASSED] drm_sysfb_modeset_test ==============
[21:29:03] ================== drm_fixp (2 subtests) ===================
[21:29:03] [PASSED] drm_test_int2fixp
[21:29:03] [PASSED] drm_test_sm2fixp
[21:29:03] ==================== [PASSED] drm_fixp =====================
[21:29:03] ============================================================
[21:29:03] Testing complete. Ran 624 tests: passed: 624
[21:29:03] Elapsed time: 31.788s total, 1.634s configuring, 29.637s building, 0.457s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[21:29:04] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:29:05] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[21:29:14] Starting KUnit Kernel (1/1)...
[21:29:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:29:14] ================= ttm_device (5 subtests) ==================
[21:29:14] [PASSED] ttm_device_init_basic
[21:29:14] [PASSED] ttm_device_init_multiple
[21:29:14] [PASSED] ttm_device_fini_basic
[21:29:14] [PASSED] ttm_device_init_no_vma_man
[21:29:14] ================== ttm_device_init_pools ==================
[21:29:14] [PASSED] No DMA allocations, no DMA32 required
[21:29:14] [PASSED] DMA allocations, DMA32 required
[21:29:14] [PASSED] No DMA allocations, DMA32 required
[21:29:14] [PASSED] DMA allocations, no DMA32 required
[21:29:14] ============== [PASSED] ttm_device_init_pools ==============
[21:29:14] =================== [PASSED] ttm_device ====================
[21:29:14] ================== ttm_pool (8 subtests) ===================
[21:29:14] ================== ttm_pool_alloc_basic ===================
[21:29:14] [PASSED] One page
[21:29:14] [PASSED] More than one page
[21:29:14] [PASSED] Above the allocation limit
[21:29:14] [PASSED] One page, with coherent DMA mappings enabled
[21:29:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:29:14] ============== [PASSED] ttm_pool_alloc_basic ===============
[21:29:14] ============== ttm_pool_alloc_basic_dma_addr ==============
[21:29:14] [PASSED] One page
[21:29:14] [PASSED] More than one page
[21:29:14] [PASSED] Above the allocation limit
[21:29:14] [PASSED] One page, with coherent DMA mappings enabled
[21:29:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:29:14] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[21:29:14] [PASSED] ttm_pool_alloc_order_caching_match
[21:29:14] [PASSED] ttm_pool_alloc_caching_mismatch
[21:29:14] [PASSED] ttm_pool_alloc_order_mismatch
[21:29:14] [PASSED] ttm_pool_free_dma_alloc
[21:29:14] [PASSED] ttm_pool_free_no_dma_alloc
[21:29:14] [PASSED] ttm_pool_fini_basic
[21:29:14] ==================== [PASSED] ttm_pool =====================
[21:29:14] ================ ttm_resource (8 subtests) =================
[21:29:14] ================= ttm_resource_init_basic =================
[21:29:14] [PASSED] Init resource in TTM_PL_SYSTEM
[21:29:14] [PASSED] Init resource in TTM_PL_VRAM
[21:29:14] [PASSED] Init resource in a private placement
[21:29:14] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[21:29:14] ============= [PASSED] ttm_resource_init_basic =============
[21:29:14] [PASSED] ttm_resource_init_pinned
[21:29:14] [PASSED] ttm_resource_fini_basic
[21:29:14] [PASSED] ttm_resource_manager_init_basic
[21:29:14] [PASSED] ttm_resource_manager_usage_basic
[21:29:14] [PASSED] ttm_resource_manager_set_used_basic
[21:29:14] [PASSED] ttm_sys_man_alloc_basic
[21:29:14] [PASSED] ttm_sys_man_free_basic
[21:29:14] ================== [PASSED] ttm_resource ===================
[21:29:14] =================== ttm_tt (15 subtests) ===================
[21:29:14] ==================== ttm_tt_init_basic ====================
[21:29:14] [PASSED] Page-aligned size
[21:29:14] [PASSED] Extra pages requested
[21:29:14] ================ [PASSED] ttm_tt_init_basic ================
[21:29:14] [PASSED] ttm_tt_init_misaligned
[21:29:14] [PASSED] ttm_tt_fini_basic
[21:29:14] [PASSED] ttm_tt_fini_sg
[21:29:14] [PASSED] ttm_tt_fini_shmem
[21:29:14] [PASSED] ttm_tt_create_basic
[21:29:14] [PASSED] ttm_tt_create_invalid_bo_type
[21:29:14] [PASSED] ttm_tt_create_ttm_exists
[21:29:14] [PASSED] ttm_tt_create_failed
[21:29:14] [PASSED] ttm_tt_destroy_basic
[21:29:14] [PASSED] ttm_tt_populate_null_ttm
[21:29:14] [PASSED] ttm_tt_populate_populated_ttm
[21:29:14] [PASSED] ttm_tt_unpopulate_basic
[21:29:14] [PASSED] ttm_tt_unpopulate_empty_ttm
[21:29:14] [PASSED] ttm_tt_swapin_basic
[21:29:14] ===================== [PASSED] ttm_tt ======================
[21:29:14] =================== ttm_bo (14 subtests) ===================
[21:29:14] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[21:29:14] [PASSED] Cannot be interrupted and sleeps
[21:29:14] [PASSED] Cannot be interrupted, locks straight away
[21:29:14] [PASSED] Can be interrupted, sleeps
[21:29:14] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[21:29:14] [PASSED] ttm_bo_reserve_locked_no_sleep
[21:29:14] [PASSED] ttm_bo_reserve_no_wait_ticket
[21:29:14] [PASSED] ttm_bo_reserve_double_resv
[21:29:14] [PASSED] ttm_bo_reserve_interrupted
[21:29:14] [PASSED] ttm_bo_reserve_deadlock
[21:29:14] [PASSED] ttm_bo_unreserve_basic
[21:29:14] [PASSED] ttm_bo_unreserve_pinned
[21:29:14] [PASSED] ttm_bo_unreserve_bulk
[21:29:14] [PASSED] ttm_bo_fini_basic
[21:29:14] [PASSED] ttm_bo_fini_shared_resv
[21:29:14] [PASSED] ttm_bo_pin_basic
[21:29:14] [PASSED] ttm_bo_pin_unpin_resource
[21:29:14] [PASSED] ttm_bo_multiple_pin_one_unpin
[21:29:14] ===================== [PASSED] ttm_bo ======================
[21:29:14] ============== ttm_bo_validate (21 subtests) ===============
[21:29:14] ============== ttm_bo_init_reserved_sys_man ===============
[21:29:14] [PASSED] Buffer object for userspace
[21:29:14] [PASSED] Kernel buffer object
[21:29:14] [PASSED] Shared buffer object
[21:29:14] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[21:29:14] ============== ttm_bo_init_reserved_mock_man ==============
[21:29:14] [PASSED] Buffer object for userspace
[21:29:14] [PASSED] Kernel buffer object
[21:29:14] [PASSED] Shared buffer object
[21:29:14] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[21:29:14] [PASSED] ttm_bo_init_reserved_resv
[21:29:14] ================== ttm_bo_validate_basic ==================
[21:29:14] [PASSED] Buffer object for userspace
[21:29:14] [PASSED] Kernel buffer object
[21:29:14] [PASSED] Shared buffer object
[21:29:14] ============== [PASSED] ttm_bo_validate_basic ==============
[21:29:14] [PASSED] ttm_bo_validate_invalid_placement
[21:29:14] ============= ttm_bo_validate_same_placement ==============
[21:29:14] [PASSED] System manager
[21:29:14] [PASSED] VRAM manager
[21:29:14] ========= [PASSED] ttm_bo_validate_same_placement ==========
[21:29:14] [PASSED] ttm_bo_validate_failed_alloc
[21:29:14] [PASSED] ttm_bo_validate_pinned
[21:29:14] [PASSED] ttm_bo_validate_busy_placement
[21:29:14] ================ ttm_bo_validate_multihop =================
[21:29:14] [PASSED] Buffer object for userspace
[21:29:14] [PASSED] Kernel buffer object
[21:29:14] [PASSED] Shared buffer object
[21:29:14] ============ [PASSED] ttm_bo_validate_multihop =============
[21:29:14] ========== ttm_bo_validate_no_placement_signaled ==========
[21:29:14] [PASSED] Buffer object in system domain, no page vector
[21:29:14] [PASSED] Buffer object in system domain with an existing page vector
[21:29:14] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[21:29:14] ======== ttm_bo_validate_no_placement_not_signaled ========
[21:29:14] [PASSED] Buffer object for userspace
[21:29:14] [PASSED] Kernel buffer object
[21:29:14] [PASSED] Shared buffer object
[21:29:14] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[21:29:14] [PASSED] ttm_bo_validate_move_fence_signaled
[21:29:15] ========= ttm_bo_validate_move_fence_not_signaled =========
[21:29:15] [PASSED] Waits for GPU
[21:29:15] [PASSED] Tries to lock straight away
[21:29:15] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[21:29:15] [PASSED] ttm_bo_validate_happy_evict
[21:29:15] [PASSED] ttm_bo_validate_all_pinned_evict
[21:29:15] [PASSED] ttm_bo_validate_allowed_only_evict
[21:29:15] [PASSED] ttm_bo_validate_deleted_evict
[21:29:15] [PASSED] ttm_bo_validate_busy_domain_evict
[21:29:15] [PASSED] ttm_bo_validate_evict_gutting
[21:29:15] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[21:29:15] ================= [PASSED] ttm_bo_validate =================
[21:29:15] ============================================================
[21:29:15] Testing complete. Ran 101 tests: passed: 101
[21:29:15] Elapsed time: 11.029s total, 1.619s configuring, 9.143s building, 0.220s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Xe.CI.BAT: failure for Fix performance when pagefaults and 3d/display share resources
2025-12-11 21:00 [PATCH 0/6] Fix performance when pagefaults and 3d/display share resources Matthew Brost
` (6 preceding siblings ...)
2025-12-11 21:29 ` ✓ CI.KUnit: success for Fix performance when pagefaults and 3d/display share resources Patchwork
@ 2025-12-11 22:34 ` Patchwork
2025-12-12 13:46 ` ✗ Xe.CI.Full: " Patchwork
8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2025-12-11 22:34 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 10320 bytes --]
== Series Details ==
Series: Fix performance when pagefaults and 3d/display share resources
URL : https://patchwork.freedesktop.org/series/158833/
State : failure
== Summary ==
CI Bug Log - changes from xe-4226-d8f645c04dad21f981669f0b65191cac664735f9_BAT -> xe-pw-158833v1_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-158833v1_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-158833v1_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (12 -> 12)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-158833v1_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@xe_exec_compute_mode@twice-userptr-invalidate:
- bat-ptl-vm: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-ptl-vm/igt@xe_exec_compute_mode@twice-userptr-invalidate.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-ptl-vm/igt@xe_exec_compute_mode@twice-userptr-invalidate.html
* igt@xe_exec_threads@threads-mixed-userptr-invalidate:
- bat-adlp-vm: [PASS][3] -> [FAIL][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-adlp-vm/igt@xe_exec_threads@threads-mixed-userptr-invalidate.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-adlp-vm/igt@xe_exec_threads@threads-mixed-userptr-invalidate.html
- bat-lnl-1: [PASS][5] -> [FAIL][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-lnl-1/igt@xe_exec_threads@threads-mixed-userptr-invalidate.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-lnl-1/igt@xe_exec_threads@threads-mixed-userptr-invalidate.html
* igt@xe_module_load@load:
- bat-dg2-oem2: [PASS][7] -> [FAIL][8]
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@xe_module_load@load.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@xe_module_load@load.html
* igt@xe_prime_self_import@basic-with_fd_dup:
- bat-dg2-oem2: [PASS][9] -> [SKIP][10] +205 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@xe_prime_self_import@basic-with_fd_dup.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@xe_prime_self_import@basic-with_fd_dup.html
#### Warnings ####
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-dg2-oem2: [SKIP][11] ([Intel XE#623]) -> [SKIP][12]
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- bat-dg2-oem2: [SKIP][13] ([Intel XE#1091] / [Intel XE#2849]) -> [SKIP][14] +1 other test skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@sriov_basic@enable-vfs-autoprobe-off.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@sriov_basic@enable-vfs-autoprobe-off.html
* igt@xe_exec_fault_mode@twice-bindexecqueue-userptr:
- bat-dg2-oem2: [SKIP][15] ([Intel XE#288]) -> [SKIP][16] +32 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr.html
* igt@xe_huc_copy@huc_copy:
- bat-dg2-oem2: [SKIP][17] ([Intel XE#255]) -> [SKIP][18]
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@xe_huc_copy@huc_copy.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@xe_huc_copy@huc_copy.html
* igt@xe_pat@pat-index-xe2:
- bat-dg2-oem2: [SKIP][19] ([Intel XE#977]) -> [SKIP][20]
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@xe_pat@pat-index-xe2.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@xe_pat@pat-index-xe2.html
* igt@xe_pat@pat-index-xehpc:
- bat-dg2-oem2: [SKIP][21] ([Intel XE#2838] / [Intel XE#979]) -> [SKIP][22]
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@xe_pat@pat-index-xehpc.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-index-xelpg:
- bat-dg2-oem2: [SKIP][23] ([Intel XE#979]) -> [SKIP][24]
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@xe_pat@pat-index-xelpg.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@xe_pat@pat-index-xelpg.html
* igt@xe_sriov_flr@flr-vf1-clear:
- bat-dg2-oem2: [SKIP][25] ([Intel XE#3342]) -> [SKIP][26]
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@xe_sriov_flr@flr-vf1-clear.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@xe_sriov_flr@flr-vf1-clear.html
* igt@xe_waitfence@reltime:
- bat-dg2-oem2: [FAIL][27] ([Intel XE#6520]) -> [SKIP][28]
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@xe_waitfence@reltime.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@xe_waitfence@reltime.html
Known issues
------------
Here are the changes found in xe-pw-158833v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@nullptr:
- bat-dg2-oem2: [PASS][29] -> [SKIP][30] ([Intel XE#2134]) +4 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@fbdev@nullptr.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@fbdev@nullptr.html
* igt@kms_frontbuffer_tracking@basic:
- bat-dg2-oem2: [PASS][31] -> [SKIP][32] ([Intel XE#2351])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@kms_frontbuffer_tracking@basic.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@kms_frontbuffer_tracking@basic.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- bat-dg2-oem2: [PASS][33] -> [SKIP][34] ([Intel XE#2229] / [Intel XE#455]) +2 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
#### Warnings ####
* igt@kms_dsc@dsc-basic:
- bat-dg2-oem2: [SKIP][35] ([Intel XE#455]) -> [SKIP][36] ([Intel XE#2351])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@kms_dsc@dsc-basic.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@kms_dsc@dsc-basic.html
* igt@kms_psr@psr-cursor-plane-move:
- bat-dg2-oem2: [SKIP][37] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) -> [SKIP][38] ([Intel XE#1406] / [Intel XE#2351]) +2 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/bat-dg2-oem2/igt@kms_psr@psr-cursor-plane-move.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/bat-dg2-oem2/igt@kms_psr@psr-cursor-plane-move.html
[Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
[Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#623]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/623
[Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
Build changes
-------------
* Linux: xe-4226-d8f645c04dad21f981669f0b65191cac664735f9 -> xe-pw-158833v1
IGT_8664: 28cc709ad89c0ef569569f19f4772d4cca354963 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4226-d8f645c04dad21f981669f0b65191cac664735f9: d8f645c04dad21f981669f0b65191cac664735f9
xe-pw-158833v1: 158833v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/index.html
[-- Attachment #2: Type: text/html, Size: 11656 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 5/6] drm/xe: Wait on in-syncs when swicthing to dma-fence mode
2025-12-11 21:00 ` [PATCH 5/6] drm/xe: Wait on in-syncs when swicthing to dma-fence mode Matthew Brost
@ 2025-12-12 9:22 ` Thomas Hellström
2025-12-12 16:33 ` Matthew Brost
0 siblings, 1 reply; 17+ messages in thread
From: Thomas Hellström @ 2025-12-12 9:22 UTC (permalink / raw)
To: Matthew Brost, intel-xe; +Cc: francois.dugast, michal.mrozek
On Thu, 2025-12-11 at 13:00 -0800, Matthew Brost wrote:
> If a dma-fence submission has in-fences and pagefault queues are
> running
> work, there is little incentive to kick the pagefault queues off the
> hardware until the dma-fence submission is ready to run. Therefore,
> wait
> on the in-fences of the dma-fence submission before removing the
> pagefault queues from the hardware.
>
> Suggested-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_exec.c | 3 ++-
> drivers/gpu/drm/xe/xe_hw_engine_group.c | 34 +++++++++++++++++++----
> --
> drivers/gpu/drm/xe/xe_hw_engine_group.h | 4 ++-
> drivers/gpu/drm/xe/xe_sync.c | 14 ++++++++++
> drivers/gpu/drm/xe/xe_sync.h | 1 +
> 5 files changed, 46 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_exec.c
> b/drivers/gpu/drm/xe/xe_exec.c
> index 4d81210e41f5..5bc598ba6afa 100644
> --- a/drivers/gpu/drm/xe/xe_exec.c
> +++ b/drivers/gpu/drm/xe/xe_exec.c
> @@ -202,7 +202,8 @@ int xe_exec_ioctl(struct drm_device *dev, void
> *data, struct drm_file *file)
> mode = xe_hw_engine_group_find_exec_mode(q);
>
> if (mode == EXEC_MODE_DMA_FENCE) {
> - err = xe_hw_engine_group_get_mode(group, mode,
> &previous_mode);
> + err = xe_hw_engine_group_get_mode(group, mode,
> &previous_mode,
> + syncs, num_syncs);
> if (err)
> goto err_syncs;
> }
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.c
> b/drivers/gpu/drm/xe/xe_hw_engine_group.c
> index 4d9263a1a208..35966889c776 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine_group.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine_group.c
> @@ -11,6 +11,7 @@
> #include "xe_gt.h"
> #include "xe_gt_stats.h"
> #include "xe_hw_engine_group.h"
> +#include "xe_sync.h"
> #include "xe_vm.h"
>
> static void
> @@ -21,7 +22,8 @@ hw_engine_group_resume_lr_jobs_func(struct
> work_struct *w)
> int err;
> enum xe_hw_engine_group_execution_mode previous_mode;
>
> - err = xe_hw_engine_group_get_mode(group, EXEC_MODE_LR,
> &previous_mode);
> + err = xe_hw_engine_group_get_mode(group, EXEC_MODE_LR,
> &previous_mode,
> + NULL, 0);
> if (err)
> return;
>
> @@ -192,20 +194,32 @@ void
> xe_hw_engine_group_resume_faulting_lr_jobs(struct xe_hw_engine_group
> *group
> *
> * Return: 0 on success, negative error code on error.
> */
> -static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct
> xe_hw_engine_group *group)
> +static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct
> xe_hw_engine_group *group,
> + struct
> xe_sync_entry *syncs,
> + int
> num_syncs)
> {
> - int err;
> + int err, i;
> struct xe_exec_queue *q;
> bool need_resume = false;
>
> lockdep_assert_held_write(&group->mode_sem);
>
> list_for_each_entry(q, &group->exec_queue_list,
> hw_engine_group_link) {
> + bool idle_skip_suspend;
> +
> if (!xe_vm_in_fault_mode(q->vm))
> continue;
>
> xe_gt_stats_incr(q->gt,
> XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT, 1);
> - need_resume |= !xe_exec_queue_idle_skip_suspend(q);
> +
> + idle_skip_suspend =
> xe_exec_queue_idle_skip_suspend(q);
> +
> + if (!need_resume && !idle_skip_suspend && num_syncs)
> {
> + for (i = 0; i < num_syncs; ++i)
> + xe_sync_entry_wait(syncs + i);
Here we're in the write-locked mode, right? Ideally I think we should
just check for idle here and return a retry if not idle, and wait
outside of the locks. Perhaps also always wait if there are pf jobs
running on the engine group. Also we might want to include the other
implicit dependencies as well, like kernel fences.
Although perhaps this is good enough for now, and this would be easier
implemented with a scheduler?
/Thomas
> + }
> +
> + need_resume |= !idle_skip_suspend;
> q->ops->suspend(q);
> }
>
> @@ -258,7 +272,8 @@ static int
> xe_hw_engine_group_wait_for_dma_fence_jobs(struct xe_hw_engine_group
> return 0;
> }
>
> -static int switch_mode(struct xe_hw_engine_group *group)
> +static int switch_mode(struct xe_hw_engine_group *group,
> + struct xe_sync_entry *syncs, int num_syncs)
> {
> int err = 0;
> enum xe_hw_engine_group_execution_mode new_mode;
> @@ -268,7 +283,9 @@ static int switch_mode(struct xe_hw_engine_group
> *group)
> switch (group->cur_mode) {
> case EXEC_MODE_LR:
> new_mode = EXEC_MODE_DMA_FENCE;
> - err =
> xe_hw_engine_group_suspend_faulting_lr_jobs(group);
> + err =
> xe_hw_engine_group_suspend_faulting_lr_jobs(group,
> +
> syncs,
> +
> num_syncs);
> break;
> case EXEC_MODE_DMA_FENCE:
> new_mode = EXEC_MODE_LR;
> @@ -294,7 +311,8 @@ static int switch_mode(struct xe_hw_engine_group
> *group)
> */
> int xe_hw_engine_group_get_mode(struct xe_hw_engine_group *group,
> enum
> xe_hw_engine_group_execution_mode new_mode,
> - enum
> xe_hw_engine_group_execution_mode *previous_mode)
> + enum
> xe_hw_engine_group_execution_mode *previous_mode,
> + struct xe_sync_entry *syncs, int
> num_syncs)
> __acquires(&group->mode_sem)
> {
> int err = down_read_interruptible(&group->mode_sem);
> @@ -311,7 +329,7 @@ __acquires(&group->mode_sem)
> return err;
>
> if (new_mode != group->cur_mode) {
> - err = switch_mode(group);
> + err = switch_mode(group, syncs, num_syncs);
> if (err) {
> up_write(&group->mode_sem);
> return err;
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.h
> b/drivers/gpu/drm/xe/xe_hw_engine_group.h
> index 797ee81acbf2..8b17ccd30b70 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine_group.h
> +++ b/drivers/gpu/drm/xe/xe_hw_engine_group.h
> @@ -11,6 +11,7 @@
> struct drm_device;
> struct xe_exec_queue;
> struct xe_gt;
> +struct xe_sync_entry;
>
> int xe_hw_engine_setup_groups(struct xe_gt *gt);
>
> @@ -19,7 +20,8 @@ void xe_hw_engine_group_del_exec_queue(struct
> xe_hw_engine_group *group, struct
>
> int xe_hw_engine_group_get_mode(struct xe_hw_engine_group *group,
> enum
> xe_hw_engine_group_execution_mode new_mode,
> - enum
> xe_hw_engine_group_execution_mode *previous_mode);
> + enum
> xe_hw_engine_group_execution_mode *previous_mode,
> + struct xe_sync_entry *syncs, int
> num_syncs);
> void xe_hw_engine_group_put(struct xe_hw_engine_group *group);
>
> enum xe_hw_engine_group_execution_mode
> diff --git a/drivers/gpu/drm/xe/xe_sync.c
> b/drivers/gpu/drm/xe/xe_sync.c
> index 1fc4fa278b78..127e26129933 100644
> --- a/drivers/gpu/drm/xe/xe_sync.c
> +++ b/drivers/gpu/drm/xe/xe_sync.c
> @@ -228,6 +228,20 @@ int xe_sync_entry_add_deps(struct xe_sync_entry
> *sync, struct xe_sched_job *job)
> return 0;
> }
>
> +/**
> + * xe_sync_entry_wait() - Wait on in-sync
> + * @sync: Sync object
> + *
> + * If the sync is in an in-sync, wait on the sync to signal.
> + */
> +void xe_sync_entry_wait(struct xe_sync_entry *sync)
> +{
> + if (sync->flags & DRM_XE_SYNC_FLAG_SIGNAL)
> + return;
> +
> + dma_fence_wait(sync->fence, false);
> +}
> +
> void xe_sync_entry_signal(struct xe_sync_entry *sync, struct
> dma_fence *fence)
> {
> if (!(sync->flags & DRM_XE_SYNC_FLAG_SIGNAL))
> diff --git a/drivers/gpu/drm/xe/xe_sync.h
> b/drivers/gpu/drm/xe/xe_sync.h
> index 51f2d803e977..1c08f9ed9001 100644
> --- a/drivers/gpu/drm/xe/xe_sync.h
> +++ b/drivers/gpu/drm/xe/xe_sync.h
> @@ -29,6 +29,7 @@ int xe_sync_entry_add_deps(struct xe_sync_entry
> *sync,
> struct xe_sched_job *job);
> void xe_sync_entry_signal(struct xe_sync_entry *sync,
> struct dma_fence *fence);
> +void xe_sync_entry_wait(struct xe_sync_entry *sync);
> void xe_sync_entry_cleanup(struct xe_sync_entry *sync);
> struct dma_fence *
> xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync,
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Xe.CI.Full: failure for Fix performance when pagefaults and 3d/display share resources
2025-12-11 21:00 [PATCH 0/6] Fix performance when pagefaults and 3d/display share resources Matthew Brost
` (7 preceding siblings ...)
2025-12-11 22:34 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2025-12-12 13:46 ` Patchwork
8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2025-12-12 13:46 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 20220 bytes --]
== Series Details ==
Series: Fix performance when pagefaults and 3d/display share resources
URL : https://patchwork.freedesktop.org/series/158833/
State : failure
== Summary ==
CI Bug Log - changes from xe-4226-d8f645c04dad21f981669f0b65191cac664735f9_FULL -> xe-pw-158833v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-158833v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-158833v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-158833v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_exec_threads@threads-cm-fd-userptr-invalidate:
- shard-bmg: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-bmg-6/igt@xe_exec_threads@threads-cm-fd-userptr-invalidate.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-5/igt@xe_exec_threads@threads-cm-fd-userptr-invalidate.html
* igt@xe_exec_threads@threads-cm-fd-userptr-invalidate-race:
- shard-lnl: [PASS][3] -> [FAIL][4] +2 other tests fail
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-lnl-1/igt@xe_exec_threads@threads-cm-fd-userptr-invalidate-race.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-lnl-2/igt@xe_exec_threads@threads-cm-fd-userptr-invalidate-race.html
Known issues
------------
Here are the changes found in xe-pw-158833v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@x-tiled-64bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#2327]) +1 other test skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#1124]) +1 other test skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-addfb:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2328])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@kms_big_fb@y-tiled-addfb.html
* igt@kms_bw@connected-linear-tiling-1-displays-2560x1440p:
- shard-bmg: [PASS][8] -> [SKIP][9] ([Intel XE#367])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-bmg-5/igt@kms_bw@connected-linear-tiling-1-displays-2560x1440p.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-1-displays-2560x1440p.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2652] / [Intel XE#787]) +8 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2887]) +2 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs.html
* igt@kms_chamelium_color@ctm-blue-to-red:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#2325])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-8/igt@kms_chamelium_color@ctm-blue-to-red.html
* igt@kms_chamelium_hpd@vga-hpd-fast:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2252]) +2 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@kms_chamelium_hpd@vga-hpd-fast.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#2390]) +1 other test skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-1/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@mei-interface:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2341])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-8/igt@kms_content_protection@mei-interface.html
* igt@kms_cursor_crc@cursor-offscreen-max-size:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2320])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-8/igt@kms_cursor_crc@cursor-offscreen-max-size.html
* igt@kms_dsc@dsc-basic:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#2244])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@kms_dsc@dsc-basic.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible:
- shard-bmg: [PASS][18] -> [INCOMPLETE][19] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-bmg-5/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-6/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [PASS][20] -> [FAIL][21] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#2293] / [Intel XE#2380])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-1/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#2293])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-1/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#2311]) +9 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#4141]) +4 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#2313]) +5 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt.html
* igt@kms_hdr@bpc-switch@pipe-a-dp-2:
- shard-bmg: [PASS][27] -> [ABORT][28] ([Intel XE#6740]) +1 other test abort
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-bmg-4/igt@kms_hdr@bpc-switch@pipe-a-dp-2.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-8/igt@kms_hdr@bpc-switch@pipe-a-dp-2.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#6590])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_joiner@invalid-modeset-force-ultra-joiner:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#2934] / [Intel XE#6590])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-1/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#4090] / [Intel XE#6590])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_pm_backlight@fade:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#870])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@kms_pm_backlight@fade.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#1406] / [Intel XE#1489])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr@fbc-psr-suspend:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@kms_psr@fbc-psr-suspend.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@xe_eudebug@basic-vm-access:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#4837]) +1 other test skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@xe_eudebug@basic-vm-access.html
* igt@xe_eudebug_online@pagefault-one-of-many:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#6665])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@xe_eudebug_online@pagefault-one-of-many.html
* igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#4837] / [Intel XE#6665])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram.html
* igt@xe_exec_basic@multigpu-once-userptr-rebind:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#2322]) +3 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@xe_exec_basic@multigpu-once-userptr-rebind.html
* igt@xe_exec_system_allocator@many-64k-mmap-new-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#5007])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@xe_exec_system_allocator@many-64k-mmap-new-huge-nomemset.html
* igt@xe_exec_system_allocator@threads-many-large-mmap-new-huge:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#4943]) +2 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@xe_exec_system_allocator@threads-many-large-mmap-new-huge.html
* igt@xe_exec_threads@threads-cm-userptr-invalidate:
- shard-lnl: [PASS][42] -> [FAIL][43] ([Intel XE#5625]) +1 other test fail
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-lnl-8/igt@xe_exec_threads@threads-cm-userptr-invalidate.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-lnl-1/igt@xe_exec_threads@threads-cm-userptr-invalidate.html
* igt@xe_pmu@engine-activity-accuracy-50:
- shard-lnl: [PASS][44] -> [FAIL][45] ([Intel XE#6251]) +1 other test fail
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-50.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-lnl-4/igt@xe_pmu@engine-activity-accuracy-50.html
* igt@xe_query@multigpu-query-pxp-status:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#944])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@xe_query@multigpu-query-pxp-status.html
#### Possible fixes ####
* igt@kms_bw@connected-linear-tiling-1-displays-3840x2160p:
- shard-bmg: [SKIP][47] ([Intel XE#367]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-bmg-6/igt@kms_bw@connected-linear-tiling-1-displays-3840x2160p.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@kms_bw@connected-linear-tiling-1-displays-3840x2160p.html
* igt@kms_cursor_crc@cursor-offscreen-64x64@pipe-a-dp-2:
- shard-bmg: [FAIL][49] -> [PASS][50] +1 other test pass
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-bmg-6/igt@kms_cursor_crc@cursor-offscreen-64x64@pipe-a-dp-2.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-4/igt@kms_cursor_crc@cursor-offscreen-64x64@pipe-a-dp-2.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-bmg: [FAIL][51] ([Intel XE#6816]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-bmg-6/igt@kms_dp_link_training@non-uhbr-sst.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-5/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [FAIL][53] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][54] +1 other test pass
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@xe_exec_system_allocator@many-stride-malloc-prefetch:
- shard-bmg: [WARN][55] ([Intel XE#5786]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-bmg-8/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-3/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html
* igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0:
- shard-lnl: [FAIL][57] ([Intel XE#6251]) -> [PASS][58] +1 other test pass
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-lnl-4/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0.html
#### Warnings ####
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [FAIL][59] ([Intel XE#5299]) -> [FAIL][60] ([Intel XE#4633])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][61] ([Intel XE#3544]) -> [SKIP][62] ([Intel XE#3374] / [Intel XE#3544])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4226-d8f645c04dad21f981669f0b65191cac664735f9/shard-bmg-6/igt@kms_hdr@brightness-with-hdr.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2934]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2934
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4090]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4090
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
[Intel XE#5299]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5299
[Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
[Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
[Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
[Intel XE#6590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6590
[Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
[Intel XE#6740]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6740
[Intel XE#6816]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6816
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-4226-d8f645c04dad21f981669f0b65191cac664735f9 -> xe-pw-158833v1
IGT_8664: 28cc709ad89c0ef569569f19f4772d4cca354963 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4226-d8f645c04dad21f981669f0b65191cac664735f9: d8f645c04dad21f981669f0b65191cac664735f9
xe-pw-158833v1: 158833v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158833v1/index.html
[-- Attachment #2: Type: text/html, Size: 22568 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 6/6] drm/xe: Add more GT stats around pagefault mode switch flows
2025-12-11 21:00 ` [PATCH 6/6] drm/xe: Add more GT stats around pagefault mode switch flows Matthew Brost
@ 2025-12-12 16:07 ` Francois Dugast
2025-12-12 16:18 ` Matthew Brost
0 siblings, 1 reply; 17+ messages in thread
From: Francois Dugast @ 2025-12-12 16:07 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe, thomas.hellstrom, michal.mrozek
On Thu, Dec 11, 2025 at 01:00:32PM -0800, Matthew Brost wrote:
> Add GT stats to measure the time spent switching between pagefault mode
> and dma-fence mode. Also add a GT stat to indicate when pagefault
> suspend is skipped because the system is idle. These metrics will help
> profile pagefault workloads while 3D and display are enabled.
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_gt_stats.c | 6 +++++
> drivers/gpu/drm/xe/xe_gt_stats_types.h | 3 +++
> drivers/gpu/drm/xe/xe_hw_engine_group.c | 32 +++++++++++++++++++++++++
> 3 files changed, 41 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_stats.c b/drivers/gpu/drm/xe/xe_gt_stats.c
> index 714045ad9354..fb2904bd0abd 100644
> --- a/drivers/gpu/drm/xe/xe_gt_stats.c
> +++ b/drivers/gpu/drm/xe/xe_gt_stats.c
> @@ -68,8 +68,14 @@ static const char *const stat_description[__XE_GT_STATS_NUM_IDS] = {
> DEF_STAT_STR(SVM_2M_BIND_US, "svm_2M_bind_us"),
> DEF_STAT_STR(HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT,
> "hw_engine_group_suspend_lr_queue_count"),
> + DEF_STAT_STR(HW_ENGINE_GROUP_SKIP_LR_QUEUE_COUNT,
> + "hw_engine_group_skip_lr_queue_count"),
> DEF_STAT_STR(HW_ENGINE_GROUP_WAIT_DMA_QUEUE_COUNT,
> "hw_engine_group_wait_dma_queue_count"),
> + DEF_STAT_STR(HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_US,
> + "hw_engine_group_suspend_lr_queue_us"),
> + DEF_STAT_STR(HW_ENGINE_GROUP_WAIT_DMA_QUEUE_US,
> + "hw_engine_group_wait_dma_queue_us"),
> };
>
> /**
> diff --git a/drivers/gpu/drm/xe/xe_gt_stats_types.h b/drivers/gpu/drm/xe/xe_gt_stats_types.h
> index aada5df421e5..b92d013091d5 100644
> --- a/drivers/gpu/drm/xe/xe_gt_stats_types.h
> +++ b/drivers/gpu/drm/xe/xe_gt_stats_types.h
> @@ -45,7 +45,10 @@ enum xe_gt_stats_id {
> XE_GT_STATS_ID_SVM_64K_BIND_US,
> XE_GT_STATS_ID_SVM_2M_BIND_US,
> XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT,
> + XE_GT_STATS_ID_HW_ENGINE_GROUP_SKIP_LR_QUEUE_COUNT,
> XE_GT_STATS_ID_HW_ENGINE_GROUP_WAIT_DMA_QUEUE_COUNT,
> + XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_US,
> + XE_GT_STATS_ID_HW_ENGINE_GROUP_WAIT_DMA_QUEUE_US,
> /* must be the last entry */
> __XE_GT_STATS_NUM_IDS,
> };
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.c b/drivers/gpu/drm/xe/xe_hw_engine_group.c
> index 35966889c776..8236fdee0901 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine_group.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine_group.c
> @@ -14,6 +14,17 @@
> #include "xe_sync.h"
> #include "xe_vm.h"
>
> +static s64 xe_hw_engine_group_stats_ktime_us_delta(ktime_t start)
> +{
> + return IS_ENABLED(CONFIG_DEBUG_FS) ?
> + ktime_us_delta(ktime_get(), start) : 0;
> +}
> +
> +static ktime_t xe_hw_engine_group_stats_ktime_get(void)
> +{
> + return IS_ENABLED(CONFIG_DEBUG_FS) ? ktime_get() : 0;
> +}
> +
As they are not domain-specific, we could move xe_svm_stats_ktime_get()
and xe_svm_stats_ktime_us_delta() to xe_gt_stats.h and avoid duplication.
Francois
> static void
> hw_engine_group_resume_lr_jobs_func(struct work_struct *w)
> {
> @@ -200,7 +211,9 @@ static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group
> {
> int err, i;
> struct xe_exec_queue *q;
> + struct xe_gt *gt = NULL;
> bool need_resume = false;
> + ktime_t start = xe_hw_engine_group_stats_ktime_get();
>
> lockdep_assert_held_write(&group->mode_sem);
>
> @@ -213,6 +226,9 @@ static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group
> xe_gt_stats_incr(q->gt, XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT, 1);
>
> idle_skip_suspend = xe_exec_queue_idle_skip_suspend(q);
> + if (idle_skip_suspend)
> + xe_gt_stats_incr(q->gt,
> + XE_GT_STATS_ID_HW_ENGINE_GROUP_SKIP_LR_QUEUE_COUNT, 1);
>
> if (!need_resume && !idle_skip_suspend && num_syncs) {
> for (i = 0; i < num_syncs; ++i)
> @@ -221,6 +237,7 @@ static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group
>
> need_resume |= !idle_skip_suspend;
> q->ops->suspend(q);
> + gt = q->gt;
> }
>
> list_for_each_entry(q, &group->exec_queue_list, hw_engine_group_link) {
> @@ -232,6 +249,12 @@ static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group
> return err;
> }
>
> + if (gt) {
> + xe_gt_stats_incr(gt,
> + XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_US,
> + xe_hw_engine_group_stats_ktime_us_delta(start));
> + }
> +
> if (need_resume)
> xe_hw_engine_group_resume_faulting_lr_jobs(group);
>
> @@ -252,7 +275,9 @@ static int xe_hw_engine_group_wait_for_dma_fence_jobs(struct xe_hw_engine_group
> {
> long timeout;
> struct xe_exec_queue *q;
> + struct xe_gt *gt = NULL;
> struct dma_fence *fence;
> + ktime_t start = xe_hw_engine_group_stats_ktime_get();
>
> lockdep_assert_held_write(&group->mode_sem);
>
> @@ -264,11 +289,18 @@ static int xe_hw_engine_group_wait_for_dma_fence_jobs(struct xe_hw_engine_group
> fence = xe_exec_queue_last_fence_get_for_resume(q, q->vm);
> timeout = dma_fence_wait(fence, false);
> dma_fence_put(fence);
> + gt = q->gt;
>
> if (timeout < 0)
> return -ETIME;
> }
>
> + if (gt) {
> + xe_gt_stats_incr(gt,
> + XE_GT_STATS_ID_HW_ENGINE_GROUP_WAIT_DMA_QUEUE_US,
> + xe_hw_engine_group_stats_ktime_us_delta(start));
> + }
> +
> return 0;
> }
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 6/6] drm/xe: Add more GT stats around pagefault mode switch flows
2025-12-12 16:07 ` Francois Dugast
@ 2025-12-12 16:18 ` Matthew Brost
0 siblings, 0 replies; 17+ messages in thread
From: Matthew Brost @ 2025-12-12 16:18 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe, thomas.hellstrom, michal.mrozek
On Fri, Dec 12, 2025 at 05:07:53PM +0100, Francois Dugast wrote:
> On Thu, Dec 11, 2025 at 01:00:32PM -0800, Matthew Brost wrote:
> > Add GT stats to measure the time spent switching between pagefault mode
> > and dma-fence mode. Also add a GT stat to indicate when pagefault
> > suspend is skipped because the system is idle. These metrics will help
> > profile pagefault workloads while 3D and display are enabled.
> >
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_gt_stats.c | 6 +++++
> > drivers/gpu/drm/xe/xe_gt_stats_types.h | 3 +++
> > drivers/gpu/drm/xe/xe_hw_engine_group.c | 32 +++++++++++++++++++++++++
> > 3 files changed, 41 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_gt_stats.c b/drivers/gpu/drm/xe/xe_gt_stats.c
> > index 714045ad9354..fb2904bd0abd 100644
> > --- a/drivers/gpu/drm/xe/xe_gt_stats.c
> > +++ b/drivers/gpu/drm/xe/xe_gt_stats.c
> > @@ -68,8 +68,14 @@ static const char *const stat_description[__XE_GT_STATS_NUM_IDS] = {
> > DEF_STAT_STR(SVM_2M_BIND_US, "svm_2M_bind_us"),
> > DEF_STAT_STR(HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT,
> > "hw_engine_group_suspend_lr_queue_count"),
> > + DEF_STAT_STR(HW_ENGINE_GROUP_SKIP_LR_QUEUE_COUNT,
> > + "hw_engine_group_skip_lr_queue_count"),
> > DEF_STAT_STR(HW_ENGINE_GROUP_WAIT_DMA_QUEUE_COUNT,
> > "hw_engine_group_wait_dma_queue_count"),
> > + DEF_STAT_STR(HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_US,
> > + "hw_engine_group_suspend_lr_queue_us"),
> > + DEF_STAT_STR(HW_ENGINE_GROUP_WAIT_DMA_QUEUE_US,
> > + "hw_engine_group_wait_dma_queue_us"),
> > };
> >
> > /**
> > diff --git a/drivers/gpu/drm/xe/xe_gt_stats_types.h b/drivers/gpu/drm/xe/xe_gt_stats_types.h
> > index aada5df421e5..b92d013091d5 100644
> > --- a/drivers/gpu/drm/xe/xe_gt_stats_types.h
> > +++ b/drivers/gpu/drm/xe/xe_gt_stats_types.h
> > @@ -45,7 +45,10 @@ enum xe_gt_stats_id {
> > XE_GT_STATS_ID_SVM_64K_BIND_US,
> > XE_GT_STATS_ID_SVM_2M_BIND_US,
> > XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT,
> > + XE_GT_STATS_ID_HW_ENGINE_GROUP_SKIP_LR_QUEUE_COUNT,
> > XE_GT_STATS_ID_HW_ENGINE_GROUP_WAIT_DMA_QUEUE_COUNT,
> > + XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_US,
> > + XE_GT_STATS_ID_HW_ENGINE_GROUP_WAIT_DMA_QUEUE_US,
> > /* must be the last entry */
> > __XE_GT_STATS_NUM_IDS,
> > };
> > diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.c b/drivers/gpu/drm/xe/xe_hw_engine_group.c
> > index 35966889c776..8236fdee0901 100644
> > --- a/drivers/gpu/drm/xe/xe_hw_engine_group.c
> > +++ b/drivers/gpu/drm/xe/xe_hw_engine_group.c
> > @@ -14,6 +14,17 @@
> > #include "xe_sync.h"
> > #include "xe_vm.h"
> >
> > +static s64 xe_hw_engine_group_stats_ktime_us_delta(ktime_t start)
> > +{
> > + return IS_ENABLED(CONFIG_DEBUG_FS) ?
> > + ktime_us_delta(ktime_get(), start) : 0;
> > +}
> > +
> > +static ktime_t xe_hw_engine_group_stats_ktime_get(void)
> > +{
> > + return IS_ENABLED(CONFIG_DEBUG_FS) ? ktime_get() : 0;
> > +}
> > +
>
> As they are not domain-specific, we could move xe_svm_stats_ktime_get()
> and xe_svm_stats_ktime_us_delta() to xe_gt_stats.h and avoid duplication.
>
Yes, good idea.
Matt
> Francois
>
> > static void
> > hw_engine_group_resume_lr_jobs_func(struct work_struct *w)
> > {
> > @@ -200,7 +211,9 @@ static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group
> > {
> > int err, i;
> > struct xe_exec_queue *q;
> > + struct xe_gt *gt = NULL;
> > bool need_resume = false;
> > + ktime_t start = xe_hw_engine_group_stats_ktime_get();
> >
> > lockdep_assert_held_write(&group->mode_sem);
> >
> > @@ -213,6 +226,9 @@ static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group
> > xe_gt_stats_incr(q->gt, XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT, 1);
> >
> > idle_skip_suspend = xe_exec_queue_idle_skip_suspend(q);
> > + if (idle_skip_suspend)
> > + xe_gt_stats_incr(q->gt,
> > + XE_GT_STATS_ID_HW_ENGINE_GROUP_SKIP_LR_QUEUE_COUNT, 1);
> >
> > if (!need_resume && !idle_skip_suspend && num_syncs) {
> > for (i = 0; i < num_syncs; ++i)
> > @@ -221,6 +237,7 @@ static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group
> >
> > need_resume |= !idle_skip_suspend;
> > q->ops->suspend(q);
> > + gt = q->gt;
> > }
> >
> > list_for_each_entry(q, &group->exec_queue_list, hw_engine_group_link) {
> > @@ -232,6 +249,12 @@ static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group
> > return err;
> > }
> >
> > + if (gt) {
> > + xe_gt_stats_incr(gt,
> > + XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_US,
> > + xe_hw_engine_group_stats_ktime_us_delta(start));
> > + }
> > +
> > if (need_resume)
> > xe_hw_engine_group_resume_faulting_lr_jobs(group);
> >
> > @@ -252,7 +275,9 @@ static int xe_hw_engine_group_wait_for_dma_fence_jobs(struct xe_hw_engine_group
> > {
> > long timeout;
> > struct xe_exec_queue *q;
> > + struct xe_gt *gt = NULL;
> > struct dma_fence *fence;
> > + ktime_t start = xe_hw_engine_group_stats_ktime_get();
> >
> > lockdep_assert_held_write(&group->mode_sem);
> >
> > @@ -264,11 +289,18 @@ static int xe_hw_engine_group_wait_for_dma_fence_jobs(struct xe_hw_engine_group
> > fence = xe_exec_queue_last_fence_get_for_resume(q, q->vm);
> > timeout = dma_fence_wait(fence, false);
> > dma_fence_put(fence);
> > + gt = q->gt;
> >
> > if (timeout < 0)
> > return -ETIME;
> > }
> >
> > + if (gt) {
> > + xe_gt_stats_incr(gt,
> > + XE_GT_STATS_ID_HW_ENGINE_GROUP_WAIT_DMA_QUEUE_US,
> > + xe_hw_engine_group_stats_ktime_us_delta(start));
> > + }
> > +
> > return 0;
> > }
> >
> > --
> > 2.34.1
> >
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 5/6] drm/xe: Wait on in-syncs when swicthing to dma-fence mode
2025-12-12 9:22 ` Thomas Hellström
@ 2025-12-12 16:33 ` Matthew Brost
2025-12-12 16:38 ` Matthew Brost
2025-12-12 18:41 ` Thomas Hellström
0 siblings, 2 replies; 17+ messages in thread
From: Matthew Brost @ 2025-12-12 16:33 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-xe, francois.dugast, michal.mrozek
On Fri, Dec 12, 2025 at 10:22:54AM +0100, Thomas Hellström wrote:
> On Thu, 2025-12-11 at 13:00 -0800, Matthew Brost wrote:
> > If a dma-fence submission has in-fences and pagefault queues are
> > running
> > work, there is little incentive to kick the pagefault queues off the
> > hardware until the dma-fence submission is ready to run. Therefore,
> > wait
> > on the in-fences of the dma-fence submission before removing the
> > pagefault queues from the hardware.
> >
> > Suggested-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_exec.c | 3 ++-
> > drivers/gpu/drm/xe/xe_hw_engine_group.c | 34 +++++++++++++++++++----
> > --
> > drivers/gpu/drm/xe/xe_hw_engine_group.h | 4 ++-
> > drivers/gpu/drm/xe/xe_sync.c | 14 ++++++++++
> > drivers/gpu/drm/xe/xe_sync.h | 1 +
> > 5 files changed, 46 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_exec.c
> > b/drivers/gpu/drm/xe/xe_exec.c
> > index 4d81210e41f5..5bc598ba6afa 100644
> > --- a/drivers/gpu/drm/xe/xe_exec.c
> > +++ b/drivers/gpu/drm/xe/xe_exec.c
> > @@ -202,7 +202,8 @@ int xe_exec_ioctl(struct drm_device *dev, void
> > *data, struct drm_file *file)
> > mode = xe_hw_engine_group_find_exec_mode(q);
> >
> > if (mode == EXEC_MODE_DMA_FENCE) {
> > - err = xe_hw_engine_group_get_mode(group, mode,
> > &previous_mode);
> > + err = xe_hw_engine_group_get_mode(group, mode,
> > &previous_mode,
> > + syncs, num_syncs);
> > if (err)
> > goto err_syncs;
> > }
> > diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.c
> > b/drivers/gpu/drm/xe/xe_hw_engine_group.c
> > index 4d9263a1a208..35966889c776 100644
> > --- a/drivers/gpu/drm/xe/xe_hw_engine_group.c
> > +++ b/drivers/gpu/drm/xe/xe_hw_engine_group.c
> > @@ -11,6 +11,7 @@
> > #include "xe_gt.h"
> > #include "xe_gt_stats.h"
> > #include "xe_hw_engine_group.h"
> > +#include "xe_sync.h"
> > #include "xe_vm.h"
> >
> > static void
> > @@ -21,7 +22,8 @@ hw_engine_group_resume_lr_jobs_func(struct
> > work_struct *w)
> > int err;
> > enum xe_hw_engine_group_execution_mode previous_mode;
> >
> > - err = xe_hw_engine_group_get_mode(group, EXEC_MODE_LR,
> > &previous_mode);
> > + err = xe_hw_engine_group_get_mode(group, EXEC_MODE_LR,
> > &previous_mode,
> > + NULL, 0);
> > if (err)
> > return;
> >
> > @@ -192,20 +194,32 @@ void
> > xe_hw_engine_group_resume_faulting_lr_jobs(struct xe_hw_engine_group
> > *group
> > *
> > * Return: 0 on success, negative error code on error.
> > */
> > -static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct
> > xe_hw_engine_group *group)
> > +static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct
> > xe_hw_engine_group *group,
> > + struct
> > xe_sync_entry *syncs,
> > + int
> > num_syncs)
> > {
> > - int err;
> > + int err, i;
> > struct xe_exec_queue *q;
> > bool need_resume = false;
> >
> > lockdep_assert_held_write(&group->mode_sem);
> >
> > list_for_each_entry(q, &group->exec_queue_list,
> > hw_engine_group_link) {
> > + bool idle_skip_suspend;
> > +
> > if (!xe_vm_in_fault_mode(q->vm))
> > continue;
> >
> > xe_gt_stats_incr(q->gt,
> > XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT, 1);
> > - need_resume |= !xe_exec_queue_idle_skip_suspend(q);
> > +
> > + idle_skip_suspend =
> > xe_exec_queue_idle_skip_suspend(q);
> > +
> > + if (!need_resume && !idle_skip_suspend && num_syncs)
> > {
> > + for (i = 0; i < num_syncs; ++i)
> > + xe_sync_entry_wait(syncs + i);
>
> Here we're in the write-locked mode, right? Ideally I think we should
> just check for idle here and return a retry if not idle, and wait
> outside of the locks. Perhaps also always wait if there are pf jobs
I think waiting outside the lock would be okay. Let me try that. I also
forgot that xe_sync_entry_wait needs to be interruptible too.
> running on the engine group. Also we might want to include the other
> implicit dependencies as well, like kernel fences.
>
> Although perhaps this is good enough for now, and this would be easier
> implemented with a scheduler?
>
I think we could reimplement the entire sharing algorithm via the
scheduler.
It would be roughly:
- Switching to PF mode is a job that waits for all pending dma-fences.
- dma-fence jobs wait on a job that flips to dma-fence mode. The
dependencies for the flip job are the input fences of the dma-fence job
triggering the flip, plus a possible outstanding flip-to-PF-mode job.
However, if the flip jobs are scheduled on the same scheduler instance,
we wouldn’t need explicit dependencies between the two types of flips.
This is a fairly large rework, and the likelihood of me personally
having the bandwidth to implement this in the near future is low. Of
course, if you want to take this on, I can provide guidance on the
refactor.
So for now, let’s tweak things to something we can live with and perhaps
write down plans for a long-term refactor.
Matt
> /Thomas
>
>
> > + }
> > +
> > + need_resume |= !idle_skip_suspend;
> > q->ops->suspend(q);
> > }
> >
> > @@ -258,7 +272,8 @@ static int
> > xe_hw_engine_group_wait_for_dma_fence_jobs(struct xe_hw_engine_group
> > return 0;
> > }
> >
> > -static int switch_mode(struct xe_hw_engine_group *group)
> > +static int switch_mode(struct xe_hw_engine_group *group,
> > + struct xe_sync_entry *syncs, int num_syncs)
> > {
> > int err = 0;
> > enum xe_hw_engine_group_execution_mode new_mode;
> > @@ -268,7 +283,9 @@ static int switch_mode(struct xe_hw_engine_group
> > *group)
> > switch (group->cur_mode) {
> > case EXEC_MODE_LR:
> > new_mode = EXEC_MODE_DMA_FENCE;
> > - err =
> > xe_hw_engine_group_suspend_faulting_lr_jobs(group);
> > + err =
> > xe_hw_engine_group_suspend_faulting_lr_jobs(group,
> > +
> > syncs,
> > +
> > num_syncs);
> > break;
> > case EXEC_MODE_DMA_FENCE:
> > new_mode = EXEC_MODE_LR;
> > @@ -294,7 +311,8 @@ static int switch_mode(struct xe_hw_engine_group
> > *group)
> > */
> > int xe_hw_engine_group_get_mode(struct xe_hw_engine_group *group,
> > enum
> > xe_hw_engine_group_execution_mode new_mode,
> > - enum
> > xe_hw_engine_group_execution_mode *previous_mode)
> > + enum
> > xe_hw_engine_group_execution_mode *previous_mode,
> > + struct xe_sync_entry *syncs, int
> > num_syncs)
> > __acquires(&group->mode_sem)
> > {
> > int err = down_read_interruptible(&group->mode_sem);
> > @@ -311,7 +329,7 @@ __acquires(&group->mode_sem)
> > return err;
> >
> > if (new_mode != group->cur_mode) {
> > - err = switch_mode(group);
> > + err = switch_mode(group, syncs, num_syncs);
> > if (err) {
> > up_write(&group->mode_sem);
> > return err;
> > diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.h
> > b/drivers/gpu/drm/xe/xe_hw_engine_group.h
> > index 797ee81acbf2..8b17ccd30b70 100644
> > --- a/drivers/gpu/drm/xe/xe_hw_engine_group.h
> > +++ b/drivers/gpu/drm/xe/xe_hw_engine_group.h
> > @@ -11,6 +11,7 @@
> > struct drm_device;
> > struct xe_exec_queue;
> > struct xe_gt;
> > +struct xe_sync_entry;
> >
> > int xe_hw_engine_setup_groups(struct xe_gt *gt);
> >
> > @@ -19,7 +20,8 @@ void xe_hw_engine_group_del_exec_queue(struct
> > xe_hw_engine_group *group, struct
> >
> > int xe_hw_engine_group_get_mode(struct xe_hw_engine_group *group,
> > enum
> > xe_hw_engine_group_execution_mode new_mode,
> > - enum
> > xe_hw_engine_group_execution_mode *previous_mode);
> > + enum
> > xe_hw_engine_group_execution_mode *previous_mode,
> > + struct xe_sync_entry *syncs, int
> > num_syncs);
> > void xe_hw_engine_group_put(struct xe_hw_engine_group *group);
> >
> > enum xe_hw_engine_group_execution_mode
> > diff --git a/drivers/gpu/drm/xe/xe_sync.c
> > b/drivers/gpu/drm/xe/xe_sync.c
> > index 1fc4fa278b78..127e26129933 100644
> > --- a/drivers/gpu/drm/xe/xe_sync.c
> > +++ b/drivers/gpu/drm/xe/xe_sync.c
> > @@ -228,6 +228,20 @@ int xe_sync_entry_add_deps(struct xe_sync_entry
> > *sync, struct xe_sched_job *job)
> > return 0;
> > }
> >
> > +/**
> > + * xe_sync_entry_wait() - Wait on in-sync
> > + * @sync: Sync object
> > + *
> > + * If the sync is in an in-sync, wait on the sync to signal.
> > + */
> > +void xe_sync_entry_wait(struct xe_sync_entry *sync)
> > +{
> > + if (sync->flags & DRM_XE_SYNC_FLAG_SIGNAL)
> > + return;
> > +
> > + dma_fence_wait(sync->fence, false);
> > +}
> > +
> > void xe_sync_entry_signal(struct xe_sync_entry *sync, struct
> > dma_fence *fence)
> > {
> > if (!(sync->flags & DRM_XE_SYNC_FLAG_SIGNAL))
> > diff --git a/drivers/gpu/drm/xe/xe_sync.h
> > b/drivers/gpu/drm/xe/xe_sync.h
> > index 51f2d803e977..1c08f9ed9001 100644
> > --- a/drivers/gpu/drm/xe/xe_sync.h
> > +++ b/drivers/gpu/drm/xe/xe_sync.h
> > @@ -29,6 +29,7 @@ int xe_sync_entry_add_deps(struct xe_sync_entry
> > *sync,
> > struct xe_sched_job *job);
> > void xe_sync_entry_signal(struct xe_sync_entry *sync,
> > struct dma_fence *fence);
> > +void xe_sync_entry_wait(struct xe_sync_entry *sync);
> > void xe_sync_entry_cleanup(struct xe_sync_entry *sync);
> > struct dma_fence *
> > xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync,
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 5/6] drm/xe: Wait on in-syncs when swicthing to dma-fence mode
2025-12-12 16:33 ` Matthew Brost
@ 2025-12-12 16:38 ` Matthew Brost
2025-12-12 18:41 ` Thomas Hellström
1 sibling, 0 replies; 17+ messages in thread
From: Matthew Brost @ 2025-12-12 16:38 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-xe, francois.dugast, michal.mrozek
On Fri, Dec 12, 2025 at 08:33:04AM -0800, Matthew Brost wrote:
> On Fri, Dec 12, 2025 at 10:22:54AM +0100, Thomas Hellström wrote:
> > On Thu, 2025-12-11 at 13:00 -0800, Matthew Brost wrote:
> > > If a dma-fence submission has in-fences and pagefault queues are
> > > running
> > > work, there is little incentive to kick the pagefault queues off the
> > > hardware until the dma-fence submission is ready to run. Therefore,
> > > wait
> > > on the in-fences of the dma-fence submission before removing the
> > > pagefault queues from the hardware.
> > >
> > > Suggested-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> > > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > > ---
> > > drivers/gpu/drm/xe/xe_exec.c | 3 ++-
> > > drivers/gpu/drm/xe/xe_hw_engine_group.c | 34 +++++++++++++++++++----
> > > --
> > > drivers/gpu/drm/xe/xe_hw_engine_group.h | 4 ++-
> > > drivers/gpu/drm/xe/xe_sync.c | 14 ++++++++++
> > > drivers/gpu/drm/xe/xe_sync.h | 1 +
> > > 5 files changed, 46 insertions(+), 10 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_exec.c
> > > b/drivers/gpu/drm/xe/xe_exec.c
> > > index 4d81210e41f5..5bc598ba6afa 100644
> > > --- a/drivers/gpu/drm/xe/xe_exec.c
> > > +++ b/drivers/gpu/drm/xe/xe_exec.c
> > > @@ -202,7 +202,8 @@ int xe_exec_ioctl(struct drm_device *dev, void
> > > *data, struct drm_file *file)
> > > mode = xe_hw_engine_group_find_exec_mode(q);
> > >
> > > if (mode == EXEC_MODE_DMA_FENCE) {
> > > - err = xe_hw_engine_group_get_mode(group, mode,
> > > &previous_mode);
> > > + err = xe_hw_engine_group_get_mode(group, mode,
> > > &previous_mode,
> > > + syncs, num_syncs);
> > > if (err)
> > > goto err_syncs;
> > > }
> > > diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.c
> > > b/drivers/gpu/drm/xe/xe_hw_engine_group.c
> > > index 4d9263a1a208..35966889c776 100644
> > > --- a/drivers/gpu/drm/xe/xe_hw_engine_group.c
> > > +++ b/drivers/gpu/drm/xe/xe_hw_engine_group.c
> > > @@ -11,6 +11,7 @@
> > > #include "xe_gt.h"
> > > #include "xe_gt_stats.h"
> > > #include "xe_hw_engine_group.h"
> > > +#include "xe_sync.h"
> > > #include "xe_vm.h"
> > >
> > > static void
> > > @@ -21,7 +22,8 @@ hw_engine_group_resume_lr_jobs_func(struct
> > > work_struct *w)
> > > int err;
> > > enum xe_hw_engine_group_execution_mode previous_mode;
> > >
> > > - err = xe_hw_engine_group_get_mode(group, EXEC_MODE_LR,
> > > &previous_mode);
> > > + err = xe_hw_engine_group_get_mode(group, EXEC_MODE_LR,
> > > &previous_mode,
> > > + NULL, 0);
> > > if (err)
> > > return;
> > >
> > > @@ -192,20 +194,32 @@ void
> > > xe_hw_engine_group_resume_faulting_lr_jobs(struct xe_hw_engine_group
> > > *group
> > > *
> > > * Return: 0 on success, negative error code on error.
> > > */
> > > -static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct
> > > xe_hw_engine_group *group)
> > > +static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct
> > > xe_hw_engine_group *group,
> > > + struct
> > > xe_sync_entry *syncs,
> > > + int
> > > num_syncs)
> > > {
> > > - int err;
> > > + int err, i;
> > > struct xe_exec_queue *q;
> > > bool need_resume = false;
> > >
> > > lockdep_assert_held_write(&group->mode_sem);
> > >
> > > list_for_each_entry(q, &group->exec_queue_list,
> > > hw_engine_group_link) {
> > > + bool idle_skip_suspend;
> > > +
> > > if (!xe_vm_in_fault_mode(q->vm))
> > > continue;
> > >
> > > xe_gt_stats_incr(q->gt,
> > > XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT, 1);
> > > - need_resume |= !xe_exec_queue_idle_skip_suspend(q);
> > > +
> > > + idle_skip_suspend =
> > > xe_exec_queue_idle_skip_suspend(q);
> > > +
> > > + if (!need_resume && !idle_skip_suspend && num_syncs)
> > > {
> > > + for (i = 0; i < num_syncs; ++i)
> > > + xe_sync_entry_wait(syncs + i);
> >
> > Here we're in the write-locked mode, right? Ideally I think we should
> > just check for idle here and return a retry if not idle, and wait
> > outside of the locks. Perhaps also always wait if there are pf jobs
>
> I think waiting outside the lock would be okay. Let me try that. I also
> forgot that xe_sync_entry_wait needs to be interruptible too.
>
> > running on the engine group. Also we might want to include the other
> > implicit dependencies as well, like kernel fences.
> >
> > Although perhaps this is good enough for now, and this would be easier
> > implemented with a scheduler?
> >
>
> I think we could reimplement the entire sharing algorithm via the
> scheduler.
>
> It would be roughly:
>
> - Switching to PF mode is a job that waits for all pending dma-fences.
Typo: s/that waits for all pending dma-fences/whose dependencies are all outstanding DMA fences
Matt
>
> - dma-fence jobs wait on a job that flips to dma-fence mode. The
> dependencies for the flip job are the input fences of the dma-fence job
> triggering the flip, plus a possible outstanding flip-to-PF-mode job.
> However, if the flip jobs are scheduled on the same scheduler instance,
> we wouldn’t need explicit dependencies between the two types of flips.
>
> This is a fairly large rework, and the likelihood of me personally
> having the bandwidth to implement this in the near future is low. Of
> course, if you want to take this on, I can provide guidance on the
> refactor.
>
> So for now, let’s tweak things to something we can live with and perhaps
> write down plans for a long-term refactor.
>
> Matt
>
> > /Thomas
> >
> >
> > > + }
> > > +
> > > + need_resume |= !idle_skip_suspend;
> > > q->ops->suspend(q);
> > > }
> > >
> > > @@ -258,7 +272,8 @@ static int
> > > xe_hw_engine_group_wait_for_dma_fence_jobs(struct xe_hw_engine_group
> > > return 0;
> > > }
> > >
> > > -static int switch_mode(struct xe_hw_engine_group *group)
> > > +static int switch_mode(struct xe_hw_engine_group *group,
> > > + struct xe_sync_entry *syncs, int num_syncs)
> > > {
> > > int err = 0;
> > > enum xe_hw_engine_group_execution_mode new_mode;
> > > @@ -268,7 +283,9 @@ static int switch_mode(struct xe_hw_engine_group
> > > *group)
> > > switch (group->cur_mode) {
> > > case EXEC_MODE_LR:
> > > new_mode = EXEC_MODE_DMA_FENCE;
> > > - err =
> > > xe_hw_engine_group_suspend_faulting_lr_jobs(group);
> > > + err =
> > > xe_hw_engine_group_suspend_faulting_lr_jobs(group,
> > > +
> > > syncs,
> > > +
> > > num_syncs);
> > > break;
> > > case EXEC_MODE_DMA_FENCE:
> > > new_mode = EXEC_MODE_LR;
> > > @@ -294,7 +311,8 @@ static int switch_mode(struct xe_hw_engine_group
> > > *group)
> > > */
> > > int xe_hw_engine_group_get_mode(struct xe_hw_engine_group *group,
> > > enum
> > > xe_hw_engine_group_execution_mode new_mode,
> > > - enum
> > > xe_hw_engine_group_execution_mode *previous_mode)
> > > + enum
> > > xe_hw_engine_group_execution_mode *previous_mode,
> > > + struct xe_sync_entry *syncs, int
> > > num_syncs)
> > > __acquires(&group->mode_sem)
> > > {
> > > int err = down_read_interruptible(&group->mode_sem);
> > > @@ -311,7 +329,7 @@ __acquires(&group->mode_sem)
> > > return err;
> > >
> > > if (new_mode != group->cur_mode) {
> > > - err = switch_mode(group);
> > > + err = switch_mode(group, syncs, num_syncs);
> > > if (err) {
> > > up_write(&group->mode_sem);
> > > return err;
> > > diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.h
> > > b/drivers/gpu/drm/xe/xe_hw_engine_group.h
> > > index 797ee81acbf2..8b17ccd30b70 100644
> > > --- a/drivers/gpu/drm/xe/xe_hw_engine_group.h
> > > +++ b/drivers/gpu/drm/xe/xe_hw_engine_group.h
> > > @@ -11,6 +11,7 @@
> > > struct drm_device;
> > > struct xe_exec_queue;
> > > struct xe_gt;
> > > +struct xe_sync_entry;
> > >
> > > int xe_hw_engine_setup_groups(struct xe_gt *gt);
> > >
> > > @@ -19,7 +20,8 @@ void xe_hw_engine_group_del_exec_queue(struct
> > > xe_hw_engine_group *group, struct
> > >
> > > int xe_hw_engine_group_get_mode(struct xe_hw_engine_group *group,
> > > enum
> > > xe_hw_engine_group_execution_mode new_mode,
> > > - enum
> > > xe_hw_engine_group_execution_mode *previous_mode);
> > > + enum
> > > xe_hw_engine_group_execution_mode *previous_mode,
> > > + struct xe_sync_entry *syncs, int
> > > num_syncs);
> > > void xe_hw_engine_group_put(struct xe_hw_engine_group *group);
> > >
> > > enum xe_hw_engine_group_execution_mode
> > > diff --git a/drivers/gpu/drm/xe/xe_sync.c
> > > b/drivers/gpu/drm/xe/xe_sync.c
> > > index 1fc4fa278b78..127e26129933 100644
> > > --- a/drivers/gpu/drm/xe/xe_sync.c
> > > +++ b/drivers/gpu/drm/xe/xe_sync.c
> > > @@ -228,6 +228,20 @@ int xe_sync_entry_add_deps(struct xe_sync_entry
> > > *sync, struct xe_sched_job *job)
> > > return 0;
> > > }
> > >
> > > +/**
> > > + * xe_sync_entry_wait() - Wait on in-sync
> > > + * @sync: Sync object
> > > + *
> > > + * If the sync is in an in-sync, wait on the sync to signal.
> > > + */
> > > +void xe_sync_entry_wait(struct xe_sync_entry *sync)
> > > +{
> > > + if (sync->flags & DRM_XE_SYNC_FLAG_SIGNAL)
> > > + return;
> > > +
> > > + dma_fence_wait(sync->fence, false);
> > > +}
> > > +
> > > void xe_sync_entry_signal(struct xe_sync_entry *sync, struct
> > > dma_fence *fence)
> > > {
> > > if (!(sync->flags & DRM_XE_SYNC_FLAG_SIGNAL))
> > > diff --git a/drivers/gpu/drm/xe/xe_sync.h
> > > b/drivers/gpu/drm/xe/xe_sync.h
> > > index 51f2d803e977..1c08f9ed9001 100644
> > > --- a/drivers/gpu/drm/xe/xe_sync.h
> > > +++ b/drivers/gpu/drm/xe/xe_sync.h
> > > @@ -29,6 +29,7 @@ int xe_sync_entry_add_deps(struct xe_sync_entry
> > > *sync,
> > > struct xe_sched_job *job);
> > > void xe_sync_entry_signal(struct xe_sync_entry *sync,
> > > struct dma_fence *fence);
> > > +void xe_sync_entry_wait(struct xe_sync_entry *sync);
> > > void xe_sync_entry_cleanup(struct xe_sync_entry *sync);
> > > struct dma_fence *
> > > xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync,
> >
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 5/6] drm/xe: Wait on in-syncs when swicthing to dma-fence mode
2025-12-12 16:33 ` Matthew Brost
2025-12-12 16:38 ` Matthew Brost
@ 2025-12-12 18:41 ` Thomas Hellström
2025-12-12 20:20 ` Matthew Brost
1 sibling, 1 reply; 17+ messages in thread
From: Thomas Hellström @ 2025-12-12 18:41 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe, francois.dugast, michal.mrozek
On 12/12/25 17:33, Matthew Brost wrote:
> On Fri, Dec 12, 2025 at 10:22:54AM +0100, Thomas Hellström wrote:
>> On Thu, 2025-12-11 at 13:00 -0800, Matthew Brost wrote:
>>> If a dma-fence submission has in-fences and pagefault queues are
>>> running
>>> work, there is little incentive to kick the pagefault queues off the
>>> hardware until the dma-fence submission is ready to run. Therefore,
>>> wait
>>> on the in-fences of the dma-fence submission before removing the
>>> pagefault queues from the hardware.
>>>
>>> Suggested-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>>> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
>>> ---
>>> drivers/gpu/drm/xe/xe_exec.c | 3 ++-
>>> drivers/gpu/drm/xe/xe_hw_engine_group.c | 34 +++++++++++++++++++----
>>> --
>>> drivers/gpu/drm/xe/xe_hw_engine_group.h | 4 ++-
>>> drivers/gpu/drm/xe/xe_sync.c | 14 ++++++++++
>>> drivers/gpu/drm/xe/xe_sync.h | 1 +
>>> 5 files changed, 46 insertions(+), 10 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/xe/xe_exec.c
>>> b/drivers/gpu/drm/xe/xe_exec.c
>>> index 4d81210e41f5..5bc598ba6afa 100644
>>> --- a/drivers/gpu/drm/xe/xe_exec.c
>>> +++ b/drivers/gpu/drm/xe/xe_exec.c
>>> @@ -202,7 +202,8 @@ int xe_exec_ioctl(struct drm_device *dev, void
>>> *data, struct drm_file *file)
>>> mode = xe_hw_engine_group_find_exec_mode(q);
>>>
>>> if (mode == EXEC_MODE_DMA_FENCE) {
>>> - err = xe_hw_engine_group_get_mode(group, mode,
>>> &previous_mode);
>>> + err = xe_hw_engine_group_get_mode(group, mode,
>>> &previous_mode,
>>> + syncs, num_syncs);
>>> if (err)
>>> goto err_syncs;
>>> }
>>> diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.c
>>> b/drivers/gpu/drm/xe/xe_hw_engine_group.c
>>> index 4d9263a1a208..35966889c776 100644
>>> --- a/drivers/gpu/drm/xe/xe_hw_engine_group.c
>>> +++ b/drivers/gpu/drm/xe/xe_hw_engine_group.c
>>> @@ -11,6 +11,7 @@
>>> #include "xe_gt.h"
>>> #include "xe_gt_stats.h"
>>> #include "xe_hw_engine_group.h"
>>> +#include "xe_sync.h"
>>> #include "xe_vm.h"
>>>
>>> static void
>>> @@ -21,7 +22,8 @@ hw_engine_group_resume_lr_jobs_func(struct
>>> work_struct *w)
>>> int err;
>>> enum xe_hw_engine_group_execution_mode previous_mode;
>>>
>>> - err = xe_hw_engine_group_get_mode(group, EXEC_MODE_LR,
>>> &previous_mode);
>>> + err = xe_hw_engine_group_get_mode(group, EXEC_MODE_LR,
>>> &previous_mode,
>>> + NULL, 0);
>>> if (err)
>>> return;
>>>
>>> @@ -192,20 +194,32 @@ void
>>> xe_hw_engine_group_resume_faulting_lr_jobs(struct xe_hw_engine_group
>>> *group
>>> *
>>> * Return: 0 on success, negative error code on error.
>>> */
>>> -static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct
>>> xe_hw_engine_group *group)
>>> +static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct
>>> xe_hw_engine_group *group,
>>> + struct
>>> xe_sync_entry *syncs,
>>> + int
>>> num_syncs)
>>> {
>>> - int err;
>>> + int err, i;
>>> struct xe_exec_queue *q;
>>> bool need_resume = false;
>>>
>>> lockdep_assert_held_write(&group->mode_sem);
>>>
>>> list_for_each_entry(q, &group->exec_queue_list,
>>> hw_engine_group_link) {
>>> + bool idle_skip_suspend;
>>> +
>>> if (!xe_vm_in_fault_mode(q->vm))
>>> continue;
>>>
>>> xe_gt_stats_incr(q->gt,
>>> XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT, 1);
>>> - need_resume |= !xe_exec_queue_idle_skip_suspend(q);
>>> +
>>> + idle_skip_suspend =
>>> xe_exec_queue_idle_skip_suspend(q);
>>> +
>>> + if (!need_resume && !idle_skip_suspend && num_syncs)
>>> {
>>> + for (i = 0; i < num_syncs; ++i)
>>> + xe_sync_entry_wait(syncs + i);
>> Here we're in the write-locked mode, right? Ideally I think we should
>> just check for idle here and return a retry if not idle, and wait
>> outside of the locks. Perhaps also always wait if there are pf jobs
> I think waiting outside the lock would be okay. Let me try that. I also
> forgot that xe_sync_entry_wait needs to be interruptible too.
>
>> running on the engine group. Also we might want to include the other
>> implicit dependencies as well, like kernel fences.
>>
>> Although perhaps this is good enough for now, and this would be easier
>> implemented with a scheduler?
>>
This is pretty much exactly what I had in mind as well. I started to
doubt, though, if the drm scheduler would be a good fit since the
dma-fence jobs wouldn't necessarily be ordered, since they wouldn't have
published their out-fences when in this "pre-scheduler". Also Joonas has
mentioned at one point that pre-scheduling (like we already do, but this
would be a more sophisticated version of) was disapproved by some arch
or perhaps upstream decision at some historical point. We should find
out exactly what that was all about before proceeding with this.
> This is a fairly large rework, and the likelihood of me personally
> having the bandwidth to implement this in the near future is low. Of
> course, if you want to take this on, I can provide guidance on the
> refactor.
My bandwidth for this is also zero ATM and up to end of January at least.
> So for now, let’s tweak things to something we can live with and perhaps
> write down plans for a long-term refactor.
Fully agree.
I think our backlog of nice cleanups and improvements like this is
starting to grow so it would be good to have them documented in jiras
and perhaps at a list which we can prioritze and have someone pick up
when there is bandwidth.
Thanks,
Thomas
>
> Matt
>
>> /Thomas
>>
>>
>>> + }
>>> +
>>> + need_resume |= !idle_skip_suspend;
>>> q->ops->suspend(q);
>>> }
>>>
>>> @@ -258,7 +272,8 @@ static int
>>> xe_hw_engine_group_wait_for_dma_fence_jobs(struct xe_hw_engine_group
>>> return 0;
>>> }
>>>
>>> -static int switch_mode(struct xe_hw_engine_group *group)
>>> +static int switch_mode(struct xe_hw_engine_group *group,
>>> + struct xe_sync_entry *syncs, int num_syncs)
>>> {
>>> int err = 0;
>>> enum xe_hw_engine_group_execution_mode new_mode;
>>> @@ -268,7 +283,9 @@ static int switch_mode(struct xe_hw_engine_group
>>> *group)
>>> switch (group->cur_mode) {
>>> case EXEC_MODE_LR:
>>> new_mode = EXEC_MODE_DMA_FENCE;
>>> - err =
>>> xe_hw_engine_group_suspend_faulting_lr_jobs(group);
>>> + err =
>>> xe_hw_engine_group_suspend_faulting_lr_jobs(group,
>>> +
>>> syncs,
>>> +
>>> num_syncs);
>>> break;
>>> case EXEC_MODE_DMA_FENCE:
>>> new_mode = EXEC_MODE_LR;
>>> @@ -294,7 +311,8 @@ static int switch_mode(struct xe_hw_engine_group
>>> *group)
>>> */
>>> int xe_hw_engine_group_get_mode(struct xe_hw_engine_group *group,
>>> enum
>>> xe_hw_engine_group_execution_mode new_mode,
>>> - enum
>>> xe_hw_engine_group_execution_mode *previous_mode)
>>> + enum
>>> xe_hw_engine_group_execution_mode *previous_mode,
>>> + struct xe_sync_entry *syncs, int
>>> num_syncs)
>>> __acquires(&group->mode_sem)
>>> {
>>> int err = down_read_interruptible(&group->mode_sem);
>>> @@ -311,7 +329,7 @@ __acquires(&group->mode_sem)
>>> return err;
>>>
>>> if (new_mode != group->cur_mode) {
>>> - err = switch_mode(group);
>>> + err = switch_mode(group, syncs, num_syncs);
>>> if (err) {
>>> up_write(&group->mode_sem);
>>> return err;
>>> diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.h
>>> b/drivers/gpu/drm/xe/xe_hw_engine_group.h
>>> index 797ee81acbf2..8b17ccd30b70 100644
>>> --- a/drivers/gpu/drm/xe/xe_hw_engine_group.h
>>> +++ b/drivers/gpu/drm/xe/xe_hw_engine_group.h
>>> @@ -11,6 +11,7 @@
>>> struct drm_device;
>>> struct xe_exec_queue;
>>> struct xe_gt;
>>> +struct xe_sync_entry;
>>>
>>> int xe_hw_engine_setup_groups(struct xe_gt *gt);
>>>
>>> @@ -19,7 +20,8 @@ void xe_hw_engine_group_del_exec_queue(struct
>>> xe_hw_engine_group *group, struct
>>>
>>> int xe_hw_engine_group_get_mode(struct xe_hw_engine_group *group,
>>> enum
>>> xe_hw_engine_group_execution_mode new_mode,
>>> - enum
>>> xe_hw_engine_group_execution_mode *previous_mode);
>>> + enum
>>> xe_hw_engine_group_execution_mode *previous_mode,
>>> + struct xe_sync_entry *syncs, int
>>> num_syncs);
>>> void xe_hw_engine_group_put(struct xe_hw_engine_group *group);
>>>
>>> enum xe_hw_engine_group_execution_mode
>>> diff --git a/drivers/gpu/drm/xe/xe_sync.c
>>> b/drivers/gpu/drm/xe/xe_sync.c
>>> index 1fc4fa278b78..127e26129933 100644
>>> --- a/drivers/gpu/drm/xe/xe_sync.c
>>> +++ b/drivers/gpu/drm/xe/xe_sync.c
>>> @@ -228,6 +228,20 @@ int xe_sync_entry_add_deps(struct xe_sync_entry
>>> *sync, struct xe_sched_job *job)
>>> return 0;
>>> }
>>>
>>> +/**
>>> + * xe_sync_entry_wait() - Wait on in-sync
>>> + * @sync: Sync object
>>> + *
>>> + * If the sync is in an in-sync, wait on the sync to signal.
>>> + */
>>> +void xe_sync_entry_wait(struct xe_sync_entry *sync)
>>> +{
>>> + if (sync->flags & DRM_XE_SYNC_FLAG_SIGNAL)
>>> + return;
>>> +
>>> + dma_fence_wait(sync->fence, false);
>>> +}
>>> +
>>> void xe_sync_entry_signal(struct xe_sync_entry *sync, struct
>>> dma_fence *fence)
>>> {
>>> if (!(sync->flags & DRM_XE_SYNC_FLAG_SIGNAL))
>>> diff --git a/drivers/gpu/drm/xe/xe_sync.h
>>> b/drivers/gpu/drm/xe/xe_sync.h
>>> index 51f2d803e977..1c08f9ed9001 100644
>>> --- a/drivers/gpu/drm/xe/xe_sync.h
>>> +++ b/drivers/gpu/drm/xe/xe_sync.h
>>> @@ -29,6 +29,7 @@ int xe_sync_entry_add_deps(struct xe_sync_entry
>>> *sync,
>>> struct xe_sched_job *job);
>>> void xe_sync_entry_signal(struct xe_sync_entry *sync,
>>> struct dma_fence *fence);
>>> +void xe_sync_entry_wait(struct xe_sync_entry *sync);
>>> void xe_sync_entry_cleanup(struct xe_sync_entry *sync);
>>> struct dma_fence *
>>> xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync,
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 5/6] drm/xe: Wait on in-syncs when swicthing to dma-fence mode
2025-12-12 18:41 ` Thomas Hellström
@ 2025-12-12 20:20 ` Matthew Brost
0 siblings, 0 replies; 17+ messages in thread
From: Matthew Brost @ 2025-12-12 20:20 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-xe, francois.dugast, michal.mrozek
On Fri, Dec 12, 2025 at 07:41:35PM +0100, Thomas Hellström wrote:
>
> On 12/12/25 17:33, Matthew Brost wrote:
> > On Fri, Dec 12, 2025 at 10:22:54AM +0100, Thomas Hellström wrote:
> > > On Thu, 2025-12-11 at 13:00 -0800, Matthew Brost wrote:
> > > > If a dma-fence submission has in-fences and pagefault queues are
> > > > running
> > > > work, there is little incentive to kick the pagefault queues off the
> > > > hardware until the dma-fence submission is ready to run. Therefore,
> > > > wait
> > > > on the in-fences of the dma-fence submission before removing the
> > > > pagefault queues from the hardware.
> > > >
> > > > Suggested-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> > > > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > > > ---
> > > > drivers/gpu/drm/xe/xe_exec.c | 3 ++-
> > > > drivers/gpu/drm/xe/xe_hw_engine_group.c | 34 +++++++++++++++++++----
> > > > --
> > > > drivers/gpu/drm/xe/xe_hw_engine_group.h | 4 ++-
> > > > drivers/gpu/drm/xe/xe_sync.c | 14 ++++++++++
> > > > drivers/gpu/drm/xe/xe_sync.h | 1 +
> > > > 5 files changed, 46 insertions(+), 10 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/xe/xe_exec.c
> > > > b/drivers/gpu/drm/xe/xe_exec.c
> > > > index 4d81210e41f5..5bc598ba6afa 100644
> > > > --- a/drivers/gpu/drm/xe/xe_exec.c
> > > > +++ b/drivers/gpu/drm/xe/xe_exec.c
> > > > @@ -202,7 +202,8 @@ int xe_exec_ioctl(struct drm_device *dev, void
> > > > *data, struct drm_file *file)
> > > > mode = xe_hw_engine_group_find_exec_mode(q);
> > > > if (mode == EXEC_MODE_DMA_FENCE) {
> > > > - err = xe_hw_engine_group_get_mode(group, mode,
> > > > &previous_mode);
> > > > + err = xe_hw_engine_group_get_mode(group, mode,
> > > > &previous_mode,
> > > > + syncs, num_syncs);
> > > > if (err)
> > > > goto err_syncs;
> > > > }
> > > > diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.c
> > > > b/drivers/gpu/drm/xe/xe_hw_engine_group.c
> > > > index 4d9263a1a208..35966889c776 100644
> > > > --- a/drivers/gpu/drm/xe/xe_hw_engine_group.c
> > > > +++ b/drivers/gpu/drm/xe/xe_hw_engine_group.c
> > > > @@ -11,6 +11,7 @@
> > > > #include "xe_gt.h"
> > > > #include "xe_gt_stats.h"
> > > > #include "xe_hw_engine_group.h"
> > > > +#include "xe_sync.h"
> > > > #include "xe_vm.h"
> > > > static void
> > > > @@ -21,7 +22,8 @@ hw_engine_group_resume_lr_jobs_func(struct
> > > > work_struct *w)
> > > > int err;
> > > > enum xe_hw_engine_group_execution_mode previous_mode;
> > > > - err = xe_hw_engine_group_get_mode(group, EXEC_MODE_LR,
> > > > &previous_mode);
> > > > + err = xe_hw_engine_group_get_mode(group, EXEC_MODE_LR,
> > > > &previous_mode,
> > > > + NULL, 0);
> > > > if (err)
> > > > return;
> > > > @@ -192,20 +194,32 @@ void
> > > > xe_hw_engine_group_resume_faulting_lr_jobs(struct xe_hw_engine_group
> > > > *group
> > > > *
> > > > * Return: 0 on success, negative error code on error.
> > > > */
> > > > -static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct
> > > > xe_hw_engine_group *group)
> > > > +static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct
> > > > xe_hw_engine_group *group,
> > > > + struct
> > > > xe_sync_entry *syncs,
> > > > + int
> > > > num_syncs)
> > > > {
> > > > - int err;
> > > > + int err, i;
> > > > struct xe_exec_queue *q;
> > > > bool need_resume = false;
> > > > lockdep_assert_held_write(&group->mode_sem);
> > > > list_for_each_entry(q, &group->exec_queue_list,
> > > > hw_engine_group_link) {
> > > > + bool idle_skip_suspend;
> > > > +
> > > > if (!xe_vm_in_fault_mode(q->vm))
> > > > continue;
> > > > xe_gt_stats_incr(q->gt,
> > > > XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT, 1);
> > > > - need_resume |= !xe_exec_queue_idle_skip_suspend(q);
> > > > +
> > > > + idle_skip_suspend =
> > > > xe_exec_queue_idle_skip_suspend(q);
> > > > +
> > > > + if (!need_resume && !idle_skip_suspend && num_syncs)
> > > > {
> > > > + for (i = 0; i < num_syncs; ++i)
> > > > + xe_sync_entry_wait(syncs + i);
> > > Here we're in the write-locked mode, right? Ideally I think we should
> > > just check for idle here and return a retry if not idle, and wait
> > > outside of the locks. Perhaps also always wait if there are pf jobs
> > I think waiting outside the lock would be okay. Let me try that. I also
> > forgot that xe_sync_entry_wait needs to be interruptible too.
> >
> > > running on the engine group. Also we might want to include the other
> > > implicit dependencies as well, like kernel fences.
> > >
> > > Although perhaps this is good enough for now, and this would be easier
> > > implemented with a scheduler?
> > >
> This is pretty much exactly what I had in mind as well. I started to doubt,
> though, if the drm scheduler would be a good fit since the dma-fence jobs
> wouldn't necessarily be ordered, since they wouldn't have published their
Yes, if you have mutliple 3d / display users with different sets of
dependencies this starts to fall apart a bit if single scheduler is used
for flipping a group.
> out-fences when in this "pre-scheduler". Also Joonas has mentioned at one
> point that pre-scheduling (like we already do, but this would be a more
> sophisticated version of) was disapproved by some arch or perhaps upstream
> decision at some historical point. We should find out exactly what that was
> all about before proceeding with this.
>
I'm not exactly following this part of if we circle back to this, I can
dig in here.
> > This is a fairly large rework, and the likelihood of me personally
> > having the bandwidth to implement this in the near future is low. Of
> > course, if you want to take this on, I can provide guidance on the
> > refactor.
>
> My bandwidth for this is also zero ATM and up to end of January at least.
>
Mine too. If someone else in group wants to pick it up, that would work too.
> > So for now, let’s tweak things to something we can live with and perhaps
> > write down plans for a long-term refactor.
>
> Fully agree.
>
> I think our backlog of nice cleanups and improvements like this is starting
> to grow so it would be good to have them documented in jiras and perhaps at
> a list which we can prioritze and have someone pick up when there is
> bandwidth.
>
+1. Yes, I'd prefer stay on top of clean ups to avoid driver becoming
unmanagable mess.
Matt
> Thanks,
>
> Thomas
>
>
>
> >
> > Matt
> >
> > > /Thomas
> > >
> > >
> > > > + }
> > > > +
> > > > + need_resume |= !idle_skip_suspend;
> > > > q->ops->suspend(q);
> > > > }
> > > > @@ -258,7 +272,8 @@ static int
> > > > xe_hw_engine_group_wait_for_dma_fence_jobs(struct xe_hw_engine_group
> > > > return 0;
> > > > }
> > > > -static int switch_mode(struct xe_hw_engine_group *group)
> > > > +static int switch_mode(struct xe_hw_engine_group *group,
> > > > + struct xe_sync_entry *syncs, int num_syncs)
> > > > {
> > > > int err = 0;
> > > > enum xe_hw_engine_group_execution_mode new_mode;
> > > > @@ -268,7 +283,9 @@ static int switch_mode(struct xe_hw_engine_group
> > > > *group)
> > > > switch (group->cur_mode) {
> > > > case EXEC_MODE_LR:
> > > > new_mode = EXEC_MODE_DMA_FENCE;
> > > > - err =
> > > > xe_hw_engine_group_suspend_faulting_lr_jobs(group);
> > > > + err =
> > > > xe_hw_engine_group_suspend_faulting_lr_jobs(group,
> > > > +
> > > > syncs,
> > > > +
> > > > num_syncs);
> > > > break;
> > > > case EXEC_MODE_DMA_FENCE:
> > > > new_mode = EXEC_MODE_LR;
> > > > @@ -294,7 +311,8 @@ static int switch_mode(struct xe_hw_engine_group
> > > > *group)
> > > > */
> > > > int xe_hw_engine_group_get_mode(struct xe_hw_engine_group *group,
> > > > enum
> > > > xe_hw_engine_group_execution_mode new_mode,
> > > > - enum
> > > > xe_hw_engine_group_execution_mode *previous_mode)
> > > > + enum
> > > > xe_hw_engine_group_execution_mode *previous_mode,
> > > > + struct xe_sync_entry *syncs, int
> > > > num_syncs)
> > > > __acquires(&group->mode_sem)
> > > > {
> > > > int err = down_read_interruptible(&group->mode_sem);
> > > > @@ -311,7 +329,7 @@ __acquires(&group->mode_sem)
> > > > return err;
> > > > if (new_mode != group->cur_mode) {
> > > > - err = switch_mode(group);
> > > > + err = switch_mode(group, syncs, num_syncs);
> > > > if (err) {
> > > > up_write(&group->mode_sem);
> > > > return err;
> > > > diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.h
> > > > b/drivers/gpu/drm/xe/xe_hw_engine_group.h
> > > > index 797ee81acbf2..8b17ccd30b70 100644
> > > > --- a/drivers/gpu/drm/xe/xe_hw_engine_group.h
> > > > +++ b/drivers/gpu/drm/xe/xe_hw_engine_group.h
> > > > @@ -11,6 +11,7 @@
> > > > struct drm_device;
> > > > struct xe_exec_queue;
> > > > struct xe_gt;
> > > > +struct xe_sync_entry;
> > > > int xe_hw_engine_setup_groups(struct xe_gt *gt);
> > > > @@ -19,7 +20,8 @@ void xe_hw_engine_group_del_exec_queue(struct
> > > > xe_hw_engine_group *group, struct
> > > > int xe_hw_engine_group_get_mode(struct xe_hw_engine_group *group,
> > > > enum
> > > > xe_hw_engine_group_execution_mode new_mode,
> > > > - enum
> > > > xe_hw_engine_group_execution_mode *previous_mode);
> > > > + enum
> > > > xe_hw_engine_group_execution_mode *previous_mode,
> > > > + struct xe_sync_entry *syncs, int
> > > > num_syncs);
> > > > void xe_hw_engine_group_put(struct xe_hw_engine_group *group);
> > > > enum xe_hw_engine_group_execution_mode
> > > > diff --git a/drivers/gpu/drm/xe/xe_sync.c
> > > > b/drivers/gpu/drm/xe/xe_sync.c
> > > > index 1fc4fa278b78..127e26129933 100644
> > > > --- a/drivers/gpu/drm/xe/xe_sync.c
> > > > +++ b/drivers/gpu/drm/xe/xe_sync.c
> > > > @@ -228,6 +228,20 @@ int xe_sync_entry_add_deps(struct xe_sync_entry
> > > > *sync, struct xe_sched_job *job)
> > > > return 0;
> > > > }
> > > > +/**
> > > > + * xe_sync_entry_wait() - Wait on in-sync
> > > > + * @sync: Sync object
> > > > + *
> > > > + * If the sync is in an in-sync, wait on the sync to signal.
> > > > + */
> > > > +void xe_sync_entry_wait(struct xe_sync_entry *sync)
> > > > +{
> > > > + if (sync->flags & DRM_XE_SYNC_FLAG_SIGNAL)
> > > > + return;
> > > > +
> > > > + dma_fence_wait(sync->fence, false);
> > > > +}
> > > > +
> > > > void xe_sync_entry_signal(struct xe_sync_entry *sync, struct
> > > > dma_fence *fence)
> > > > {
> > > > if (!(sync->flags & DRM_XE_SYNC_FLAG_SIGNAL))
> > > > diff --git a/drivers/gpu/drm/xe/xe_sync.h
> > > > b/drivers/gpu/drm/xe/xe_sync.h
> > > > index 51f2d803e977..1c08f9ed9001 100644
> > > > --- a/drivers/gpu/drm/xe/xe_sync.h
> > > > +++ b/drivers/gpu/drm/xe/xe_sync.h
> > > > @@ -29,6 +29,7 @@ int xe_sync_entry_add_deps(struct xe_sync_entry
> > > > *sync,
> > > > struct xe_sched_job *job);
> > > > void xe_sync_entry_signal(struct xe_sync_entry *sync,
> > > > struct dma_fence *fence);
> > > > +void xe_sync_entry_wait(struct xe_sync_entry *sync);
> > > > void xe_sync_entry_cleanup(struct xe_sync_entry *sync);
> > > > struct dma_fence *
> > > > xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync,
^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2025-12-12 20:20 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-12-11 21:00 [PATCH 0/6] Fix performance when pagefaults and 3d/display share resources Matthew Brost
2025-12-11 21:00 ` [PATCH 1/6] drm/xe: Adjust long-running workload timeslices to reasonable values Matthew Brost
2025-12-11 21:00 ` [PATCH 2/6] drm/xe: Use usleep_range for accurate long-running workload timeslicing Matthew Brost
2025-12-11 21:00 ` [PATCH 3/6] drm/xe: Add debugfs knobs to control long running " Matthew Brost
2025-12-11 21:00 ` [PATCH 4/6] drm/xe: Skip exec queue schedule toggle if queue is idle during suspend Matthew Brost
2025-12-11 21:00 ` [PATCH 5/6] drm/xe: Wait on in-syncs when swicthing to dma-fence mode Matthew Brost
2025-12-12 9:22 ` Thomas Hellström
2025-12-12 16:33 ` Matthew Brost
2025-12-12 16:38 ` Matthew Brost
2025-12-12 18:41 ` Thomas Hellström
2025-12-12 20:20 ` Matthew Brost
2025-12-11 21:00 ` [PATCH 6/6] drm/xe: Add more GT stats around pagefault mode switch flows Matthew Brost
2025-12-12 16:07 ` Francois Dugast
2025-12-12 16:18 ` Matthew Brost
2025-12-11 21:29 ` ✓ CI.KUnit: success for Fix performance when pagefaults and 3d/display share resources Patchwork
2025-12-11 22:34 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-12-12 13:46 ` ✗ Xe.CI.Full: " Patchwork
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