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From: Imre Deak <imre.deak@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <intel-xe@lists.freedesktop.org>
Cc: "Ankit Nautiyal" <ankit.k.nautiyal@intel.com>,
	"Luca Coelho" <luciano.coelho@intel.com>,
	"Jouni Högander" <jouni.hogander@intel.com>,
	"Vinod Govindapillai" <vinod.govindapillai@intel.com>
Subject: [PATCH 00/19] rm/i915/dp: Clean up link BW/DSC slice config computation (link BW)
Date: Mon, 22 Dec 2025 17:35:27 +0200	[thread overview]
Message-ID: <20251222153547.713360-1-imre.deak@intel.com> (raw)

This is the second part of patchset [1] containing the refactoring
(patches 13-15, 20-35) of the link BW computation to simplify it. The
first part of [1] containing fixes is merged now to drm-tip, see [2],
the third part of [1] refactoring the DSC slice computation is to be
sent as a follow-up to this patchset.

[1] https://lore.kernel.org/all/20251127175023.1522538-1-imre.deak@intel.com
[2] https://lore.kernel.org/all/20251215192357.172201-1-imre.deak@intel.com

Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Luca Coelho <luciano.coelho@intel.com>
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Vinod Govindapillai <vinod.govindapillai@intel.com>

Imre Deak (19):
  drm/i915/dp: Drop unused timeslots param from
    dsc_compute_link_config()
  drm/i915/dp: Factor out align_max_sink_dsc_input_bpp()
  drm/i915/dp: Factor out align_max_vesa_compressed_bpp_x16()
  drm/i915/dp: Align min/max DSC input BPPs to sink caps
  drm/i915/dp: Align min/max compressed BPPs when calculating BPP limits
  drm/i915/dp: Drop intel_dp parameter from
    intel_dp_compute_config_link_bpp_limits()
  drm/i915/dp: Pass intel_output_format to
    intel_dp_dsc_sink_{min_max}_compressed_bpp()
  drm/i915/dp: Pass mode clock to dsc_throughput_quirk_max_bpp_x16()
  drm/i915/dp: Factor out compute_min_compressed_bpp_x16()
  drm/i915/dp: Factor out compute_max_compressed_bpp_x16()
  drm/i915/dp: Add intel_dp_mode_valid_with_dsc()
  drm/i915/dp: Unify detect and compute time DSC mode BW validation
  drm/i915/dp: Use helpers to align min/max compressed BPPs
  drm/i915/dp: Simplify computing DSC BPPs for eDP
  drm/i915/dp: Simplify computing DSC BPPs for DP-SST
  drm/i915/dp: Simplify computing forced DSC BPP for DP-SST
  drm/i915/dp: Unify computing compressed BPP for DP-SST and eDP
  drm/i915/dp: Simplify eDP vs. DP compressed BPP computation
  drm/i915/dp: Simplify computing the DSC compressed BPP for DP-MST

 drivers/gpu/drm/i915/display/intel_dp.c     | 515 +++++++++-----------
 drivers/gpu/drm/i915/display/intel_dp.h     |  17 +-
 drivers/gpu/drm/i915/display/intel_dp_mst.c |  77 +--
 3 files changed, 263 insertions(+), 346 deletions(-)

-- 
2.49.1


             reply	other threads:[~2025-12-22 15:36 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-22 15:35 Imre Deak [this message]
2025-12-22 15:35 ` [PATCH 01/19] drm/i915/dp: Drop unused timeslots param from dsc_compute_link_config() Imre Deak
2025-12-22 15:35 ` [PATCH] drm/i915/dp: Fail state computation for invalid DSC source input BPP values Imre Deak
2025-12-22 15:35 ` [PATCH 02/19] drm/i915/dp: Factor out align_max_sink_dsc_input_bpp() Imre Deak
2025-12-22 15:35 ` [PATCH 03/19] drm/i915/dp: Factor out align_max_vesa_compressed_bpp_x16() Imre Deak
2025-12-22 15:35 ` [PATCH 04/19] drm/i915/dp: Align min/max DSC input BPPs to sink caps Imre Deak
2025-12-22 15:35 ` [PATCH 05/19] drm/i915/dp: Align min/max compressed BPPs when calculating BPP limits Imre Deak
2025-12-22 15:35 ` [PATCH 06/19] drm/i915/dp: Drop intel_dp parameter from intel_dp_compute_config_link_bpp_limits() Imre Deak
2025-12-22 15:35 ` [PATCH 07/19] drm/i915/dp: Pass intel_output_format to intel_dp_dsc_sink_{min_max}_compressed_bpp() Imre Deak
2025-12-22 15:35 ` [PATCH 08/19] drm/i915/dp: Pass mode clock to dsc_throughput_quirk_max_bpp_x16() Imre Deak
2025-12-22 15:35 ` [PATCH 09/19] drm/i915/dp: Factor out compute_min_compressed_bpp_x16() Imre Deak
2025-12-22 15:35 ` [PATCH 10/19] drm/i915/dp: Factor out compute_max_compressed_bpp_x16() Imre Deak
2025-12-22 15:35 ` [PATCH 11/19] drm/i915/dp: Add intel_dp_mode_valid_with_dsc() Imre Deak
2025-12-22 15:35 ` [PATCH 12/19] drm/i915/dp: Unify detect and compute time DSC mode BW validation Imre Deak
2025-12-22 15:35 ` [PATCH 13/19] drm/i915/dp: Use helpers to align min/max compressed BPPs Imre Deak
2025-12-22 15:35 ` [PATCH 14/19] drm/i915/dp: Simplify computing DSC BPPs for eDP Imre Deak
2025-12-22 15:35 ` [PATCH 15/19] drm/i915/dp: Simplify computing DSC BPPs for DP-SST Imre Deak
2025-12-22 15:35 ` [PATCH 16/19] drm/i915/dp: Simplify computing forced DSC BPP " Imre Deak
2025-12-22 15:35 ` [PATCH 17/19] drm/i915/dp: Unify computing compressed BPP for DP-SST and eDP Imre Deak
2025-12-22 15:35 ` [PATCH 18/19] drm/i915/dp: Simplify eDP vs. DP compressed BPP computation Imre Deak
2025-12-22 15:35 ` [PATCH 19/19] drm/i915/dp: Simplify computing the DSC compressed BPP for DP-MST Imre Deak
2025-12-22 22:21 ` ✓ CI.KUnit: success for drm/i915/dp: Fail state computation for invalid DSC source input BPP values Patchwork
2025-12-22 22:36 ` ✗ CI.checksparse: warning " Patchwork
2025-12-22 22:58 ` ✓ Xe.CI.BAT: success " Patchwork
2025-12-23  6:35 ` ✓ Xe.CI.Full: " Patchwork
     [not found] ` <176654308984.114937.922653558011609259@a3b018990fe9>
2026-01-13 17:33   ` ✓ i915.CI.Full: success for drm/i915/dp: Fail state computation for invalid DSC source input BPP values (rev3) Imre Deak

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