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From: Matthew Brost <matthew.brost@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: daniele.ceraolospurio@intel.com, carlos.santa@intel.com
Subject: [RFC PATCH 02/13] drm/xe: Add EXEC_QUEUE_FLAG_CAP_SYS_NICE
Date: Wed, 24 Dec 2025 17:17:23 -0800	[thread overview]
Message-ID: <20251225011734.341683-3-matthew.brost@intel.com> (raw)
In-Reply-To: <20251225011734.341683-1-matthew.brost@intel.com>

Store whether CAP_SYS_NICE is set on the user process that creates an
exec queue. This will indicate if the exec queue is eligible for higher
priority levels under deadline pressure.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_exec_queue.c       | 3 +++
 drivers/gpu/drm/xe/xe_exec_queue_types.h | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 0b9e074b022f..a9b981591773 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -1158,6 +1158,9 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
 	if (args->flags & DRM_XE_EXEC_QUEUE_LOW_LATENCY_HINT)
 		flags |= EXEC_QUEUE_FLAG_LOW_LATENCY;
 
+	if (capable(CAP_SYS_NICE))
+		flags |= EXEC_QUEUE_FLAG_CAP_SYS_NICE;
+
 	if (eci[0].engine_class == DRM_XE_ENGINE_CLASS_VM_BIND) {
 		if (XE_IOCTL_DBG(xe, args->width != 1) ||
 		    XE_IOCTL_DBG(xe, args->num_placements != 1) ||
diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
index 67ea5eebf70b..cd7a6571f5c6 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
@@ -128,6 +128,8 @@ struct xe_exec_queue {
 #define EXEC_QUEUE_FLAG_LOW_LATENCY		BIT(5)
 /* for migration (kernel copy, clear, bind) jobs */
 #define EXEC_QUEUE_FLAG_MIGRATE			BIT(6)
+/* for user queues, created in CAP_SYS_NICE context */
+#define EXEC_QUEUE_FLAG_CAP_SYS_NICE		BIT(7)
 
 	/**
 	 * @flags: flags for this exec queue, should statically setup aside from ban
-- 
2.34.1


  parent reply	other threads:[~2025-12-25  1:17 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-25  1:17 [RFC PATCH 00/13] Fence deadlines in Xe Matthew Brost
2025-12-25  1:17 ` [RFC PATCH 01/13] drm/xe: Add dedicated message lock Matthew Brost
2025-12-25  1:17 ` Matthew Brost [this message]
2025-12-25  1:17 ` [RFC PATCH 03/13] drm/xe: Store exec queue in hardware fence Matthew Brost
2025-12-25  1:17 ` [RFC PATCH 04/13] drm/xe: Add deadline exec queue vfuncs Matthew Brost
2025-12-25  1:17 ` [RFC PATCH 05/13] drm/xe: Export to_xe_hw_fence Matthew Brost
2025-12-25  1:17 ` [RFC PATCH 06/13] drm/xe: Add deadline manager Matthew Brost
2025-12-25  1:17 ` [RFC PATCH 07/13] drm/xe: Add deadline manager to user exec queues Matthew Brost
2025-12-25  1:17 ` [RFC PATCH 08/13] drm/xe: Stub out execlists deadline vfuncs as NOPs Matthew Brost
2025-12-25  1:17 ` [RFC PATCH 09/13] drm/xe: Make scheduler message lock IRQ-safe Matthew Brost
2025-12-25  1:17 ` [RFC PATCH 10/13] drm/xe: Implement GuC submission backend ops for deadlines Matthew Brost
2025-12-25  1:17 ` [RFC PATCH 11/13] drm/xe: Enable deadlines on hardware fences Matthew Brost
2025-12-25  1:17 ` [RFC PATCH 12/13] drm/xe: Add CONFIG_DRM_XE_DEADLINE_WINDOW Matthew Brost
2025-12-25  1:17 ` [RFC PATCH 13/13] drm/xe: Add exec queue deadline trace points Matthew Brost
2025-12-25  1:25 ` ✗ CI.checkpatch: warning for Fence deadlines in Xe Patchwork
2025-12-25  1:26 ` ✓ CI.KUnit: success " Patchwork
2025-12-25  2:01 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-12-25  3:02 ` ✓ Xe.CI.Full: success " Patchwork

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