From: Matthew Brost <matthew.brost@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: daniele.ceraolospurio@intel.com, carlos.santa@intel.com
Subject: [RFC PATCH 03/13] drm/xe: Store exec queue in hardware fence
Date: Wed, 24 Dec 2025 17:17:24 -0800 [thread overview]
Message-ID: <20251225011734.341683-4-matthew.brost@intel.com> (raw)
In-Reply-To: <20251225011734.341683-1-matthew.brost@intel.com>
Enable hardware fences to set deadlines for exec queues.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_hw_fence.c | 4 +++-
drivers/gpu/drm/xe/xe_hw_fence.h | 2 +-
drivers/gpu/drm/xe/xe_hw_fence_types.h | 6 ++++++
drivers/gpu/drm/xe/xe_lrc.c | 6 ++++--
drivers/gpu/drm/xe/xe_lrc.h | 3 ++-
drivers/gpu/drm/xe/xe_sched_job.c | 2 +-
6 files changed, 17 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_hw_fence.c b/drivers/gpu/drm/xe/xe_hw_fence.c
index f6057456e460..5995bf095843 100644
--- a/drivers/gpu/drm/xe/xe_hw_fence.c
+++ b/drivers/gpu/drm/xe/xe_hw_fence.c
@@ -242,6 +242,7 @@ void xe_hw_fence_free(struct dma_fence *fence)
* xe_hw_fence_init() - Initialize an hw fence.
* @fence: Pointer to the fence to initialize.
* @ctx: Pointer to the struct xe_hw_fence_ctx fence context.
+ * @q: Pointer to exec queue tied to the fence.
* @seqno_map: Pointer to the map into where the seqno is blitted.
*
* Initializes a pre-allocated hw fence.
@@ -249,12 +250,13 @@ void xe_hw_fence_free(struct dma_fence *fence)
* dma-fence refcounting.
*/
void xe_hw_fence_init(struct dma_fence *fence, struct xe_hw_fence_ctx *ctx,
- struct iosys_map seqno_map)
+ struct xe_exec_queue *q, struct iosys_map seqno_map)
{
struct xe_hw_fence *hw_fence =
container_of(fence, typeof(*hw_fence), dma);
hw_fence->xe = gt_to_xe(ctx->gt);
+ hw_fence->q = q;
snprintf(hw_fence->name, sizeof(hw_fence->name), "%s", ctx->name);
hw_fence->seqno_map = seqno_map;
INIT_LIST_HEAD(&hw_fence->irq_link);
diff --git a/drivers/gpu/drm/xe/xe_hw_fence.h b/drivers/gpu/drm/xe/xe_hw_fence.h
index f13a1c4982c7..7a8678c881d8 100644
--- a/drivers/gpu/drm/xe/xe_hw_fence.h
+++ b/drivers/gpu/drm/xe/xe_hw_fence.h
@@ -29,5 +29,5 @@ struct dma_fence *xe_hw_fence_alloc(void);
void xe_hw_fence_free(struct dma_fence *fence);
void xe_hw_fence_init(struct dma_fence *fence, struct xe_hw_fence_ctx *ctx,
- struct iosys_map seqno_map);
+ struct xe_exec_queue *q, struct iosys_map seqno_map);
#endif
diff --git a/drivers/gpu/drm/xe/xe_hw_fence_types.h b/drivers/gpu/drm/xe/xe_hw_fence_types.h
index 58a8d09afe5c..052bbab1fad6 100644
--- a/drivers/gpu/drm/xe/xe_hw_fence_types.h
+++ b/drivers/gpu/drm/xe/xe_hw_fence_types.h
@@ -13,6 +13,7 @@
#include <linux/spinlock.h>
struct xe_device;
+struct xe_exec_queue;
struct xe_gt;
/**
@@ -64,6 +65,11 @@ struct xe_hw_fence {
struct dma_fence dma;
/** @xe: Xe device for hw fence driver name */
struct xe_device *xe;
+ /**
+ * @q: Exec queue which fence is tied too, not ref counted, lookup
+ * protected by fence lock.
+ */
+ struct xe_exec_queue *q;
/** @name: name of hardware fence context */
char name[MAX_FENCE_NAME_LEN];
/** @seqno_map: I/O map for seqno */
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 70eae7d03a27..fc4b21e3c00d 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -1783,15 +1783,17 @@ void xe_lrc_free_seqno_fence(struct dma_fence *fence)
/**
* xe_lrc_init_seqno_fence() - Initialize an lrc seqno fence.
* @lrc: Pointer to the lrc.
+ ( @q: Pointner to exec queue.
* @fence: Pointer to the fence to initialize.
*
* Initializes a pre-allocated lrc seqno fence.
* After initialization, the fence is subject to normal
* dma-fence refcounting.
*/
-void xe_lrc_init_seqno_fence(struct xe_lrc *lrc, struct dma_fence *fence)
+void xe_lrc_init_seqno_fence(struct xe_lrc *lrc, struct xe_exec_queue *q,
+ struct dma_fence *fence)
{
- xe_hw_fence_init(fence, &lrc->fence_ctx, __xe_lrc_seqno_map(lrc));
+ xe_hw_fence_init(fence, &lrc->fence_ctx, q, __xe_lrc_seqno_map(lrc));
}
s32 xe_lrc_seqno(struct xe_lrc *lrc)
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index 8acf85273c1a..3d72b4c0da8e 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -118,7 +118,8 @@ u64 xe_lrc_descriptor(struct xe_lrc *lrc);
u32 xe_lrc_seqno_ggtt_addr(struct xe_lrc *lrc);
struct dma_fence *xe_lrc_alloc_seqno_fence(void);
void xe_lrc_free_seqno_fence(struct dma_fence *fence);
-void xe_lrc_init_seqno_fence(struct xe_lrc *lrc, struct dma_fence *fence);
+void xe_lrc_init_seqno_fence(struct xe_lrc *lrc, struct xe_exec_queue *q,
+ struct dma_fence *fence);
s32 xe_lrc_seqno(struct xe_lrc *lrc);
u32 xe_lrc_start_seqno_ggtt_addr(struct xe_lrc *lrc);
diff --git a/drivers/gpu/drm/xe/xe_sched_job.c b/drivers/gpu/drm/xe/xe_sched_job.c
index cb674a322113..6099b4445835 100644
--- a/drivers/gpu/drm/xe/xe_sched_job.c
+++ b/drivers/gpu/drm/xe/xe_sched_job.c
@@ -270,7 +270,7 @@ void xe_sched_job_arm(struct xe_sched_job *job)
struct dma_fence_chain *chain;
fence = job->ptrs[i].lrc_fence;
- xe_lrc_init_seqno_fence(q->lrc[i], fence);
+ xe_lrc_init_seqno_fence(q->lrc[i], q, fence);
job->ptrs[i].lrc_fence = NULL;
if (!i) {
job->lrc_seqno = fence->seqno;
--
2.34.1
next prev parent reply other threads:[~2025-12-25 1:18 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-25 1:17 [RFC PATCH 00/13] Fence deadlines in Xe Matthew Brost
2025-12-25 1:17 ` [RFC PATCH 01/13] drm/xe: Add dedicated message lock Matthew Brost
2025-12-25 1:17 ` [RFC PATCH 02/13] drm/xe: Add EXEC_QUEUE_FLAG_CAP_SYS_NICE Matthew Brost
2025-12-25 1:17 ` Matthew Brost [this message]
2025-12-25 1:17 ` [RFC PATCH 04/13] drm/xe: Add deadline exec queue vfuncs Matthew Brost
2025-12-25 1:17 ` [RFC PATCH 05/13] drm/xe: Export to_xe_hw_fence Matthew Brost
2025-12-25 1:17 ` [RFC PATCH 06/13] drm/xe: Add deadline manager Matthew Brost
2025-12-25 1:17 ` [RFC PATCH 07/13] drm/xe: Add deadline manager to user exec queues Matthew Brost
2025-12-25 1:17 ` [RFC PATCH 08/13] drm/xe: Stub out execlists deadline vfuncs as NOPs Matthew Brost
2025-12-25 1:17 ` [RFC PATCH 09/13] drm/xe: Make scheduler message lock IRQ-safe Matthew Brost
2025-12-25 1:17 ` [RFC PATCH 10/13] drm/xe: Implement GuC submission backend ops for deadlines Matthew Brost
2025-12-25 1:17 ` [RFC PATCH 11/13] drm/xe: Enable deadlines on hardware fences Matthew Brost
2025-12-25 1:17 ` [RFC PATCH 12/13] drm/xe: Add CONFIG_DRM_XE_DEADLINE_WINDOW Matthew Brost
2025-12-25 1:17 ` [RFC PATCH 13/13] drm/xe: Add exec queue deadline trace points Matthew Brost
2025-12-25 1:25 ` ✗ CI.checkpatch: warning for Fence deadlines in Xe Patchwork
2025-12-25 1:26 ` ✓ CI.KUnit: success " Patchwork
2025-12-25 2:01 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-12-25 3:02 ` ✓ Xe.CI.Full: success " Patchwork
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