[PATCH v2 17/22] drm/xe: Add hw fence deadline trace points

[Matthew Brost <matthew.brost@intel.com>]

Add hw fence deadline trace points to help debug and profile the
deadline implementation.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_deadline_mgr.c | 14 ++++++++++++--
 drivers/gpu/drm/xe/xe_trace.h        | 22 ++++++++++++++++++++--
 2 files changed, 32 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_deadline_mgr.c b/drivers/gpu/drm/xe/xe_deadline_mgr.c
index f3c920017e40..e2ee23f6e787 100644
--- a/drivers/gpu/drm/xe/xe_deadline_mgr.c
+++ b/drivers/gpu/drm/xe/xe_deadline_mgr.c
@@ -10,6 +10,7 @@
 #include "xe_exec_queue.h"
 #include "xe_gt.h"
 #include "xe_hw_fence.h"
+#include "xe_trace.h"
 
 #ifdef CONFIG_DRM_XE_DEADLINE_WINDOW_US
 #define XE_DEADLINE_WINDOW_US	CONFIG_DRM_XE_DEADLINE_WINDOW_US
@@ -345,6 +346,8 @@ void xe_deadline_mgr_add_deadline(struct xe_deadline_mgr *mgr,
 	__xe_deadline_mgr_remove_deadline(mgr, hw_fence);
 	__xe_deadline_mgr_add_deadline(mgr, hw_fence, deadline);
 	__xe_deadline_mgr_update_deadline(mgr);
+
+	trace_xe_hw_fence_add_deadline(hw_fence);
 }
 
 /**
@@ -359,15 +362,22 @@ void xe_deadline_mgr_add_deadline(struct xe_deadline_mgr *mgr,
 void xe_deadline_mgr_remove_deadline(struct xe_deadline_mgr *mgr,
 				     struct dma_fence *fence)
 {
+	struct xe_hw_fence *hw_fence;
+
 	if (mgr->state == XE_DEADLINE_MGR_STATE_UNSUPPORTED)
 		return;
 
 	guard(spinlock_irqsave)(&mgr->lock);
 
+	hw_fence = to_xe_hw_fence(fence);
+
 	xe_assert(gt_to_xe(mgr->q->gt), !dma_fence_is_container(fence));
 	xe_assert(gt_to_xe(mgr->q->gt), dma_fence_is_signaled(fence));
 	xe_assert(gt_to_xe(mgr->q->gt),
-		  to_xe_hw_fence(fence)->deadline.time != XE_DEADLINE_DONE);
+		  hw_fence->deadline.time != XE_DEADLINE_DONE);
+
+	if (hw_fence->deadline.time != XE_DEADLINE_NONE)
+		trace_xe_hw_fence_remove_deadline(hw_fence);
 
-	__xe_deadline_mgr_remove_deadline(mgr, to_xe_hw_fence(fence));
+	__xe_deadline_mgr_remove_deadline(mgr, hw_fence);
 }
diff --git a/drivers/gpu/drm/xe/xe_trace.h b/drivers/gpu/drm/xe/xe_trace.h
index 14592403d2c0..5c84b8503de3 100644
--- a/drivers/gpu/drm/xe/xe_trace.h
+++ b/drivers/gpu/drm/xe/xe_trace.h
@@ -369,6 +369,8 @@ DECLARE_EVENT_CLASS(xe_hw_fence,
 			     __field(u64, ctx)
 			     __field(u32, seqno)
 			     __field(struct xe_hw_fence *, fence)
+			     __field(s64, delta_ns)
+			     __field(bool, missed)
 			     ),
 
 		    TP_fast_assign(
@@ -376,10 +378,16 @@ DECLARE_EVENT_CLASS(xe_hw_fence,
 			   __entry->ctx = fence->dma.context;
 			   __entry->seqno = fence->dma.seqno;
 			   __entry->fence = fence;
+			   __entry->delta_ns =
+			   ktime_to_ns(ktime_sub(fence->deadline.time, ktime_get()));
+			   __entry->missed = (__entry->delta_ns < 0 &&
+			    fence->deadline.time != XE_DEADLINE_NONE);
 			   ),
 
-		    TP_printk("dev=%s, ctx=0x%016llx, fence=%p, seqno=%u",
-			      __get_str(dev), __entry->ctx, __entry->fence, __entry->seqno)
+		    TP_printk("dev=%s, ctx=0x%llx, fence=%p, seqno=%u, missed=%d, delta_ns=0x%llx",
+			      __get_str(dev), __entry->ctx, __entry->fence,
+			      __entry->seqno, __entry->missed ? 1 : 0,
+			      (u64)__entry->delta_ns)
 );
 
 DEFINE_EVENT(xe_hw_fence, xe_hw_fence_create,
@@ -397,6 +405,16 @@ DEFINE_EVENT(xe_hw_fence, xe_hw_fence_try_signal,
 	     TP_ARGS(fence)
 );
 
+DEFINE_EVENT(xe_hw_fence, xe_hw_fence_add_deadline,
+	     TP_PROTO(struct xe_hw_fence *fence),
+	     TP_ARGS(fence)
+);
+
+DEFINE_EVENT(xe_hw_fence, xe_hw_fence_remove_deadline,
+	     TP_PROTO(struct xe_hw_fence *fence),
+	     TP_ARGS(fence)
+);
+
 TRACE_EVENT(xe_reg_rw,
 	TP_PROTO(struct xe_mmio *mmio, bool write, u32 reg, u64 val, int len),
 
-- 
2.34.1