* [PATCH v4] drm/xe: Allow compressible surfaces to be 1-way coherent
@ 2026-01-08 1:42 Xin Wang
2026-01-08 1:59 ` ✗ CI.checkpatch: warning for drm/xe: Allow compressible surfaces to be 1-way coherent (rev5) Patchwork
` (4 more replies)
0 siblings, 5 replies; 7+ messages in thread
From: Xin Wang @ 2026-01-08 1:42 UTC (permalink / raw)
To: intel-xe; +Cc: Xin Wang, Matthew Auld, Matt Roper
Previously, compressible surfaces were required to be non-coherent (allocated
as WC) because compression and coherency were mutually exclusive. Starting
with Xe3, hardware supports combining compression with 1-way coherency,
allowing compressible surfaces to be allocated as WB memory. This provides
applications with more efficient memory allocation by avoiding WC allocation
overhead that can cause system stuttering and memory management challenges.
The implementation adds support for compressed+coherent PAT entry for the
xe3_lpg devices and updates the driver logic to handle the new compression
capabilities.
v2: (Matthew Auld)
- Improved error handling with XE_IOCTL_DBG()
- Enhanced documentation and comments
- Fixed xe_bo_needs_ccs_pages() outdated compression assumptions
v3:
- Improve WB compression support detection by checking PAT table instead
of version check
v4:
- Add XE_CACHE_WB_COMPRESSION, which simplifies the logic.
Bspec: 71582, 59361, 59399
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Xin Wang <x.wang@intel.com>
---
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 6 ++++
drivers/gpu/drm/xe/xe_bo.c | 17 ++++-----
drivers/gpu/drm/xe/xe_gt.c | 32 +++++++++++++++++
drivers/gpu/drm/xe/xe_pat.c | 52 ++++++++++++++++++++++++----
drivers/gpu/drm/xe/xe_pat.h | 2 ++
drivers/gpu/drm/xe/xe_pt_types.h | 1 +
drivers/gpu/drm/xe/xe_vm.c | 13 +++++++
7 files changed, 109 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index 93643da57428..24fc64fc832e 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -89,6 +89,7 @@
#define UNIFIED_COMPRESSION_FORMAT REG_GENMASK(3, 0)
#define XE2_GAMREQSTRM_CTRL XE_REG_MCR(0x4194)
+#define EN_CMP_1WCOH REG_BIT(15)
#define CG_DIS_CNTLBUS REG_BIT(6)
#define CCS_AUX_INV XE_REG(0x4208)
@@ -101,6 +102,11 @@
#define XE2_LMEM_CFG XE_REG(0x48b0)
+#define XE2_GAMWALK_CTRL 0x47e4
+#define XE2_GAMWALK_CTRL_MEDIA XE_REG(XE2_GAMWALK_CTRL + MEDIA_GT_GSI_OFFSET)
+#define XE2_GAMWALK_CTRL_3D XE_REG_MCR(XE2_GAMWALK_CTRL)
+#define EN_CMP_1WCOH_GW REG_BIT(14)
+
#define XEHP_FLAT_CCS_BASE_ADDR XE_REG_MCR(0x4910)
#define XEHP_FLAT_CCS_PTR REG_GENMASK(31, 8)
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 8b6474cd3eaf..637adefd020d 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -29,6 +29,7 @@
#include "xe_gt.h"
#include "xe_map.h"
#include "xe_migrate.h"
+#include "xe_pat.h"
#include "xe_pm.h"
#include "xe_preempt_fence.h"
#include "xe_pxp.h"
@@ -3517,16 +3518,16 @@ bool xe_bo_needs_ccs_pages(struct xe_bo *bo)
if (IS_DGFX(xe) && (bo->flags & XE_BO_FLAG_SYSTEM))
return false;
+ /* Check if userspace explicitly requested no compression */
+ if (bo->flags & XE_BO_FLAG_NO_COMPRESSION)
+ return false;
+
/*
- * Compression implies coh_none, therefore we know for sure that WB
- * memory can't currently use compression, which is likely one of the
- * common cases.
- * Additionally, userspace may explicitly request no compression via the
- * DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION flag, which should also disable
- * CCS usage.
+ * For WB (Write-Back) CPU caching mode, check if the device
+ * supports WB compression with coherency.
*/
- if (bo->cpu_caching == DRM_XE_GEM_CPU_CACHING_WB ||
- bo->flags & XE_BO_FLAG_NO_COMPRESSION)
+ if (bo->cpu_caching == DRM_XE_GEM_CPU_CACHING_WB &&
+ xe->pat.idx[XE_CACHE_WB_COMPRESSION] == XE_PAT_INVALID_IDX)
return false;
return true;
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 313ce83ab0e5..04dbf995a18b 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -140,6 +140,36 @@ static void xe_gt_disable_host_l2_vram(struct xe_gt *gt)
xe_gt_mcr_multicast_write(gt, XE2_GAMREQSTRM_CTRL, reg);
}
+static void xe_gt_enable_comp_1wcoh(struct xe_gt *gt)
+{
+ struct xe_device *xe = gt_to_xe(gt);
+ unsigned int fw_ref;
+ u32 reg;
+
+ if (IS_SRIOV_VF(xe))
+ return;
+
+ if (GRAPHICS_VER(xe) >= 30 && xe->info.has_flat_ccs) {
+ fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
+ if (!fw_ref)
+ return;
+
+ reg = xe_gt_mcr_unicast_read_any(gt, XE2_GAMREQSTRM_CTRL);
+ reg |= EN_CMP_1WCOH;
+ xe_gt_mcr_multicast_write(gt, XE2_GAMREQSTRM_CTRL, reg);
+
+ if (xe_gt_is_media_type(gt)) {
+ xe_mmio_rmw32(>->mmio, XE2_GAMWALK_CTRL_MEDIA, 0, EN_CMP_1WCOH_GW);
+ } else {
+ reg = xe_gt_mcr_unicast_read_any(gt, XE2_GAMWALK_CTRL_3D);
+ reg |= EN_CMP_1WCOH_GW;
+ xe_gt_mcr_multicast_write(gt, XE2_GAMWALK_CTRL_3D, reg);
+ }
+
+ xe_force_wake_put(gt_to_fw(gt), fw_ref);
+ }
+}
+
static void gt_reset_worker(struct work_struct *w);
static int emit_job_sync(struct xe_exec_queue *q, struct xe_bb *bb,
@@ -466,6 +496,7 @@ static int gt_init_with_gt_forcewake(struct xe_gt *gt)
xe_gt_topology_init(gt);
xe_gt_mcr_init(gt);
xe_gt_enable_host_l2_vram(gt);
+ xe_gt_enable_comp_1wcoh(gt);
if (xe_gt_is_main_type(gt)) {
err = xe_ggtt_init(gt_to_tile(gt)->mem.ggtt);
@@ -745,6 +776,7 @@ static int do_gt_restart(struct xe_gt *gt)
xe_pat_init(gt);
xe_gt_enable_host_l2_vram(gt);
+ xe_gt_enable_comp_1wcoh(gt);
xe_gt_mcr_set_implicit_defaults(gt);
xe_reg_sr_apply_mmio(>->reg_sr, gt);
diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c
index 2c3375e0250b..14d0dce5190a 100644
--- a/drivers/gpu/drm/xe/xe_pat.c
+++ b/drivers/gpu/drm/xe/xe_pat.c
@@ -132,9 +132,10 @@ static const struct xe_pat_table_entry xelpg_pat_table[] = {
* in the table.
*
* Note: There is an implicit assumption in the driver that compression and
- * coh_1way+ are mutually exclusive. If this is ever not true then userptr
- * and imported dma-buf from external device will have uncleared ccs state. See
- * also xe_bo_needs_ccs_pages().
+ * coh_1way+ are mutually exclusive for platforms prior to Xe3. Starting
+ * with Xe3, compression can be combined with coherency. If using compression
+ * with coherency, userptr and imported dma-buf from external device will
+ * have uncleared ccs state. See also xe_bo_needs_ccs_pages().
*/
#define XE2_PAT(no_promote, comp_en, l3clos, l3_policy, l4_policy, __coh_mode) \
{ \
@@ -144,8 +145,7 @@ static const struct xe_pat_table_entry xelpg_pat_table[] = {
REG_FIELD_PREP(XE2_L3_POLICY, l3_policy) | \
REG_FIELD_PREP(XE2_L4_POLICY, l4_policy) | \
REG_FIELD_PREP(XE2_COH_MODE, __coh_mode), \
- .coh_mode = (BUILD_BUG_ON_ZERO(__coh_mode && comp_en) || __coh_mode) ? \
- XE_COH_AT_LEAST_1WAY : XE_COH_NONE, \
+ .coh_mode = __coh_mode ? XE_COH_AT_LEAST_1WAY : XE_COH_NONE, \
.valid = 1 \
}
@@ -181,6 +181,38 @@ static const struct xe_pat_table_entry xe2_pat_table[] = {
[31] = XE2_PAT( 0, 0, 3, 0, 3, 3 ),
};
+static const struct xe_pat_table_entry xe3_lpg_pat_table[] = {
+ [ 0] = XE2_PAT( 0, 0, 0, 0, 3, 0 ),
+ [ 1] = XE2_PAT( 0, 0, 0, 0, 3, 2 ),
+ [ 2] = XE2_PAT( 0, 0, 0, 0, 3, 3 ),
+ [ 3] = XE2_PAT( 0, 0, 0, 3, 3, 0 ),
+ [ 4] = XE2_PAT( 0, 0, 0, 3, 0, 2 ),
+ [ 5] = XE2_PAT( 0, 0, 0, 3, 3, 2 ),
+ [ 6] = XE2_PAT( 1, 0, 0, 1, 3, 0 ),
+ [ 7] = XE2_PAT( 0, 0, 0, 3, 0, 3 ),
+ [ 8] = XE2_PAT( 0, 0, 0, 3, 0, 0 ),
+ [ 9] = XE2_PAT( 0, 1, 0, 0, 3, 0 ),
+ [10] = XE2_PAT( 0, 1, 0, 3, 0, 0 ),
+ [11] = XE2_PAT( 1, 1, 0, 1, 3, 0 ),
+ [12] = XE2_PAT( 0, 1, 0, 3, 3, 0 ),
+ [13] = XE2_PAT( 0, 0, 0, 0, 0, 0 ),
+ [14] = XE2_PAT( 0, 1, 0, 0, 0, 0 ),
+ [15] = XE2_PAT( 1, 1, 0, 1, 1, 0 ),
+ [16] = XE2_PAT( 0, 1, 0, 0, 3, 2 ),
+ /* 17..19 are reserved; leave set to all 0's */
+ [20] = XE2_PAT( 0, 0, 1, 0, 3, 0 ),
+ [21] = XE2_PAT( 0, 1, 1, 0, 3, 0 ),
+ [22] = XE2_PAT( 0, 0, 1, 0, 3, 2 ),
+ [23] = XE2_PAT( 0, 0, 1, 0, 3, 3 ),
+ [24] = XE2_PAT( 0, 0, 2, 0, 3, 0 ),
+ [25] = XE2_PAT( 0, 1, 2, 0, 3, 0 ),
+ [26] = XE2_PAT( 0, 0, 2, 0, 3, 2 ),
+ [27] = XE2_PAT( 0, 0, 2, 0, 3, 3 ),
+ [28] = XE2_PAT( 0, 0, 3, 0, 3, 0 ),
+ [29] = XE2_PAT( 0, 1, 3, 0, 3, 0 ),
+ [30] = XE2_PAT( 0, 0, 3, 0, 3, 2 ),
+ [31] = XE2_PAT( 0, 0, 3, 0, 3, 3 ),
+};
/* Special PAT values programmed outside the main table */
static const struct xe_pat_table_entry xe2_pat_ats = XE2_PAT( 0, 0, 0, 0, 3, 3 );
static const struct xe_pat_table_entry xe2_pat_pta = XE2_PAT( 0, 0, 0, 0, 3, 0 );
@@ -490,6 +522,7 @@ static const struct xe_pat_ops xe3p_xpc_pat_ops = {
void xe_pat_init_early(struct xe_device *xe)
{
+ xe->pat.idx[XE_CACHE_WB_COMPRESSION] = XE_PAT_INVALID_IDX;
if (GRAPHICS_VERx100(xe) == 3511) {
xe->pat.ops = &xe3p_xpc_pat_ops;
xe->pat.table = xe3p_xpc_pat_table;
@@ -501,7 +534,12 @@ void xe_pat_init_early(struct xe_device *xe)
xe->pat.idx[XE_CACHE_WB] = 2;
} else if (GRAPHICS_VER(xe) == 30 || GRAPHICS_VER(xe) == 20) {
xe->pat.ops = &xe2_pat_ops;
- xe->pat.table = xe2_pat_table;
+ if (GRAPHICS_VER(xe) == 30) {
+ xe->pat.table = xe3_lpg_pat_table;
+ xe->pat.idx[XE_CACHE_WB_COMPRESSION] = 16;
+ } else {
+ xe->pat.table = xe2_pat_table;
+ }
xe->pat.pat_ats = &xe2_pat_ats;
if (IS_DGFX(xe))
xe->pat.pat_pta = &xe2_pat_pta;
@@ -658,6 +696,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p)
if (GRAPHICS_VER(xe) >= 20) {
drm_printf(p, "IDX[XE_CACHE_NONE_COMPRESSION] = %d\n",
xe->pat.idx[XE_CACHE_NONE_COMPRESSION]);
+ drm_printf(p, "IDX[XE_CACHE_WB_COMPRESSION] = %d\n",
+ xe->pat.idx[XE_CACHE_WB_COMPRESSION]);
}
return 0;
diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h
index d5dadfb7f924..1b2c7d3c7c16 100644
--- a/drivers/gpu/drm/xe/xe_pat.h
+++ b/drivers/gpu/drm/xe/xe_pat.h
@@ -12,6 +12,8 @@ struct drm_printer;
struct xe_device;
struct xe_gt;
+#define XE_PAT_INVALID_IDX U32_MAX
+
/**
* struct xe_pat_table_entry - The pat_index encoding and other meta information.
*/
diff --git a/drivers/gpu/drm/xe/xe_pt_types.h b/drivers/gpu/drm/xe/xe_pt_types.h
index 88fabf8e2655..84b51d3762a4 100644
--- a/drivers/gpu/drm/xe/xe_pt_types.h
+++ b/drivers/gpu/drm/xe/xe_pt_types.h
@@ -20,6 +20,7 @@ enum xe_cache_level {
XE_CACHE_WT,
XE_CACHE_WB,
XE_CACHE_NONE_COMPRESSION, /*UC + COH_NONE + COMPRESSION */
+ XE_CACHE_WB_COMPRESSION,
__XE_CACHE_LEVEL_COUNT,
};
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index a07d8b53de66..481ee7763b09 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -3405,6 +3405,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR;
u16 pat_index = (*bind_ops)[i].pat_index;
u16 coh_mode;
+ bool comp_en;
if (XE_IOCTL_DBG(xe, is_cpu_addr_mirror &&
(!xe_vm_in_fault_mode(vm) ||
@@ -3421,6 +3422,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
pat_index = array_index_nospec(pat_index, xe->pat.n_entries);
(*bind_ops)[i].pat_index = pat_index;
coh_mode = xe_pat_index_get_coh_mode(xe, pat_index);
+ comp_en = xe_pat_index_get_comp_en(xe, pat_index);
if (XE_IOCTL_DBG(xe, !coh_mode)) { /* hw reserved */
err = -EINVAL;
goto free_bind_ops;
@@ -3451,6 +3453,8 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
XE_IOCTL_DBG(xe, coh_mode == XE_COH_NONE &&
op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
+ XE_IOCTL_DBG(xe, comp_en &&
+ op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
XE_IOCTL_DBG(xe, op == DRM_XE_VM_BIND_OP_MAP_USERPTR &&
!IS_ENABLED(CONFIG_DRM_GPUSVM)) ||
XE_IOCTL_DBG(xe, obj &&
@@ -3529,6 +3533,7 @@ static int xe_vm_bind_ioctl_validate_bo(struct xe_device *xe, struct xe_bo *bo,
u16 pat_index, u32 op, u32 bind_flags)
{
u16 coh_mode;
+ bool comp_en;
if (XE_IOCTL_DBG(xe, (bo->flags & XE_BO_FLAG_NO_COMPRESSION) &&
xe_pat_index_get_comp_en(xe, pat_index)))
@@ -3574,6 +3579,14 @@ static int xe_vm_bind_ioctl_validate_bo(struct xe_device *xe, struct xe_bo *bo,
return -EINVAL;
}
+ /*
+ * Ensures that imported buffer objects (dma-bufs) are not mapped
+ * with a PAT index that enables compression.
+ */
+ comp_en = xe_pat_index_get_comp_en(xe, pat_index);
+ if (XE_IOCTL_DBG(xe, bo->ttm.base.import_attach && comp_en))
+ return -EINVAL;
+
/* If a BO is protected it can only be mapped if the key is still valid */
if ((bind_flags & DRM_XE_VM_BIND_FLAG_CHECK_PXP) && xe_bo_is_protected(bo) &&
op != DRM_XE_VM_BIND_OP_UNMAP && op != DRM_XE_VM_BIND_OP_UNMAP_ALL)
--
2.43.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe: Allow compressible surfaces to be 1-way coherent (rev5)
2026-01-08 1:42 [PATCH v4] drm/xe: Allow compressible surfaces to be 1-way coherent Xin Wang
@ 2026-01-08 1:59 ` Patchwork
2026-01-08 2:00 ` ✓ CI.KUnit: success " Patchwork
` (3 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-01-08 1:59 UTC (permalink / raw)
To: Xin Wang; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Allow compressible surfaces to be 1-way coherent (rev5)
URL : https://patchwork.freedesktop.org/series/157036/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
9f1cb6875f3f9eb0925ed50c16100322a2df513c
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit e3fb7f05c04e8cb6ce09d0aa59f97f1d258ac321
Author: Xin Wang <x.wang@intel.com>
Date: Thu Jan 8 01:42:57 2026 +0000
drm/xe: Allow compressible surfaces to be 1-way coherent
Previously, compressible surfaces were required to be non-coherent (allocated
as WC) because compression and coherency were mutually exclusive. Starting
with Xe3, hardware supports combining compression with 1-way coherency,
allowing compressible surfaces to be allocated as WB memory. This provides
applications with more efficient memory allocation by avoiding WC allocation
overhead that can cause system stuttering and memory management challenges.
The implementation adds support for compressed+coherent PAT entry for the
xe3_lpg devices and updates the driver logic to handle the new compression
capabilities.
v2: (Matthew Auld)
- Improved error handling with XE_IOCTL_DBG()
- Enhanced documentation and comments
- Fixed xe_bo_needs_ccs_pages() outdated compression assumptions
v3:
- Improve WB compression support detection by checking PAT table instead
of version check
v4:
- Add XE_CACHE_WB_COMPRESSION, which simplifies the logic.
Bspec: 71582, 59361, 59399
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Xin Wang <x.wang@intel.com>
+ /mt/dim checkpatch 25815d6185d3efe226238025baddf01299c4b070 drm-intel
e3fb7f05c04e drm/xe: Allow compressible surfaces to be 1-way coherent
-:6: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#6:
Previously, compressible surfaces were required to be non-coherent (allocated
-:185: ERROR:SPACING: space prohibited after that open square bracket '['
#185: FILE: drivers/gpu/drm/xe/xe_pat.c:185:
+ [ 0] = XE2_PAT( 0, 0, 0, 0, 3, 0 ),
-:185: ERROR:SPACING: space prohibited after that open parenthesis '('
#185: FILE: drivers/gpu/drm/xe/xe_pat.c:185:
+ [ 0] = XE2_PAT( 0, 0, 0, 0, 3, 0 ),
-:185: ERROR:SPACING: space prohibited before that close parenthesis ')'
#185: FILE: drivers/gpu/drm/xe/xe_pat.c:185:
+ [ 0] = XE2_PAT( 0, 0, 0, 0, 3, 0 ),
-:186: ERROR:SPACING: space prohibited after that open square bracket '['
#186: FILE: drivers/gpu/drm/xe/xe_pat.c:186:
+ [ 1] = XE2_PAT( 0, 0, 0, 0, 3, 2 ),
-:186: ERROR:SPACING: space prohibited after that open parenthesis '('
#186: FILE: drivers/gpu/drm/xe/xe_pat.c:186:
+ [ 1] = XE2_PAT( 0, 0, 0, 0, 3, 2 ),
-:186: ERROR:SPACING: space prohibited before that close parenthesis ')'
#186: FILE: drivers/gpu/drm/xe/xe_pat.c:186:
+ [ 1] = XE2_PAT( 0, 0, 0, 0, 3, 2 ),
-:187: ERROR:SPACING: space prohibited after that open square bracket '['
#187: FILE: drivers/gpu/drm/xe/xe_pat.c:187:
+ [ 2] = XE2_PAT( 0, 0, 0, 0, 3, 3 ),
-:187: ERROR:SPACING: space prohibited after that open parenthesis '('
#187: FILE: drivers/gpu/drm/xe/xe_pat.c:187:
+ [ 2] = XE2_PAT( 0, 0, 0, 0, 3, 3 ),
-:187: ERROR:SPACING: space prohibited before that close parenthesis ')'
#187: FILE: drivers/gpu/drm/xe/xe_pat.c:187:
+ [ 2] = XE2_PAT( 0, 0, 0, 0, 3, 3 ),
-:188: ERROR:SPACING: space prohibited after that open square bracket '['
#188: FILE: drivers/gpu/drm/xe/xe_pat.c:188:
+ [ 3] = XE2_PAT( 0, 0, 0, 3, 3, 0 ),
-:188: ERROR:SPACING: space prohibited after that open parenthesis '('
#188: FILE: drivers/gpu/drm/xe/xe_pat.c:188:
+ [ 3] = XE2_PAT( 0, 0, 0, 3, 3, 0 ),
-:188: ERROR:SPACING: space prohibited before that close parenthesis ')'
#188: FILE: drivers/gpu/drm/xe/xe_pat.c:188:
+ [ 3] = XE2_PAT( 0, 0, 0, 3, 3, 0 ),
-:189: ERROR:SPACING: space prohibited after that open square bracket '['
#189: FILE: drivers/gpu/drm/xe/xe_pat.c:189:
+ [ 4] = XE2_PAT( 0, 0, 0, 3, 0, 2 ),
-:189: ERROR:SPACING: space prohibited after that open parenthesis '('
#189: FILE: drivers/gpu/drm/xe/xe_pat.c:189:
+ [ 4] = XE2_PAT( 0, 0, 0, 3, 0, 2 ),
-:189: ERROR:SPACING: space prohibited before that close parenthesis ')'
#189: FILE: drivers/gpu/drm/xe/xe_pat.c:189:
+ [ 4] = XE2_PAT( 0, 0, 0, 3, 0, 2 ),
-:190: ERROR:SPACING: space prohibited after that open square bracket '['
#190: FILE: drivers/gpu/drm/xe/xe_pat.c:190:
+ [ 5] = XE2_PAT( 0, 0, 0, 3, 3, 2 ),
-:190: ERROR:SPACING: space prohibited after that open parenthesis '('
#190: FILE: drivers/gpu/drm/xe/xe_pat.c:190:
+ [ 5] = XE2_PAT( 0, 0, 0, 3, 3, 2 ),
-:190: ERROR:SPACING: space prohibited before that close parenthesis ')'
#190: FILE: drivers/gpu/drm/xe/xe_pat.c:190:
+ [ 5] = XE2_PAT( 0, 0, 0, 3, 3, 2 ),
-:191: ERROR:SPACING: space prohibited after that open square bracket '['
#191: FILE: drivers/gpu/drm/xe/xe_pat.c:191:
+ [ 6] = XE2_PAT( 1, 0, 0, 1, 3, 0 ),
-:191: ERROR:SPACING: space prohibited after that open parenthesis '('
#191: FILE: drivers/gpu/drm/xe/xe_pat.c:191:
+ [ 6] = XE2_PAT( 1, 0, 0, 1, 3, 0 ),
-:191: ERROR:SPACING: space prohibited before that close parenthesis ')'
#191: FILE: drivers/gpu/drm/xe/xe_pat.c:191:
+ [ 6] = XE2_PAT( 1, 0, 0, 1, 3, 0 ),
-:192: ERROR:SPACING: space prohibited after that open square bracket '['
#192: FILE: drivers/gpu/drm/xe/xe_pat.c:192:
+ [ 7] = XE2_PAT( 0, 0, 0, 3, 0, 3 ),
-:192: ERROR:SPACING: space prohibited after that open parenthesis '('
#192: FILE: drivers/gpu/drm/xe/xe_pat.c:192:
+ [ 7] = XE2_PAT( 0, 0, 0, 3, 0, 3 ),
-:192: ERROR:SPACING: space prohibited before that close parenthesis ')'
#192: FILE: drivers/gpu/drm/xe/xe_pat.c:192:
+ [ 7] = XE2_PAT( 0, 0, 0, 3, 0, 3 ),
-:193: ERROR:SPACING: space prohibited after that open square bracket '['
#193: FILE: drivers/gpu/drm/xe/xe_pat.c:193:
+ [ 8] = XE2_PAT( 0, 0, 0, 3, 0, 0 ),
-:193: ERROR:SPACING: space prohibited after that open parenthesis '('
#193: FILE: drivers/gpu/drm/xe/xe_pat.c:193:
+ [ 8] = XE2_PAT( 0, 0, 0, 3, 0, 0 ),
-:193: ERROR:SPACING: space prohibited before that close parenthesis ')'
#193: FILE: drivers/gpu/drm/xe/xe_pat.c:193:
+ [ 8] = XE2_PAT( 0, 0, 0, 3, 0, 0 ),
-:194: ERROR:SPACING: space prohibited after that open square bracket '['
#194: FILE: drivers/gpu/drm/xe/xe_pat.c:194:
+ [ 9] = XE2_PAT( 0, 1, 0, 0, 3, 0 ),
-:194: ERROR:SPACING: space prohibited after that open parenthesis '('
#194: FILE: drivers/gpu/drm/xe/xe_pat.c:194:
+ [ 9] = XE2_PAT( 0, 1, 0, 0, 3, 0 ),
-:194: ERROR:SPACING: space prohibited before that close parenthesis ')'
#194: FILE: drivers/gpu/drm/xe/xe_pat.c:194:
+ [ 9] = XE2_PAT( 0, 1, 0, 0, 3, 0 ),
-:195: ERROR:SPACING: space prohibited after that open parenthesis '('
#195: FILE: drivers/gpu/drm/xe/xe_pat.c:195:
+ [10] = XE2_PAT( 0, 1, 0, 3, 0, 0 ),
-:195: ERROR:SPACING: space prohibited before that close parenthesis ')'
#195: FILE: drivers/gpu/drm/xe/xe_pat.c:195:
+ [10] = XE2_PAT( 0, 1, 0, 3, 0, 0 ),
-:196: ERROR:SPACING: space prohibited after that open parenthesis '('
#196: FILE: drivers/gpu/drm/xe/xe_pat.c:196:
+ [11] = XE2_PAT( 1, 1, 0, 1, 3, 0 ),
-:196: ERROR:SPACING: space prohibited before that close parenthesis ')'
#196: FILE: drivers/gpu/drm/xe/xe_pat.c:196:
+ [11] = XE2_PAT( 1, 1, 0, 1, 3, 0 ),
-:197: ERROR:SPACING: space prohibited after that open parenthesis '('
#197: FILE: drivers/gpu/drm/xe/xe_pat.c:197:
+ [12] = XE2_PAT( 0, 1, 0, 3, 3, 0 ),
-:197: ERROR:SPACING: space prohibited before that close parenthesis ')'
#197: FILE: drivers/gpu/drm/xe/xe_pat.c:197:
+ [12] = XE2_PAT( 0, 1, 0, 3, 3, 0 ),
-:198: ERROR:SPACING: space prohibited after that open parenthesis '('
#198: FILE: drivers/gpu/drm/xe/xe_pat.c:198:
+ [13] = XE2_PAT( 0, 0, 0, 0, 0, 0 ),
-:198: ERROR:SPACING: space prohibited before that close parenthesis ')'
#198: FILE: drivers/gpu/drm/xe/xe_pat.c:198:
+ [13] = XE2_PAT( 0, 0, 0, 0, 0, 0 ),
-:199: ERROR:SPACING: space prohibited after that open parenthesis '('
#199: FILE: drivers/gpu/drm/xe/xe_pat.c:199:
+ [14] = XE2_PAT( 0, 1, 0, 0, 0, 0 ),
-:199: ERROR:SPACING: space prohibited before that close parenthesis ')'
#199: FILE: drivers/gpu/drm/xe/xe_pat.c:199:
+ [14] = XE2_PAT( 0, 1, 0, 0, 0, 0 ),
-:200: ERROR:SPACING: space prohibited after that open parenthesis '('
#200: FILE: drivers/gpu/drm/xe/xe_pat.c:200:
+ [15] = XE2_PAT( 1, 1, 0, 1, 1, 0 ),
-:200: ERROR:SPACING: space prohibited before that close parenthesis ')'
#200: FILE: drivers/gpu/drm/xe/xe_pat.c:200:
+ [15] = XE2_PAT( 1, 1, 0, 1, 1, 0 ),
-:201: ERROR:SPACING: space prohibited after that open parenthesis '('
#201: FILE: drivers/gpu/drm/xe/xe_pat.c:201:
+ [16] = XE2_PAT( 0, 1, 0, 0, 3, 2 ),
-:201: ERROR:SPACING: space prohibited before that close parenthesis ')'
#201: FILE: drivers/gpu/drm/xe/xe_pat.c:201:
+ [16] = XE2_PAT( 0, 1, 0, 0, 3, 2 ),
-:203: ERROR:SPACING: space prohibited after that open parenthesis '('
#203: FILE: drivers/gpu/drm/xe/xe_pat.c:203:
+ [20] = XE2_PAT( 0, 0, 1, 0, 3, 0 ),
-:203: ERROR:SPACING: space prohibited before that close parenthesis ')'
#203: FILE: drivers/gpu/drm/xe/xe_pat.c:203:
+ [20] = XE2_PAT( 0, 0, 1, 0, 3, 0 ),
-:204: ERROR:SPACING: space prohibited after that open parenthesis '('
#204: FILE: drivers/gpu/drm/xe/xe_pat.c:204:
+ [21] = XE2_PAT( 0, 1, 1, 0, 3, 0 ),
-:204: ERROR:SPACING: space prohibited before that close parenthesis ')'
#204: FILE: drivers/gpu/drm/xe/xe_pat.c:204:
+ [21] = XE2_PAT( 0, 1, 1, 0, 3, 0 ),
-:205: ERROR:SPACING: space prohibited after that open parenthesis '('
#205: FILE: drivers/gpu/drm/xe/xe_pat.c:205:
+ [22] = XE2_PAT( 0, 0, 1, 0, 3, 2 ),
-:205: ERROR:SPACING: space prohibited before that close parenthesis ')'
#205: FILE: drivers/gpu/drm/xe/xe_pat.c:205:
+ [22] = XE2_PAT( 0, 0, 1, 0, 3, 2 ),
-:206: ERROR:SPACING: space prohibited after that open parenthesis '('
#206: FILE: drivers/gpu/drm/xe/xe_pat.c:206:
+ [23] = XE2_PAT( 0, 0, 1, 0, 3, 3 ),
-:206: ERROR:SPACING: space prohibited before that close parenthesis ')'
#206: FILE: drivers/gpu/drm/xe/xe_pat.c:206:
+ [23] = XE2_PAT( 0, 0, 1, 0, 3, 3 ),
-:207: ERROR:SPACING: space prohibited after that open parenthesis '('
#207: FILE: drivers/gpu/drm/xe/xe_pat.c:207:
+ [24] = XE2_PAT( 0, 0, 2, 0, 3, 0 ),
-:207: ERROR:SPACING: space prohibited before that close parenthesis ')'
#207: FILE: drivers/gpu/drm/xe/xe_pat.c:207:
+ [24] = XE2_PAT( 0, 0, 2, 0, 3, 0 ),
-:208: ERROR:SPACING: space prohibited after that open parenthesis '('
#208: FILE: drivers/gpu/drm/xe/xe_pat.c:208:
+ [25] = XE2_PAT( 0, 1, 2, 0, 3, 0 ),
-:208: ERROR:SPACING: space prohibited before that close parenthesis ')'
#208: FILE: drivers/gpu/drm/xe/xe_pat.c:208:
+ [25] = XE2_PAT( 0, 1, 2, 0, 3, 0 ),
-:209: ERROR:SPACING: space prohibited after that open parenthesis '('
#209: FILE: drivers/gpu/drm/xe/xe_pat.c:209:
+ [26] = XE2_PAT( 0, 0, 2, 0, 3, 2 ),
-:209: ERROR:SPACING: space prohibited before that close parenthesis ')'
#209: FILE: drivers/gpu/drm/xe/xe_pat.c:209:
+ [26] = XE2_PAT( 0, 0, 2, 0, 3, 2 ),
-:210: ERROR:SPACING: space prohibited after that open parenthesis '('
#210: FILE: drivers/gpu/drm/xe/xe_pat.c:210:
+ [27] = XE2_PAT( 0, 0, 2, 0, 3, 3 ),
-:210: ERROR:SPACING: space prohibited before that close parenthesis ')'
#210: FILE: drivers/gpu/drm/xe/xe_pat.c:210:
+ [27] = XE2_PAT( 0, 0, 2, 0, 3, 3 ),
-:211: ERROR:SPACING: space prohibited after that open parenthesis '('
#211: FILE: drivers/gpu/drm/xe/xe_pat.c:211:
+ [28] = XE2_PAT( 0, 0, 3, 0, 3, 0 ),
-:211: ERROR:SPACING: space prohibited before that close parenthesis ')'
#211: FILE: drivers/gpu/drm/xe/xe_pat.c:211:
+ [28] = XE2_PAT( 0, 0, 3, 0, 3, 0 ),
-:212: ERROR:SPACING: space prohibited after that open parenthesis '('
#212: FILE: drivers/gpu/drm/xe/xe_pat.c:212:
+ [29] = XE2_PAT( 0, 1, 3, 0, 3, 0 ),
-:212: ERROR:SPACING: space prohibited before that close parenthesis ')'
#212: FILE: drivers/gpu/drm/xe/xe_pat.c:212:
+ [29] = XE2_PAT( 0, 1, 3, 0, 3, 0 ),
-:213: ERROR:SPACING: space prohibited after that open parenthesis '('
#213: FILE: drivers/gpu/drm/xe/xe_pat.c:213:
+ [30] = XE2_PAT( 0, 0, 3, 0, 3, 2 ),
-:213: ERROR:SPACING: space prohibited before that close parenthesis ')'
#213: FILE: drivers/gpu/drm/xe/xe_pat.c:213:
+ [30] = XE2_PAT( 0, 0, 3, 0, 3, 2 ),
-:214: ERROR:SPACING: space prohibited after that open parenthesis '('
#214: FILE: drivers/gpu/drm/xe/xe_pat.c:214:
+ [31] = XE2_PAT( 0, 0, 3, 0, 3, 3 ),
-:214: ERROR:SPACING: space prohibited before that close parenthesis ')'
#214: FILE: drivers/gpu/drm/xe/xe_pat.c:214:
+ [31] = XE2_PAT( 0, 0, 3, 0, 3, 3 ),
total: 68 errors, 1 warnings, 0 checks, 245 lines checked
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ CI.KUnit: success for drm/xe: Allow compressible surfaces to be 1-way coherent (rev5)
2026-01-08 1:42 [PATCH v4] drm/xe: Allow compressible surfaces to be 1-way coherent Xin Wang
2026-01-08 1:59 ` ✗ CI.checkpatch: warning for drm/xe: Allow compressible surfaces to be 1-way coherent (rev5) Patchwork
@ 2026-01-08 2:00 ` Patchwork
2026-01-08 2:33 ` ✓ Xe.CI.BAT: " Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-01-08 2:00 UTC (permalink / raw)
To: Xin Wang; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Allow compressible surfaces to be 1-way coherent (rev5)
URL : https://patchwork.freedesktop.org/series/157036/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[01:59:11] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:59:15] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[01:59:46] Starting KUnit Kernel (1/1)...
[01:59:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[01:59:47] ================== guc_buf (11 subtests) ===================
[01:59:47] [PASSED] test_smallest
[01:59:47] [PASSED] test_largest
[01:59:47] [PASSED] test_granular
[01:59:47] [PASSED] test_unique
[01:59:47] [PASSED] test_overlap
[01:59:47] [PASSED] test_reusable
[01:59:47] [PASSED] test_too_big
[01:59:47] [PASSED] test_flush
[01:59:47] [PASSED] test_lookup
[01:59:47] [PASSED] test_data
[01:59:47] [PASSED] test_class
[01:59:47] ===================== [PASSED] guc_buf =====================
[01:59:47] =================== guc_dbm (7 subtests) ===================
[01:59:47] [PASSED] test_empty
[01:59:47] [PASSED] test_default
[01:59:47] ======================== test_size ========================
[01:59:47] [PASSED] 4
[01:59:47] [PASSED] 8
[01:59:47] [PASSED] 32
[01:59:47] [PASSED] 256
[01:59:47] ==================== [PASSED] test_size ====================
[01:59:47] ======================= test_reuse ========================
[01:59:47] [PASSED] 4
[01:59:47] [PASSED] 8
[01:59:47] [PASSED] 32
[01:59:47] [PASSED] 256
[01:59:47] =================== [PASSED] test_reuse ====================
[01:59:47] =================== test_range_overlap ====================
[01:59:47] [PASSED] 4
[01:59:47] [PASSED] 8
[01:59:47] [PASSED] 32
[01:59:47] [PASSED] 256
[01:59:47] =============== [PASSED] test_range_overlap ================
[01:59:47] =================== test_range_compact ====================
[01:59:47] [PASSED] 4
[01:59:47] [PASSED] 8
[01:59:47] [PASSED] 32
[01:59:47] [PASSED] 256
[01:59:47] =============== [PASSED] test_range_compact ================
[01:59:47] ==================== test_range_spare =====================
[01:59:47] [PASSED] 4
[01:59:47] [PASSED] 8
[01:59:47] [PASSED] 32
[01:59:47] [PASSED] 256
[01:59:47] ================ [PASSED] test_range_spare =================
[01:59:47] ===================== [PASSED] guc_dbm =====================
[01:59:47] =================== guc_idm (6 subtests) ===================
[01:59:47] [PASSED] bad_init
[01:59:47] [PASSED] no_init
[01:59:47] [PASSED] init_fini
[01:59:47] [PASSED] check_used
[01:59:47] [PASSED] check_quota
[01:59:47] [PASSED] check_all
[01:59:47] ===================== [PASSED] guc_idm =====================
[01:59:47] ================== no_relay (3 subtests) ===================
[01:59:47] [PASSED] xe_drops_guc2pf_if_not_ready
[01:59:47] [PASSED] xe_drops_guc2vf_if_not_ready
[01:59:47] [PASSED] xe_rejects_send_if_not_ready
[01:59:47] ==================== [PASSED] no_relay =====================
[01:59:47] ================== pf_relay (14 subtests) ==================
[01:59:47] [PASSED] pf_rejects_guc2pf_too_short
[01:59:47] [PASSED] pf_rejects_guc2pf_too_long
[01:59:47] [PASSED] pf_rejects_guc2pf_no_payload
[01:59:47] [PASSED] pf_fails_no_payload
[01:59:47] [PASSED] pf_fails_bad_origin
[01:59:47] [PASSED] pf_fails_bad_type
[01:59:47] [PASSED] pf_txn_reports_error
[01:59:47] [PASSED] pf_txn_sends_pf2guc
[01:59:47] [PASSED] pf_sends_pf2guc
[01:59:47] [SKIPPED] pf_loopback_nop
[01:59:47] [SKIPPED] pf_loopback_echo
[01:59:47] [SKIPPED] pf_loopback_fail
[01:59:47] [SKIPPED] pf_loopback_busy
[01:59:47] [SKIPPED] pf_loopback_retry
[01:59:47] ==================== [PASSED] pf_relay =====================
[01:59:47] ================== vf_relay (3 subtests) ===================
[01:59:47] [PASSED] vf_rejects_guc2vf_too_short
[01:59:47] [PASSED] vf_rejects_guc2vf_too_long
[01:59:47] [PASSED] vf_rejects_guc2vf_no_payload
[01:59:47] ==================== [PASSED] vf_relay =====================
[01:59:47] ================ pf_gt_config (6 subtests) =================
[01:59:47] [PASSED] fair_contexts_1vf
[01:59:47] [PASSED] fair_doorbells_1vf
[01:59:47] [PASSED] fair_ggtt_1vf
[01:59:47] ====================== fair_contexts ======================
[01:59:47] [PASSED] 1 VF
[01:59:47] [PASSED] 2 VFs
[01:59:47] [PASSED] 3 VFs
[01:59:47] [PASSED] 4 VFs
[01:59:47] [PASSED] 5 VFs
[01:59:47] [PASSED] 6 VFs
[01:59:47] [PASSED] 7 VFs
[01:59:47] [PASSED] 8 VFs
[01:59:47] [PASSED] 9 VFs
[01:59:47] [PASSED] 10 VFs
[01:59:47] [PASSED] 11 VFs
[01:59:47] [PASSED] 12 VFs
[01:59:47] [PASSED] 13 VFs
[01:59:47] [PASSED] 14 VFs
[01:59:47] [PASSED] 15 VFs
[01:59:47] [PASSED] 16 VFs
[01:59:47] [PASSED] 17 VFs
[01:59:47] [PASSED] 18 VFs
[01:59:47] [PASSED] 19 VFs
[01:59:47] [PASSED] 20 VFs
[01:59:47] [PASSED] 21 VFs
[01:59:47] [PASSED] 22 VFs
[01:59:47] [PASSED] 23 VFs
[01:59:47] [PASSED] 24 VFs
[01:59:47] [PASSED] 25 VFs
[01:59:47] [PASSED] 26 VFs
[01:59:47] [PASSED] 27 VFs
[01:59:47] [PASSED] 28 VFs
[01:59:47] [PASSED] 29 VFs
[01:59:47] [PASSED] 30 VFs
[01:59:47] [PASSED] 31 VFs
[01:59:47] [PASSED] 32 VFs
[01:59:47] [PASSED] 33 VFs
[01:59:47] [PASSED] 34 VFs
[01:59:47] [PASSED] 35 VFs
[01:59:47] [PASSED] 36 VFs
[01:59:47] [PASSED] 37 VFs
[01:59:47] [PASSED] 38 VFs
[01:59:47] [PASSED] 39 VFs
[01:59:47] [PASSED] 40 VFs
[01:59:47] [PASSED] 41 VFs
[01:59:47] [PASSED] 42 VFs
[01:59:47] [PASSED] 43 VFs
[01:59:47] [PASSED] 44 VFs
[01:59:47] [PASSED] 45 VFs
[01:59:47] [PASSED] 46 VFs
[01:59:47] [PASSED] 47 VFs
[01:59:47] [PASSED] 48 VFs
[01:59:47] [PASSED] 49 VFs
[01:59:47] [PASSED] 50 VFs
[01:59:47] [PASSED] 51 VFs
[01:59:47] [PASSED] 52 VFs
[01:59:47] [PASSED] 53 VFs
[01:59:47] [PASSED] 54 VFs
[01:59:47] [PASSED] 55 VFs
[01:59:47] [PASSED] 56 VFs
[01:59:47] [PASSED] 57 VFs
[01:59:47] [PASSED] 58 VFs
[01:59:47] [PASSED] 59 VFs
[01:59:47] [PASSED] 60 VFs
[01:59:47] [PASSED] 61 VFs
[01:59:47] [PASSED] 62 VFs
[01:59:47] [PASSED] 63 VFs
[01:59:47] ================== [PASSED] fair_contexts ==================
[01:59:47] ===================== fair_doorbells ======================
[01:59:47] [PASSED] 1 VF
[01:59:47] [PASSED] 2 VFs
[01:59:47] [PASSED] 3 VFs
[01:59:47] [PASSED] 4 VFs
[01:59:47] [PASSED] 5 VFs
[01:59:47] [PASSED] 6 VFs
[01:59:47] [PASSED] 7 VFs
[01:59:47] [PASSED] 8 VFs
[01:59:47] [PASSED] 9 VFs
[01:59:47] [PASSED] 10 VFs
[01:59:47] [PASSED] 11 VFs
[01:59:47] [PASSED] 12 VFs
[01:59:47] [PASSED] 13 VFs
[01:59:47] [PASSED] 14 VFs
[01:59:47] [PASSED] 15 VFs
[01:59:47] [PASSED] 16 VFs
[01:59:47] [PASSED] 17 VFs
[01:59:47] [PASSED] 18 VFs
[01:59:47] [PASSED] 19 VFs
[01:59:47] [PASSED] 20 VFs
[01:59:47] [PASSED] 21 VFs
[01:59:47] [PASSED] 22 VFs
[01:59:47] [PASSED] 23 VFs
[01:59:47] [PASSED] 24 VFs
[01:59:47] [PASSED] 25 VFs
[01:59:47] [PASSED] 26 VFs
[01:59:47] [PASSED] 27 VFs
[01:59:47] [PASSED] 28 VFs
[01:59:47] [PASSED] 29 VFs
[01:59:47] [PASSED] 30 VFs
[01:59:47] [PASSED] 31 VFs
[01:59:47] [PASSED] 32 VFs
[01:59:47] [PASSED] 33 VFs
[01:59:47] [PASSED] 34 VFs
[01:59:47] [PASSED] 35 VFs
[01:59:47] [PASSED] 36 VFs
[01:59:47] [PASSED] 37 VFs
[01:59:47] [PASSED] 38 VFs
[01:59:47] [PASSED] 39 VFs
[01:59:47] [PASSED] 40 VFs
[01:59:47] [PASSED] 41 VFs
[01:59:47] [PASSED] 42 VFs
[01:59:47] [PASSED] 43 VFs
[01:59:47] [PASSED] 44 VFs
[01:59:47] [PASSED] 45 VFs
[01:59:47] [PASSED] 46 VFs
[01:59:47] [PASSED] 47 VFs
[01:59:47] [PASSED] 48 VFs
[01:59:47] [PASSED] 49 VFs
[01:59:47] [PASSED] 50 VFs
[01:59:47] [PASSED] 51 VFs
[01:59:47] [PASSED] 52 VFs
[01:59:47] [PASSED] 53 VFs
[01:59:47] [PASSED] 54 VFs
[01:59:47] [PASSED] 55 VFs
[01:59:47] [PASSED] 56 VFs
[01:59:47] [PASSED] 57 VFs
[01:59:47] [PASSED] 58 VFs
[01:59:47] [PASSED] 59 VFs
[01:59:47] [PASSED] 60 VFs
[01:59:47] [PASSED] 61 VFs
[01:59:47] [PASSED] 62 VFs
[01:59:47] [PASSED] 63 VFs
[01:59:47] ================= [PASSED] fair_doorbells ==================
[01:59:47] ======================== fair_ggtt ========================
[01:59:47] [PASSED] 1 VF
[01:59:47] [PASSED] 2 VFs
[01:59:47] [PASSED] 3 VFs
[01:59:47] [PASSED] 4 VFs
[01:59:47] [PASSED] 5 VFs
[01:59:47] [PASSED] 6 VFs
[01:59:47] [PASSED] 7 VFs
[01:59:47] [PASSED] 8 VFs
[01:59:47] [PASSED] 9 VFs
[01:59:47] [PASSED] 10 VFs
[01:59:47] [PASSED] 11 VFs
[01:59:47] [PASSED] 12 VFs
[01:59:47] [PASSED] 13 VFs
[01:59:47] [PASSED] 14 VFs
[01:59:47] [PASSED] 15 VFs
[01:59:47] [PASSED] 16 VFs
[01:59:47] [PASSED] 17 VFs
[01:59:47] [PASSED] 18 VFs
[01:59:47] [PASSED] 19 VFs
[01:59:47] [PASSED] 20 VFs
[01:59:47] [PASSED] 21 VFs
[01:59:47] [PASSED] 22 VFs
[01:59:47] [PASSED] 23 VFs
[01:59:47] [PASSED] 24 VFs
[01:59:47] [PASSED] 25 VFs
[01:59:47] [PASSED] 26 VFs
[01:59:47] [PASSED] 27 VFs
[01:59:47] [PASSED] 28 VFs
[01:59:47] [PASSED] 29 VFs
[01:59:47] [PASSED] 30 VFs
[01:59:47] [PASSED] 31 VFs
[01:59:47] [PASSED] 32 VFs
[01:59:47] [PASSED] 33 VFs
[01:59:47] [PASSED] 34 VFs
[01:59:47] [PASSED] 35 VFs
[01:59:47] [PASSED] 36 VFs
[01:59:47] [PASSED] 37 VFs
[01:59:47] [PASSED] 38 VFs
[01:59:47] [PASSED] 39 VFs
[01:59:47] [PASSED] 40 VFs
[01:59:47] [PASSED] 41 VFs
[01:59:47] [PASSED] 42 VFs
[01:59:47] [PASSED] 43 VFs
[01:59:47] [PASSED] 44 VFs
[01:59:47] [PASSED] 45 VFs
[01:59:47] [PASSED] 46 VFs
[01:59:47] [PASSED] 47 VFs
[01:59:47] [PASSED] 48 VFs
[01:59:47] [PASSED] 49 VFs
[01:59:47] [PASSED] 50 VFs
[01:59:47] [PASSED] 51 VFs
[01:59:47] [PASSED] 52 VFs
[01:59:47] [PASSED] 53 VFs
[01:59:47] [PASSED] 54 VFs
[01:59:47] [PASSED] 55 VFs
[01:59:47] [PASSED] 56 VFs
[01:59:47] [PASSED] 57 VFs
[01:59:47] [PASSED] 58 VFs
[01:59:47] [PASSED] 59 VFs
[01:59:47] [PASSED] 60 VFs
[01:59:47] [PASSED] 61 VFs
[01:59:47] [PASSED] 62 VFs
[01:59:47] [PASSED] 63 VFs
[01:59:47] ==================== [PASSED] fair_ggtt ====================
[01:59:47] ================== [PASSED] pf_gt_config ===================
[01:59:47] ===================== lmtt (1 subtest) =====================
[01:59:47] ======================== test_ops =========================
[01:59:47] [PASSED] 2-level
[01:59:47] [PASSED] multi-level
[01:59:47] ==================== [PASSED] test_ops =====================
[01:59:47] ====================== [PASSED] lmtt =======================
[01:59:47] ================= pf_service (11 subtests) =================
[01:59:47] [PASSED] pf_negotiate_any
[01:59:47] [PASSED] pf_negotiate_base_match
[01:59:47] [PASSED] pf_negotiate_base_newer
[01:59:47] [PASSED] pf_negotiate_base_next
[01:59:47] [SKIPPED] pf_negotiate_base_older
[01:59:47] [PASSED] pf_negotiate_base_prev
[01:59:47] [PASSED] pf_negotiate_latest_match
[01:59:47] [PASSED] pf_negotiate_latest_newer
[01:59:47] [PASSED] pf_negotiate_latest_next
[01:59:47] [SKIPPED] pf_negotiate_latest_older
[01:59:47] [SKIPPED] pf_negotiate_latest_prev
[01:59:47] =================== [PASSED] pf_service ====================
[01:59:47] ================= xe_guc_g2g (2 subtests) ==================
[01:59:47] ============== xe_live_guc_g2g_kunit_default ==============
[01:59:47] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[01:59:47] ============== xe_live_guc_g2g_kunit_allmem ===============
[01:59:47] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[01:59:47] =================== [SKIPPED] xe_guc_g2g ===================
[01:59:47] =================== xe_mocs (2 subtests) ===================
[01:59:47] ================ xe_live_mocs_kernel_kunit ================
[01:59:47] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[01:59:47] ================ xe_live_mocs_reset_kunit =================
[01:59:47] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[01:59:47] ==================== [SKIPPED] xe_mocs =====================
[01:59:47] ================= xe_migrate (2 subtests) ==================
[01:59:47] ================= xe_migrate_sanity_kunit =================
[01:59:47] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[01:59:47] ================== xe_validate_ccs_kunit ==================
[01:59:47] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[01:59:47] =================== [SKIPPED] xe_migrate ===================
[01:59:47] ================== xe_dma_buf (1 subtest) ==================
[01:59:47] ==================== xe_dma_buf_kunit =====================
[01:59:47] ================ [SKIPPED] xe_dma_buf_kunit ================
[01:59:47] =================== [SKIPPED] xe_dma_buf ===================
[01:59:47] ================= xe_bo_shrink (1 subtest) =================
[01:59:47] =================== xe_bo_shrink_kunit ====================
[01:59:47] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[01:59:47] ================== [SKIPPED] xe_bo_shrink ==================
[01:59:47] ==================== xe_bo (2 subtests) ====================
[01:59:47] ================== xe_ccs_migrate_kunit ===================
[01:59:47] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[01:59:47] ==================== xe_bo_evict_kunit ====================
[01:59:47] =============== [SKIPPED] xe_bo_evict_kunit ================
[01:59:47] ===================== [SKIPPED] xe_bo ======================
[01:59:47] ==================== args (13 subtests) ====================
[01:59:47] [PASSED] count_args_test
[01:59:47] [PASSED] call_args_example
[01:59:47] [PASSED] call_args_test
[01:59:47] [PASSED] drop_first_arg_example
[01:59:47] [PASSED] drop_first_arg_test
[01:59:47] [PASSED] first_arg_example
[01:59:47] [PASSED] first_arg_test
[01:59:47] [PASSED] last_arg_example
[01:59:47] [PASSED] last_arg_test
[01:59:47] [PASSED] pick_arg_example
[01:59:47] [PASSED] if_args_example
[01:59:47] [PASSED] if_args_test
[01:59:47] [PASSED] sep_comma_example
[01:59:47] ====================== [PASSED] args =======================
[01:59:47] =================== xe_pci (3 subtests) ====================
[01:59:47] ==================== check_graphics_ip ====================
[01:59:47] [PASSED] 12.00 Xe_LP
[01:59:47] [PASSED] 12.10 Xe_LP+
[01:59:47] [PASSED] 12.55 Xe_HPG
[01:59:47] [PASSED] 12.60 Xe_HPC
[01:59:47] [PASSED] 12.70 Xe_LPG
[01:59:47] [PASSED] 12.71 Xe_LPG
[01:59:47] [PASSED] 12.74 Xe_LPG+
[01:59:47] [PASSED] 20.01 Xe2_HPG
[01:59:47] [PASSED] 20.02 Xe2_HPG
[01:59:47] [PASSED] 20.04 Xe2_LPG
[01:59:47] [PASSED] 30.00 Xe3_LPG
[01:59:47] [PASSED] 30.01 Xe3_LPG
[01:59:47] [PASSED] 30.03 Xe3_LPG
[01:59:47] [PASSED] 30.04 Xe3_LPG
[01:59:47] [PASSED] 30.05 Xe3_LPG
[01:59:47] [PASSED] 35.11 Xe3p_XPC
[01:59:47] ================ [PASSED] check_graphics_ip ================
[01:59:47] ===================== check_media_ip ======================
[01:59:47] [PASSED] 12.00 Xe_M
[01:59:47] [PASSED] 12.55 Xe_HPM
[01:59:47] [PASSED] 13.00 Xe_LPM+
[01:59:47] [PASSED] 13.01 Xe2_HPM
[01:59:47] [PASSED] 20.00 Xe2_LPM
[01:59:47] [PASSED] 30.00 Xe3_LPM
[01:59:47] [PASSED] 30.02 Xe3_LPM
[01:59:47] [PASSED] 35.00 Xe3p_LPM
[01:59:47] [PASSED] 35.03 Xe3p_HPM
[01:59:47] ================= [PASSED] check_media_ip ==================
[01:59:47] =================== check_platform_desc ===================
[01:59:47] [PASSED] 0x9A60 (TIGERLAKE)
[01:59:47] [PASSED] 0x9A68 (TIGERLAKE)
[01:59:47] [PASSED] 0x9A70 (TIGERLAKE)
[01:59:47] [PASSED] 0x9A40 (TIGERLAKE)
[01:59:47] [PASSED] 0x9A49 (TIGERLAKE)
[01:59:47] [PASSED] 0x9A59 (TIGERLAKE)
[01:59:47] [PASSED] 0x9A78 (TIGERLAKE)
[01:59:47] [PASSED] 0x9AC0 (TIGERLAKE)
[01:59:47] [PASSED] 0x9AC9 (TIGERLAKE)
[01:59:47] [PASSED] 0x9AD9 (TIGERLAKE)
[01:59:47] [PASSED] 0x9AF8 (TIGERLAKE)
[01:59:47] [PASSED] 0x4C80 (ROCKETLAKE)
[01:59:47] [PASSED] 0x4C8A (ROCKETLAKE)
[01:59:47] [PASSED] 0x4C8B (ROCKETLAKE)
[01:59:47] [PASSED] 0x4C8C (ROCKETLAKE)
[01:59:47] [PASSED] 0x4C90 (ROCKETLAKE)
[01:59:47] [PASSED] 0x4C9A (ROCKETLAKE)
[01:59:47] [PASSED] 0x4680 (ALDERLAKE_S)
[01:59:47] [PASSED] 0x4682 (ALDERLAKE_S)
[01:59:47] [PASSED] 0x4688 (ALDERLAKE_S)
[01:59:47] [PASSED] 0x468A (ALDERLAKE_S)
[01:59:47] [PASSED] 0x468B (ALDERLAKE_S)
[01:59:47] [PASSED] 0x4690 (ALDERLAKE_S)
[01:59:47] [PASSED] 0x4692 (ALDERLAKE_S)
[01:59:47] [PASSED] 0x4693 (ALDERLAKE_S)
[01:59:47] [PASSED] 0x46A0 (ALDERLAKE_P)
[01:59:47] [PASSED] 0x46A1 (ALDERLAKE_P)
[01:59:47] [PASSED] 0x46A2 (ALDERLAKE_P)
[01:59:47] [PASSED] 0x46A3 (ALDERLAKE_P)
[01:59:47] [PASSED] 0x46A6 (ALDERLAKE_P)
[01:59:47] [PASSED] 0x46A8 (ALDERLAKE_P)
[01:59:47] [PASSED] 0x46AA (ALDERLAKE_P)
[01:59:47] [PASSED] 0x462A (ALDERLAKE_P)
[01:59:47] [PASSED] 0x4626 (ALDERLAKE_P)
[01:59:47] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[01:59:47] [PASSED] 0x46B0 (ALDERLAKE_P)
[01:59:47] [PASSED] 0x46B1 (ALDERLAKE_P)
[01:59:47] [PASSED] 0x46B2 (ALDERLAKE_P)
[01:59:47] [PASSED] 0x46B3 (ALDERLAKE_P)
[01:59:47] [PASSED] 0x46C0 (ALDERLAKE_P)
[01:59:47] [PASSED] 0x46C1 (ALDERLAKE_P)
[01:59:47] [PASSED] 0x46C2 (ALDERLAKE_P)
[01:59:47] [PASSED] 0x46C3 (ALDERLAKE_P)
[01:59:47] [PASSED] 0x46D0 (ALDERLAKE_N)
[01:59:47] [PASSED] 0x46D1 (ALDERLAKE_N)
[01:59:47] [PASSED] 0x46D2 (ALDERLAKE_N)
[01:59:47] [PASSED] 0x46D3 (ALDERLAKE_N)
[01:59:47] [PASSED] 0x46D4 (ALDERLAKE_N)
[01:59:47] [PASSED] 0xA721 (ALDERLAKE_P)
[01:59:47] [PASSED] 0xA7A1 (ALDERLAKE_P)
[01:59:47] [PASSED] 0xA7A9 (ALDERLAKE_P)
[01:59:47] [PASSED] 0xA7AC (ALDERLAKE_P)
[01:59:47] [PASSED] 0xA7AD (ALDERLAKE_P)
[01:59:47] [PASSED] 0xA720 (ALDERLAKE_P)
[01:59:47] [PASSED] 0xA7A0 (ALDERLAKE_P)
[01:59:47] [PASSED] 0xA7A8 (ALDERLAKE_P)
[01:59:47] [PASSED] 0xA7AA (ALDERLAKE_P)
[01:59:47] [PASSED] 0xA7AB (ALDERLAKE_P)
[01:59:47] [PASSED] 0xA780 (ALDERLAKE_S)
[01:59:47] [PASSED] 0xA781 (ALDERLAKE_S)
[01:59:47] [PASSED] 0xA782 (ALDERLAKE_S)
[01:59:47] [PASSED] 0xA783 (ALDERLAKE_S)
[01:59:47] [PASSED] 0xA788 (ALDERLAKE_S)
[01:59:47] [PASSED] 0xA789 (ALDERLAKE_S)
[01:59:47] [PASSED] 0xA78A (ALDERLAKE_S)
[01:59:47] [PASSED] 0xA78B (ALDERLAKE_S)
[01:59:47] [PASSED] 0x4905 (DG1)
[01:59:47] [PASSED] 0x4906 (DG1)
[01:59:47] [PASSED] 0x4907 (DG1)
[01:59:47] [PASSED] 0x4908 (DG1)
[01:59:47] [PASSED] 0x4909 (DG1)
[01:59:47] [PASSED] 0x56C0 (DG2)
[01:59:47] [PASSED] 0x56C2 (DG2)
[01:59:47] [PASSED] 0x56C1 (DG2)
[01:59:47] [PASSED] 0x7D51 (METEORLAKE)
[01:59:47] [PASSED] 0x7DD1 (METEORLAKE)
[01:59:47] [PASSED] 0x7D41 (METEORLAKE)
[01:59:47] [PASSED] 0x7D67 (METEORLAKE)
[01:59:47] [PASSED] 0xB640 (METEORLAKE)
[01:59:47] [PASSED] 0x56A0 (DG2)
[01:59:47] [PASSED] 0x56A1 (DG2)
[01:59:47] [PASSED] 0x56A2 (DG2)
[01:59:47] [PASSED] 0x56BE (DG2)
[01:59:47] [PASSED] 0x56BF (DG2)
[01:59:47] [PASSED] 0x5690 (DG2)
[01:59:47] [PASSED] 0x5691 (DG2)
[01:59:47] [PASSED] 0x5692 (DG2)
[01:59:47] [PASSED] 0x56A5 (DG2)
[01:59:47] [PASSED] 0x56A6 (DG2)
[01:59:47] [PASSED] 0x56B0 (DG2)
[01:59:47] [PASSED] 0x56B1 (DG2)
[01:59:47] [PASSED] 0x56BA (DG2)
[01:59:47] [PASSED] 0x56BB (DG2)
[01:59:47] [PASSED] 0x56BC (DG2)
[01:59:47] [PASSED] 0x56BD (DG2)
[01:59:47] [PASSED] 0x5693 (DG2)
[01:59:47] [PASSED] 0x5694 (DG2)
[01:59:47] [PASSED] 0x5695 (DG2)
[01:59:47] [PASSED] 0x56A3 (DG2)
[01:59:47] [PASSED] 0x56A4 (DG2)
[01:59:47] [PASSED] 0x56B2 (DG2)
[01:59:47] [PASSED] 0x56B3 (DG2)
[01:59:47] [PASSED] 0x5696 (DG2)
[01:59:47] [PASSED] 0x5697 (DG2)
[01:59:47] [PASSED] 0xB69 (PVC)
[01:59:47] [PASSED] 0xB6E (PVC)
[01:59:47] [PASSED] 0xBD4 (PVC)
[01:59:47] [PASSED] 0xBD5 (PVC)
[01:59:47] [PASSED] 0xBD6 (PVC)
[01:59:47] [PASSED] 0xBD7 (PVC)
[01:59:47] [PASSED] 0xBD8 (PVC)
[01:59:47] [PASSED] 0xBD9 (PVC)
[01:59:47] [PASSED] 0xBDA (PVC)
[01:59:47] [PASSED] 0xBDB (PVC)
[01:59:47] [PASSED] 0xBE0 (PVC)
[01:59:47] [PASSED] 0xBE1 (PVC)
[01:59:47] [PASSED] 0xBE5 (PVC)
[01:59:47] [PASSED] 0x7D40 (METEORLAKE)
[01:59:47] [PASSED] 0x7D45 (METEORLAKE)
[01:59:47] [PASSED] 0x7D55 (METEORLAKE)
[01:59:47] [PASSED] 0x7D60 (METEORLAKE)
[01:59:47] [PASSED] 0x7DD5 (METEORLAKE)
[01:59:47] [PASSED] 0x6420 (LUNARLAKE)
[01:59:47] [PASSED] 0x64A0 (LUNARLAKE)
[01:59:47] [PASSED] 0x64B0 (LUNARLAKE)
[01:59:47] [PASSED] 0xE202 (BATTLEMAGE)
[01:59:47] [PASSED] 0xE209 (BATTLEMAGE)
[01:59:47] [PASSED] 0xE20B (BATTLEMAGE)
[01:59:47] [PASSED] 0xE20C (BATTLEMAGE)
[01:59:47] [PASSED] 0xE20D (BATTLEMAGE)
[01:59:47] [PASSED] 0xE210 (BATTLEMAGE)
[01:59:47] [PASSED] 0xE211 (BATTLEMAGE)
[01:59:47] [PASSED] 0xE212 (BATTLEMAGE)
[01:59:47] [PASSED] 0xE216 (BATTLEMAGE)
[01:59:47] [PASSED] 0xE220 (BATTLEMAGE)
[01:59:47] [PASSED] 0xE221 (BATTLEMAGE)
[01:59:47] [PASSED] 0xE222 (BATTLEMAGE)
[01:59:47] [PASSED] 0xE223 (BATTLEMAGE)
[01:59:47] [PASSED] 0xB080 (PANTHERLAKE)
[01:59:47] [PASSED] 0xB081 (PANTHERLAKE)
[01:59:47] [PASSED] 0xB082 (PANTHERLAKE)
[01:59:47] [PASSED] 0xB083 (PANTHERLAKE)
[01:59:47] [PASSED] 0xB084 (PANTHERLAKE)
[01:59:47] [PASSED] 0xB085 (PANTHERLAKE)
[01:59:47] [PASSED] 0xB086 (PANTHERLAKE)
[01:59:47] [PASSED] 0xB087 (PANTHERLAKE)
[01:59:47] [PASSED] 0xB08F (PANTHERLAKE)
[01:59:47] [PASSED] 0xB090 (PANTHERLAKE)
[01:59:47] [PASSED] 0xB0A0 (PANTHERLAKE)
[01:59:47] [PASSED] 0xB0B0 (PANTHERLAKE)
[01:59:47] [PASSED] 0xFD80 (PANTHERLAKE)
[01:59:47] [PASSED] 0xFD81 (PANTHERLAKE)
[01:59:47] [PASSED] 0xD740 (NOVALAKE_S)
[01:59:47] [PASSED] 0xD741 (NOVALAKE_S)
[01:59:47] [PASSED] 0xD742 (NOVALAKE_S)
[01:59:47] [PASSED] 0xD743 (NOVALAKE_S)
[01:59:47] [PASSED] 0xD744 (NOVALAKE_S)
[01:59:47] [PASSED] 0xD745 (NOVALAKE_S)
[01:59:47] [PASSED] 0x674C (CRESCENTISLAND)
[01:59:47] =============== [PASSED] check_platform_desc ===============
[01:59:47] ===================== [PASSED] xe_pci ======================
[01:59:47] =================== xe_rtp (2 subtests) ====================
[01:59:47] =============== xe_rtp_process_to_sr_tests ================
[01:59:47] [PASSED] coalesce-same-reg
[01:59:47] [PASSED] no-match-no-add
[01:59:47] [PASSED] match-or
[01:59:47] [PASSED] match-or-xfail
[01:59:47] [PASSED] no-match-no-add-multiple-rules
[01:59:47] [PASSED] two-regs-two-entries
[01:59:47] [PASSED] clr-one-set-other
[01:59:47] [PASSED] set-field
[01:59:47] [PASSED] conflict-duplicate
[01:59:47] [PASSED] conflict-not-disjoint
[01:59:47] [PASSED] conflict-reg-type
[01:59:47] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[01:59:47] ================== xe_rtp_process_tests ===================
[01:59:47] [PASSED] active1
[01:59:47] [PASSED] active2
[01:59:47] [PASSED] active-inactive
[01:59:47] [PASSED] inactive-active
[01:59:47] [PASSED] inactive-1st_or_active-inactive
[01:59:47] [PASSED] inactive-2nd_or_active-inactive
[01:59:47] [PASSED] inactive-last_or_active-inactive
[01:59:47] [PASSED] inactive-no_or_active-inactive
[01:59:47] ============== [PASSED] xe_rtp_process_tests ===============
[01:59:47] ===================== [PASSED] xe_rtp ======================
[01:59:47] ==================== xe_wa (1 subtest) =====================
[01:59:47] ======================== xe_wa_gt =========================
[01:59:47] [PASSED] TIGERLAKE B0
[01:59:47] [PASSED] DG1 A0
[01:59:47] [PASSED] DG1 B0
[01:59:47] [PASSED] ALDERLAKE_S A0
[01:59:47] [PASSED] ALDERLAKE_S B0
[01:59:47] [PASSED] ALDERLAKE_S C0
[01:59:47] [PASSED] ALDERLAKE_S D0
[01:59:47] [PASSED] ALDERLAKE_P A0
[01:59:47] [PASSED] ALDERLAKE_P B0
[01:59:47] [PASSED] ALDERLAKE_P C0
[01:59:47] [PASSED] ALDERLAKE_S RPLS D0
[01:59:47] [PASSED] ALDERLAKE_P RPLU E0
[01:59:47] [PASSED] DG2 G10 C0
[01:59:47] [PASSED] DG2 G11 B1
[01:59:47] [PASSED] DG2 G12 A1
[01:59:47] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[01:59:47] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[01:59:47] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[01:59:47] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[01:59:47] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[01:59:47] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[01:59:47] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[01:59:47] ==================== [PASSED] xe_wa_gt =====================
[01:59:47] ====================== [PASSED] xe_wa ======================
[01:59:47] ============================================================
[01:59:47] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[01:59:47] Elapsed time: 36.398s total, 4.222s configuring, 31.659s building, 0.462s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[01:59:47] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:59:49] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:00:14] Starting KUnit Kernel (1/1)...
[02:00:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:00:14] ============ drm_test_pick_cmdline (2 subtests) ============
[02:00:14] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[02:00:14] =============== drm_test_pick_cmdline_named ===============
[02:00:14] [PASSED] NTSC
[02:00:14] [PASSED] NTSC-J
[02:00:14] [PASSED] PAL
[02:00:14] [PASSED] PAL-M
[02:00:14] =========== [PASSED] drm_test_pick_cmdline_named ===========
[02:00:14] ============== [PASSED] drm_test_pick_cmdline ==============
[02:00:14] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[02:00:14] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[02:00:14] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[02:00:14] =========== drm_validate_clone_mode (2 subtests) ===========
[02:00:14] ============== drm_test_check_in_clone_mode ===============
[02:00:14] [PASSED] in_clone_mode
[02:00:14] [PASSED] not_in_clone_mode
[02:00:14] ========== [PASSED] drm_test_check_in_clone_mode ===========
[02:00:14] =============== drm_test_check_valid_clones ===============
[02:00:14] [PASSED] not_in_clone_mode
[02:00:14] [PASSED] valid_clone
[02:00:14] [PASSED] invalid_clone
[02:00:14] =========== [PASSED] drm_test_check_valid_clones ===========
[02:00:14] ============= [PASSED] drm_validate_clone_mode =============
[02:00:14] ============= drm_validate_modeset (1 subtest) =============
[02:00:14] [PASSED] drm_test_check_connector_changed_modeset
[02:00:14] ============== [PASSED] drm_validate_modeset ===============
[02:00:14] ====== drm_test_bridge_get_current_state (2 subtests) ======
[02:00:14] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[02:00:14] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[02:00:14] ======== [PASSED] drm_test_bridge_get_current_state ========
[02:00:14] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[02:00:14] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[02:00:14] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[02:00:14] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[02:00:14] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[02:00:14] ============== drm_bridge_alloc (2 subtests) ===============
[02:00:14] [PASSED] drm_test_drm_bridge_alloc_basic
[02:00:14] [PASSED] drm_test_drm_bridge_alloc_get_put
[02:00:14] ================ [PASSED] drm_bridge_alloc =================
[02:00:14] ================== drm_buddy (8 subtests) ==================
[02:00:14] [PASSED] drm_test_buddy_alloc_limit
[02:00:14] [PASSED] drm_test_buddy_alloc_optimistic
[02:00:14] [PASSED] drm_test_buddy_alloc_pessimistic
[02:00:14] [PASSED] drm_test_buddy_alloc_pathological
[02:00:14] [PASSED] drm_test_buddy_alloc_contiguous
[02:00:14] [PASSED] drm_test_buddy_alloc_clear
[02:00:14] [PASSED] drm_test_buddy_alloc_range_bias
[02:00:14] [PASSED] drm_test_buddy_fragmentation_performance
[02:00:14] ==================== [PASSED] drm_buddy ====================
[02:00:14] ============= drm_cmdline_parser (40 subtests) =============
[02:00:14] [PASSED] drm_test_cmdline_force_d_only
[02:00:14] [PASSED] drm_test_cmdline_force_D_only_dvi
[02:00:14] [PASSED] drm_test_cmdline_force_D_only_hdmi
[02:00:14] [PASSED] drm_test_cmdline_force_D_only_not_digital
[02:00:14] [PASSED] drm_test_cmdline_force_e_only
[02:00:14] [PASSED] drm_test_cmdline_res
[02:00:14] [PASSED] drm_test_cmdline_res_vesa
[02:00:14] [PASSED] drm_test_cmdline_res_vesa_rblank
[02:00:14] [PASSED] drm_test_cmdline_res_rblank
[02:00:14] [PASSED] drm_test_cmdline_res_bpp
[02:00:14] [PASSED] drm_test_cmdline_res_refresh
[02:00:14] [PASSED] drm_test_cmdline_res_bpp_refresh
[02:00:14] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[02:00:14] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[02:00:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[02:00:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[02:00:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[02:00:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[02:00:14] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[02:00:14] [PASSED] drm_test_cmdline_res_margins_force_on
[02:00:14] [PASSED] drm_test_cmdline_res_vesa_margins
[02:00:14] [PASSED] drm_test_cmdline_name
[02:00:14] [PASSED] drm_test_cmdline_name_bpp
[02:00:14] [PASSED] drm_test_cmdline_name_option
[02:00:14] [PASSED] drm_test_cmdline_name_bpp_option
[02:00:14] [PASSED] drm_test_cmdline_rotate_0
[02:00:14] [PASSED] drm_test_cmdline_rotate_90
[02:00:14] [PASSED] drm_test_cmdline_rotate_180
[02:00:14] [PASSED] drm_test_cmdline_rotate_270
[02:00:14] [PASSED] drm_test_cmdline_hmirror
[02:00:14] [PASSED] drm_test_cmdline_vmirror
[02:00:14] [PASSED] drm_test_cmdline_margin_options
[02:00:14] [PASSED] drm_test_cmdline_multiple_options
[02:00:14] [PASSED] drm_test_cmdline_bpp_extra_and_option
[02:00:14] [PASSED] drm_test_cmdline_extra_and_option
[02:00:14] [PASSED] drm_test_cmdline_freestanding_options
[02:00:14] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[02:00:14] [PASSED] drm_test_cmdline_panel_orientation
[02:00:14] ================ drm_test_cmdline_invalid =================
[02:00:14] [PASSED] margin_only
[02:00:14] [PASSED] interlace_only
[02:00:14] [PASSED] res_missing_x
[02:00:14] [PASSED] res_missing_y
[02:00:14] [PASSED] res_bad_y
[02:00:14] [PASSED] res_missing_y_bpp
[02:00:14] [PASSED] res_bad_bpp
[02:00:14] [PASSED] res_bad_refresh
[02:00:14] [PASSED] res_bpp_refresh_force_on_off
[02:00:14] [PASSED] res_invalid_mode
[02:00:14] [PASSED] res_bpp_wrong_place_mode
[02:00:14] [PASSED] name_bpp_refresh
[02:00:14] [PASSED] name_refresh
[02:00:14] [PASSED] name_refresh_wrong_mode
[02:00:14] [PASSED] name_refresh_invalid_mode
[02:00:14] [PASSED] rotate_multiple
[02:00:14] [PASSED] rotate_invalid_val
[02:00:14] [PASSED] rotate_truncated
[02:00:14] [PASSED] invalid_option
[02:00:14] [PASSED] invalid_tv_option
[02:00:14] [PASSED] truncated_tv_option
[02:00:14] ============ [PASSED] drm_test_cmdline_invalid =============
[02:00:14] =============== drm_test_cmdline_tv_options ===============
[02:00:14] [PASSED] NTSC
[02:00:14] [PASSED] NTSC_443
[02:00:14] [PASSED] NTSC_J
[02:00:14] [PASSED] PAL
[02:00:14] [PASSED] PAL_M
[02:00:14] [PASSED] PAL_N
[02:00:14] [PASSED] SECAM
[02:00:14] [PASSED] MONO_525
[02:00:14] [PASSED] MONO_625
[02:00:14] =========== [PASSED] drm_test_cmdline_tv_options ===========
[02:00:14] =============== [PASSED] drm_cmdline_parser ================
[02:00:14] ========== drmm_connector_hdmi_init (20 subtests) ==========
[02:00:14] [PASSED] drm_test_connector_hdmi_init_valid
[02:00:14] [PASSED] drm_test_connector_hdmi_init_bpc_8
[02:00:14] [PASSED] drm_test_connector_hdmi_init_bpc_10
[02:00:14] [PASSED] drm_test_connector_hdmi_init_bpc_12
[02:00:14] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[02:00:14] [PASSED] drm_test_connector_hdmi_init_bpc_null
[02:00:14] [PASSED] drm_test_connector_hdmi_init_formats_empty
[02:00:14] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[02:00:14] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[02:00:14] [PASSED] supported_formats=0x9 yuv420_allowed=1
[02:00:14] [PASSED] supported_formats=0x9 yuv420_allowed=0
[02:00:14] [PASSED] supported_formats=0x3 yuv420_allowed=1
[02:00:14] [PASSED] supported_formats=0x3 yuv420_allowed=0
[02:00:14] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[02:00:14] [PASSED] drm_test_connector_hdmi_init_null_ddc
[02:00:14] [PASSED] drm_test_connector_hdmi_init_null_product
[02:00:14] [PASSED] drm_test_connector_hdmi_init_null_vendor
[02:00:14] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[02:00:14] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[02:00:14] [PASSED] drm_test_connector_hdmi_init_product_valid
[02:00:14] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[02:00:14] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[02:00:14] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[02:00:14] ========= drm_test_connector_hdmi_init_type_valid =========
[02:00:14] [PASSED] HDMI-A
[02:00:14] [PASSED] HDMI-B
[02:00:14] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[02:00:14] ======== drm_test_connector_hdmi_init_type_invalid ========
[02:00:14] [PASSED] Unknown
[02:00:14] [PASSED] VGA
[02:00:14] [PASSED] DVI-I
[02:00:14] [PASSED] DVI-D
[02:00:14] [PASSED] DVI-A
[02:00:14] [PASSED] Composite
[02:00:14] [PASSED] SVIDEO
[02:00:14] [PASSED] LVDS
[02:00:14] [PASSED] Component
[02:00:14] [PASSED] DIN
[02:00:14] [PASSED] DP
[02:00:14] [PASSED] TV
[02:00:14] [PASSED] eDP
[02:00:14] [PASSED] Virtual
[02:00:14] [PASSED] DSI
[02:00:14] [PASSED] DPI
[02:00:14] [PASSED] Writeback
[02:00:14] [PASSED] SPI
[02:00:14] [PASSED] USB
[02:00:14] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[02:00:14] ============ [PASSED] drmm_connector_hdmi_init =============
[02:00:14] ============= drmm_connector_init (3 subtests) =============
[02:00:14] [PASSED] drm_test_drmm_connector_init
[02:00:14] [PASSED] drm_test_drmm_connector_init_null_ddc
[02:00:14] ========= drm_test_drmm_connector_init_type_valid =========
[02:00:14] [PASSED] Unknown
[02:00:14] [PASSED] VGA
[02:00:14] [PASSED] DVI-I
[02:00:14] [PASSED] DVI-D
[02:00:14] [PASSED] DVI-A
[02:00:14] [PASSED] Composite
[02:00:14] [PASSED] SVIDEO
[02:00:14] [PASSED] LVDS
[02:00:14] [PASSED] Component
[02:00:14] [PASSED] DIN
[02:00:14] [PASSED] DP
[02:00:14] [PASSED] HDMI-A
[02:00:14] [PASSED] HDMI-B
[02:00:14] [PASSED] TV
[02:00:14] [PASSED] eDP
[02:00:14] [PASSED] Virtual
[02:00:14] [PASSED] DSI
[02:00:14] [PASSED] DPI
[02:00:14] [PASSED] Writeback
[02:00:14] [PASSED] SPI
[02:00:14] [PASSED] USB
[02:00:14] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[02:00:14] =============== [PASSED] drmm_connector_init ===============
[02:00:14] ========= drm_connector_dynamic_init (6 subtests) ==========
[02:00:14] [PASSED] drm_test_drm_connector_dynamic_init
[02:00:14] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[02:00:14] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[02:00:14] [PASSED] drm_test_drm_connector_dynamic_init_properties
[02:00:14] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[02:00:14] [PASSED] Unknown
[02:00:14] [PASSED] VGA
[02:00:14] [PASSED] DVI-I
[02:00:14] [PASSED] DVI-D
[02:00:14] [PASSED] DVI-A
[02:00:14] [PASSED] Composite
[02:00:14] [PASSED] SVIDEO
[02:00:14] [PASSED] LVDS
[02:00:14] [PASSED] Component
[02:00:14] [PASSED] DIN
[02:00:14] [PASSED] DP
[02:00:14] [PASSED] HDMI-A
[02:00:14] [PASSED] HDMI-B
[02:00:14] [PASSED] TV
[02:00:14] [PASSED] eDP
[02:00:14] [PASSED] Virtual
[02:00:14] [PASSED] DSI
[02:00:14] [PASSED] DPI
[02:00:14] [PASSED] Writeback
[02:00:14] [PASSED] SPI
[02:00:14] [PASSED] USB
[02:00:14] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[02:00:14] ======== drm_test_drm_connector_dynamic_init_name =========
[02:00:14] [PASSED] Unknown
[02:00:14] [PASSED] VGA
[02:00:14] [PASSED] DVI-I
[02:00:14] [PASSED] DVI-D
[02:00:14] [PASSED] DVI-A
[02:00:14] [PASSED] Composite
[02:00:14] [PASSED] SVIDEO
[02:00:14] [PASSED] LVDS
[02:00:14] [PASSED] Component
[02:00:14] [PASSED] DIN
[02:00:14] [PASSED] DP
[02:00:14] [PASSED] HDMI-A
[02:00:14] [PASSED] HDMI-B
[02:00:14] [PASSED] TV
[02:00:14] [PASSED] eDP
[02:00:14] [PASSED] Virtual
[02:00:14] [PASSED] DSI
[02:00:14] [PASSED] DPI
[02:00:14] [PASSED] Writeback
[02:00:14] [PASSED] SPI
[02:00:14] [PASSED] USB
[02:00:14] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[02:00:14] =========== [PASSED] drm_connector_dynamic_init ============
[02:00:14] ==== drm_connector_dynamic_register_early (4 subtests) =====
[02:00:14] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[02:00:14] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[02:00:14] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[02:00:14] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[02:00:14] ====== [PASSED] drm_connector_dynamic_register_early =======
[02:00:14] ======= drm_connector_dynamic_register (7 subtests) ========
[02:00:14] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[02:00:14] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[02:00:14] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[02:00:14] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[02:00:14] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[02:00:14] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[02:00:14] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[02:00:14] ========= [PASSED] drm_connector_dynamic_register ==========
[02:00:14] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[02:00:14] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[02:00:14] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[02:00:14] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[02:00:14] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[02:00:14] ========== drm_test_get_tv_mode_from_name_valid ===========
[02:00:14] [PASSED] NTSC
[02:00:14] [PASSED] NTSC-443
[02:00:14] [PASSED] NTSC-J
[02:00:14] [PASSED] PAL
[02:00:14] [PASSED] PAL-M
[02:00:14] [PASSED] PAL-N
[02:00:14] [PASSED] SECAM
[02:00:14] [PASSED] Mono
[02:00:14] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[02:00:14] [PASSED] drm_test_get_tv_mode_from_name_truncated
[02:00:14] ============ [PASSED] drm_get_tv_mode_from_name ============
[02:00:14] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[02:00:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[02:00:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[02:00:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[02:00:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[02:00:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[02:00:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[02:00:14] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[02:00:14] [PASSED] VIC 96
[02:00:14] [PASSED] VIC 97
[02:00:14] [PASSED] VIC 101
[02:00:14] [PASSED] VIC 102
[02:00:14] [PASSED] VIC 106
[02:00:14] [PASSED] VIC 107
[02:00:14] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[02:00:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[02:00:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[02:00:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[02:00:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[02:00:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[02:00:14] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[02:00:14] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[02:00:14] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[02:00:14] [PASSED] Automatic
[02:00:14] [PASSED] Full
[02:00:14] [PASSED] Limited 16:235
[02:00:14] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[02:00:14] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[02:00:14] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[02:00:14] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[02:00:14] === drm_test_drm_hdmi_connector_get_output_format_name ====
[02:00:14] [PASSED] RGB
[02:00:14] [PASSED] YUV 4:2:0
[02:00:14] [PASSED] YUV 4:2:2
[02:00:14] [PASSED] YUV 4:4:4
[02:00:14] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[02:00:14] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[02:00:14] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[02:00:14] ============= drm_damage_helper (21 subtests) ==============
[02:00:14] [PASSED] drm_test_damage_iter_no_damage
[02:00:14] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[02:00:14] [PASSED] drm_test_damage_iter_no_damage_src_moved
[02:00:14] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[02:00:14] [PASSED] drm_test_damage_iter_no_damage_not_visible
[02:00:14] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[02:00:14] [PASSED] drm_test_damage_iter_no_damage_no_fb
[02:00:14] [PASSED] drm_test_damage_iter_simple_damage
[02:00:14] [PASSED] drm_test_damage_iter_single_damage
[02:00:14] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[02:00:14] [PASSED] drm_test_damage_iter_single_damage_outside_src
[02:00:14] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[02:00:14] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[02:00:14] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[02:00:14] [PASSED] drm_test_damage_iter_single_damage_src_moved
[02:00:14] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[02:00:14] [PASSED] drm_test_damage_iter_damage
[02:00:14] [PASSED] drm_test_damage_iter_damage_one_intersect
[02:00:14] [PASSED] drm_test_damage_iter_damage_one_outside
[02:00:14] [PASSED] drm_test_damage_iter_damage_src_moved
[02:00:14] [PASSED] drm_test_damage_iter_damage_not_visible
[02:00:14] ================ [PASSED] drm_damage_helper ================
[02:00:14] ============== drm_dp_mst_helper (3 subtests) ==============
[02:00:14] ============== drm_test_dp_mst_calc_pbn_mode ==============
[02:00:14] [PASSED] Clock 154000 BPP 30 DSC disabled
[02:00:14] [PASSED] Clock 234000 BPP 30 DSC disabled
[02:00:14] [PASSED] Clock 297000 BPP 24 DSC disabled
[02:00:14] [PASSED] Clock 332880 BPP 24 DSC enabled
[02:00:14] [PASSED] Clock 324540 BPP 24 DSC enabled
[02:00:14] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[02:00:14] ============== drm_test_dp_mst_calc_pbn_div ===============
[02:00:14] [PASSED] Link rate 2000000 lane count 4
[02:00:14] [PASSED] Link rate 2000000 lane count 2
[02:00:14] [PASSED] Link rate 2000000 lane count 1
[02:00:14] [PASSED] Link rate 1350000 lane count 4
[02:00:14] [PASSED] Link rate 1350000 lane count 2
[02:00:14] [PASSED] Link rate 1350000 lane count 1
[02:00:14] [PASSED] Link rate 1000000 lane count 4
[02:00:14] [PASSED] Link rate 1000000 lane count 2
[02:00:14] [PASSED] Link rate 1000000 lane count 1
[02:00:14] [PASSED] Link rate 810000 lane count 4
[02:00:14] [PASSED] Link rate 810000 lane count 2
[02:00:14] [PASSED] Link rate 810000 lane count 1
[02:00:14] [PASSED] Link rate 540000 lane count 4
[02:00:14] [PASSED] Link rate 540000 lane count 2
[02:00:14] [PASSED] Link rate 540000 lane count 1
[02:00:14] [PASSED] Link rate 270000 lane count 4
[02:00:14] [PASSED] Link rate 270000 lane count 2
[02:00:14] [PASSED] Link rate 270000 lane count 1
[02:00:14] [PASSED] Link rate 162000 lane count 4
[02:00:14] [PASSED] Link rate 162000 lane count 2
[02:00:14] [PASSED] Link rate 162000 lane count 1
[02:00:14] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[02:00:14] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[02:00:14] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[02:00:14] [PASSED] DP_POWER_UP_PHY with port number
[02:00:14] [PASSED] DP_POWER_DOWN_PHY with port number
[02:00:14] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[02:00:14] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[02:00:14] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[02:00:14] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[02:00:14] [PASSED] DP_QUERY_PAYLOAD with port number
[02:00:14] [PASSED] DP_QUERY_PAYLOAD with VCPI
[02:00:14] [PASSED] DP_REMOTE_DPCD_READ with port number
[02:00:14] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[02:00:14] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[02:00:14] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[02:00:14] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[02:00:14] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[02:00:14] [PASSED] DP_REMOTE_I2C_READ with port number
[02:00:14] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[02:00:14] [PASSED] DP_REMOTE_I2C_READ with transactions array
[02:00:14] [PASSED] DP_REMOTE_I2C_WRITE with port number
[02:00:14] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[02:00:14] [PASSED] DP_REMOTE_I2C_WRITE with data array
[02:00:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[02:00:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[02:00:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[02:00:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[02:00:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[02:00:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[02:00:14] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[02:00:14] ================ [PASSED] drm_dp_mst_helper ================
[02:00:14] ================== drm_exec (7 subtests) ===================
[02:00:14] [PASSED] sanitycheck
[02:00:14] [PASSED] test_lock
[02:00:14] [PASSED] test_lock_unlock
[02:00:14] [PASSED] test_duplicates
[02:00:14] [PASSED] test_prepare
[02:00:14] [PASSED] test_prepare_array
[02:00:14] [PASSED] test_multiple_loops
[02:00:14] ==================== [PASSED] drm_exec =====================
[02:00:14] =========== drm_format_helper_test (17 subtests) ===========
[02:00:14] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[02:00:14] [PASSED] single_pixel_source_buffer
[02:00:14] [PASSED] single_pixel_clip_rectangle
[02:00:14] [PASSED] well_known_colors
[02:00:14] [PASSED] destination_pitch
[02:00:14] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[02:00:14] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[02:00:14] [PASSED] single_pixel_source_buffer
[02:00:14] [PASSED] single_pixel_clip_rectangle
[02:00:14] [PASSED] well_known_colors
[02:00:14] [PASSED] destination_pitch
[02:00:14] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[02:00:14] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[02:00:14] [PASSED] single_pixel_source_buffer
[02:00:14] [PASSED] single_pixel_clip_rectangle
[02:00:14] [PASSED] well_known_colors
[02:00:14] [PASSED] destination_pitch
[02:00:14] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[02:00:14] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[02:00:14] [PASSED] single_pixel_source_buffer
[02:00:14] [PASSED] single_pixel_clip_rectangle
[02:00:14] [PASSED] well_known_colors
[02:00:14] [PASSED] destination_pitch
[02:00:14] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[02:00:14] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[02:00:14] [PASSED] single_pixel_source_buffer
[02:00:14] [PASSED] single_pixel_clip_rectangle
[02:00:14] [PASSED] well_known_colors
[02:00:14] [PASSED] destination_pitch
[02:00:14] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[02:00:14] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[02:00:14] [PASSED] single_pixel_source_buffer
[02:00:14] [PASSED] single_pixel_clip_rectangle
[02:00:14] [PASSED] well_known_colors
[02:00:14] [PASSED] destination_pitch
[02:00:14] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[02:00:14] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[02:00:14] [PASSED] single_pixel_source_buffer
[02:00:14] [PASSED] single_pixel_clip_rectangle
[02:00:14] [PASSED] well_known_colors
[02:00:14] [PASSED] destination_pitch
[02:00:14] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[02:00:14] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[02:00:14] [PASSED] single_pixel_source_buffer
[02:00:14] [PASSED] single_pixel_clip_rectangle
[02:00:14] [PASSED] well_known_colors
[02:00:14] [PASSED] destination_pitch
[02:00:14] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[02:00:14] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[02:00:14] [PASSED] single_pixel_source_buffer
[02:00:14] [PASSED] single_pixel_clip_rectangle
[02:00:14] [PASSED] well_known_colors
[02:00:14] [PASSED] destination_pitch
[02:00:14] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[02:00:14] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[02:00:14] [PASSED] single_pixel_source_buffer
[02:00:14] [PASSED] single_pixel_clip_rectangle
[02:00:14] [PASSED] well_known_colors
[02:00:14] [PASSED] destination_pitch
[02:00:14] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[02:00:14] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[02:00:14] [PASSED] single_pixel_source_buffer
[02:00:14] [PASSED] single_pixel_clip_rectangle
[02:00:14] [PASSED] well_known_colors
[02:00:14] [PASSED] destination_pitch
[02:00:14] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[02:00:14] ============== drm_test_fb_xrgb8888_to_mono ===============
[02:00:14] [PASSED] single_pixel_source_buffer
[02:00:14] [PASSED] single_pixel_clip_rectangle
[02:00:14] [PASSED] well_known_colors
[02:00:14] [PASSED] destination_pitch
[02:00:14] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[02:00:14] ==================== drm_test_fb_swab =====================
[02:00:14] [PASSED] single_pixel_source_buffer
[02:00:14] [PASSED] single_pixel_clip_rectangle
[02:00:14] [PASSED] well_known_colors
[02:00:14] [PASSED] destination_pitch
[02:00:14] ================ [PASSED] drm_test_fb_swab =================
[02:00:14] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[02:00:14] [PASSED] single_pixel_source_buffer
[02:00:14] [PASSED] single_pixel_clip_rectangle
[02:00:14] [PASSED] well_known_colors
[02:00:14] [PASSED] destination_pitch
[02:00:14] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[02:00:14] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[02:00:14] [PASSED] single_pixel_source_buffer
[02:00:14] [PASSED] single_pixel_clip_rectangle
[02:00:14] [PASSED] well_known_colors
[02:00:14] [PASSED] destination_pitch
[02:00:14] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[02:00:14] ================= drm_test_fb_clip_offset =================
[02:00:14] [PASSED] pass through
[02:00:14] [PASSED] horizontal offset
[02:00:14] [PASSED] vertical offset
[02:00:14] [PASSED] horizontal and vertical offset
[02:00:14] [PASSED] horizontal offset (custom pitch)
[02:00:14] [PASSED] vertical offset (custom pitch)
[02:00:14] [PASSED] horizontal and vertical offset (custom pitch)
[02:00:14] ============= [PASSED] drm_test_fb_clip_offset =============
[02:00:14] =================== drm_test_fb_memcpy ====================
[02:00:14] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[02:00:14] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[02:00:14] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[02:00:14] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[02:00:14] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[02:00:14] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[02:00:14] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[02:00:14] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[02:00:14] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[02:00:14] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[02:00:14] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[02:00:14] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[02:00:14] =============== [PASSED] drm_test_fb_memcpy ================
[02:00:14] ============= [PASSED] drm_format_helper_test ==============
[02:00:14] ================= drm_format (18 subtests) =================
[02:00:14] [PASSED] drm_test_format_block_width_invalid
[02:00:14] [PASSED] drm_test_format_block_width_one_plane
[02:00:14] [PASSED] drm_test_format_block_width_two_plane
[02:00:14] [PASSED] drm_test_format_block_width_three_plane
[02:00:14] [PASSED] drm_test_format_block_width_tiled
[02:00:14] [PASSED] drm_test_format_block_height_invalid
[02:00:14] [PASSED] drm_test_format_block_height_one_plane
[02:00:14] [PASSED] drm_test_format_block_height_two_plane
[02:00:14] [PASSED] drm_test_format_block_height_three_plane
[02:00:14] [PASSED] drm_test_format_block_height_tiled
[02:00:14] [PASSED] drm_test_format_min_pitch_invalid
[02:00:14] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[02:00:14] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[02:00:14] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[02:00:14] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[02:00:14] [PASSED] drm_test_format_min_pitch_two_plane
[02:00:14] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[02:00:14] [PASSED] drm_test_format_min_pitch_tiled
[02:00:14] =================== [PASSED] drm_format ====================
[02:00:14] ============== drm_framebuffer (10 subtests) ===============
[02:00:14] ========== drm_test_framebuffer_check_src_coords ==========
[02:00:14] [PASSED] Success: source fits into fb
[02:00:14] [PASSED] Fail: overflowing fb with x-axis coordinate
[02:00:14] [PASSED] Fail: overflowing fb with y-axis coordinate
[02:00:14] [PASSED] Fail: overflowing fb with source width
[02:00:14] [PASSED] Fail: overflowing fb with source height
[02:00:14] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[02:00:14] [PASSED] drm_test_framebuffer_cleanup
[02:00:14] =============== drm_test_framebuffer_create ===============
[02:00:14] [PASSED] ABGR8888 normal sizes
[02:00:14] [PASSED] ABGR8888 max sizes
[02:00:14] [PASSED] ABGR8888 pitch greater than min required
[02:00:14] [PASSED] ABGR8888 pitch less than min required
[02:00:14] [PASSED] ABGR8888 Invalid width
[02:00:14] [PASSED] ABGR8888 Invalid buffer handle
[02:00:14] [PASSED] No pixel format
[02:00:14] [PASSED] ABGR8888 Width 0
[02:00:14] [PASSED] ABGR8888 Height 0
[02:00:14] [PASSED] ABGR8888 Out of bound height * pitch combination
[02:00:14] [PASSED] ABGR8888 Large buffer offset
[02:00:14] [PASSED] ABGR8888 Buffer offset for inexistent plane
[02:00:14] [PASSED] ABGR8888 Invalid flag
[02:00:14] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[02:00:14] [PASSED] ABGR8888 Valid buffer modifier
[02:00:14] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[02:00:14] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[02:00:14] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[02:00:14] [PASSED] NV12 Normal sizes
[02:00:14] [PASSED] NV12 Max sizes
[02:00:14] [PASSED] NV12 Invalid pitch
[02:00:14] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[02:00:14] [PASSED] NV12 different modifier per-plane
[02:00:14] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[02:00:14] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[02:00:14] [PASSED] NV12 Modifier for inexistent plane
[02:00:14] [PASSED] NV12 Handle for inexistent plane
[02:00:14] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[02:00:14] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[02:00:14] [PASSED] YVU420 Normal sizes
[02:00:14] [PASSED] YVU420 Max sizes
[02:00:14] [PASSED] YVU420 Invalid pitch
[02:00:14] [PASSED] YVU420 Different pitches
[02:00:14] [PASSED] YVU420 Different buffer offsets/pitches
[02:00:14] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[02:00:14] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[02:00:14] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[02:00:14] [PASSED] YVU420 Valid modifier
[02:00:14] [PASSED] YVU420 Different modifiers per plane
[02:00:14] [PASSED] YVU420 Modifier for inexistent plane
[02:00:14] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[02:00:14] [PASSED] X0L2 Normal sizes
[02:00:14] [PASSED] X0L2 Max sizes
[02:00:14] [PASSED] X0L2 Invalid pitch
[02:00:14] [PASSED] X0L2 Pitch greater than minimum required
[02:00:14] [PASSED] X0L2 Handle for inexistent plane
[02:00:14] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[02:00:14] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[02:00:14] [PASSED] X0L2 Valid modifier
[02:00:14] [PASSED] X0L2 Modifier for inexistent plane
[02:00:14] =========== [PASSED] drm_test_framebuffer_create ===========
[02:00:14] [PASSED] drm_test_framebuffer_free
[02:00:14] [PASSED] drm_test_framebuffer_init
[02:00:14] [PASSED] drm_test_framebuffer_init_bad_format
[02:00:14] [PASSED] drm_test_framebuffer_init_dev_mismatch
[02:00:14] [PASSED] drm_test_framebuffer_lookup
[02:00:14] [PASSED] drm_test_framebuffer_lookup_inexistent
[02:00:14] [PASSED] drm_test_framebuffer_modifiers_not_supported
[02:00:14] ================= [PASSED] drm_framebuffer =================
[02:00:14] ================ drm_gem_shmem (8 subtests) ================
[02:00:14] [PASSED] drm_gem_shmem_test_obj_create
[02:00:14] [PASSED] drm_gem_shmem_test_obj_create_private
[02:00:14] [PASSED] drm_gem_shmem_test_pin_pages
[02:00:14] [PASSED] drm_gem_shmem_test_vmap
[02:00:14] [PASSED] drm_gem_shmem_test_get_sg_table
[02:00:14] [PASSED] drm_gem_shmem_test_get_pages_sgt
[02:00:14] [PASSED] drm_gem_shmem_test_madvise
[02:00:14] [PASSED] drm_gem_shmem_test_purge
[02:00:14] ================== [PASSED] drm_gem_shmem ==================
[02:00:14] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[02:00:14] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[02:00:14] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[02:00:14] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[02:00:14] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[02:00:14] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[02:00:14] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[02:00:14] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[02:00:14] [PASSED] Automatic
[02:00:14] [PASSED] Full
[02:00:14] [PASSED] Limited 16:235
[02:00:14] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[02:00:14] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[02:00:14] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[02:00:14] [PASSED] drm_test_check_disable_connector
[02:00:14] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[02:00:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[02:00:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[02:00:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[02:00:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[02:00:14] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[02:00:14] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[02:00:14] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[02:00:14] [PASSED] drm_test_check_output_bpc_dvi
[02:00:14] [PASSED] drm_test_check_output_bpc_format_vic_1
[02:00:14] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[02:00:14] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[02:00:14] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[02:00:14] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[02:00:14] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[02:00:14] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[02:00:14] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[02:00:14] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[02:00:14] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[02:00:14] [PASSED] drm_test_check_broadcast_rgb_value
[02:00:14] [PASSED] drm_test_check_bpc_8_value
[02:00:14] [PASSED] drm_test_check_bpc_10_value
[02:00:14] [PASSED] drm_test_check_bpc_12_value
[02:00:14] [PASSED] drm_test_check_format_value
[02:00:14] [PASSED] drm_test_check_tmds_char_value
[02:00:14] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[02:00:14] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[02:00:14] [PASSED] drm_test_check_mode_valid
[02:00:14] [PASSED] drm_test_check_mode_valid_reject
[02:00:14] [PASSED] drm_test_check_mode_valid_reject_rate
[02:00:14] [PASSED] drm_test_check_mode_valid_reject_max_clock
[02:00:14] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[02:00:14] ================= drm_managed (2 subtests) =================
[02:00:14] [PASSED] drm_test_managed_release_action
[02:00:14] [PASSED] drm_test_managed_run_action
[02:00:14] =================== [PASSED] drm_managed ===================
[02:00:14] =================== drm_mm (6 subtests) ====================
[02:00:14] [PASSED] drm_test_mm_init
[02:00:14] [PASSED] drm_test_mm_debug
[02:00:14] [PASSED] drm_test_mm_align32
[02:00:14] [PASSED] drm_test_mm_align64
[02:00:14] [PASSED] drm_test_mm_lowest
[02:00:14] [PASSED] drm_test_mm_highest
[02:00:14] ===================== [PASSED] drm_mm ======================
[02:00:14] ============= drm_modes_analog_tv (5 subtests) =============
[02:00:14] [PASSED] drm_test_modes_analog_tv_mono_576i
[02:00:14] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[02:00:14] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[02:00:14] [PASSED] drm_test_modes_analog_tv_pal_576i
[02:00:14] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[02:00:14] =============== [PASSED] drm_modes_analog_tv ===============
[02:00:14] ============== drm_plane_helper (2 subtests) ===============
[02:00:14] =============== drm_test_check_plane_state ================
[02:00:14] [PASSED] clipping_simple
[02:00:14] [PASSED] clipping_rotate_reflect
[02:00:14] [PASSED] positioning_simple
[02:00:14] [PASSED] upscaling
[02:00:14] [PASSED] downscaling
[02:00:14] [PASSED] rounding1
[02:00:14] [PASSED] rounding2
[02:00:14] [PASSED] rounding3
[02:00:14] [PASSED] rounding4
[02:00:14] =========== [PASSED] drm_test_check_plane_state ============
[02:00:14] =========== drm_test_check_invalid_plane_state ============
[02:00:14] [PASSED] positioning_invalid
[02:00:14] [PASSED] upscaling_invalid
[02:00:14] [PASSED] downscaling_invalid
[02:00:14] ======= [PASSED] drm_test_check_invalid_plane_state ========
[02:00:14] ================ [PASSED] drm_plane_helper =================
[02:00:14] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[02:00:14] ====== drm_test_connector_helper_tv_get_modes_check =======
[02:00:14] [PASSED] None
[02:00:14] [PASSED] PAL
[02:00:14] [PASSED] NTSC
[02:00:14] [PASSED] Both, NTSC Default
[02:00:14] [PASSED] Both, PAL Default
[02:00:14] [PASSED] Both, NTSC Default, with PAL on command-line
[02:00:14] [PASSED] Both, PAL Default, with NTSC on command-line
[02:00:14] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[02:00:14] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[02:00:14] ================== drm_rect (9 subtests) ===================
[02:00:14] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[02:00:14] [PASSED] drm_test_rect_clip_scaled_not_clipped
[02:00:14] [PASSED] drm_test_rect_clip_scaled_clipped
[02:00:14] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[02:00:14] ================= drm_test_rect_intersect =================
[02:00:14] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[02:00:14] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[02:00:14] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[02:00:14] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[02:00:14] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[02:00:14] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[02:00:14] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[02:00:14] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[02:00:14] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[02:00:14] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[02:00:14] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[02:00:14] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[02:00:14] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[02:00:14] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[02:00:14] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[02:00:14] ============= [PASSED] drm_test_rect_intersect =============
[02:00:14] ================ drm_test_rect_calc_hscale ================
[02:00:14] [PASSED] normal use
[02:00:14] [PASSED] out of max range
[02:00:14] [PASSED] out of min range
[02:00:14] [PASSED] zero dst
[02:00:14] [PASSED] negative src
[02:00:14] [PASSED] negative dst
[02:00:14] ============ [PASSED] drm_test_rect_calc_hscale ============
[02:00:14] ================ drm_test_rect_calc_vscale ================
[02:00:14] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[02:00:14] [PASSED] out of max range
[02:00:14] [PASSED] out of min range
[02:00:14] [PASSED] zero dst
[02:00:15] [PASSED] negative src
[02:00:15] [PASSED] negative dst
[02:00:15] ============ [PASSED] drm_test_rect_calc_vscale ============
[02:00:15] ================== drm_test_rect_rotate ===================
[02:00:15] [PASSED] reflect-x
[02:00:15] [PASSED] reflect-y
[02:00:15] [PASSED] rotate-0
[02:00:15] [PASSED] rotate-90
[02:00:15] [PASSED] rotate-180
[02:00:15] [PASSED] rotate-270
[02:00:15] ============== [PASSED] drm_test_rect_rotate ===============
[02:00:15] ================ drm_test_rect_rotate_inv =================
[02:00:15] [PASSED] reflect-x
[02:00:15] [PASSED] reflect-y
[02:00:15] [PASSED] rotate-0
[02:00:15] [PASSED] rotate-90
[02:00:15] [PASSED] rotate-180
[02:00:15] [PASSED] rotate-270
[02:00:15] ============ [PASSED] drm_test_rect_rotate_inv =============
[02:00:15] ==================== [PASSED] drm_rect =====================
[02:00:15] ============ drm_sysfb_modeset_test (1 subtest) ============
[02:00:15] ============ drm_test_sysfb_build_fourcc_list =============
[02:00:15] [PASSED] no native formats
[02:00:15] [PASSED] XRGB8888 as native format
[02:00:15] [PASSED] remove duplicates
[02:00:15] [PASSED] convert alpha formats
[02:00:15] [PASSED] random formats
[02:00:15] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[02:00:15] ============= [PASSED] drm_sysfb_modeset_test ==============
[02:00:15] ================== drm_fixp (2 subtests) ===================
[02:00:15] [PASSED] drm_test_int2fixp
[02:00:15] [PASSED] drm_test_sm2fixp
[02:00:15] ==================== [PASSED] drm_fixp =====================
[02:00:15] ============================================================
[02:00:15] Testing complete. Ran 624 tests: passed: 624
[02:00:15] Elapsed time: 27.425s total, 1.711s configuring, 25.297s building, 0.387s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[02:00:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[02:00:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:00:26] Starting KUnit Kernel (1/1)...
[02:00:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:00:26] ================= ttm_device (5 subtests) ==================
[02:00:26] [PASSED] ttm_device_init_basic
[02:00:26] [PASSED] ttm_device_init_multiple
[02:00:26] [PASSED] ttm_device_fini_basic
[02:00:26] [PASSED] ttm_device_init_no_vma_man
[02:00:26] ================== ttm_device_init_pools ==================
[02:00:26] [PASSED] No DMA allocations, no DMA32 required
[02:00:26] [PASSED] DMA allocations, DMA32 required
[02:00:26] [PASSED] No DMA allocations, DMA32 required
[02:00:26] [PASSED] DMA allocations, no DMA32 required
[02:00:26] ============== [PASSED] ttm_device_init_pools ==============
[02:00:26] =================== [PASSED] ttm_device ====================
[02:00:26] ================== ttm_pool (8 subtests) ===================
[02:00:26] ================== ttm_pool_alloc_basic ===================
[02:00:26] [PASSED] One page
[02:00:26] [PASSED] More than one page
[02:00:26] [PASSED] Above the allocation limit
[02:00:26] [PASSED] One page, with coherent DMA mappings enabled
[02:00:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[02:00:26] ============== [PASSED] ttm_pool_alloc_basic ===============
[02:00:26] ============== ttm_pool_alloc_basic_dma_addr ==============
[02:00:26] [PASSED] One page
[02:00:26] [PASSED] More than one page
[02:00:26] [PASSED] Above the allocation limit
[02:00:26] [PASSED] One page, with coherent DMA mappings enabled
[02:00:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[02:00:26] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[02:00:26] [PASSED] ttm_pool_alloc_order_caching_match
[02:00:26] [PASSED] ttm_pool_alloc_caching_mismatch
[02:00:26] [PASSED] ttm_pool_alloc_order_mismatch
[02:00:26] [PASSED] ttm_pool_free_dma_alloc
[02:00:26] [PASSED] ttm_pool_free_no_dma_alloc
[02:00:26] [PASSED] ttm_pool_fini_basic
[02:00:26] ==================== [PASSED] ttm_pool =====================
[02:00:26] ================ ttm_resource (8 subtests) =================
[02:00:26] ================= ttm_resource_init_basic =================
[02:00:26] [PASSED] Init resource in TTM_PL_SYSTEM
[02:00:26] [PASSED] Init resource in TTM_PL_VRAM
[02:00:26] [PASSED] Init resource in a private placement
[02:00:26] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[02:00:26] ============= [PASSED] ttm_resource_init_basic =============
[02:00:26] [PASSED] ttm_resource_init_pinned
[02:00:26] [PASSED] ttm_resource_fini_basic
[02:00:26] [PASSED] ttm_resource_manager_init_basic
[02:00:26] [PASSED] ttm_resource_manager_usage_basic
[02:00:26] [PASSED] ttm_resource_manager_set_used_basic
[02:00:26] [PASSED] ttm_sys_man_alloc_basic
[02:00:26] [PASSED] ttm_sys_man_free_basic
[02:00:26] ================== [PASSED] ttm_resource ===================
[02:00:26] =================== ttm_tt (15 subtests) ===================
[02:00:26] ==================== ttm_tt_init_basic ====================
[02:00:26] [PASSED] Page-aligned size
[02:00:26] [PASSED] Extra pages requested
[02:00:26] ================ [PASSED] ttm_tt_init_basic ================
[02:00:26] [PASSED] ttm_tt_init_misaligned
[02:00:26] [PASSED] ttm_tt_fini_basic
[02:00:26] [PASSED] ttm_tt_fini_sg
[02:00:26] [PASSED] ttm_tt_fini_shmem
[02:00:26] [PASSED] ttm_tt_create_basic
[02:00:26] [PASSED] ttm_tt_create_invalid_bo_type
[02:00:26] [PASSED] ttm_tt_create_ttm_exists
[02:00:26] [PASSED] ttm_tt_create_failed
[02:00:26] [PASSED] ttm_tt_destroy_basic
[02:00:26] [PASSED] ttm_tt_populate_null_ttm
[02:00:26] [PASSED] ttm_tt_populate_populated_ttm
[02:00:26] [PASSED] ttm_tt_unpopulate_basic
[02:00:26] [PASSED] ttm_tt_unpopulate_empty_ttm
[02:00:26] [PASSED] ttm_tt_swapin_basic
[02:00:26] ===================== [PASSED] ttm_tt ======================
[02:00:26] =================== ttm_bo (14 subtests) ===================
[02:00:26] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[02:00:26] [PASSED] Cannot be interrupted and sleeps
[02:00:26] [PASSED] Cannot be interrupted, locks straight away
[02:00:26] [PASSED] Can be interrupted, sleeps
[02:00:26] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[02:00:26] [PASSED] ttm_bo_reserve_locked_no_sleep
[02:00:26] [PASSED] ttm_bo_reserve_no_wait_ticket
[02:00:26] [PASSED] ttm_bo_reserve_double_resv
[02:00:26] [PASSED] ttm_bo_reserve_interrupted
[02:00:26] [PASSED] ttm_bo_reserve_deadlock
[02:00:26] [PASSED] ttm_bo_unreserve_basic
[02:00:26] [PASSED] ttm_bo_unreserve_pinned
[02:00:26] [PASSED] ttm_bo_unreserve_bulk
[02:00:26] [PASSED] ttm_bo_fini_basic
[02:00:26] [PASSED] ttm_bo_fini_shared_resv
[02:00:26] [PASSED] ttm_bo_pin_basic
[02:00:26] [PASSED] ttm_bo_pin_unpin_resource
[02:00:26] [PASSED] ttm_bo_multiple_pin_one_unpin
[02:00:26] ===================== [PASSED] ttm_bo ======================
[02:00:26] ============== ttm_bo_validate (21 subtests) ===============
[02:00:26] ============== ttm_bo_init_reserved_sys_man ===============
[02:00:26] [PASSED] Buffer object for userspace
[02:00:26] [PASSED] Kernel buffer object
[02:00:26] [PASSED] Shared buffer object
[02:00:26] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[02:00:26] ============== ttm_bo_init_reserved_mock_man ==============
[02:00:26] [PASSED] Buffer object for userspace
[02:00:26] [PASSED] Kernel buffer object
[02:00:26] [PASSED] Shared buffer object
[02:00:26] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[02:00:26] [PASSED] ttm_bo_init_reserved_resv
[02:00:26] ================== ttm_bo_validate_basic ==================
[02:00:26] [PASSED] Buffer object for userspace
[02:00:26] [PASSED] Kernel buffer object
[02:00:26] [PASSED] Shared buffer object
[02:00:26] ============== [PASSED] ttm_bo_validate_basic ==============
[02:00:26] [PASSED] ttm_bo_validate_invalid_placement
[02:00:26] ============= ttm_bo_validate_same_placement ==============
[02:00:26] [PASSED] System manager
[02:00:26] [PASSED] VRAM manager
[02:00:26] ========= [PASSED] ttm_bo_validate_same_placement ==========
[02:00:26] [PASSED] ttm_bo_validate_failed_alloc
[02:00:26] [PASSED] ttm_bo_validate_pinned
[02:00:26] [PASSED] ttm_bo_validate_busy_placement
[02:00:26] ================ ttm_bo_validate_multihop =================
[02:00:26] [PASSED] Buffer object for userspace
[02:00:26] [PASSED] Kernel buffer object
[02:00:26] [PASSED] Shared buffer object
[02:00:26] ============ [PASSED] ttm_bo_validate_multihop =============
[02:00:26] ========== ttm_bo_validate_no_placement_signaled ==========
[02:00:26] [PASSED] Buffer object in system domain, no page vector
[02:00:26] [PASSED] Buffer object in system domain with an existing page vector
[02:00:26] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[02:00:26] ======== ttm_bo_validate_no_placement_not_signaled ========
[02:00:26] [PASSED] Buffer object for userspace
[02:00:26] [PASSED] Kernel buffer object
[02:00:26] [PASSED] Shared buffer object
[02:00:26] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[02:00:26] [PASSED] ttm_bo_validate_move_fence_signaled
[02:00:26] ========= ttm_bo_validate_move_fence_not_signaled =========
[02:00:26] [PASSED] Waits for GPU
[02:00:26] [PASSED] Tries to lock straight away
[02:00:26] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[02:00:26] [PASSED] ttm_bo_validate_happy_evict
[02:00:26] [PASSED] ttm_bo_validate_all_pinned_evict
[02:00:26] [PASSED] ttm_bo_validate_allowed_only_evict
[02:00:26] [PASSED] ttm_bo_validate_deleted_evict
[02:00:26] [PASSED] ttm_bo_validate_busy_domain_evict
[02:00:26] [PASSED] ttm_bo_validate_evict_gutting
[02:00:26] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[02:00:26] ================= [PASSED] ttm_bo_validate =================
[02:00:26] ============================================================
[02:00:26] Testing complete. Ran 101 tests: passed: 101
[02:00:26] Elapsed time: 11.377s total, 1.688s configuring, 9.473s building, 0.178s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe: Allow compressible surfaces to be 1-way coherent (rev5)
2026-01-08 1:42 [PATCH v4] drm/xe: Allow compressible surfaces to be 1-way coherent Xin Wang
2026-01-08 1:59 ` ✗ CI.checkpatch: warning for drm/xe: Allow compressible surfaces to be 1-way coherent (rev5) Patchwork
2026-01-08 2:00 ` ✓ CI.KUnit: success " Patchwork
@ 2026-01-08 2:33 ` Patchwork
2026-01-08 4:45 ` ✗ Xe.CI.Full: failure " Patchwork
2026-01-08 12:43 ` [PATCH v4] drm/xe: Allow compressible surfaces to be 1-way coherent Matthew Auld
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-01-08 2:33 UTC (permalink / raw)
To: Xin Wang; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 886 bytes --]
== Series Details ==
Series: drm/xe: Allow compressible surfaces to be 1-way coherent (rev5)
URL : https://patchwork.freedesktop.org/series/157036/
State : success
== Summary ==
CI Bug Log - changes from xe-4343-25815d6185d3efe226238025baddf01299c4b070_BAT -> xe-pw-157036v5_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-4343-25815d6185d3efe226238025baddf01299c4b070 -> xe-pw-157036v5
IGT_8692: 8692
xe-4343-25815d6185d3efe226238025baddf01299c4b070: 25815d6185d3efe226238025baddf01299c4b070
xe-pw-157036v5: 157036v5
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/index.html
[-- Attachment #2: Type: text/html, Size: 1434 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✗ Xe.CI.Full: failure for drm/xe: Allow compressible surfaces to be 1-way coherent (rev5)
2026-01-08 1:42 [PATCH v4] drm/xe: Allow compressible surfaces to be 1-way coherent Xin Wang
` (2 preceding siblings ...)
2026-01-08 2:33 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-01-08 4:45 ` Patchwork
2026-01-08 12:43 ` [PATCH v4] drm/xe: Allow compressible surfaces to be 1-way coherent Matthew Auld
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-01-08 4:45 UTC (permalink / raw)
To: Xin Wang; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 25273 bytes --]
== Series Details ==
Series: drm/xe: Allow compressible surfaces to be 1-way coherent (rev5)
URL : https://patchwork.freedesktop.org/series/157036/
State : failure
== Summary ==
CI Bug Log - changes from xe-4343-25815d6185d3efe226238025baddf01299c4b070_FULL -> xe-pw-157036v5_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-157036v5_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-157036v5_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-157036v5_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_content_protection@uevent-hdcp14:
- shard-bmg: NOTRUN -> [FAIL][1] +3 other tests fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_content_protection@uevent-hdcp14.html
#### Warnings ####
* igt@kms_content_protection@legacy-hdcp14:
- shard-lnl: [SKIP][2] ([Intel XE#6973]) -> [SKIP][3] +4 other tests skip
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-lnl-2/igt@kms_content_protection@legacy-hdcp14.html
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-lnl-1/igt@kms_content_protection@legacy-hdcp14.html
Known issues
------------
Here are the changes found in xe-pw-157036v5_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@linear-8bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#2327]) +2 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_big_fb@linear-8bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#610])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#1124]) +7 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_bw@linear-tiling-1-displays-2160x1440p:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#367]) +3 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@kms_bw@linear-tiling-1-displays-2160x1440p.html
* igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#2887]) +12 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-2:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2652] / [Intel XE#787]) +17 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-2.html
* igt@kms_chamelium_color@ctm-max:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2325]) +2 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_chamelium_color@ctm-max.html
* igt@kms_chamelium_edid@hdmi-edid-change-during-suspend:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2252]) +5 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-2/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html
* igt@kms_chamelium_sharpness_filter@filter-basic:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#6507])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_chamelium_sharpness_filter@filter-basic.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2390])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@dp-mst-suspend-resume:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#6743])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-2/igt@kms_content_protection@dp-mst-suspend-resume.html
* igt@kms_content_protection@suspend-resume@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][15] ([Intel XE#1178]) +3 other tests fail
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@kms_content_protection@suspend-resume@pipe-a-dp-2.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x10:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2320]) +4 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x170:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#2321])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [PASS][18] -> [FAIL][19] ([Intel XE#4633])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_dirtyfb@psr-dirtyfb-ioctl:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#1508])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
* igt@kms_dp_link_training@uhbr-sst:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#4354])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@kms_dp_link_training@uhbr-sst.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#4422])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html
* igt@kms_feature_discovery@chamelium:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#2372])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@psr1:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#2374]) +1 other test skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_feature_discovery@psr1.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-bmg: NOTRUN -> [INCOMPLETE][25] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-10/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#2293] / [Intel XE#2380]) +1 other test skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2293]) +1 other test skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#2380]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw:
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#2311]) +26 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#4141]) +9 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#2313]) +27 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_joiner@basic-force-ultra-joiner:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#6911])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_joiner@basic-force-ultra-joiner.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#2501])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_pipe_stress@stress-xrgb8888-yftiled:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#6912])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#2938])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#2391])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#1406] / [Intel XE#1489]) +6 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#1406] / [Intel XE#2387])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@fbc-psr2-cursor-plane-move:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +8 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_psr@fbc-psr2-cursor-plane-move.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_scaling_modes@scaling-mode-full-aspect:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#2413])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@kms_scaling_modes@scaling-mode-full-aspect.html
* igt@kms_sharpness_filter@invalid-filter-with-scaler:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#6503]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@kms_sharpness_filter@invalid-filter-with-scaler.html
* igt@kms_vrr@flip-basic:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#1499]) +1 other test skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-2/igt@kms_vrr@flip-basic.html
* igt@xe_eudebug@basic-vm-bind-metadata-discovery:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#4837]) +9 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html
* igt@xe_eudebug_online@breakpoint-many-sessions-single-tile:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#4837] / [Intel XE#6665]) +3 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-2/igt@xe_eudebug_online@breakpoint-many-sessions-single-tile.html
* igt@xe_eudebug_online@pagefault-write-stress:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#6665] / [Intel XE#6681])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@xe_eudebug_online@pagefault-write-stress.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#2322]) +7 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
* igt@xe_exec_multi_queue@max-queues-preempt-mode-basic:
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#6874]) +26 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@xe_exec_multi_queue@max-queues-preempt-mode-basic.html
* igt@xe_exec_system_allocator@many-64k-mmap-huge:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#5007])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@xe_exec_system_allocator@many-64k-mmap-huge.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma:
- shard-lnl: [PASS][50] -> [FAIL][51] ([Intel XE#5625])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-lnl-1/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-lnl-8/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
* igt@xe_exec_system_allocator@threads-many-stride-mmap-new-huge:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#4943]) +18 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@xe_exec_system_allocator@threads-many-stride-mmap-new-huge.html
* igt@xe_multigpu_svm@mgpu-coherency-fail-basic:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#6964]) +2 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@xe_multigpu_svm@mgpu-coherency-fail-basic.html
* igt@xe_pm@s2idle-d3cold-basic-exec:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#2284]) +1 other test skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@xe_pm@s2idle-d3cold-basic-exec.html
* igt@xe_pm@s2idle-multiple-execs:
- shard-bmg: [PASS][55] -> [INCOMPLETE][56] ([Intel XE#4504])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-2/igt@xe_pm@s2idle-multiple-execs.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@xe_pm@s2idle-multiple-execs.html
* igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#4733]) +1 other test skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
* igt@xe_query@multigpu-query-invalid-extension:
- shard-bmg: NOTRUN -> [SKIP][58] ([Intel XE#944]) +2 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@xe_query@multigpu-query-invalid-extension.html
#### Possible fixes ####
* igt@xe_module_load@load:
- shard-bmg: ([PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [SKIP][72]) ([Intel XE#2457]) -> ([PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77], [PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-10/igt@xe_module_load@load.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-10/igt@xe_module_load@load.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-10/igt@xe_module_load@load.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-2/igt@xe_module_load@load.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-2/igt@xe_module_load@load.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-2/igt@xe_module_load@load.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-9/igt@xe_module_load@load.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-9/igt@xe_module_load@load.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-1/igt@xe_module_load@load.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-3/igt@xe_module_load@load.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-9/igt@xe_module_load@load.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-1/igt@xe_module_load@load.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-3/igt@xe_module_load@load.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-9/igt@xe_module_load@load.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@xe_module_load@load.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@xe_module_load@load.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-1/igt@xe_module_load@load.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-1/igt@xe_module_load@load.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-9/igt@xe_module_load@load.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-1/igt@xe_module_load@load.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@xe_module_load@load.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@xe_module_load@load.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-10/igt@xe_module_load@load.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-3/igt@xe_module_load@load.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-10/igt@xe_module_load@load.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-2/igt@xe_module_load@load.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-2/igt@xe_module_load@load.html
#### Warnings ####
* igt@testdisplay:
- shard-bmg: [ABORT][86] -> [ABORT][87] ([Intel XE#6740])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4343-25815d6185d3efe226238025baddf01299c4b070/shard-bmg-10/igt@testdisplay.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/shard-bmg-1/igt@testdisplay.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2372
[Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2391
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2501
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4504
[Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
[Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#6507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6507
[Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
[Intel XE#6681]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6681
[Intel XE#6740]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6740
[Intel XE#6743]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6743
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
[Intel XE#6912]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6912
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6973]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6973
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-4343-25815d6185d3efe226238025baddf01299c4b070 -> xe-pw-157036v5
IGT_8692: 8692
xe-4343-25815d6185d3efe226238025baddf01299c4b070: 25815d6185d3efe226238025baddf01299c4b070
xe-pw-157036v5: 157036v5
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157036v5/index.html
[-- Attachment #2: Type: text/html, Size: 27831 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v4] drm/xe: Allow compressible surfaces to be 1-way coherent
2026-01-08 1:42 [PATCH v4] drm/xe: Allow compressible surfaces to be 1-way coherent Xin Wang
` (3 preceding siblings ...)
2026-01-08 4:45 ` ✗ Xe.CI.Full: failure " Patchwork
@ 2026-01-08 12:43 ` Matthew Auld
2026-01-09 1:00 ` Wang, X
4 siblings, 1 reply; 7+ messages in thread
From: Matthew Auld @ 2026-01-08 12:43 UTC (permalink / raw)
To: Xin Wang, intel-xe; +Cc: Matt Roper
On 08/01/2026 01:42, Xin Wang wrote:
> Previously, compressible surfaces were required to be non-coherent (allocated
> as WC) because compression and coherency were mutually exclusive. Starting
> with Xe3, hardware supports combining compression with 1-way coherency,
> allowing compressible surfaces to be allocated as WB memory. This provides
> applications with more efficient memory allocation by avoiding WC allocation
> overhead that can cause system stuttering and memory management challenges.
>
> The implementation adds support for compressed+coherent PAT entry for the
> xe3_lpg devices and updates the driver logic to handle the new compression
> capabilities.
>
> v2: (Matthew Auld)
> - Improved error handling with XE_IOCTL_DBG()
> - Enhanced documentation and comments
> - Fixed xe_bo_needs_ccs_pages() outdated compression assumptions
>
> v3:
> - Improve WB compression support detection by checking PAT table instead
> of version check
>
> v4:
> - Add XE_CACHE_WB_COMPRESSION, which simplifies the logic.
>
> Bspec: 71582, 59361, 59399
> Cc: Matthew Auld <matthew.auld@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Xin Wang <x.wang@intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 6 ++++
> drivers/gpu/drm/xe/xe_bo.c | 17 ++++-----
> drivers/gpu/drm/xe/xe_gt.c | 32 +++++++++++++++++
> drivers/gpu/drm/xe/xe_pat.c | 52 ++++++++++++++++++++++++----
> drivers/gpu/drm/xe/xe_pat.h | 2 ++
> drivers/gpu/drm/xe/xe_pt_types.h | 1 +
> drivers/gpu/drm/xe/xe_vm.c | 13 +++++++
> 7 files changed, 109 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index 93643da57428..24fc64fc832e 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -89,6 +89,7 @@
> #define UNIFIED_COMPRESSION_FORMAT REG_GENMASK(3, 0)
>
> #define XE2_GAMREQSTRM_CTRL XE_REG_MCR(0x4194)
> +#define EN_CMP_1WCOH REG_BIT(15)
> #define CG_DIS_CNTLBUS REG_BIT(6)
>
> #define CCS_AUX_INV XE_REG(0x4208)
> @@ -101,6 +102,11 @@
>
> #define XE2_LMEM_CFG XE_REG(0x48b0)
>
> +#define XE2_GAMWALK_CTRL 0x47e4
> +#define XE2_GAMWALK_CTRL_MEDIA XE_REG(XE2_GAMWALK_CTRL + MEDIA_GT_GSI_OFFSET)
> +#define XE2_GAMWALK_CTRL_3D XE_REG_MCR(XE2_GAMWALK_CTRL)
> +#define EN_CMP_1WCOH_GW REG_BIT(14)
> +
> #define XEHP_FLAT_CCS_BASE_ADDR XE_REG_MCR(0x4910)
> #define XEHP_FLAT_CCS_PTR REG_GENMASK(31, 8)
>
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index 8b6474cd3eaf..637adefd020d 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -29,6 +29,7 @@
> #include "xe_gt.h"
> #include "xe_map.h"
> #include "xe_migrate.h"
> +#include "xe_pat.h"
> #include "xe_pm.h"
> #include "xe_preempt_fence.h"
> #include "xe_pxp.h"
> @@ -3517,16 +3518,16 @@ bool xe_bo_needs_ccs_pages(struct xe_bo *bo)
> if (IS_DGFX(xe) && (bo->flags & XE_BO_FLAG_SYSTEM))
> return false;
>
> + /* Check if userspace explicitly requested no compression */
> + if (bo->flags & XE_BO_FLAG_NO_COMPRESSION)
> + return false;
> +
> /*
> - * Compression implies coh_none, therefore we know for sure that WB
> - * memory can't currently use compression, which is likely one of the
> - * common cases.
> - * Additionally, userspace may explicitly request no compression via the
> - * DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION flag, which should also disable
> - * CCS usage.
> + * For WB (Write-Back) CPU caching mode, check if the device
> + * supports WB compression with coherency.
> */
> - if (bo->cpu_caching == DRM_XE_GEM_CPU_CACHING_WB ||
> - bo->flags & XE_BO_FLAG_NO_COMPRESSION)
> + if (bo->cpu_caching == DRM_XE_GEM_CPU_CACHING_WB &&
> + xe->pat.idx[XE_CACHE_WB_COMPRESSION] == XE_PAT_INVALID_IDX)
> return false;
>
> return true;
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index 313ce83ab0e5..04dbf995a18b 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -140,6 +140,36 @@ static void xe_gt_disable_host_l2_vram(struct xe_gt *gt)
> xe_gt_mcr_multicast_write(gt, XE2_GAMREQSTRM_CTRL, reg);
> }
>
> +static void xe_gt_enable_comp_1wcoh(struct xe_gt *gt)
> +{
> + struct xe_device *xe = gt_to_xe(gt);
> + unsigned int fw_ref;
> + u32 reg;
> +
> + if (IS_SRIOV_VF(xe))
> + return;
> +
> + if (GRAPHICS_VER(xe) >= 30 && xe->info.has_flat_ccs) {
> + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
> + if (!fw_ref)
> + return;
> +
> + reg = xe_gt_mcr_unicast_read_any(gt, XE2_GAMREQSTRM_CTRL);
> + reg |= EN_CMP_1WCOH;
> + xe_gt_mcr_multicast_write(gt, XE2_GAMREQSTRM_CTRL, reg);
> +
> + if (xe_gt_is_media_type(gt)) {
> + xe_mmio_rmw32(>->mmio, XE2_GAMWALK_CTRL_MEDIA, 0, EN_CMP_1WCOH_GW);
> + } else {
> + reg = xe_gt_mcr_unicast_read_any(gt, XE2_GAMWALK_CTRL_3D);
> + reg |= EN_CMP_1WCOH_GW;
> + xe_gt_mcr_multicast_write(gt, XE2_GAMWALK_CTRL_3D, reg);
> + }
> +
> + xe_force_wake_put(gt_to_fw(gt), fw_ref);
> + }
> +}
> +
> static void gt_reset_worker(struct work_struct *w);
>
> static int emit_job_sync(struct xe_exec_queue *q, struct xe_bb *bb,
> @@ -466,6 +496,7 @@ static int gt_init_with_gt_forcewake(struct xe_gt *gt)
> xe_gt_topology_init(gt);
> xe_gt_mcr_init(gt);
> xe_gt_enable_host_l2_vram(gt);
> + xe_gt_enable_comp_1wcoh(gt);
>
> if (xe_gt_is_main_type(gt)) {
> err = xe_ggtt_init(gt_to_tile(gt)->mem.ggtt);
> @@ -745,6 +776,7 @@ static int do_gt_restart(struct xe_gt *gt)
> xe_pat_init(gt);
>
> xe_gt_enable_host_l2_vram(gt);
> + xe_gt_enable_comp_1wcoh(gt);
>
> xe_gt_mcr_set_implicit_defaults(gt);
> xe_reg_sr_apply_mmio(>->reg_sr, gt);
> diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c
> index 2c3375e0250b..14d0dce5190a 100644
> --- a/drivers/gpu/drm/xe/xe_pat.c
> +++ b/drivers/gpu/drm/xe/xe_pat.c
> @@ -132,9 +132,10 @@ static const struct xe_pat_table_entry xelpg_pat_table[] = {
> * in the table.
> *
> * Note: There is an implicit assumption in the driver that compression and
> - * coh_1way+ are mutually exclusive. If this is ever not true then userptr
> - * and imported dma-buf from external device will have uncleared ccs state. See
> - * also xe_bo_needs_ccs_pages().
> + * coh_1way+ are mutually exclusive for platforms prior to Xe3. Starting
> + * with Xe3, compression can be combined with coherency. If using compression
> + * with coherency, userptr and imported dma-buf from external device will
> + * have uncleared ccs state. See also xe_bo_needs_ccs_pages().
> */
> #define XE2_PAT(no_promote, comp_en, l3clos, l3_policy, l4_policy, __coh_mode) \
> { \
> @@ -144,8 +145,7 @@ static const struct xe_pat_table_entry xelpg_pat_table[] = {
> REG_FIELD_PREP(XE2_L3_POLICY, l3_policy) | \
> REG_FIELD_PREP(XE2_L4_POLICY, l4_policy) | \
> REG_FIELD_PREP(XE2_COH_MODE, __coh_mode), \
> - .coh_mode = (BUILD_BUG_ON_ZERO(__coh_mode && comp_en) || __coh_mode) ? \
> - XE_COH_AT_LEAST_1WAY : XE_COH_NONE, \
> + .coh_mode = __coh_mode ? XE_COH_AT_LEAST_1WAY : XE_COH_NONE, \
> .valid = 1 \
> }
>
> @@ -181,6 +181,38 @@ static const struct xe_pat_table_entry xe2_pat_table[] = {
> [31] = XE2_PAT( 0, 0, 3, 0, 3, 3 ),
> };
>
> +static const struct xe_pat_table_entry xe3_lpg_pat_table[] = {
> + [ 0] = XE2_PAT( 0, 0, 0, 0, 3, 0 ),
> + [ 1] = XE2_PAT( 0, 0, 0, 0, 3, 2 ),
> + [ 2] = XE2_PAT( 0, 0, 0, 0, 3, 3 ),
> + [ 3] = XE2_PAT( 0, 0, 0, 3, 3, 0 ),
> + [ 4] = XE2_PAT( 0, 0, 0, 3, 0, 2 ),
> + [ 5] = XE2_PAT( 0, 0, 0, 3, 3, 2 ),
> + [ 6] = XE2_PAT( 1, 0, 0, 1, 3, 0 ),
> + [ 7] = XE2_PAT( 0, 0, 0, 3, 0, 3 ),
> + [ 8] = XE2_PAT( 0, 0, 0, 3, 0, 0 ),
> + [ 9] = XE2_PAT( 0, 1, 0, 0, 3, 0 ),
> + [10] = XE2_PAT( 0, 1, 0, 3, 0, 0 ),
> + [11] = XE2_PAT( 1, 1, 0, 1, 3, 0 ),
> + [12] = XE2_PAT( 0, 1, 0, 3, 3, 0 ),
> + [13] = XE2_PAT( 0, 0, 0, 0, 0, 0 ),
> + [14] = XE2_PAT( 0, 1, 0, 0, 0, 0 ),
> + [15] = XE2_PAT( 1, 1, 0, 1, 1, 0 ),
> + [16] = XE2_PAT( 0, 1, 0, 0, 3, 2 ),
> + /* 17..19 are reserved; leave set to all 0's */
> + [20] = XE2_PAT( 0, 0, 1, 0, 3, 0 ),
> + [21] = XE2_PAT( 0, 1, 1, 0, 3, 0 ),
> + [22] = XE2_PAT( 0, 0, 1, 0, 3, 2 ),
> + [23] = XE2_PAT( 0, 0, 1, 0, 3, 3 ),
> + [24] = XE2_PAT( 0, 0, 2, 0, 3, 0 ),
> + [25] = XE2_PAT( 0, 1, 2, 0, 3, 0 ),
> + [26] = XE2_PAT( 0, 0, 2, 0, 3, 2 ),
> + [27] = XE2_PAT( 0, 0, 2, 0, 3, 3 ),
> + [28] = XE2_PAT( 0, 0, 3, 0, 3, 0 ),
> + [29] = XE2_PAT( 0, 1, 3, 0, 3, 0 ),
> + [30] = XE2_PAT( 0, 0, 3, 0, 3, 2 ),
> + [31] = XE2_PAT( 0, 0, 3, 0, 3, 3 ),
> +};
> /* Special PAT values programmed outside the main table */
> static const struct xe_pat_table_entry xe2_pat_ats = XE2_PAT( 0, 0, 0, 0, 3, 3 );
> static const struct xe_pat_table_entry xe2_pat_pta = XE2_PAT( 0, 0, 0, 0, 3, 0 );
> @@ -490,6 +522,7 @@ static const struct xe_pat_ops xe3p_xpc_pat_ops = {
>
> void xe_pat_init_early(struct xe_device *xe)
> {
> + xe->pat.idx[XE_CACHE_WB_COMPRESSION] = XE_PAT_INVALID_IDX;
As a follow up series we could maybe also repeat this for
XE_CACHE_NONE_COMPRESSION? And maybe also add some asserts in places
like pte_encode_pat_index() to check that we never see such an index, or
perhaps add a helper accessor function for turning cache mode into
pat_index which can check there?
> if (GRAPHICS_VERx100(xe) == 3511) {
> xe->pat.ops = &xe3p_xpc_pat_ops;
> xe->pat.table = xe3p_xpc_pat_table;
> @@ -501,7 +534,12 @@ void xe_pat_init_early(struct xe_device *xe)
> xe->pat.idx[XE_CACHE_WB] = 2;
> } else if (GRAPHICS_VER(xe) == 30 || GRAPHICS_VER(xe) == 20) {
> xe->pat.ops = &xe2_pat_ops;
> - xe->pat.table = xe2_pat_table;
> + if (GRAPHICS_VER(xe) == 30) {
> + xe->pat.table = xe3_lpg_pat_table;
> + xe->pat.idx[XE_CACHE_WB_COMPRESSION] = 16;
> + } else {
> + xe->pat.table = xe2_pat_table;
> + }
> xe->pat.pat_ats = &xe2_pat_ats;
> if (IS_DGFX(xe))
> xe->pat.pat_pta = &xe2_pat_pta;
> @@ -658,6 +696,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p)
> if (GRAPHICS_VER(xe) >= 20) {
> drm_printf(p, "IDX[XE_CACHE_NONE_COMPRESSION] = %d\n",
> xe->pat.idx[XE_CACHE_NONE_COMPRESSION]);
> + drm_printf(p, "IDX[XE_CACHE_WB_COMPRESSION] = %d\n",
> + xe->pat.idx[XE_CACHE_WB_COMPRESSION]);
> }
>
> return 0;
> diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h
> index d5dadfb7f924..1b2c7d3c7c16 100644
> --- a/drivers/gpu/drm/xe/xe_pat.h
> +++ b/drivers/gpu/drm/xe/xe_pat.h
> @@ -12,6 +12,8 @@ struct drm_printer;
> struct xe_device;
> struct xe_gt;
>
> +#define XE_PAT_INVALID_IDX U32_MAX
Would U16_MAX be better match here? I believe all the lower level places
use u16 for the index. Perhaps that could be cleaned up also at some
point so we use u16 everywhere.
Otherwise I think lgtm.
> +
> /**
> * struct xe_pat_table_entry - The pat_index encoding and other meta information.
> */
> diff --git a/drivers/gpu/drm/xe/xe_pt_types.h b/drivers/gpu/drm/xe/xe_pt_types.h
> index 88fabf8e2655..84b51d3762a4 100644
> --- a/drivers/gpu/drm/xe/xe_pt_types.h
> +++ b/drivers/gpu/drm/xe/xe_pt_types.h
> @@ -20,6 +20,7 @@ enum xe_cache_level {
> XE_CACHE_WT,
> XE_CACHE_WB,
> XE_CACHE_NONE_COMPRESSION, /*UC + COH_NONE + COMPRESSION */
> + XE_CACHE_WB_COMPRESSION,
> __XE_CACHE_LEVEL_COUNT,
> };
>
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index a07d8b53de66..481ee7763b09 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -3405,6 +3405,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
> DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR;
> u16 pat_index = (*bind_ops)[i].pat_index;
> u16 coh_mode;
> + bool comp_en;
>
> if (XE_IOCTL_DBG(xe, is_cpu_addr_mirror &&
> (!xe_vm_in_fault_mode(vm) ||
> @@ -3421,6 +3422,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
> pat_index = array_index_nospec(pat_index, xe->pat.n_entries);
> (*bind_ops)[i].pat_index = pat_index;
> coh_mode = xe_pat_index_get_coh_mode(xe, pat_index);
> + comp_en = xe_pat_index_get_comp_en(xe, pat_index);
> if (XE_IOCTL_DBG(xe, !coh_mode)) { /* hw reserved */
> err = -EINVAL;
> goto free_bind_ops;
> @@ -3451,6 +3453,8 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
> op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
> XE_IOCTL_DBG(xe, coh_mode == XE_COH_NONE &&
> op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
> + XE_IOCTL_DBG(xe, comp_en &&
> + op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
> XE_IOCTL_DBG(xe, op == DRM_XE_VM_BIND_OP_MAP_USERPTR &&
> !IS_ENABLED(CONFIG_DRM_GPUSVM)) ||
> XE_IOCTL_DBG(xe, obj &&
> @@ -3529,6 +3533,7 @@ static int xe_vm_bind_ioctl_validate_bo(struct xe_device *xe, struct xe_bo *bo,
> u16 pat_index, u32 op, u32 bind_flags)
> {
> u16 coh_mode;
> + bool comp_en;
>
> if (XE_IOCTL_DBG(xe, (bo->flags & XE_BO_FLAG_NO_COMPRESSION) &&
> xe_pat_index_get_comp_en(xe, pat_index)))
> @@ -3574,6 +3579,14 @@ static int xe_vm_bind_ioctl_validate_bo(struct xe_device *xe, struct xe_bo *bo,
> return -EINVAL;
> }
>
> + /*
> + * Ensures that imported buffer objects (dma-bufs) are not mapped
> + * with a PAT index that enables compression.
> + */
> + comp_en = xe_pat_index_get_comp_en(xe, pat_index);
> + if (XE_IOCTL_DBG(xe, bo->ttm.base.import_attach && comp_en))
> + return -EINVAL;
> +
> /* If a BO is protected it can only be mapped if the key is still valid */
> if ((bind_flags & DRM_XE_VM_BIND_FLAG_CHECK_PXP) && xe_bo_is_protected(bo) &&
> op != DRM_XE_VM_BIND_OP_UNMAP && op != DRM_XE_VM_BIND_OP_UNMAP_ALL)
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v4] drm/xe: Allow compressible surfaces to be 1-way coherent
2026-01-08 12:43 ` [PATCH v4] drm/xe: Allow compressible surfaces to be 1-way coherent Matthew Auld
@ 2026-01-09 1:00 ` Wang, X
0 siblings, 0 replies; 7+ messages in thread
From: Wang, X @ 2026-01-09 1:00 UTC (permalink / raw)
To: Matthew Auld, intel-xe; +Cc: Matt Roper
On 1/8/2026 04:43, Matthew Auld wrote:
> On 08/01/2026 01:42, Xin Wang wrote:
>> Previously, compressible surfaces were required to be non-coherent
>> (allocated
>> as WC) because compression and coherency were mutually exclusive.
>> Starting
>> with Xe3, hardware supports combining compression with 1-way coherency,
>> allowing compressible surfaces to be allocated as WB memory. This
>> provides
>> applications with more efficient memory allocation by avoiding WC
>> allocation
>> overhead that can cause system stuttering and memory management
>> challenges.
>>
>> The implementation adds support for compressed+coherent PAT entry for
>> the
>> xe3_lpg devices and updates the driver logic to handle the new
>> compression
>> capabilities.
>>
>> v2: (Matthew Auld)
>> - Improved error handling with XE_IOCTL_DBG()
>> - Enhanced documentation and comments
>> - Fixed xe_bo_needs_ccs_pages() outdated compression assumptions
>>
>> v3:
>> - Improve WB compression support detection by checking PAT table
>> instead
>> of version check
>>
>> v4:
>> - Add XE_CACHE_WB_COMPRESSION, which simplifies the logic.
>>
>> Bspec: 71582, 59361, 59399
>> Cc: Matthew Auld <matthew.auld@intel.com>
>> Cc: Matt Roper <matthew.d.roper@intel.com>
>> Signed-off-by: Xin Wang <x.wang@intel.com>
>> ---
>> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 6 ++++
>> drivers/gpu/drm/xe/xe_bo.c | 17 ++++-----
>> drivers/gpu/drm/xe/xe_gt.c | 32 +++++++++++++++++
>> drivers/gpu/drm/xe/xe_pat.c | 52 ++++++++++++++++++++++++----
>> drivers/gpu/drm/xe/xe_pat.h | 2 ++
>> drivers/gpu/drm/xe/xe_pt_types.h | 1 +
>> drivers/gpu/drm/xe/xe_vm.c | 13 +++++++
>> 7 files changed, 109 insertions(+), 14 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> index 93643da57428..24fc64fc832e 100644
>> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> @@ -89,6 +89,7 @@
>> #define UNIFIED_COMPRESSION_FORMAT REG_GENMASK(3, 0)
>> #define XE2_GAMREQSTRM_CTRL XE_REG_MCR(0x4194)
>> +#define EN_CMP_1WCOH REG_BIT(15)
>> #define CG_DIS_CNTLBUS REG_BIT(6)
>> #define CCS_AUX_INV XE_REG(0x4208)
>> @@ -101,6 +102,11 @@
>> #define XE2_LMEM_CFG XE_REG(0x48b0)
>> +#define XE2_GAMWALK_CTRL 0x47e4
>> +#define XE2_GAMWALK_CTRL_MEDIA XE_REG(XE2_GAMWALK_CTRL +
>> MEDIA_GT_GSI_OFFSET)
>> +#define XE2_GAMWALK_CTRL_3D XE_REG_MCR(XE2_GAMWALK_CTRL)
>> +#define EN_CMP_1WCOH_GW REG_BIT(14)
>> +
>> #define XEHP_FLAT_CCS_BASE_ADDR XE_REG_MCR(0x4910)
>> #define XEHP_FLAT_CCS_PTR REG_GENMASK(31, 8)
>> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
>> index 8b6474cd3eaf..637adefd020d 100644
>> --- a/drivers/gpu/drm/xe/xe_bo.c
>> +++ b/drivers/gpu/drm/xe/xe_bo.c
>> @@ -29,6 +29,7 @@
>> #include "xe_gt.h"
>> #include "xe_map.h"
>> #include "xe_migrate.h"
>> +#include "xe_pat.h"
>> #include "xe_pm.h"
>> #include "xe_preempt_fence.h"
>> #include "xe_pxp.h"
>> @@ -3517,16 +3518,16 @@ bool xe_bo_needs_ccs_pages(struct xe_bo *bo)
>> if (IS_DGFX(xe) && (bo->flags & XE_BO_FLAG_SYSTEM))
>> return false;
>> + /* Check if userspace explicitly requested no compression */
>> + if (bo->flags & XE_BO_FLAG_NO_COMPRESSION)
>> + return false;
>> +
>> /*
>> - * Compression implies coh_none, therefore we know for sure that WB
>> - * memory can't currently use compression, which is likely one
>> of the
>> - * common cases.
>> - * Additionally, userspace may explicitly request no compression
>> via the
>> - * DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION flag, which should also
>> disable
>> - * CCS usage.
>> + * For WB (Write-Back) CPU caching mode, check if the device
>> + * supports WB compression with coherency.
>> */
>> - if (bo->cpu_caching == DRM_XE_GEM_CPU_CACHING_WB ||
>> - bo->flags & XE_BO_FLAG_NO_COMPRESSION)
>> + if (bo->cpu_caching == DRM_XE_GEM_CPU_CACHING_WB &&
>> + xe->pat.idx[XE_CACHE_WB_COMPRESSION] == XE_PAT_INVALID_IDX)
>> return false;
>> return true;
>> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
>> index 313ce83ab0e5..04dbf995a18b 100644
>> --- a/drivers/gpu/drm/xe/xe_gt.c
>> +++ b/drivers/gpu/drm/xe/xe_gt.c
>> @@ -140,6 +140,36 @@ static void xe_gt_disable_host_l2_vram(struct
>> xe_gt *gt)
>> xe_gt_mcr_multicast_write(gt, XE2_GAMREQSTRM_CTRL, reg);
>> }
>> +static void xe_gt_enable_comp_1wcoh(struct xe_gt *gt)
>> +{
>> + struct xe_device *xe = gt_to_xe(gt);
>> + unsigned int fw_ref;
>> + u32 reg;
>> +
>> + if (IS_SRIOV_VF(xe))
>> + return;
>> +
>> + if (GRAPHICS_VER(xe) >= 30 && xe->info.has_flat_ccs) {
>> + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
>> + if (!fw_ref)
>> + return;
>> +
>> + reg = xe_gt_mcr_unicast_read_any(gt, XE2_GAMREQSTRM_CTRL);
>> + reg |= EN_CMP_1WCOH;
>> + xe_gt_mcr_multicast_write(gt, XE2_GAMREQSTRM_CTRL, reg);
>> +
>> + if (xe_gt_is_media_type(gt)) {
>> + xe_mmio_rmw32(>->mmio, XE2_GAMWALK_CTRL_MEDIA, 0,
>> EN_CMP_1WCOH_GW);
>> + } else {
>> + reg = xe_gt_mcr_unicast_read_any(gt, XE2_GAMWALK_CTRL_3D);
>> + reg |= EN_CMP_1WCOH_GW;
>> + xe_gt_mcr_multicast_write(gt, XE2_GAMWALK_CTRL_3D, reg);
>> + }
>> +
>> + xe_force_wake_put(gt_to_fw(gt), fw_ref);
>> + }
>> +}
>> +
>> static void gt_reset_worker(struct work_struct *w);
>> static int emit_job_sync(struct xe_exec_queue *q, struct xe_bb *bb,
>> @@ -466,6 +496,7 @@ static int gt_init_with_gt_forcewake(struct xe_gt
>> *gt)
>> xe_gt_topology_init(gt);
>> xe_gt_mcr_init(gt);
>> xe_gt_enable_host_l2_vram(gt);
>> + xe_gt_enable_comp_1wcoh(gt);
>> if (xe_gt_is_main_type(gt)) {
>> err = xe_ggtt_init(gt_to_tile(gt)->mem.ggtt);
>> @@ -745,6 +776,7 @@ static int do_gt_restart(struct xe_gt *gt)
>> xe_pat_init(gt);
>> xe_gt_enable_host_l2_vram(gt);
>> + xe_gt_enable_comp_1wcoh(gt);
>> xe_gt_mcr_set_implicit_defaults(gt);
>> xe_reg_sr_apply_mmio(>->reg_sr, gt);
>> diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c
>> index 2c3375e0250b..14d0dce5190a 100644
>> --- a/drivers/gpu/drm/xe/xe_pat.c
>> +++ b/drivers/gpu/drm/xe/xe_pat.c
>> @@ -132,9 +132,10 @@ static const struct xe_pat_table_entry
>> xelpg_pat_table[] = {
>> * in the table.
>> *
>> * Note: There is an implicit assumption in the driver that
>> compression and
>> - * coh_1way+ are mutually exclusive. If this is ever not true then
>> userptr
>> - * and imported dma-buf from external device will have uncleared ccs
>> state. See
>> - * also xe_bo_needs_ccs_pages().
>> + * coh_1way+ are mutually exclusive for platforms prior to Xe3.
>> Starting
>> + * with Xe3, compression can be combined with coherency. If using
>> compression
>> + * with coherency, userptr and imported dma-buf from external device
>> will
>> + * have uncleared ccs state. See also xe_bo_needs_ccs_pages().
>> */
>> #define XE2_PAT(no_promote, comp_en, l3clos, l3_policy, l4_policy,
>> __coh_mode) \
>> { \
>> @@ -144,8 +145,7 @@ static const struct xe_pat_table_entry
>> xelpg_pat_table[] = {
>> REG_FIELD_PREP(XE2_L3_POLICY, l3_policy) | \
>> REG_FIELD_PREP(XE2_L4_POLICY, l4_policy) | \
>> REG_FIELD_PREP(XE2_COH_MODE, __coh_mode), \
>> - .coh_mode = (BUILD_BUG_ON_ZERO(__coh_mode && comp_en) ||
>> __coh_mode) ? \
>> - XE_COH_AT_LEAST_1WAY : XE_COH_NONE, \
>> + .coh_mode = __coh_mode ? XE_COH_AT_LEAST_1WAY : XE_COH_NONE, \
>> .valid = 1 \
>> }
>> @@ -181,6 +181,38 @@ static const struct xe_pat_table_entry
>> xe2_pat_table[] = {
>> [31] = XE2_PAT( 0, 0, 3, 0, 3, 3 ),
>> };
>> +static const struct xe_pat_table_entry xe3_lpg_pat_table[] = {
>> + [ 0] = XE2_PAT( 0, 0, 0, 0, 3, 0 ),
>> + [ 1] = XE2_PAT( 0, 0, 0, 0, 3, 2 ),
>> + [ 2] = XE2_PAT( 0, 0, 0, 0, 3, 3 ),
>> + [ 3] = XE2_PAT( 0, 0, 0, 3, 3, 0 ),
>> + [ 4] = XE2_PAT( 0, 0, 0, 3, 0, 2 ),
>> + [ 5] = XE2_PAT( 0, 0, 0, 3, 3, 2 ),
>> + [ 6] = XE2_PAT( 1, 0, 0, 1, 3, 0 ),
>> + [ 7] = XE2_PAT( 0, 0, 0, 3, 0, 3 ),
>> + [ 8] = XE2_PAT( 0, 0, 0, 3, 0, 0 ),
>> + [ 9] = XE2_PAT( 0, 1, 0, 0, 3, 0 ),
>> + [10] = XE2_PAT( 0, 1, 0, 3, 0, 0 ),
>> + [11] = XE2_PAT( 1, 1, 0, 1, 3, 0 ),
>> + [12] = XE2_PAT( 0, 1, 0, 3, 3, 0 ),
>> + [13] = XE2_PAT( 0, 0, 0, 0, 0, 0 ),
>> + [14] = XE2_PAT( 0, 1, 0, 0, 0, 0 ),
>> + [15] = XE2_PAT( 1, 1, 0, 1, 1, 0 ),
>> + [16] = XE2_PAT( 0, 1, 0, 0, 3, 2 ),
>> + /* 17..19 are reserved; leave set to all 0's */
>> + [20] = XE2_PAT( 0, 0, 1, 0, 3, 0 ),
>> + [21] = XE2_PAT( 0, 1, 1, 0, 3, 0 ),
>> + [22] = XE2_PAT( 0, 0, 1, 0, 3, 2 ),
>> + [23] = XE2_PAT( 0, 0, 1, 0, 3, 3 ),
>> + [24] = XE2_PAT( 0, 0, 2, 0, 3, 0 ),
>> + [25] = XE2_PAT( 0, 1, 2, 0, 3, 0 ),
>> + [26] = XE2_PAT( 0, 0, 2, 0, 3, 2 ),
>> + [27] = XE2_PAT( 0, 0, 2, 0, 3, 3 ),
>> + [28] = XE2_PAT( 0, 0, 3, 0, 3, 0 ),
>> + [29] = XE2_PAT( 0, 1, 3, 0, 3, 0 ),
>> + [30] = XE2_PAT( 0, 0, 3, 0, 3, 2 ),
>> + [31] = XE2_PAT( 0, 0, 3, 0, 3, 3 ),
>> +};
>> /* Special PAT values programmed outside the main table */
>> static const struct xe_pat_table_entry xe2_pat_ats = XE2_PAT( 0, 0,
>> 0, 0, 3, 3 );
>> static const struct xe_pat_table_entry xe2_pat_pta = XE2_PAT( 0, 0,
>> 0, 0, 3, 0 );
>> @@ -490,6 +522,7 @@ static const struct xe_pat_ops xe3p_xpc_pat_ops = {
>> void xe_pat_init_early(struct xe_device *xe)
>> {
>> + xe->pat.idx[XE_CACHE_WB_COMPRESSION] = XE_PAT_INVALID_IDX;
>
> As a follow up series we could maybe also repeat this for
> XE_CACHE_NONE_COMPRESSION? And maybe also add some asserts in places
> like pte_encode_pat_index() to check that we never see such an index,
> or perhaps add a helper accessor function for turning cache mode into
> pat_index which can check there?
>
>> if (GRAPHICS_VERx100(xe) == 3511) {
>> xe->pat.ops = &xe3p_xpc_pat_ops;
>> xe->pat.table = xe3p_xpc_pat_table;
>> @@ -501,7 +534,12 @@ void xe_pat_init_early(struct xe_device *xe)
>> xe->pat.idx[XE_CACHE_WB] = 2;
>> } else if (GRAPHICS_VER(xe) == 30 || GRAPHICS_VER(xe) == 20) {
>> xe->pat.ops = &xe2_pat_ops;
>> - xe->pat.table = xe2_pat_table;
>> + if (GRAPHICS_VER(xe) == 30) {
>> + xe->pat.table = xe3_lpg_pat_table;
>> + xe->pat.idx[XE_CACHE_WB_COMPRESSION] = 16;
>> + } else {
>> + xe->pat.table = xe2_pat_table;
>> + }
>> xe->pat.pat_ats = &xe2_pat_ats;
>> if (IS_DGFX(xe))
>> xe->pat.pat_pta = &xe2_pat_pta;
>> @@ -658,6 +696,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt,
>> struct drm_printer *p)
>> if (GRAPHICS_VER(xe) >= 20) {
>> drm_printf(p, "IDX[XE_CACHE_NONE_COMPRESSION] = %d\n",
>> xe->pat.idx[XE_CACHE_NONE_COMPRESSION]);
>> + drm_printf(p, "IDX[XE_CACHE_WB_COMPRESSION] = %d\n",
>> + xe->pat.idx[XE_CACHE_WB_COMPRESSION]);
>> }
>> return 0;
>> diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h
>> index d5dadfb7f924..1b2c7d3c7c16 100644
>> --- a/drivers/gpu/drm/xe/xe_pat.h
>> +++ b/drivers/gpu/drm/xe/xe_pat.h
>> @@ -12,6 +12,8 @@ struct drm_printer;
>> struct xe_device;
>> struct xe_gt;
>> +#define XE_PAT_INVALID_IDX U32_MAX
>
> Would U16_MAX be better match here? I believe all the lower level
> places use u16 for the index. Perhaps that could be cleaned up also at
> some point so we use u16 everywhere.
>
I checked the lower-level code paths and most places use u16 for
pat_index, so switching XE_PAT_INVALID_IDX from U32_MAX to
U16_MAX seems like a better match.
As a separate follow-up series (after the current patch lands), we could
also apply the same approach to XE_CACHE_NONE_COMPRESSION, and clean
up the remaining pat_index users so we consistently use u16
throughout.
We can also add asserts/WARNs (or a checked accessor) later to ensure an
invalid index is never encoded in places like pte_encode_pat_index().
Xin
> Otherwise I think lgtm.
>
>> +
>> /**
>> * struct xe_pat_table_entry - The pat_index encoding and other
>> meta information.
>> */
>> diff --git a/drivers/gpu/drm/xe/xe_pt_types.h
>> b/drivers/gpu/drm/xe/xe_pt_types.h
>> index 88fabf8e2655..84b51d3762a4 100644
>> --- a/drivers/gpu/drm/xe/xe_pt_types.h
>> +++ b/drivers/gpu/drm/xe/xe_pt_types.h
>> @@ -20,6 +20,7 @@ enum xe_cache_level {
>> XE_CACHE_WT,
>> XE_CACHE_WB,
>> XE_CACHE_NONE_COMPRESSION, /*UC + COH_NONE + COMPRESSION */
>> + XE_CACHE_WB_COMPRESSION,
>> __XE_CACHE_LEVEL_COUNT,
>> };
>> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
>> index a07d8b53de66..481ee7763b09 100644
>> --- a/drivers/gpu/drm/xe/xe_vm.c
>> +++ b/drivers/gpu/drm/xe/xe_vm.c
>> @@ -3405,6 +3405,7 @@ static int vm_bind_ioctl_check_args(struct
>> xe_device *xe, struct xe_vm *vm,
>> DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR;
>> u16 pat_index = (*bind_ops)[i].pat_index;
>> u16 coh_mode;
>> + bool comp_en;
>> if (XE_IOCTL_DBG(xe, is_cpu_addr_mirror &&
>> (!xe_vm_in_fault_mode(vm) ||
>> @@ -3421,6 +3422,7 @@ static int vm_bind_ioctl_check_args(struct
>> xe_device *xe, struct xe_vm *vm,
>> pat_index = array_index_nospec(pat_index, xe->pat.n_entries);
>> (*bind_ops)[i].pat_index = pat_index;
>> coh_mode = xe_pat_index_get_coh_mode(xe, pat_index);
>> + comp_en = xe_pat_index_get_comp_en(xe, pat_index);
>> if (XE_IOCTL_DBG(xe, !coh_mode)) { /* hw reserved */
>> err = -EINVAL;
>> goto free_bind_ops;
>> @@ -3451,6 +3453,8 @@ static int vm_bind_ioctl_check_args(struct
>> xe_device *xe, struct xe_vm *vm,
>> op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
>> XE_IOCTL_DBG(xe, coh_mode == XE_COH_NONE &&
>> op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
>> + XE_IOCTL_DBG(xe, comp_en &&
>> + op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
>> XE_IOCTL_DBG(xe, op == DRM_XE_VM_BIND_OP_MAP_USERPTR &&
>> !IS_ENABLED(CONFIG_DRM_GPUSVM)) ||
>> XE_IOCTL_DBG(xe, obj &&
>> @@ -3529,6 +3533,7 @@ static int xe_vm_bind_ioctl_validate_bo(struct
>> xe_device *xe, struct xe_bo *bo,
>> u16 pat_index, u32 op, u32 bind_flags)
>> {
>> u16 coh_mode;
>> + bool comp_en;
>> if (XE_IOCTL_DBG(xe, (bo->flags & XE_BO_FLAG_NO_COMPRESSION) &&
>> xe_pat_index_get_comp_en(xe, pat_index)))
>> @@ -3574,6 +3579,14 @@ static int xe_vm_bind_ioctl_validate_bo(struct
>> xe_device *xe, struct xe_bo *bo,
>> return -EINVAL;
>> }
>> + /*
>> + * Ensures that imported buffer objects (dma-bufs) are not mapped
>> + * with a PAT index that enables compression.
>> + */
>> + comp_en = xe_pat_index_get_comp_en(xe, pat_index);
>> + if (XE_IOCTL_DBG(xe, bo->ttm.base.import_attach && comp_en))
>> + return -EINVAL;
>> +
>> /* If a BO is protected it can only be mapped if the key is
>> still valid */
>> if ((bind_flags & DRM_XE_VM_BIND_FLAG_CHECK_PXP) &&
>> xe_bo_is_protected(bo) &&
>> op != DRM_XE_VM_BIND_OP_UNMAP && op !=
>> DRM_XE_VM_BIND_OP_UNMAP_ALL)
>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2026-01-09 1:00 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2026-01-08 1:42 [PATCH v4] drm/xe: Allow compressible surfaces to be 1-way coherent Xin Wang
2026-01-08 1:59 ` ✗ CI.checkpatch: warning for drm/xe: Allow compressible surfaces to be 1-way coherent (rev5) Patchwork
2026-01-08 2:00 ` ✓ CI.KUnit: success " Patchwork
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2026-01-08 12:43 ` [PATCH v4] drm/xe: Allow compressible surfaces to be 1-way coherent Matthew Auld
2026-01-09 1:00 ` Wang, X
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