Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Varun Gupta <varun.gupta@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: himal.prasad.ghimiray@intel.com, matthew.brost@intel.com,
	matthew.d.roper@intel.com
Subject: [PATCH 0/2] drm/xe: Add prefetch pagefault support for Xe3p
Date: Mon, 12 Jan 2026 11:47:56 +0530	[thread overview]
Message-ID: <20260112061755.1569635-4-varun.gupta@intel.com> (raw)

Xe3p hardware prefetches memory ranges and notifies software via an
additional bit (bit 11) in the page fault descriptor that the fault
was caused by prefetch.

Patch 1 refactors the error handling to print the fault only when handling
fails, consolidating the logging with the response status.

Patch 2 implements the prefetch support by extracting the prefetch bit from
the fault descriptor and echoing it in the response on unsuccessful handling.
This prevents CAT errors for prefetch faults. Stats are incremented for
prefetch errors without verbose logging to avoid spamming the log.

Based on original patches by Brian Welty and Priyanka Dandamudi, and
originally implemented by Lucas De Marchi.

v2: Changed comment wording from "repairs" to "handling" per Matt Roper's
feedback.

Tested with xe_prefetch_fault IGT test.

Varun Gupta (2):
  drm/xe: Coalesce pagefault error handling
  drm/xe: Add prefetch fault support for Xe3p

 drivers/gpu/drm/xe/xe_gt_stats.c        |  1 +
 drivers/gpu/drm/xe/xe_gt_stats_types.h  |  1 +
 drivers/gpu/drm/xe/xe_guc_fwif.h        |  5 +++--
 drivers/gpu/drm/xe/xe_guc_pagefault.c   |  2 ++
 drivers/gpu/drm/xe/xe_pagefault.c       | 16 ++++++++++++++--
 drivers/gpu/drm/xe/xe_pagefault_types.h |  8 +++++++-
 6 files changed, 28 insertions(+), 5 deletions(-)

-- 
2.43.0


             reply	other threads:[~2026-01-12  6:18 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-12  6:17 Varun Gupta [this message]
2026-01-12  6:17 ` [PATCH 1/2] drm/xe: Coalesce pagefault error handling Varun Gupta
2026-01-12 18:17   ` Matt Roper
2026-01-12  6:17 ` [PATCH 2/2] drm/xe: Add prefetch fault support for Xe3p Varun Gupta
2026-01-12  6:24 ` ✗ CI.checkpatch: warning for drm/xe: Add prefetch pagefault " Patchwork
2026-01-12  6:25 ` ✓ CI.KUnit: success " Patchwork
2026-01-12  6:57 ` ✓ Xe.CI.BAT: " Patchwork
2026-01-12  8:04 ` ✗ Xe.CI.Full: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260112061755.1569635-4-varun.gupta@intel.com \
    --to=varun.gupta@intel.com \
    --cc=himal.prasad.ghimiray@intel.com \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=matthew.brost@intel.com \
    --cc=matthew.d.roper@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox