* [PATCH 1/2] drm/xe: Ban entire multi-queue group on any job timeout
2026-01-13 2:59 [PATCH 0/2] Enable multi_queue Matthew Brost
@ 2026-01-13 2:59 ` Matthew Brost
2026-01-13 2:59 ` [PATCH 2/2] drm/xe/multi_queue: Enable multi_queue on xe3p_xpc Matthew Brost
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Matthew Brost @ 2026-01-13 2:59 UTC (permalink / raw)
To: intel-xe; +Cc: niranjana.vishwanathapura
In multi-queue mode, we only have control over the entire group, so we
cannot ban individual queues or signal fences until the whole group is
removed from hardware. Implement banning of the entire group if any job
within it times out.
Cc: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_guc_submit.c | 84 +++++++++++++++++++++---------
1 file changed, 60 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index be8fa76baf1d..a84e86d0d282 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -558,6 +558,40 @@ static void xe_guc_exec_queue_trigger_cleanup(struct xe_exec_queue *q)
xe_sched_tdr_queue_imm(&q->guc->sched);
}
+static void xe_guc_exec_queue_group_stop(struct xe_exec_queue *q)
+{
+ struct xe_exec_queue *primary = xe_exec_queue_multi_queue_primary(q);
+ struct xe_exec_queue_group *group = q->multi_queue.group;
+ struct xe_exec_queue *eq;
+
+ xe_gt_assert(guc_to_gt(exec_queue_to_guc(q)),
+ xe_exec_queue_is_multi_queue(q));
+
+ xe_sched_submission_stop(&primary->guc->sched);
+
+ mutex_lock(&group->list_lock);
+ list_for_each_entry(eq, &group->list, multi_queue.link)
+ xe_sched_submission_stop(&eq->guc->sched);
+ mutex_unlock(&group->list_lock);
+}
+
+static void xe_guc_exec_queue_group_start(struct xe_exec_queue *q)
+{
+ struct xe_exec_queue *primary = xe_exec_queue_multi_queue_primary(q);
+ struct xe_exec_queue_group *group = q->multi_queue.group;
+ struct xe_exec_queue *eq;
+
+ xe_gt_assert(guc_to_gt(exec_queue_to_guc(q)),
+ xe_exec_queue_is_multi_queue(q));
+
+ xe_sched_submission_start(&primary->guc->sched);
+
+ mutex_lock(&group->list_lock);
+ list_for_each_entry(eq, &group->list, multi_queue.link)
+ xe_sched_submission_start(&eq->guc->sched);
+ mutex_unlock(&group->list_lock);
+}
+
static void xe_guc_exec_queue_group_trigger_cleanup(struct xe_exec_queue *q)
{
struct xe_exec_queue *primary = xe_exec_queue_multi_queue_primary(q);
@@ -1411,7 +1445,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
{
struct xe_sched_job *job = to_xe_sched_job(drm_job);
struct drm_sched_job *tmp_job;
- struct xe_exec_queue *q = job->q;
+ struct xe_exec_queue *q = job->q, *primary;
struct xe_gpu_scheduler *sched = &q->guc->sched;
struct xe_guc *guc = exec_queue_to_guc(q);
const char *process_name = "no process";
@@ -1422,6 +1456,11 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q));
+ if (xe_exec_queue_is_multi_queue_secondary(q))
+ primary = xe_exec_queue_multi_queue_primary(q);
+ else
+ primary = q;
+
/*
* TDR has fired before free job worker. Common if exec queue
* immediately closed after last fence signaled. Add back to pending
@@ -1433,7 +1472,10 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
return DRM_GPU_SCHED_STAT_NO_HANG;
/* Kill the run_job entry point */
- xe_sched_submission_stop(sched);
+ if (xe_exec_queue_is_multi_queue(q))
+ xe_guc_exec_queue_group_stop(q);
+ else
+ xe_sched_submission_stop(sched);
/* Must check all state after stopping scheduler */
skip_timeout_check = exec_queue_reset(q) ||
@@ -1448,14 +1490,6 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
if (xe_exec_queue_is_lr(q))
xe_gt_assert(guc_to_gt(guc), skip_timeout_check);
- /*
- * FIXME: In multi-queue scenario, the TDR must ensure that the whole
- * multi-queue group is off the HW before signaling the fences to avoid
- * possible memory corruptions. This means disabling scheduling on the
- * primary queue before or during the secondary queue's TDR. Need to
- * implement this in least obtrusive way.
- */
-
/*
* If devcoredump not captured and GuC capture for the job is not ready
* do manual capture first and decide later if we need to use it
@@ -1482,10 +1516,11 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
set_exec_queue_banned(q);
/* Kick job / queue off hardware */
- if (!wedged && (exec_queue_enabled(q) || exec_queue_pending_disable(q))) {
+ if (!wedged && (exec_queue_enabled(primary) ||
+ exec_queue_pending_disable(primary))) {
int ret;
- if (exec_queue_reset(q))
+ if (exec_queue_reset(primary))
err = -EIO;
if (xe_uc_fw_is_running(&guc->fw)) {
@@ -1494,8 +1529,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
* modifying state
*/
ret = wait_event_timeout(guc->ct.wq,
- (!exec_queue_pending_enable(q) &&
- !exec_queue_pending_disable(q)) ||
+ (!exec_queue_pending_enable(primary) &&
+ !exec_queue_pending_disable(primary)) ||
xe_guc_read_stopped(guc) ||
vf_recovery(guc), HZ * 5);
if (vf_recovery(guc))
@@ -1503,7 +1538,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
if (!ret || xe_guc_read_stopped(guc))
goto trigger_reset;
- disable_scheduling(q, skip_timeout_check);
+ disable_scheduling(primary, skip_timeout_check);
}
/*
@@ -1517,7 +1552,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
smp_rmb();
ret = wait_event_timeout(guc->ct.wq,
!xe_uc_fw_is_running(&guc->fw) ||
- !exec_queue_pending_disable(q) ||
+ !exec_queue_pending_disable(primary) ||
xe_guc_read_stopped(guc) ||
vf_recovery(guc), HZ * 5);
if (vf_recovery(guc))
@@ -1527,11 +1562,11 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
if (!ret)
xe_gt_warn(guc_to_gt(guc),
"Schedule disable failed to respond, guc_id=%d",
- q->guc->id);
- xe_devcoredump(q, job,
+ primary->guc->id);
+ xe_devcoredump(primary, job,
"Schedule disable failed to respond, guc_id=%d, ret=%d, guc_read=%d",
- q->guc->id, ret, xe_guc_read_stopped(guc));
- xe_gt_reset_async(q->gt);
+ primary->guc->id, ret, xe_guc_read_stopped(guc));
+ xe_gt_reset_async(primary->gt);
xe_sched_tdr_queue_imm(sched);
goto rearm;
}
@@ -1577,12 +1612,13 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
drm_sched_for_each_pending_job(tmp_job, &sched->base, NULL)
xe_sched_job_set_error(to_xe_sched_job(tmp_job), -ECANCELED);
- xe_sched_submission_start(sched);
-
- if (xe_exec_queue_is_multi_queue(q))
+ if (xe_exec_queue_is_multi_queue(q)) {
+ xe_guc_exec_queue_group_start(q);
xe_guc_exec_queue_group_trigger_cleanup(q);
- else
+ } else {
+ xe_sched_submission_start(sched);
xe_guc_exec_queue_trigger_cleanup(q);
+ }
/*
* We want the job added back to the pending list so it gets freed; this
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* ✓ CI.KUnit: success for Enable multi_queue
2026-01-13 2:59 [PATCH 0/2] Enable multi_queue Matthew Brost
2026-01-13 2:59 ` [PATCH 1/2] drm/xe: Ban entire multi-queue group on any job timeout Matthew Brost
2026-01-13 2:59 ` [PATCH 2/2] drm/xe/multi_queue: Enable multi_queue on xe3p_xpc Matthew Brost
@ 2026-01-13 4:00 ` Patchwork
2026-01-13 4:45 ` ✓ Xe.CI.BAT: " Patchwork
3 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2026-01-13 4:00 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
== Series Details ==
Series: Enable multi_queue
URL : https://patchwork.freedesktop.org/series/159992/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[03:59:31] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:59:35] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[04:00:07] Starting KUnit Kernel (1/1)...
[04:00:07] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[04:00:07] ================== guc_buf (11 subtests) ===================
[04:00:07] [PASSED] test_smallest
[04:00:07] [PASSED] test_largest
[04:00:07] [PASSED] test_granular
[04:00:07] [PASSED] test_unique
[04:00:07] [PASSED] test_overlap
[04:00:07] [PASSED] test_reusable
[04:00:07] [PASSED] test_too_big
[04:00:07] [PASSED] test_flush
[04:00:07] [PASSED] test_lookup
[04:00:07] [PASSED] test_data
[04:00:07] [PASSED] test_class
[04:00:07] ===================== [PASSED] guc_buf =====================
[04:00:07] =================== guc_dbm (7 subtests) ===================
[04:00:07] [PASSED] test_empty
[04:00:07] [PASSED] test_default
[04:00:07] ======================== test_size ========================
[04:00:07] [PASSED] 4
[04:00:07] [PASSED] 8
[04:00:07] [PASSED] 32
[04:00:07] [PASSED] 256
[04:00:07] ==================== [PASSED] test_size ====================
[04:00:07] ======================= test_reuse ========================
[04:00:07] [PASSED] 4
[04:00:07] [PASSED] 8
[04:00:07] [PASSED] 32
[04:00:07] [PASSED] 256
[04:00:07] =================== [PASSED] test_reuse ====================
[04:00:07] =================== test_range_overlap ====================
[04:00:07] [PASSED] 4
[04:00:07] [PASSED] 8
[04:00:07] [PASSED] 32
[04:00:07] [PASSED] 256
[04:00:07] =============== [PASSED] test_range_overlap ================
[04:00:07] =================== test_range_compact ====================
[04:00:07] [PASSED] 4
[04:00:07] [PASSED] 8
[04:00:07] [PASSED] 32
[04:00:07] [PASSED] 256
[04:00:07] =============== [PASSED] test_range_compact ================
[04:00:07] ==================== test_range_spare =====================
[04:00:07] [PASSED] 4
[04:00:07] [PASSED] 8
[04:00:07] [PASSED] 32
[04:00:07] [PASSED] 256
[04:00:07] ================ [PASSED] test_range_spare =================
[04:00:07] ===================== [PASSED] guc_dbm =====================
[04:00:07] =================== guc_idm (6 subtests) ===================
[04:00:07] [PASSED] bad_init
[04:00:07] [PASSED] no_init
[04:00:07] [PASSED] init_fini
[04:00:07] [PASSED] check_used
[04:00:07] [PASSED] check_quota
[04:00:07] [PASSED] check_all
[04:00:07] ===================== [PASSED] guc_idm =====================
[04:00:07] ================== no_relay (3 subtests) ===================
[04:00:07] [PASSED] xe_drops_guc2pf_if_not_ready
[04:00:07] [PASSED] xe_drops_guc2vf_if_not_ready
[04:00:07] [PASSED] xe_rejects_send_if_not_ready
[04:00:07] ==================== [PASSED] no_relay =====================
[04:00:07] ================== pf_relay (14 subtests) ==================
[04:00:07] [PASSED] pf_rejects_guc2pf_too_short
[04:00:07] [PASSED] pf_rejects_guc2pf_too_long
[04:00:07] [PASSED] pf_rejects_guc2pf_no_payload
[04:00:07] [PASSED] pf_fails_no_payload
[04:00:07] [PASSED] pf_fails_bad_origin
[04:00:07] [PASSED] pf_fails_bad_type
[04:00:07] [PASSED] pf_txn_reports_error
[04:00:07] [PASSED] pf_txn_sends_pf2guc
[04:00:07] [PASSED] pf_sends_pf2guc
[04:00:07] [SKIPPED] pf_loopback_nop
[04:00:07] [SKIPPED] pf_loopback_echo
[04:00:07] [SKIPPED] pf_loopback_fail
[04:00:07] [SKIPPED] pf_loopback_busy
[04:00:07] [SKIPPED] pf_loopback_retry
[04:00:07] ==================== [PASSED] pf_relay =====================
[04:00:07] ================== vf_relay (3 subtests) ===================
[04:00:07] [PASSED] vf_rejects_guc2vf_too_short
[04:00:07] [PASSED] vf_rejects_guc2vf_too_long
[04:00:07] [PASSED] vf_rejects_guc2vf_no_payload
[04:00:07] ==================== [PASSED] vf_relay =====================
[04:00:07] ================ pf_gt_config (6 subtests) =================
[04:00:07] [PASSED] fair_contexts_1vf
[04:00:07] [PASSED] fair_doorbells_1vf
[04:00:07] [PASSED] fair_ggtt_1vf
[04:00:07] ====================== fair_contexts ======================
[04:00:07] [PASSED] 1 VF
[04:00:07] [PASSED] 2 VFs
[04:00:07] [PASSED] 3 VFs
[04:00:07] [PASSED] 4 VFs
[04:00:07] [PASSED] 5 VFs
[04:00:07] [PASSED] 6 VFs
[04:00:07] [PASSED] 7 VFs
[04:00:07] [PASSED] 8 VFs
[04:00:07] [PASSED] 9 VFs
[04:00:07] [PASSED] 10 VFs
[04:00:07] [PASSED] 11 VFs
[04:00:07] [PASSED] 12 VFs
[04:00:07] [PASSED] 13 VFs
[04:00:07] [PASSED] 14 VFs
[04:00:07] [PASSED] 15 VFs
[04:00:07] [PASSED] 16 VFs
[04:00:07] [PASSED] 17 VFs
[04:00:07] [PASSED] 18 VFs
[04:00:07] [PASSED] 19 VFs
[04:00:07] [PASSED] 20 VFs
[04:00:07] [PASSED] 21 VFs
[04:00:07] [PASSED] 22 VFs
[04:00:07] [PASSED] 23 VFs
[04:00:07] [PASSED] 24 VFs
[04:00:07] [PASSED] 25 VFs
[04:00:07] [PASSED] 26 VFs
[04:00:07] [PASSED] 27 VFs
[04:00:07] [PASSED] 28 VFs
[04:00:07] [PASSED] 29 VFs
[04:00:07] [PASSED] 30 VFs
[04:00:07] [PASSED] 31 VFs
[04:00:07] [PASSED] 32 VFs
[04:00:07] [PASSED] 33 VFs
[04:00:07] [PASSED] 34 VFs
[04:00:07] [PASSED] 35 VFs
[04:00:07] [PASSED] 36 VFs
[04:00:07] [PASSED] 37 VFs
[04:00:07] [PASSED] 38 VFs
[04:00:07] [PASSED] 39 VFs
[04:00:07] [PASSED] 40 VFs
[04:00:07] [PASSED] 41 VFs
[04:00:07] [PASSED] 42 VFs
[04:00:07] [PASSED] 43 VFs
[04:00:07] [PASSED] 44 VFs
[04:00:07] [PASSED] 45 VFs
[04:00:07] [PASSED] 46 VFs
[04:00:07] [PASSED] 47 VFs
[04:00:07] [PASSED] 48 VFs
[04:00:07] [PASSED] 49 VFs
[04:00:07] [PASSED] 50 VFs
[04:00:07] [PASSED] 51 VFs
[04:00:07] [PASSED] 52 VFs
[04:00:07] [PASSED] 53 VFs
[04:00:07] [PASSED] 54 VFs
[04:00:07] [PASSED] 55 VFs
[04:00:07] [PASSED] 56 VFs
[04:00:07] [PASSED] 57 VFs
[04:00:07] [PASSED] 58 VFs
[04:00:07] [PASSED] 59 VFs
[04:00:07] [PASSED] 60 VFs
[04:00:07] [PASSED] 61 VFs
[04:00:07] [PASSED] 62 VFs
[04:00:07] [PASSED] 63 VFs
[04:00:07] ================== [PASSED] fair_contexts ==================
[04:00:07] ===================== fair_doorbells ======================
[04:00:07] [PASSED] 1 VF
[04:00:07] [PASSED] 2 VFs
[04:00:07] [PASSED] 3 VFs
[04:00:07] [PASSED] 4 VFs
[04:00:07] [PASSED] 5 VFs
[04:00:07] [PASSED] 6 VFs
[04:00:07] [PASSED] 7 VFs
[04:00:07] [PASSED] 8 VFs
[04:00:07] [PASSED] 9 VFs
[04:00:07] [PASSED] 10 VFs
[04:00:07] [PASSED] 11 VFs
[04:00:07] [PASSED] 12 VFs
[04:00:07] [PASSED] 13 VFs
[04:00:07] [PASSED] 14 VFs
[04:00:07] [PASSED] 15 VFs
[04:00:07] [PASSED] 16 VFs
[04:00:07] [PASSED] 17 VFs
[04:00:07] [PASSED] 18 VFs
[04:00:07] [PASSED] 19 VFs
[04:00:07] [PASSED] 20 VFs
[04:00:07] [PASSED] 21 VFs
[04:00:07] [PASSED] 22 VFs
[04:00:07] [PASSED] 23 VFs
[04:00:07] [PASSED] 24 VFs
[04:00:07] [PASSED] 25 VFs
[04:00:07] [PASSED] 26 VFs
[04:00:07] [PASSED] 27 VFs
[04:00:07] [PASSED] 28 VFs
[04:00:07] [PASSED] 29 VFs
[04:00:07] [PASSED] 30 VFs
[04:00:07] [PASSED] 31 VFs
[04:00:07] [PASSED] 32 VFs
[04:00:07] [PASSED] 33 VFs
[04:00:07] [PASSED] 34 VFs
[04:00:07] [PASSED] 35 VFs
[04:00:07] [PASSED] 36 VFs
[04:00:07] [PASSED] 37 VFs
[04:00:07] [PASSED] 38 VFs
[04:00:07] [PASSED] 39 VFs
[04:00:07] [PASSED] 40 VFs
[04:00:07] [PASSED] 41 VFs
[04:00:07] [PASSED] 42 VFs
[04:00:07] [PASSED] 43 VFs
[04:00:07] [PASSED] 44 VFs
[04:00:07] [PASSED] 45 VFs
[04:00:07] [PASSED] 46 VFs
[04:00:07] [PASSED] 47 VFs
[04:00:07] [PASSED] 48 VFs
[04:00:07] [PASSED] 49 VFs
[04:00:07] [PASSED] 50 VFs
[04:00:07] [PASSED] 51 VFs
[04:00:07] [PASSED] 52 VFs
[04:00:07] [PASSED] 53 VFs
[04:00:07] [PASSED] 54 VFs
[04:00:07] [PASSED] 55 VFs
[04:00:07] [PASSED] 56 VFs
[04:00:07] [PASSED] 57 VFs
[04:00:07] [PASSED] 58 VFs
[04:00:07] [PASSED] 59 VFs
[04:00:07] [PASSED] 60 VFs
[04:00:07] [PASSED] 61 VFs
[04:00:07] [PASSED] 62 VFs
[04:00:07] [PASSED] 63 VFs
[04:00:07] ================= [PASSED] fair_doorbells ==================
[04:00:07] ======================== fair_ggtt ========================
[04:00:07] [PASSED] 1 VF
[04:00:07] [PASSED] 2 VFs
[04:00:07] [PASSED] 3 VFs
[04:00:07] [PASSED] 4 VFs
[04:00:07] [PASSED] 5 VFs
[04:00:07] [PASSED] 6 VFs
[04:00:07] [PASSED] 7 VFs
[04:00:07] [PASSED] 8 VFs
[04:00:07] [PASSED] 9 VFs
[04:00:07] [PASSED] 10 VFs
[04:00:07] [PASSED] 11 VFs
[04:00:07] [PASSED] 12 VFs
[04:00:07] [PASSED] 13 VFs
[04:00:07] [PASSED] 14 VFs
[04:00:07] [PASSED] 15 VFs
[04:00:07] [PASSED] 16 VFs
[04:00:07] [PASSED] 17 VFs
[04:00:07] [PASSED] 18 VFs
[04:00:07] [PASSED] 19 VFs
[04:00:07] [PASSED] 20 VFs
[04:00:07] [PASSED] 21 VFs
[04:00:07] [PASSED] 22 VFs
[04:00:07] [PASSED] 23 VFs
[04:00:07] [PASSED] 24 VFs
[04:00:07] [PASSED] 25 VFs
[04:00:07] [PASSED] 26 VFs
[04:00:07] [PASSED] 27 VFs
[04:00:07] [PASSED] 28 VFs
[04:00:07] [PASSED] 29 VFs
[04:00:07] [PASSED] 30 VFs
[04:00:07] [PASSED] 31 VFs
[04:00:07] [PASSED] 32 VFs
[04:00:07] [PASSED] 33 VFs
[04:00:07] [PASSED] 34 VFs
[04:00:07] [PASSED] 35 VFs
[04:00:07] [PASSED] 36 VFs
[04:00:07] [PASSED] 37 VFs
[04:00:07] [PASSED] 38 VFs
[04:00:07] [PASSED] 39 VFs
[04:00:07] [PASSED] 40 VFs
[04:00:07] [PASSED] 41 VFs
[04:00:07] [PASSED] 42 VFs
[04:00:07] [PASSED] 43 VFs
[04:00:07] [PASSED] 44 VFs
[04:00:07] [PASSED] 45 VFs
[04:00:07] [PASSED] 46 VFs
[04:00:07] [PASSED] 47 VFs
[04:00:07] [PASSED] 48 VFs
[04:00:07] [PASSED] 49 VFs
[04:00:07] [PASSED] 50 VFs
[04:00:07] [PASSED] 51 VFs
[04:00:07] [PASSED] 52 VFs
[04:00:07] [PASSED] 53 VFs
[04:00:07] [PASSED] 54 VFs
[04:00:07] [PASSED] 55 VFs
[04:00:07] [PASSED] 56 VFs
[04:00:07] [PASSED] 57 VFs
[04:00:07] [PASSED] 58 VFs
[04:00:07] [PASSED] 59 VFs
[04:00:07] [PASSED] 60 VFs
[04:00:07] [PASSED] 61 VFs
[04:00:07] [PASSED] 62 VFs
[04:00:07] [PASSED] 63 VFs
[04:00:07] ==================== [PASSED] fair_ggtt ====================
[04:00:07] ================== [PASSED] pf_gt_config ===================
[04:00:07] ===================== lmtt (1 subtest) =====================
[04:00:07] ======================== test_ops =========================
[04:00:07] [PASSED] 2-level
[04:00:07] [PASSED] multi-level
[04:00:07] ==================== [PASSED] test_ops =====================
[04:00:07] ====================== [PASSED] lmtt =======================
[04:00:07] ================= pf_service (11 subtests) =================
[04:00:07] [PASSED] pf_negotiate_any
[04:00:07] [PASSED] pf_negotiate_base_match
[04:00:07] [PASSED] pf_negotiate_base_newer
[04:00:07] [PASSED] pf_negotiate_base_next
[04:00:07] [SKIPPED] pf_negotiate_base_older
[04:00:07] [PASSED] pf_negotiate_base_prev
[04:00:07] [PASSED] pf_negotiate_latest_match
[04:00:07] [PASSED] pf_negotiate_latest_newer
[04:00:07] [PASSED] pf_negotiate_latest_next
[04:00:07] [SKIPPED] pf_negotiate_latest_older
[04:00:07] [SKIPPED] pf_negotiate_latest_prev
[04:00:07] =================== [PASSED] pf_service ====================
[04:00:07] ================= xe_guc_g2g (2 subtests) ==================
[04:00:07] ============== xe_live_guc_g2g_kunit_default ==============
[04:00:07] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[04:00:07] ============== xe_live_guc_g2g_kunit_allmem ===============
[04:00:07] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[04:00:07] =================== [SKIPPED] xe_guc_g2g ===================
[04:00:07] =================== xe_mocs (2 subtests) ===================
[04:00:07] ================ xe_live_mocs_kernel_kunit ================
[04:00:07] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[04:00:07] ================ xe_live_mocs_reset_kunit =================
[04:00:07] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[04:00:07] ==================== [SKIPPED] xe_mocs =====================
[04:00:07] ================= xe_migrate (2 subtests) ==================
[04:00:07] ================= xe_migrate_sanity_kunit =================
[04:00:07] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[04:00:07] ================== xe_validate_ccs_kunit ==================
[04:00:07] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[04:00:07] =================== [SKIPPED] xe_migrate ===================
[04:00:07] ================== xe_dma_buf (1 subtest) ==================
[04:00:07] ==================== xe_dma_buf_kunit =====================
[04:00:07] ================ [SKIPPED] xe_dma_buf_kunit ================
[04:00:07] =================== [SKIPPED] xe_dma_buf ===================
[04:00:07] ================= xe_bo_shrink (1 subtest) =================
[04:00:07] =================== xe_bo_shrink_kunit ====================
[04:00:07] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[04:00:07] ================== [SKIPPED] xe_bo_shrink ==================
[04:00:07] ==================== xe_bo (2 subtests) ====================
[04:00:07] ================== xe_ccs_migrate_kunit ===================
[04:00:07] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[04:00:07] ==================== xe_bo_evict_kunit ====================
[04:00:07] =============== [SKIPPED] xe_bo_evict_kunit ================
[04:00:07] ===================== [SKIPPED] xe_bo ======================
[04:00:07] ==================== args (13 subtests) ====================
[04:00:07] [PASSED] count_args_test
[04:00:07] [PASSED] call_args_example
[04:00:07] [PASSED] call_args_test
[04:00:07] [PASSED] drop_first_arg_example
[04:00:07] [PASSED] drop_first_arg_test
[04:00:07] [PASSED] first_arg_example
[04:00:07] [PASSED] first_arg_test
[04:00:07] [PASSED] last_arg_example
[04:00:07] [PASSED] last_arg_test
[04:00:07] [PASSED] pick_arg_example
[04:00:07] [PASSED] if_args_example
[04:00:07] [PASSED] if_args_test
[04:00:07] [PASSED] sep_comma_example
[04:00:07] ====================== [PASSED] args =======================
[04:00:07] =================== xe_pci (3 subtests) ====================
[04:00:07] ==================== check_graphics_ip ====================
[04:00:07] [PASSED] 12.00 Xe_LP
[04:00:07] [PASSED] 12.10 Xe_LP+
[04:00:07] [PASSED] 12.55 Xe_HPG
[04:00:07] [PASSED] 12.60 Xe_HPC
[04:00:07] [PASSED] 12.70 Xe_LPG
[04:00:07] [PASSED] 12.71 Xe_LPG
[04:00:07] [PASSED] 12.74 Xe_LPG+
[04:00:07] [PASSED] 20.01 Xe2_HPG
[04:00:07] [PASSED] 20.02 Xe2_HPG
[04:00:07] [PASSED] 20.04 Xe2_LPG
[04:00:07] [PASSED] 30.00 Xe3_LPG
[04:00:07] [PASSED] 30.01 Xe3_LPG
[04:00:07] [PASSED] 30.03 Xe3_LPG
[04:00:07] [PASSED] 30.04 Xe3_LPG
[04:00:07] [PASSED] 30.05 Xe3_LPG
[04:00:07] [PASSED] 35.11 Xe3p_XPC
[04:00:07] ================ [PASSED] check_graphics_ip ================
[04:00:07] ===================== check_media_ip ======================
[04:00:07] [PASSED] 12.00 Xe_M
[04:00:07] [PASSED] 12.55 Xe_HPM
[04:00:07] [PASSED] 13.00 Xe_LPM+
[04:00:07] [PASSED] 13.01 Xe2_HPM
[04:00:07] [PASSED] 20.00 Xe2_LPM
[04:00:07] [PASSED] 30.00 Xe3_LPM
[04:00:07] [PASSED] 30.02 Xe3_LPM
[04:00:07] [PASSED] 35.00 Xe3p_LPM
[04:00:07] [PASSED] 35.03 Xe3p_HPM
[04:00:07] ================= [PASSED] check_media_ip ==================
[04:00:07] =================== check_platform_desc ===================
[04:00:07] [PASSED] 0x9A60 (TIGERLAKE)
[04:00:07] [PASSED] 0x9A68 (TIGERLAKE)
[04:00:07] [PASSED] 0x9A70 (TIGERLAKE)
[04:00:07] [PASSED] 0x9A40 (TIGERLAKE)
[04:00:07] [PASSED] 0x9A49 (TIGERLAKE)
[04:00:07] [PASSED] 0x9A59 (TIGERLAKE)
[04:00:07] [PASSED] 0x9A78 (TIGERLAKE)
[04:00:07] [PASSED] 0x9AC0 (TIGERLAKE)
[04:00:07] [PASSED] 0x9AC9 (TIGERLAKE)
[04:00:07] [PASSED] 0x9AD9 (TIGERLAKE)
[04:00:07] [PASSED] 0x9AF8 (TIGERLAKE)
[04:00:07] [PASSED] 0x4C80 (ROCKETLAKE)
[04:00:07] [PASSED] 0x4C8A (ROCKETLAKE)
[04:00:07] [PASSED] 0x4C8B (ROCKETLAKE)
[04:00:07] [PASSED] 0x4C8C (ROCKETLAKE)
[04:00:07] [PASSED] 0x4C90 (ROCKETLAKE)
[04:00:07] [PASSED] 0x4C9A (ROCKETLAKE)
[04:00:07] [PASSED] 0x4680 (ALDERLAKE_S)
[04:00:07] [PASSED] 0x4682 (ALDERLAKE_S)
[04:00:07] [PASSED] 0x4688 (ALDERLAKE_S)
[04:00:07] [PASSED] 0x468A (ALDERLAKE_S)
[04:00:07] [PASSED] 0x468B (ALDERLAKE_S)
[04:00:07] [PASSED] 0x4690 (ALDERLAKE_S)
[04:00:07] [PASSED] 0x4692 (ALDERLAKE_S)
[04:00:07] [PASSED] 0x4693 (ALDERLAKE_S)
[04:00:07] [PASSED] 0x46A0 (ALDERLAKE_P)
[04:00:07] [PASSED] 0x46A1 (ALDERLAKE_P)
[04:00:07] [PASSED] 0x46A2 (ALDERLAKE_P)
[04:00:07] [PASSED] 0x46A3 (ALDERLAKE_P)
[04:00:07] [PASSED] 0x46A6 (ALDERLAKE_P)
[04:00:07] [PASSED] 0x46A8 (ALDERLAKE_P)
[04:00:07] [PASSED] 0x46AA (ALDERLAKE_P)
[04:00:07] [PASSED] 0x462A (ALDERLAKE_P)
[04:00:07] [PASSED] 0x4626 (ALDERLAKE_P)
[04:00:07] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[04:00:07] [PASSED] 0x46B0 (ALDERLAKE_P)
[04:00:07] [PASSED] 0x46B1 (ALDERLAKE_P)
[04:00:07] [PASSED] 0x46B2 (ALDERLAKE_P)
[04:00:07] [PASSED] 0x46B3 (ALDERLAKE_P)
[04:00:07] [PASSED] 0x46C0 (ALDERLAKE_P)
[04:00:07] [PASSED] 0x46C1 (ALDERLAKE_P)
[04:00:07] [PASSED] 0x46C2 (ALDERLAKE_P)
[04:00:07] [PASSED] 0x46C3 (ALDERLAKE_P)
[04:00:07] [PASSED] 0x46D0 (ALDERLAKE_N)
[04:00:07] [PASSED] 0x46D1 (ALDERLAKE_N)
[04:00:07] [PASSED] 0x46D2 (ALDERLAKE_N)
[04:00:07] [PASSED] 0x46D3 (ALDERLAKE_N)
[04:00:07] [PASSED] 0x46D4 (ALDERLAKE_N)
[04:00:07] [PASSED] 0xA721 (ALDERLAKE_P)
[04:00:07] [PASSED] 0xA7A1 (ALDERLAKE_P)
[04:00:07] [PASSED] 0xA7A9 (ALDERLAKE_P)
[04:00:07] [PASSED] 0xA7AC (ALDERLAKE_P)
[04:00:07] [PASSED] 0xA7AD (ALDERLAKE_P)
[04:00:07] [PASSED] 0xA720 (ALDERLAKE_P)
[04:00:07] [PASSED] 0xA7A0 (ALDERLAKE_P)
[04:00:07] [PASSED] 0xA7A8 (ALDERLAKE_P)
[04:00:07] [PASSED] 0xA7AA (ALDERLAKE_P)
[04:00:07] [PASSED] 0xA7AB (ALDERLAKE_P)
[04:00:07] [PASSED] 0xA780 (ALDERLAKE_S)
[04:00:07] [PASSED] 0xA781 (ALDERLAKE_S)
[04:00:07] [PASSED] 0xA782 (ALDERLAKE_S)
[04:00:07] [PASSED] 0xA783 (ALDERLAKE_S)
[04:00:07] [PASSED] 0xA788 (ALDERLAKE_S)
[04:00:07] [PASSED] 0xA789 (ALDERLAKE_S)
[04:00:07] [PASSED] 0xA78A (ALDERLAKE_S)
[04:00:07] [PASSED] 0xA78B (ALDERLAKE_S)
[04:00:07] [PASSED] 0x4905 (DG1)
[04:00:07] [PASSED] 0x4906 (DG1)
[04:00:07] [PASSED] 0x4907 (DG1)
[04:00:07] [PASSED] 0x4908 (DG1)
[04:00:07] [PASSED] 0x4909 (DG1)
[04:00:07] [PASSED] 0x56C0 (DG2)
[04:00:07] [PASSED] 0x56C2 (DG2)
[04:00:07] [PASSED] 0x56C1 (DG2)
[04:00:07] [PASSED] 0x7D51 (METEORLAKE)
[04:00:07] [PASSED] 0x7DD1 (METEORLAKE)
[04:00:07] [PASSED] 0x7D41 (METEORLAKE)
[04:00:07] [PASSED] 0x7D67 (METEORLAKE)
[04:00:07] [PASSED] 0xB640 (METEORLAKE)
[04:00:07] [PASSED] 0x56A0 (DG2)
[04:00:07] [PASSED] 0x56A1 (DG2)
[04:00:07] [PASSED] 0x56A2 (DG2)
[04:00:07] [PASSED] 0x56BE (DG2)
[04:00:07] [PASSED] 0x56BF (DG2)
[04:00:07] [PASSED] 0x5690 (DG2)
[04:00:07] [PASSED] 0x5691 (DG2)
[04:00:07] [PASSED] 0x5692 (DG2)
[04:00:07] [PASSED] 0x56A5 (DG2)
[04:00:07] [PASSED] 0x56A6 (DG2)
[04:00:07] [PASSED] 0x56B0 (DG2)
[04:00:07] [PASSED] 0x56B1 (DG2)
[04:00:07] [PASSED] 0x56BA (DG2)
[04:00:07] [PASSED] 0x56BB (DG2)
[04:00:07] [PASSED] 0x56BC (DG2)
[04:00:07] [PASSED] 0x56BD (DG2)
[04:00:07] [PASSED] 0x5693 (DG2)
[04:00:07] [PASSED] 0x5694 (DG2)
[04:00:07] [PASSED] 0x5695 (DG2)
[04:00:07] [PASSED] 0x56A3 (DG2)
[04:00:07] [PASSED] 0x56A4 (DG2)
[04:00:07] [PASSED] 0x56B2 (DG2)
[04:00:07] [PASSED] 0x56B3 (DG2)
[04:00:07] [PASSED] 0x5696 (DG2)
[04:00:07] [PASSED] 0x5697 (DG2)
[04:00:07] [PASSED] 0xB69 (PVC)
[04:00:07] [PASSED] 0xB6E (PVC)
[04:00:07] [PASSED] 0xBD4 (PVC)
[04:00:07] [PASSED] 0xBD5 (PVC)
[04:00:07] [PASSED] 0xBD6 (PVC)
[04:00:07] [PASSED] 0xBD7 (PVC)
[04:00:07] [PASSED] 0xBD8 (PVC)
[04:00:07] [PASSED] 0xBD9 (PVC)
[04:00:07] [PASSED] 0xBDA (PVC)
[04:00:07] [PASSED] 0xBDB (PVC)
[04:00:07] [PASSED] 0xBE0 (PVC)
[04:00:07] [PASSED] 0xBE1 (PVC)
[04:00:07] [PASSED] 0xBE5 (PVC)
[04:00:07] [PASSED] 0x7D40 (METEORLAKE)
[04:00:07] [PASSED] 0x7D45 (METEORLAKE)
[04:00:07] [PASSED] 0x7D55 (METEORLAKE)
[04:00:07] [PASSED] 0x7D60 (METEORLAKE)
[04:00:07] [PASSED] 0x7DD5 (METEORLAKE)
[04:00:07] [PASSED] 0x6420 (LUNARLAKE)
[04:00:07] [PASSED] 0x64A0 (LUNARLAKE)
[04:00:07] [PASSED] 0x64B0 (LUNARLAKE)
[04:00:07] [PASSED] 0xE202 (BATTLEMAGE)
[04:00:07] [PASSED] 0xE209 (BATTLEMAGE)
[04:00:07] [PASSED] 0xE20B (BATTLEMAGE)
[04:00:07] [PASSED] 0xE20C (BATTLEMAGE)
[04:00:07] [PASSED] 0xE20D (BATTLEMAGE)
[04:00:07] [PASSED] 0xE210 (BATTLEMAGE)
[04:00:07] [PASSED] 0xE211 (BATTLEMAGE)
[04:00:07] [PASSED] 0xE212 (BATTLEMAGE)
[04:00:07] [PASSED] 0xE216 (BATTLEMAGE)
[04:00:07] [PASSED] 0xE220 (BATTLEMAGE)
[04:00:07] [PASSED] 0xE221 (BATTLEMAGE)
[04:00:07] [PASSED] 0xE222 (BATTLEMAGE)
[04:00:07] [PASSED] 0xE223 (BATTLEMAGE)
[04:00:07] [PASSED] 0xB080 (PANTHERLAKE)
[04:00:07] [PASSED] 0xB081 (PANTHERLAKE)
[04:00:07] [PASSED] 0xB082 (PANTHERLAKE)
[04:00:07] [PASSED] 0xB083 (PANTHERLAKE)
[04:00:07] [PASSED] 0xB084 (PANTHERLAKE)
[04:00:07] [PASSED] 0xB085 (PANTHERLAKE)
[04:00:07] [PASSED] 0xB086 (PANTHERLAKE)
[04:00:07] [PASSED] 0xB087 (PANTHERLAKE)
[04:00:07] [PASSED] 0xB08F (PANTHERLAKE)
[04:00:07] [PASSED] 0xB090 (PANTHERLAKE)
[04:00:07] [PASSED] 0xB0A0 (PANTHERLAKE)
[04:00:07] [PASSED] 0xB0B0 (PANTHERLAKE)
[04:00:07] [PASSED] 0xFD80 (PANTHERLAKE)
[04:00:07] [PASSED] 0xFD81 (PANTHERLAKE)
[04:00:07] [PASSED] 0xD740 (NOVALAKE_S)
[04:00:07] [PASSED] 0xD741 (NOVALAKE_S)
[04:00:07] [PASSED] 0xD742 (NOVALAKE_S)
[04:00:07] [PASSED] 0xD743 (NOVALAKE_S)
[04:00:07] [PASSED] 0xD744 (NOVALAKE_S)
[04:00:07] [PASSED] 0xD745 (NOVALAKE_S)
[04:00:07] [PASSED] 0x674C (CRESCENTISLAND)
[04:00:07] =============== [PASSED] check_platform_desc ===============
[04:00:07] ===================== [PASSED] xe_pci ======================
[04:00:07] =================== xe_rtp (2 subtests) ====================
[04:00:07] =============== xe_rtp_process_to_sr_tests ================
[04:00:07] [PASSED] coalesce-same-reg
[04:00:07] [PASSED] no-match-no-add
[04:00:07] [PASSED] match-or
[04:00:07] [PASSED] match-or-xfail
[04:00:07] [PASSED] no-match-no-add-multiple-rules
[04:00:07] [PASSED] two-regs-two-entries
[04:00:07] [PASSED] clr-one-set-other
[04:00:07] [PASSED] set-field
[04:00:07] [PASSED] conflict-duplicate
[04:00:07] [PASSED] conflict-not-disjoint
[04:00:07] [PASSED] conflict-reg-type
[04:00:07] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[04:00:07] ================== xe_rtp_process_tests ===================
[04:00:07] [PASSED] active1
[04:00:07] [PASSED] active2
[04:00:07] [PASSED] active-inactive
[04:00:07] [PASSED] inactive-active
[04:00:07] [PASSED] inactive-1st_or_active-inactive
[04:00:07] [PASSED] inactive-2nd_or_active-inactive
[04:00:07] [PASSED] inactive-last_or_active-inactive
[04:00:07] [PASSED] inactive-no_or_active-inactive
[04:00:07] ============== [PASSED] xe_rtp_process_tests ===============
[04:00:07] ===================== [PASSED] xe_rtp ======================
[04:00:07] ==================== xe_wa (1 subtest) =====================
[04:00:07] ======================== xe_wa_gt =========================
[04:00:07] [PASSED] TIGERLAKE B0
[04:00:07] [PASSED] DG1 A0
[04:00:07] [PASSED] DG1 B0
[04:00:07] [PASSED] ALDERLAKE_S A0
[04:00:07] [PASSED] ALDERLAKE_S B0
[04:00:07] [PASSED] ALDERLAKE_S C0
[04:00:07] [PASSED] ALDERLAKE_S D0
[04:00:07] [PASSED] ALDERLAKE_P A0
[04:00:07] [PASSED] ALDERLAKE_P B0
[04:00:07] [PASSED] ALDERLAKE_P C0
[04:00:07] [PASSED] ALDERLAKE_S RPLS D0
[04:00:07] [PASSED] ALDERLAKE_P RPLU E0
[04:00:07] [PASSED] DG2 G10 C0
[04:00:07] [PASSED] DG2 G11 B1
[04:00:07] [PASSED] DG2 G12 A1
[04:00:07] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[04:00:07] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[04:00:07] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[04:00:07] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[04:00:07] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[04:00:07] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[04:00:07] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[04:00:07] ==================== [PASSED] xe_wa_gt =====================
[04:00:07] ====================== [PASSED] xe_wa ======================
[04:00:07] ============================================================
[04:00:07] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[04:00:07] Elapsed time: 36.079s total, 4.175s configuring, 31.387s building, 0.466s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[04:00:07] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[04:00:09] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[04:00:34] Starting KUnit Kernel (1/1)...
[04:00:34] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[04:00:34] ============ drm_test_pick_cmdline (2 subtests) ============
[04:00:34] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[04:00:34] =============== drm_test_pick_cmdline_named ===============
[04:00:34] [PASSED] NTSC
[04:00:34] [PASSED] NTSC-J
[04:00:34] [PASSED] PAL
[04:00:34] [PASSED] PAL-M
[04:00:34] =========== [PASSED] drm_test_pick_cmdline_named ===========
[04:00:34] ============== [PASSED] drm_test_pick_cmdline ==============
[04:00:34] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[04:00:34] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[04:00:34] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[04:00:34] =========== drm_validate_clone_mode (2 subtests) ===========
[04:00:34] ============== drm_test_check_in_clone_mode ===============
[04:00:34] [PASSED] in_clone_mode
[04:00:34] [PASSED] not_in_clone_mode
[04:00:34] ========== [PASSED] drm_test_check_in_clone_mode ===========
[04:00:34] =============== drm_test_check_valid_clones ===============
[04:00:34] [PASSED] not_in_clone_mode
[04:00:34] [PASSED] valid_clone
[04:00:34] [PASSED] invalid_clone
[04:00:34] =========== [PASSED] drm_test_check_valid_clones ===========
[04:00:34] ============= [PASSED] drm_validate_clone_mode =============
[04:00:34] ============= drm_validate_modeset (1 subtest) =============
[04:00:34] [PASSED] drm_test_check_connector_changed_modeset
[04:00:34] ============== [PASSED] drm_validate_modeset ===============
[04:00:34] ====== drm_test_bridge_get_current_state (2 subtests) ======
[04:00:34] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[04:00:34] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[04:00:34] ======== [PASSED] drm_test_bridge_get_current_state ========
[04:00:34] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[04:00:34] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[04:00:34] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[04:00:34] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[04:00:34] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[04:00:34] ============== drm_bridge_alloc (2 subtests) ===============
[04:00:34] [PASSED] drm_test_drm_bridge_alloc_basic
[04:00:34] [PASSED] drm_test_drm_bridge_alloc_get_put
[04:00:34] ================ [PASSED] drm_bridge_alloc =================
[04:00:34] ================== drm_buddy (8 subtests) ==================
[04:00:34] [PASSED] drm_test_buddy_alloc_limit
[04:00:34] [PASSED] drm_test_buddy_alloc_optimistic
[04:00:34] [PASSED] drm_test_buddy_alloc_pessimistic
[04:00:34] [PASSED] drm_test_buddy_alloc_pathological
[04:00:34] [PASSED] drm_test_buddy_alloc_contiguous
[04:00:34] [PASSED] drm_test_buddy_alloc_clear
[04:00:35] [PASSED] drm_test_buddy_alloc_range_bias
[04:00:35] [PASSED] drm_test_buddy_fragmentation_performance
[04:00:35] ==================== [PASSED] drm_buddy ====================
[04:00:35] ============= drm_cmdline_parser (40 subtests) =============
[04:00:35] [PASSED] drm_test_cmdline_force_d_only
[04:00:35] [PASSED] drm_test_cmdline_force_D_only_dvi
[04:00:35] [PASSED] drm_test_cmdline_force_D_only_hdmi
[04:00:35] [PASSED] drm_test_cmdline_force_D_only_not_digital
[04:00:35] [PASSED] drm_test_cmdline_force_e_only
[04:00:35] [PASSED] drm_test_cmdline_res
[04:00:35] [PASSED] drm_test_cmdline_res_vesa
[04:00:35] [PASSED] drm_test_cmdline_res_vesa_rblank
[04:00:35] [PASSED] drm_test_cmdline_res_rblank
[04:00:35] [PASSED] drm_test_cmdline_res_bpp
[04:00:35] [PASSED] drm_test_cmdline_res_refresh
[04:00:35] [PASSED] drm_test_cmdline_res_bpp_refresh
[04:00:35] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[04:00:35] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[04:00:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[04:00:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[04:00:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[04:00:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[04:00:35] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[04:00:35] [PASSED] drm_test_cmdline_res_margins_force_on
[04:00:35] [PASSED] drm_test_cmdline_res_vesa_margins
[04:00:35] [PASSED] drm_test_cmdline_name
[04:00:35] [PASSED] drm_test_cmdline_name_bpp
[04:00:35] [PASSED] drm_test_cmdline_name_option
[04:00:35] [PASSED] drm_test_cmdline_name_bpp_option
[04:00:35] [PASSED] drm_test_cmdline_rotate_0
[04:00:35] [PASSED] drm_test_cmdline_rotate_90
[04:00:35] [PASSED] drm_test_cmdline_rotate_180
[04:00:35] [PASSED] drm_test_cmdline_rotate_270
[04:00:35] [PASSED] drm_test_cmdline_hmirror
[04:00:35] [PASSED] drm_test_cmdline_vmirror
[04:00:35] [PASSED] drm_test_cmdline_margin_options
[04:00:35] [PASSED] drm_test_cmdline_multiple_options
[04:00:35] [PASSED] drm_test_cmdline_bpp_extra_and_option
[04:00:35] [PASSED] drm_test_cmdline_extra_and_option
[04:00:35] [PASSED] drm_test_cmdline_freestanding_options
[04:00:35] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[04:00:35] [PASSED] drm_test_cmdline_panel_orientation
[04:00:35] ================ drm_test_cmdline_invalid =================
[04:00:35] [PASSED] margin_only
[04:00:35] [PASSED] interlace_only
[04:00:35] [PASSED] res_missing_x
[04:00:35] [PASSED] res_missing_y
[04:00:35] [PASSED] res_bad_y
[04:00:35] [PASSED] res_missing_y_bpp
[04:00:35] [PASSED] res_bad_bpp
[04:00:35] [PASSED] res_bad_refresh
[04:00:35] [PASSED] res_bpp_refresh_force_on_off
[04:00:35] [PASSED] res_invalid_mode
[04:00:35] [PASSED] res_bpp_wrong_place_mode
[04:00:35] [PASSED] name_bpp_refresh
[04:00:35] [PASSED] name_refresh
[04:00:35] [PASSED] name_refresh_wrong_mode
[04:00:35] [PASSED] name_refresh_invalid_mode
[04:00:35] [PASSED] rotate_multiple
[04:00:35] [PASSED] rotate_invalid_val
[04:00:35] [PASSED] rotate_truncated
[04:00:35] [PASSED] invalid_option
[04:00:35] [PASSED] invalid_tv_option
[04:00:35] [PASSED] truncated_tv_option
[04:00:35] ============ [PASSED] drm_test_cmdline_invalid =============
[04:00:35] =============== drm_test_cmdline_tv_options ===============
[04:00:35] [PASSED] NTSC
[04:00:35] [PASSED] NTSC_443
[04:00:35] [PASSED] NTSC_J
[04:00:35] [PASSED] PAL
[04:00:35] [PASSED] PAL_M
[04:00:35] [PASSED] PAL_N
[04:00:35] [PASSED] SECAM
[04:00:35] [PASSED] MONO_525
[04:00:35] [PASSED] MONO_625
[04:00:35] =========== [PASSED] drm_test_cmdline_tv_options ===========
[04:00:35] =============== [PASSED] drm_cmdline_parser ================
[04:00:35] ========== drmm_connector_hdmi_init (20 subtests) ==========
[04:00:35] [PASSED] drm_test_connector_hdmi_init_valid
[04:00:35] [PASSED] drm_test_connector_hdmi_init_bpc_8
[04:00:35] [PASSED] drm_test_connector_hdmi_init_bpc_10
[04:00:35] [PASSED] drm_test_connector_hdmi_init_bpc_12
[04:00:35] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[04:00:35] [PASSED] drm_test_connector_hdmi_init_bpc_null
[04:00:35] [PASSED] drm_test_connector_hdmi_init_formats_empty
[04:00:35] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[04:00:35] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[04:00:35] [PASSED] supported_formats=0x9 yuv420_allowed=1
[04:00:35] [PASSED] supported_formats=0x9 yuv420_allowed=0
[04:00:35] [PASSED] supported_formats=0x3 yuv420_allowed=1
[04:00:35] [PASSED] supported_formats=0x3 yuv420_allowed=0
[04:00:35] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[04:00:35] [PASSED] drm_test_connector_hdmi_init_null_ddc
[04:00:35] [PASSED] drm_test_connector_hdmi_init_null_product
[04:00:35] [PASSED] drm_test_connector_hdmi_init_null_vendor
[04:00:35] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[04:00:35] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[04:00:35] [PASSED] drm_test_connector_hdmi_init_product_valid
[04:00:35] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[04:00:35] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[04:00:35] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[04:00:35] ========= drm_test_connector_hdmi_init_type_valid =========
[04:00:35] [PASSED] HDMI-A
[04:00:35] [PASSED] HDMI-B
[04:00:35] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[04:00:35] ======== drm_test_connector_hdmi_init_type_invalid ========
[04:00:35] [PASSED] Unknown
[04:00:35] [PASSED] VGA
[04:00:35] [PASSED] DVI-I
[04:00:35] [PASSED] DVI-D
[04:00:35] [PASSED] DVI-A
[04:00:35] [PASSED] Composite
[04:00:35] [PASSED] SVIDEO
[04:00:35] [PASSED] LVDS
[04:00:35] [PASSED] Component
[04:00:35] [PASSED] DIN
[04:00:35] [PASSED] DP
[04:00:35] [PASSED] TV
[04:00:35] [PASSED] eDP
[04:00:35] [PASSED] Virtual
[04:00:35] [PASSED] DSI
[04:00:35] [PASSED] DPI
[04:00:35] [PASSED] Writeback
[04:00:35] [PASSED] SPI
[04:00:35] [PASSED] USB
[04:00:35] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[04:00:35] ============ [PASSED] drmm_connector_hdmi_init =============
[04:00:35] ============= drmm_connector_init (3 subtests) =============
[04:00:35] [PASSED] drm_test_drmm_connector_init
[04:00:35] [PASSED] drm_test_drmm_connector_init_null_ddc
[04:00:35] ========= drm_test_drmm_connector_init_type_valid =========
[04:00:35] [PASSED] Unknown
[04:00:35] [PASSED] VGA
[04:00:35] [PASSED] DVI-I
[04:00:35] [PASSED] DVI-D
[04:00:35] [PASSED] DVI-A
[04:00:35] [PASSED] Composite
[04:00:35] [PASSED] SVIDEO
[04:00:35] [PASSED] LVDS
[04:00:35] [PASSED] Component
[04:00:35] [PASSED] DIN
[04:00:35] [PASSED] DP
[04:00:35] [PASSED] HDMI-A
[04:00:35] [PASSED] HDMI-B
[04:00:35] [PASSED] TV
[04:00:35] [PASSED] eDP
[04:00:35] [PASSED] Virtual
[04:00:35] [PASSED] DSI
[04:00:35] [PASSED] DPI
[04:00:35] [PASSED] Writeback
[04:00:35] [PASSED] SPI
[04:00:35] [PASSED] USB
[04:00:35] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[04:00:35] =============== [PASSED] drmm_connector_init ===============
[04:00:35] ========= drm_connector_dynamic_init (6 subtests) ==========
[04:00:35] [PASSED] drm_test_drm_connector_dynamic_init
[04:00:35] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[04:00:35] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[04:00:35] [PASSED] drm_test_drm_connector_dynamic_init_properties
[04:00:35] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[04:00:35] [PASSED] Unknown
[04:00:35] [PASSED] VGA
[04:00:35] [PASSED] DVI-I
[04:00:35] [PASSED] DVI-D
[04:00:35] [PASSED] DVI-A
[04:00:35] [PASSED] Composite
[04:00:35] [PASSED] SVIDEO
[04:00:35] [PASSED] LVDS
[04:00:35] [PASSED] Component
[04:00:35] [PASSED] DIN
[04:00:35] [PASSED] DP
[04:00:35] [PASSED] HDMI-A
[04:00:35] [PASSED] HDMI-B
[04:00:35] [PASSED] TV
[04:00:35] [PASSED] eDP
[04:00:35] [PASSED] Virtual
[04:00:35] [PASSED] DSI
[04:00:35] [PASSED] DPI
[04:00:35] [PASSED] Writeback
[04:00:35] [PASSED] SPI
[04:00:35] [PASSED] USB
[04:00:35] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[04:00:35] ======== drm_test_drm_connector_dynamic_init_name =========
[04:00:35] [PASSED] Unknown
[04:00:35] [PASSED] VGA
[04:00:35] [PASSED] DVI-I
[04:00:35] [PASSED] DVI-D
[04:00:35] [PASSED] DVI-A
[04:00:35] [PASSED] Composite
[04:00:35] [PASSED] SVIDEO
[04:00:35] [PASSED] LVDS
[04:00:35] [PASSED] Component
[04:00:35] [PASSED] DIN
[04:00:35] [PASSED] DP
[04:00:35] [PASSED] HDMI-A
[04:00:35] [PASSED] HDMI-B
[04:00:35] [PASSED] TV
[04:00:35] [PASSED] eDP
[04:00:35] [PASSED] Virtual
[04:00:35] [PASSED] DSI
[04:00:35] [PASSED] DPI
[04:00:35] [PASSED] Writeback
[04:00:35] [PASSED] SPI
[04:00:35] [PASSED] USB
[04:00:35] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[04:00:35] =========== [PASSED] drm_connector_dynamic_init ============
[04:00:35] ==== drm_connector_dynamic_register_early (4 subtests) =====
[04:00:35] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[04:00:35] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[04:00:35] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[04:00:35] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[04:00:35] ====== [PASSED] drm_connector_dynamic_register_early =======
[04:00:35] ======= drm_connector_dynamic_register (7 subtests) ========
[04:00:35] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[04:00:35] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[04:00:35] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[04:00:35] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[04:00:35] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[04:00:35] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[04:00:35] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[04:00:35] ========= [PASSED] drm_connector_dynamic_register ==========
[04:00:35] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[04:00:35] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[04:00:35] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[04:00:35] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[04:00:35] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[04:00:35] ========== drm_test_get_tv_mode_from_name_valid ===========
[04:00:35] [PASSED] NTSC
[04:00:35] [PASSED] NTSC-443
[04:00:35] [PASSED] NTSC-J
[04:00:35] [PASSED] PAL
[04:00:35] [PASSED] PAL-M
[04:00:35] [PASSED] PAL-N
[04:00:35] [PASSED] SECAM
[04:00:35] [PASSED] Mono
[04:00:35] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[04:00:35] [PASSED] drm_test_get_tv_mode_from_name_truncated
[04:00:35] ============ [PASSED] drm_get_tv_mode_from_name ============
[04:00:35] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[04:00:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[04:00:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[04:00:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[04:00:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[04:00:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[04:00:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[04:00:35] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[04:00:35] [PASSED] VIC 96
[04:00:35] [PASSED] VIC 97
[04:00:35] [PASSED] VIC 101
[04:00:35] [PASSED] VIC 102
[04:00:35] [PASSED] VIC 106
[04:00:35] [PASSED] VIC 107
[04:00:35] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[04:00:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[04:00:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[04:00:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[04:00:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[04:00:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[04:00:35] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[04:00:35] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[04:00:35] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[04:00:35] [PASSED] Automatic
[04:00:35] [PASSED] Full
[04:00:35] [PASSED] Limited 16:235
[04:00:35] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[04:00:35] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[04:00:35] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[04:00:35] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[04:00:35] === drm_test_drm_hdmi_connector_get_output_format_name ====
[04:00:35] [PASSED] RGB
[04:00:35] [PASSED] YUV 4:2:0
[04:00:35] [PASSED] YUV 4:2:2
[04:00:35] [PASSED] YUV 4:4:4
[04:00:35] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[04:00:35] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[04:00:35] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[04:00:35] ============= drm_damage_helper (21 subtests) ==============
[04:00:35] [PASSED] drm_test_damage_iter_no_damage
[04:00:35] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[04:00:35] [PASSED] drm_test_damage_iter_no_damage_src_moved
[04:00:35] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[04:00:35] [PASSED] drm_test_damage_iter_no_damage_not_visible
[04:00:35] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[04:00:35] [PASSED] drm_test_damage_iter_no_damage_no_fb
[04:00:35] [PASSED] drm_test_damage_iter_simple_damage
[04:00:35] [PASSED] drm_test_damage_iter_single_damage
[04:00:35] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[04:00:35] [PASSED] drm_test_damage_iter_single_damage_outside_src
[04:00:35] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[04:00:35] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[04:00:35] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[04:00:35] [PASSED] drm_test_damage_iter_single_damage_src_moved
[04:00:35] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[04:00:35] [PASSED] drm_test_damage_iter_damage
[04:00:35] [PASSED] drm_test_damage_iter_damage_one_intersect
[04:00:35] [PASSED] drm_test_damage_iter_damage_one_outside
[04:00:35] [PASSED] drm_test_damage_iter_damage_src_moved
[04:00:35] [PASSED] drm_test_damage_iter_damage_not_visible
[04:00:35] ================ [PASSED] drm_damage_helper ================
[04:00:35] ============== drm_dp_mst_helper (3 subtests) ==============
[04:00:35] ============== drm_test_dp_mst_calc_pbn_mode ==============
[04:00:35] [PASSED] Clock 154000 BPP 30 DSC disabled
[04:00:35] [PASSED] Clock 234000 BPP 30 DSC disabled
[04:00:35] [PASSED] Clock 297000 BPP 24 DSC disabled
[04:00:35] [PASSED] Clock 332880 BPP 24 DSC enabled
[04:00:35] [PASSED] Clock 324540 BPP 24 DSC enabled
[04:00:35] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[04:00:35] ============== drm_test_dp_mst_calc_pbn_div ===============
[04:00:35] [PASSED] Link rate 2000000 lane count 4
[04:00:35] [PASSED] Link rate 2000000 lane count 2
[04:00:35] [PASSED] Link rate 2000000 lane count 1
[04:00:35] [PASSED] Link rate 1350000 lane count 4
[04:00:35] [PASSED] Link rate 1350000 lane count 2
[04:00:35] [PASSED] Link rate 1350000 lane count 1
[04:00:35] [PASSED] Link rate 1000000 lane count 4
[04:00:35] [PASSED] Link rate 1000000 lane count 2
[04:00:35] [PASSED] Link rate 1000000 lane count 1
[04:00:35] [PASSED] Link rate 810000 lane count 4
[04:00:35] [PASSED] Link rate 810000 lane count 2
[04:00:35] [PASSED] Link rate 810000 lane count 1
[04:00:35] [PASSED] Link rate 540000 lane count 4
[04:00:35] [PASSED] Link rate 540000 lane count 2
[04:00:35] [PASSED] Link rate 540000 lane count 1
[04:00:35] [PASSED] Link rate 270000 lane count 4
[04:00:35] [PASSED] Link rate 270000 lane count 2
[04:00:35] [PASSED] Link rate 270000 lane count 1
[04:00:35] [PASSED] Link rate 162000 lane count 4
[04:00:35] [PASSED] Link rate 162000 lane count 2
[04:00:35] [PASSED] Link rate 162000 lane count 1
[04:00:35] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[04:00:35] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[04:00:35] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[04:00:35] [PASSED] DP_POWER_UP_PHY with port number
[04:00:35] [PASSED] DP_POWER_DOWN_PHY with port number
[04:00:35] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[04:00:35] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[04:00:35] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[04:00:35] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[04:00:35] [PASSED] DP_QUERY_PAYLOAD with port number
[04:00:35] [PASSED] DP_QUERY_PAYLOAD with VCPI
[04:00:35] [PASSED] DP_REMOTE_DPCD_READ with port number
[04:00:35] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[04:00:35] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[04:00:35] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[04:00:35] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[04:00:35] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[04:00:35] [PASSED] DP_REMOTE_I2C_READ with port number
[04:00:35] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[04:00:35] [PASSED] DP_REMOTE_I2C_READ with transactions array
[04:00:35] [PASSED] DP_REMOTE_I2C_WRITE with port number
[04:00:35] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[04:00:35] [PASSED] DP_REMOTE_I2C_WRITE with data array
[04:00:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[04:00:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[04:00:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[04:00:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[04:00:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[04:00:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[04:00:35] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[04:00:35] ================ [PASSED] drm_dp_mst_helper ================
[04:00:35] ================== drm_exec (7 subtests) ===================
[04:00:35] [PASSED] sanitycheck
[04:00:35] [PASSED] test_lock
[04:00:35] [PASSED] test_lock_unlock
[04:00:35] [PASSED] test_duplicates
[04:00:35] [PASSED] test_prepare
[04:00:35] [PASSED] test_prepare_array
[04:00:35] [PASSED] test_multiple_loops
[04:00:35] ==================== [PASSED] drm_exec =====================
[04:00:35] =========== drm_format_helper_test (17 subtests) ===========
[04:00:35] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[04:00:35] [PASSED] single_pixel_source_buffer
[04:00:35] [PASSED] single_pixel_clip_rectangle
[04:00:35] [PASSED] well_known_colors
[04:00:35] [PASSED] destination_pitch
[04:00:35] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[04:00:35] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[04:00:35] [PASSED] single_pixel_source_buffer
[04:00:35] [PASSED] single_pixel_clip_rectangle
[04:00:35] [PASSED] well_known_colors
[04:00:35] [PASSED] destination_pitch
[04:00:35] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[04:00:35] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[04:00:35] [PASSED] single_pixel_source_buffer
[04:00:35] [PASSED] single_pixel_clip_rectangle
[04:00:35] [PASSED] well_known_colors
[04:00:35] [PASSED] destination_pitch
[04:00:35] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[04:00:35] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[04:00:35] [PASSED] single_pixel_source_buffer
[04:00:35] [PASSED] single_pixel_clip_rectangle
[04:00:35] [PASSED] well_known_colors
[04:00:35] [PASSED] destination_pitch
[04:00:35] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[04:00:35] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[04:00:35] [PASSED] single_pixel_source_buffer
[04:00:35] [PASSED] single_pixel_clip_rectangle
[04:00:35] [PASSED] well_known_colors
[04:00:35] [PASSED] destination_pitch
[04:00:35] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[04:00:35] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[04:00:35] [PASSED] single_pixel_source_buffer
[04:00:35] [PASSED] single_pixel_clip_rectangle
[04:00:35] [PASSED] well_known_colors
[04:00:35] [PASSED] destination_pitch
[04:00:35] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[04:00:35] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[04:00:35] [PASSED] single_pixel_source_buffer
[04:00:35] [PASSED] single_pixel_clip_rectangle
[04:00:35] [PASSED] well_known_colors
[04:00:35] [PASSED] destination_pitch
[04:00:35] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[04:00:35] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[04:00:35] [PASSED] single_pixel_source_buffer
[04:00:35] [PASSED] single_pixel_clip_rectangle
[04:00:35] [PASSED] well_known_colors
[04:00:35] [PASSED] destination_pitch
[04:00:35] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[04:00:35] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[04:00:35] [PASSED] single_pixel_source_buffer
[04:00:35] [PASSED] single_pixel_clip_rectangle
[04:00:35] [PASSED] well_known_colors
[04:00:35] [PASSED] destination_pitch
[04:00:35] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[04:00:35] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[04:00:35] [PASSED] single_pixel_source_buffer
[04:00:35] [PASSED] single_pixel_clip_rectangle
[04:00:35] [PASSED] well_known_colors
[04:00:35] [PASSED] destination_pitch
[04:00:35] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[04:00:35] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[04:00:35] [PASSED] single_pixel_source_buffer
[04:00:35] [PASSED] single_pixel_clip_rectangle
[04:00:35] [PASSED] well_known_colors
[04:00:35] [PASSED] destination_pitch
[04:00:35] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[04:00:35] ============== drm_test_fb_xrgb8888_to_mono ===============
[04:00:35] [PASSED] single_pixel_source_buffer
[04:00:35] [PASSED] single_pixel_clip_rectangle
[04:00:35] [PASSED] well_known_colors
[04:00:35] [PASSED] destination_pitch
[04:00:35] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[04:00:35] ==================== drm_test_fb_swab =====================
[04:00:35] [PASSED] single_pixel_source_buffer
[04:00:35] [PASSED] single_pixel_clip_rectangle
[04:00:35] [PASSED] well_known_colors
[04:00:35] [PASSED] destination_pitch
[04:00:35] ================ [PASSED] drm_test_fb_swab =================
[04:00:35] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[04:00:35] [PASSED] single_pixel_source_buffer
[04:00:35] [PASSED] single_pixel_clip_rectangle
[04:00:35] [PASSED] well_known_colors
[04:00:35] [PASSED] destination_pitch
[04:00:35] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[04:00:35] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[04:00:35] [PASSED] single_pixel_source_buffer
[04:00:35] [PASSED] single_pixel_clip_rectangle
[04:00:35] [PASSED] well_known_colors
[04:00:35] [PASSED] destination_pitch
[04:00:35] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[04:00:35] ================= drm_test_fb_clip_offset =================
[04:00:35] [PASSED] pass through
[04:00:35] [PASSED] horizontal offset
[04:00:35] [PASSED] vertical offset
[04:00:35] [PASSED] horizontal and vertical offset
[04:00:35] [PASSED] horizontal offset (custom pitch)
[04:00:35] [PASSED] vertical offset (custom pitch)
[04:00:35] [PASSED] horizontal and vertical offset (custom pitch)
[04:00:35] ============= [PASSED] drm_test_fb_clip_offset =============
[04:00:35] =================== drm_test_fb_memcpy ====================
[04:00:35] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[04:00:35] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[04:00:35] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[04:00:35] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[04:00:35] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[04:00:35] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[04:00:35] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[04:00:35] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[04:00:35] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[04:00:35] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[04:00:35] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[04:00:35] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[04:00:35] =============== [PASSED] drm_test_fb_memcpy ================
[04:00:35] ============= [PASSED] drm_format_helper_test ==============
[04:00:35] ================= drm_format (18 subtests) =================
[04:00:35] [PASSED] drm_test_format_block_width_invalid
[04:00:35] [PASSED] drm_test_format_block_width_one_plane
[04:00:35] [PASSED] drm_test_format_block_width_two_plane
[04:00:35] [PASSED] drm_test_format_block_width_three_plane
[04:00:35] [PASSED] drm_test_format_block_width_tiled
[04:00:35] [PASSED] drm_test_format_block_height_invalid
[04:00:35] [PASSED] drm_test_format_block_height_one_plane
[04:00:35] [PASSED] drm_test_format_block_height_two_plane
[04:00:35] [PASSED] drm_test_format_block_height_three_plane
[04:00:35] [PASSED] drm_test_format_block_height_tiled
[04:00:35] [PASSED] drm_test_format_min_pitch_invalid
[04:00:35] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[04:00:35] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[04:00:35] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[04:00:35] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[04:00:35] [PASSED] drm_test_format_min_pitch_two_plane
[04:00:35] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[04:00:35] [PASSED] drm_test_format_min_pitch_tiled
[04:00:35] =================== [PASSED] drm_format ====================
[04:00:35] ============== drm_framebuffer (10 subtests) ===============
[04:00:35] ========== drm_test_framebuffer_check_src_coords ==========
[04:00:35] [PASSED] Success: source fits into fb
[04:00:35] [PASSED] Fail: overflowing fb with x-axis coordinate
[04:00:35] [PASSED] Fail: overflowing fb with y-axis coordinate
[04:00:35] [PASSED] Fail: overflowing fb with source width
[04:00:35] [PASSED] Fail: overflowing fb with source height
[04:00:35] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[04:00:35] [PASSED] drm_test_framebuffer_cleanup
[04:00:35] =============== drm_test_framebuffer_create ===============
[04:00:35] [PASSED] ABGR8888 normal sizes
[04:00:35] [PASSED] ABGR8888 max sizes
[04:00:35] [PASSED] ABGR8888 pitch greater than min required
[04:00:35] [PASSED] ABGR8888 pitch less than min required
[04:00:35] [PASSED] ABGR8888 Invalid width
[04:00:35] [PASSED] ABGR8888 Invalid buffer handle
[04:00:35] [PASSED] No pixel format
[04:00:35] [PASSED] ABGR8888 Width 0
[04:00:35] [PASSED] ABGR8888 Height 0
[04:00:35] [PASSED] ABGR8888 Out of bound height * pitch combination
[04:00:35] [PASSED] ABGR8888 Large buffer offset
[04:00:35] [PASSED] ABGR8888 Buffer offset for inexistent plane
[04:00:35] [PASSED] ABGR8888 Invalid flag
[04:00:35] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[04:00:35] [PASSED] ABGR8888 Valid buffer modifier
[04:00:35] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[04:00:35] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[04:00:35] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[04:00:35] [PASSED] NV12 Normal sizes
[04:00:35] [PASSED] NV12 Max sizes
[04:00:35] [PASSED] NV12 Invalid pitch
[04:00:35] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[04:00:35] [PASSED] NV12 different modifier per-plane
[04:00:35] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[04:00:35] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[04:00:35] [PASSED] NV12 Modifier for inexistent plane
[04:00:35] [PASSED] NV12 Handle for inexistent plane
[04:00:35] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[04:00:35] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[04:00:35] [PASSED] YVU420 Normal sizes
[04:00:35] [PASSED] YVU420 Max sizes
[04:00:35] [PASSED] YVU420 Invalid pitch
[04:00:35] [PASSED] YVU420 Different pitches
[04:00:35] [PASSED] YVU420 Different buffer offsets/pitches
[04:00:35] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[04:00:35] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[04:00:35] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[04:00:35] [PASSED] YVU420 Valid modifier
[04:00:35] [PASSED] YVU420 Different modifiers per plane
[04:00:35] [PASSED] YVU420 Modifier for inexistent plane
[04:00:35] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[04:00:35] [PASSED] X0L2 Normal sizes
[04:00:35] [PASSED] X0L2 Max sizes
[04:00:35] [PASSED] X0L2 Invalid pitch
[04:00:35] [PASSED] X0L2 Pitch greater than minimum required
[04:00:35] [PASSED] X0L2 Handle for inexistent plane
[04:00:35] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[04:00:35] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[04:00:35] [PASSED] X0L2 Valid modifier
[04:00:35] [PASSED] X0L2 Modifier for inexistent plane
[04:00:35] =========== [PASSED] drm_test_framebuffer_create ===========
[04:00:35] [PASSED] drm_test_framebuffer_free
[04:00:35] [PASSED] drm_test_framebuffer_init
[04:00:35] [PASSED] drm_test_framebuffer_init_bad_format
[04:00:35] [PASSED] drm_test_framebuffer_init_dev_mismatch
[04:00:35] [PASSED] drm_test_framebuffer_lookup
[04:00:35] [PASSED] drm_test_framebuffer_lookup_inexistent
[04:00:35] [PASSED] drm_test_framebuffer_modifiers_not_supported
[04:00:35] ================= [PASSED] drm_framebuffer =================
[04:00:35] ================ drm_gem_shmem (8 subtests) ================
[04:00:35] [PASSED] drm_gem_shmem_test_obj_create
[04:00:35] [PASSED] drm_gem_shmem_test_obj_create_private
[04:00:35] [PASSED] drm_gem_shmem_test_pin_pages
[04:00:35] [PASSED] drm_gem_shmem_test_vmap
[04:00:35] [PASSED] drm_gem_shmem_test_get_sg_table
[04:00:35] [PASSED] drm_gem_shmem_test_get_pages_sgt
[04:00:35] [PASSED] drm_gem_shmem_test_madvise
[04:00:35] [PASSED] drm_gem_shmem_test_purge
[04:00:35] ================== [PASSED] drm_gem_shmem ==================
[04:00:35] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[04:00:35] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[04:00:35] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[04:00:35] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[04:00:35] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[04:00:35] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[04:00:35] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[04:00:35] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[04:00:35] [PASSED] Automatic
[04:00:35] [PASSED] Full
[04:00:35] [PASSED] Limited 16:235
[04:00:35] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[04:00:35] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[04:00:35] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[04:00:35] [PASSED] drm_test_check_disable_connector
[04:00:35] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[04:00:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[04:00:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[04:00:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[04:00:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[04:00:35] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[04:00:35] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[04:00:35] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[04:00:35] [PASSED] drm_test_check_output_bpc_dvi
[04:00:35] [PASSED] drm_test_check_output_bpc_format_vic_1
[04:00:35] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[04:00:35] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[04:00:35] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[04:00:35] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[04:00:35] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[04:00:35] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[04:00:35] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[04:00:35] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[04:00:35] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[04:00:35] [PASSED] drm_test_check_broadcast_rgb_value
[04:00:35] [PASSED] drm_test_check_bpc_8_value
[04:00:35] [PASSED] drm_test_check_bpc_10_value
[04:00:35] [PASSED] drm_test_check_bpc_12_value
[04:00:35] [PASSED] drm_test_check_format_value
[04:00:35] [PASSED] drm_test_check_tmds_char_value
[04:00:35] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[04:00:35] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[04:00:35] [PASSED] drm_test_check_mode_valid
[04:00:35] [PASSED] drm_test_check_mode_valid_reject
[04:00:35] [PASSED] drm_test_check_mode_valid_reject_rate
[04:00:35] [PASSED] drm_test_check_mode_valid_reject_max_clock
[04:00:35] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[04:00:35] ================= drm_managed (2 subtests) =================
[04:00:35] [PASSED] drm_test_managed_release_action
[04:00:35] [PASSED] drm_test_managed_run_action
[04:00:35] =================== [PASSED] drm_managed ===================
[04:00:35] =================== drm_mm (6 subtests) ====================
[04:00:35] [PASSED] drm_test_mm_init
[04:00:35] [PASSED] drm_test_mm_debug
[04:00:35] [PASSED] drm_test_mm_align32
[04:00:35] [PASSED] drm_test_mm_align64
[04:00:35] [PASSED] drm_test_mm_lowest
[04:00:35] [PASSED] drm_test_mm_highest
[04:00:35] ===================== [PASSED] drm_mm ======================
[04:00:35] ============= drm_modes_analog_tv (5 subtests) =============
[04:00:35] [PASSED] drm_test_modes_analog_tv_mono_576i
[04:00:35] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[04:00:35] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[04:00:35] [PASSED] drm_test_modes_analog_tv_pal_576i
[04:00:35] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[04:00:35] =============== [PASSED] drm_modes_analog_tv ===============
[04:00:35] ============== drm_plane_helper (2 subtests) ===============
[04:00:35] =============== drm_test_check_plane_state ================
[04:00:35] [PASSED] clipping_simple
[04:00:35] [PASSED] clipping_rotate_reflect
[04:00:35] [PASSED] positioning_simple
[04:00:35] [PASSED] upscaling
[04:00:35] [PASSED] downscaling
[04:00:35] [PASSED] rounding1
[04:00:35] [PASSED] rounding2
[04:00:35] [PASSED] rounding3
[04:00:35] [PASSED] rounding4
[04:00:35] =========== [PASSED] drm_test_check_plane_state ============
[04:00:35] =========== drm_test_check_invalid_plane_state ============
[04:00:35] [PASSED] positioning_invalid
[04:00:35] [PASSED] upscaling_invalid
[04:00:35] [PASSED] downscaling_invalid
[04:00:35] ======= [PASSED] drm_test_check_invalid_plane_state ========
[04:00:35] ================ [PASSED] drm_plane_helper =================
[04:00:35] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[04:00:35] ====== drm_test_connector_helper_tv_get_modes_check =======
[04:00:35] [PASSED] None
[04:00:35] [PASSED] PAL
[04:00:35] [PASSED] NTSC
[04:00:35] [PASSED] Both, NTSC Default
[04:00:35] [PASSED] Both, PAL Default
[04:00:35] [PASSED] Both, NTSC Default, with PAL on command-line
[04:00:35] [PASSED] Both, PAL Default, with NTSC on command-line
[04:00:35] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[04:00:35] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[04:00:35] ================== drm_rect (9 subtests) ===================
[04:00:35] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[04:00:35] [PASSED] drm_test_rect_clip_scaled_not_clipped
[04:00:35] [PASSED] drm_test_rect_clip_scaled_clipped
[04:00:35] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[04:00:35] ================= drm_test_rect_intersect =================
[04:00:35] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[04:00:35] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[04:00:35] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[04:00:35] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[04:00:35] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[04:00:35] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[04:00:35] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[04:00:35] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[04:00:35] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[04:00:35] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[04:00:35] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[04:00:35] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[04:00:35] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[04:00:35] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[04:00:35] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[04:00:35] ============= [PASSED] drm_test_rect_intersect =============
[04:00:35] ================ drm_test_rect_calc_hscale ================
[04:00:35] [PASSED] normal use
[04:00:35] [PASSED] out of max range
[04:00:35] [PASSED] out of min range
[04:00:35] [PASSED] zero dst
[04:00:35] [PASSED] negative src
[04:00:35] [PASSED] negative dst
[04:00:35] ============ [PASSED] drm_test_rect_calc_hscale ============
[04:00:35] ================ drm_test_rect_calc_vscale ================
[04:00:35] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[04:00:35] [PASSED] out of max range
[04:00:35] [PASSED] out of min range
[04:00:35] [PASSED] zero dst
[04:00:35] [PASSED] negative src
[04:00:35] [PASSED] negative dst
[04:00:35] ============ [PASSED] drm_test_rect_calc_vscale ============
[04:00:35] ================== drm_test_rect_rotate ===================
[04:00:35] [PASSED] reflect-x
[04:00:35] [PASSED] reflect-y
[04:00:35] [PASSED] rotate-0
[04:00:35] [PASSED] rotate-90
[04:00:35] [PASSED] rotate-180
[04:00:35] [PASSED] rotate-270
[04:00:35] ============== [PASSED] drm_test_rect_rotate ===============
[04:00:35] ================ drm_test_rect_rotate_inv =================
[04:00:35] [PASSED] reflect-x
[04:00:35] [PASSED] reflect-y
[04:00:35] [PASSED] rotate-0
[04:00:35] [PASSED] rotate-90
[04:00:35] [PASSED] rotate-180
[04:00:35] [PASSED] rotate-270
[04:00:35] ============ [PASSED] drm_test_rect_rotate_inv =============
[04:00:35] ==================== [PASSED] drm_rect =====================
[04:00:35] ============ drm_sysfb_modeset_test (1 subtest) ============
[04:00:35] ============ drm_test_sysfb_build_fourcc_list =============
[04:00:35] [PASSED] no native formats
[04:00:35] [PASSED] XRGB8888 as native format
[04:00:35] [PASSED] remove duplicates
[04:00:35] [PASSED] convert alpha formats
[04:00:35] [PASSED] random formats
[04:00:35] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[04:00:35] ============= [PASSED] drm_sysfb_modeset_test ==============
[04:00:35] ================== drm_fixp (2 subtests) ===================
[04:00:35] [PASSED] drm_test_int2fixp
[04:00:35] [PASSED] drm_test_sm2fixp
[04:00:35] ==================== [PASSED] drm_fixp =====================
[04:00:35] ============================================================
[04:00:35] Testing complete. Ran 624 tests: passed: 624
[04:00:35] Elapsed time: 27.481s total, 1.644s configuring, 25.468s building, 0.367s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[04:00:35] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[04:00:36] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[04:00:46] Starting KUnit Kernel (1/1)...
[04:00:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[04:00:46] ================= ttm_device (5 subtests) ==================
[04:00:46] [PASSED] ttm_device_init_basic
[04:00:46] [PASSED] ttm_device_init_multiple
[04:00:46] [PASSED] ttm_device_fini_basic
[04:00:46] [PASSED] ttm_device_init_no_vma_man
[04:00:46] ================== ttm_device_init_pools ==================
[04:00:46] [PASSED] No DMA allocations, no DMA32 required
[04:00:46] [PASSED] DMA allocations, DMA32 required
[04:00:46] [PASSED] No DMA allocations, DMA32 required
[04:00:46] [PASSED] DMA allocations, no DMA32 required
[04:00:46] ============== [PASSED] ttm_device_init_pools ==============
[04:00:46] =================== [PASSED] ttm_device ====================
[04:00:46] ================== ttm_pool (8 subtests) ===================
[04:00:46] ================== ttm_pool_alloc_basic ===================
[04:00:46] [PASSED] One page
[04:00:46] [PASSED] More than one page
[04:00:46] [PASSED] Above the allocation limit
[04:00:46] [PASSED] One page, with coherent DMA mappings enabled
[04:00:46] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[04:00:46] ============== [PASSED] ttm_pool_alloc_basic ===============
[04:00:46] ============== ttm_pool_alloc_basic_dma_addr ==============
[04:00:46] [PASSED] One page
[04:00:46] [PASSED] More than one page
[04:00:46] [PASSED] Above the allocation limit
[04:00:46] [PASSED] One page, with coherent DMA mappings enabled
[04:00:46] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[04:00:46] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[04:00:46] [PASSED] ttm_pool_alloc_order_caching_match
[04:00:46] [PASSED] ttm_pool_alloc_caching_mismatch
[04:00:46] [PASSED] ttm_pool_alloc_order_mismatch
[04:00:46] [PASSED] ttm_pool_free_dma_alloc
[04:00:46] [PASSED] ttm_pool_free_no_dma_alloc
[04:00:46] [PASSED] ttm_pool_fini_basic
[04:00:46] ==================== [PASSED] ttm_pool =====================
[04:00:46] ================ ttm_resource (8 subtests) =================
[04:00:46] ================= ttm_resource_init_basic =================
[04:00:46] [PASSED] Init resource in TTM_PL_SYSTEM
[04:00:46] [PASSED] Init resource in TTM_PL_VRAM
[04:00:46] [PASSED] Init resource in a private placement
[04:00:46] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[04:00:46] ============= [PASSED] ttm_resource_init_basic =============
[04:00:46] [PASSED] ttm_resource_init_pinned
[04:00:46] [PASSED] ttm_resource_fini_basic
[04:00:46] [PASSED] ttm_resource_manager_init_basic
[04:00:46] [PASSED] ttm_resource_manager_usage_basic
[04:00:46] [PASSED] ttm_resource_manager_set_used_basic
[04:00:46] [PASSED] ttm_sys_man_alloc_basic
[04:00:46] [PASSED] ttm_sys_man_free_basic
[04:00:46] ================== [PASSED] ttm_resource ===================
[04:00:46] =================== ttm_tt (15 subtests) ===================
[04:00:46] ==================== ttm_tt_init_basic ====================
[04:00:46] [PASSED] Page-aligned size
[04:00:46] [PASSED] Extra pages requested
[04:00:46] ================ [PASSED] ttm_tt_init_basic ================
[04:00:46] [PASSED] ttm_tt_init_misaligned
[04:00:46] [PASSED] ttm_tt_fini_basic
[04:00:46] [PASSED] ttm_tt_fini_sg
[04:00:46] [PASSED] ttm_tt_fini_shmem
[04:00:46] [PASSED] ttm_tt_create_basic
[04:00:46] [PASSED] ttm_tt_create_invalid_bo_type
[04:00:46] [PASSED] ttm_tt_create_ttm_exists
[04:00:46] [PASSED] ttm_tt_create_failed
[04:00:46] [PASSED] ttm_tt_destroy_basic
[04:00:46] [PASSED] ttm_tt_populate_null_ttm
[04:00:46] [PASSED] ttm_tt_populate_populated_ttm
[04:00:46] [PASSED] ttm_tt_unpopulate_basic
[04:00:46] [PASSED] ttm_tt_unpopulate_empty_ttm
[04:00:46] [PASSED] ttm_tt_swapin_basic
[04:00:46] ===================== [PASSED] ttm_tt ======================
[04:00:46] =================== ttm_bo (14 subtests) ===================
[04:00:46] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[04:00:46] [PASSED] Cannot be interrupted and sleeps
[04:00:46] [PASSED] Cannot be interrupted, locks straight away
[04:00:46] [PASSED] Can be interrupted, sleeps
[04:00:46] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[04:00:46] [PASSED] ttm_bo_reserve_locked_no_sleep
[04:00:46] [PASSED] ttm_bo_reserve_no_wait_ticket
[04:00:46] [PASSED] ttm_bo_reserve_double_resv
[04:00:46] [PASSED] ttm_bo_reserve_interrupted
[04:00:46] [PASSED] ttm_bo_reserve_deadlock
[04:00:46] [PASSED] ttm_bo_unreserve_basic
[04:00:46] [PASSED] ttm_bo_unreserve_pinned
[04:00:46] [PASSED] ttm_bo_unreserve_bulk
[04:00:46] [PASSED] ttm_bo_fini_basic
[04:00:46] [PASSED] ttm_bo_fini_shared_resv
[04:00:46] [PASSED] ttm_bo_pin_basic
[04:00:46] [PASSED] ttm_bo_pin_unpin_resource
[04:00:46] [PASSED] ttm_bo_multiple_pin_one_unpin
[04:00:46] ===================== [PASSED] ttm_bo ======================
[04:00:46] ============== ttm_bo_validate (21 subtests) ===============
[04:00:46] ============== ttm_bo_init_reserved_sys_man ===============
[04:00:46] [PASSED] Buffer object for userspace
[04:00:46] [PASSED] Kernel buffer object
[04:00:46] [PASSED] Shared buffer object
[04:00:46] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[04:00:46] ============== ttm_bo_init_reserved_mock_man ==============
[04:00:46] [PASSED] Buffer object for userspace
[04:00:46] [PASSED] Kernel buffer object
[04:00:46] [PASSED] Shared buffer object
[04:00:46] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[04:00:46] [PASSED] ttm_bo_init_reserved_resv
[04:00:46] ================== ttm_bo_validate_basic ==================
[04:00:46] [PASSED] Buffer object for userspace
[04:00:46] [PASSED] Kernel buffer object
[04:00:46] [PASSED] Shared buffer object
[04:00:46] ============== [PASSED] ttm_bo_validate_basic ==============
[04:00:46] [PASSED] ttm_bo_validate_invalid_placement
[04:00:46] ============= ttm_bo_validate_same_placement ==============
[04:00:46] [PASSED] System manager
[04:00:46] [PASSED] VRAM manager
[04:00:46] ========= [PASSED] ttm_bo_validate_same_placement ==========
[04:00:46] [PASSED] ttm_bo_validate_failed_alloc
[04:00:46] [PASSED] ttm_bo_validate_pinned
[04:00:46] [PASSED] ttm_bo_validate_busy_placement
[04:00:46] ================ ttm_bo_validate_multihop =================
[04:00:46] [PASSED] Buffer object for userspace
[04:00:46] [PASSED] Kernel buffer object
[04:00:46] [PASSED] Shared buffer object
[04:00:46] ============ [PASSED] ttm_bo_validate_multihop =============
[04:00:46] ========== ttm_bo_validate_no_placement_signaled ==========
[04:00:46] [PASSED] Buffer object in system domain, no page vector
[04:00:46] [PASSED] Buffer object in system domain with an existing page vector
[04:00:46] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[04:00:46] ======== ttm_bo_validate_no_placement_not_signaled ========
[04:00:46] [PASSED] Buffer object for userspace
[04:00:46] [PASSED] Kernel buffer object
[04:00:46] [PASSED] Shared buffer object
[04:00:46] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[04:00:46] [PASSED] ttm_bo_validate_move_fence_signaled
[04:00:46] ========= ttm_bo_validate_move_fence_not_signaled =========
[04:00:46] [PASSED] Waits for GPU
[04:00:46] [PASSED] Tries to lock straight away
[04:00:46] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[04:00:46] [PASSED] ttm_bo_validate_happy_evict
[04:00:46] [PASSED] ttm_bo_validate_all_pinned_evict
[04:00:46] [PASSED] ttm_bo_validate_allowed_only_evict
[04:00:46] [PASSED] ttm_bo_validate_deleted_evict
[04:00:46] [PASSED] ttm_bo_validate_busy_domain_evict
[04:00:46] [PASSED] ttm_bo_validate_evict_gutting
[04:00:46] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[04:00:46] ================= [PASSED] ttm_bo_validate =================
[04:00:46] ============================================================
[04:00:46] Testing complete. Ran 101 tests: passed: 101
[04:00:46] Elapsed time: 11.330s total, 1.666s configuring, 9.448s building, 0.182s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 5+ messages in thread